MAX3740EVKIT [MAXIM]
Evaluation Kit for the MAX3740 ; 评估板MAX3740\n
| 型号： | MAX3740EVKIT |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Evaluation Kit for the MAX3740
|
| 文件： | 总9页 (文件大小：408K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2694; Rev 0; 12/02
MAX3740 Evaluation Kit
General Description
The MAX3740 evaluation kit (EV kit) is an assembled
demonstration board that provides complete optical
and electrical evaluation of the MAX3740 VCSEL driver.
Features
ꢀ Fully Assembled and Tested
ꢀ Single +3.3V Power-Supply Operation
ꢀ Allows Optical and Electrical Evaluation
ꢀ Allows Evaluation with DS1858 in SFP Layout
The EV kit has an electrical section and an optical sec-
tion. The output of the electrical evaluation section is
interfaced to an SMA connector, which can be connect-
ed to a 50Ω terminated oscilloscope. The optical sec-
tion of the evaluation board is populated with a DS1858
digital potentiometer and allows evaluation of the
MAX3740 in an SFP layout. With slight modifications, a
common-cathode VCSEL also can be evaluated using
the electrical side of the EV kit.
Ordering Information
PART
TEMP RANGE
IC PACKAGE
MAX3740EVKIT
-40°C to +85°C
24 QFN
Electrical Evaluation Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
C1, C2, C5, C9,
C13, C15, C16,
C17
R10, R26, R27,
6
0.1µF 10% ceramic capacitors
(0402)
Open
8
1
R34, R35, R36
R14
R15
R16
1
1
1
20kΩ potentiometer
50kΩ potentiometer
500kΩ potentiometer
0.047µF 10% ceramic capacitor
(0402)
C3
C4, C6, C7, C8,
C11, C12
0.01µF 10% ceramic capacitors
(0402)
NPN transistors (SOT23)
Zetex FMMT491A
6
1
1
Q1, Q2
Q3
2
1
C10
Open
MOSFET (SOT23)
Zetex BS170F
10µF 10% ceramic capacitor
(0805)
C14
JU1–JU8, JU10
J1–J7
9
7
2-pin headers, 0.1in centers
10µF 10% tantalum capacitor,
case B
SMA connectors, round contacts
C18
1
TP1–TP11,
TP20, TP21
13
Test points
D1
D2
1
1
VCSEL laser and photodiode*
LED, red T1 package
U1
1
1
9
1
1
MAX3740ETG (24 QFN)
MAX495ESA (8 SO)
Shunts
600Ω ferrite beads (0603)
Murata BLM18HD102SN1
U2
L1, L2, L3
L4
3
1
None
None
None
1µH inductor (1008CS)
Coilcraft 1008CS-102XKBC
MAX3740 EV board
MAX3740 data sheet
R1, R2
R3
2
1
1
2
2
1
1
2
10kΩ potentiometers
350Ω resistor (0402)
2.49kΩ resistor (0402)
499Ω resistors (0402)
10kΩ resistors (0402)
0Ω resistor (0402)*
*These components are not supplied but can be populated if
the user wants to test the VCSEL with the electrical side of the
EV kit.
R4
R5, R12
R6, R13
R7
R8
4.7kΩ resistor (0402)
49.9Ω resistors (0402)
R9, R11
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX3740 Evaluation Kit
Optical Evaluation
Component List
Quick Start
Electrical Evaluation
In the electrical configuration, an automatic power-con-
trol (APC) test circuit is included to emulate a semicon-
ductor laser with a monitor photodiode. Monitor diode
current is provided by transistor Q1, which is controlled
by an operational amplifier (U2). The APC test circuit,
consisting of U2 and Q1, applies the simulated monitor
diode current to the MD pin of the MAX3740. To ensure
proper operation in the electrical configuration, set up
the evaluation board as follows:
DESIGNATION QTY
DESCRIPTION
0.01µF 10% ceramic capacitor
(0402)
C19
C20, C25, C27
C21
1
3
1
1
4
0.1µF 10% ceramic capacitors
(0402)
10µF 10% tantalum capacitor,
case B
0.047µF 10% ceramic capacitor
(0402)
1) Place shunts on JU4–JU8 and JU10 (see the
Adjustment and Control Descriptions section for
details).
C22
C23, C26, C28,
C29
0.01µF 10% ceramic capacitors
(0201)
2) Remove shunts JU1 and JU2.
C30
J9, J10
JU9
1
2
1
Open
3) To enable the outputs, connect TX_DISABLE to
GND by placing a shunt on JU3.
SMA connectors, round contacts
2-pin header, 0.1in center
Note: When performing the following resistance
checks, autoranging DMMs may forward bias the
on-chip ESD protection and cause inaccurate mea-
surements. To avoid this problem, manually set the
DMM to a high range.
1µH inductor (1008CS)
Coilcraft 1008CS-102XKBC
L5
1
600Ω ferrite bead (0603)
Murata BLM18HD102SN1
L6
1
3
4
4) Adjust R15, the R
potentiometer, for 1.7kΩ
BIASSET
R17, R18, R28
4.7kΩ resistors (0603)
resistance between TP4 (BIASSET) and ground.
R21, R22, R23,
R33
5) Adjust R1, the R potentiometer, for 10kΩ
PWRSET
Open
resistance between TP2 (REF) and pin 1 (MD) of JU2.
R24
R25
1
1
2
1
1
350Ω resistor (0201)
1.7kΩ resistor (0201)
0Ω resistors (0201)
49.9Ω resistor (0402)
20kΩ resistor (0402)
6) Adjust R14, the R
potentiometer, for 20kΩ
PEAKSET
resistance between TP10 (PEAKSET) and ground to
disable peaking.
R29, R30
R31
7) Adjust R16, the RTC potentiometer, for 0Ω resis-
tance between TP7 (TC1) and TP8 (TC2) to disable
temperature compensation.
R32
TP13–TP19,
TP22, TP23
8) Adjust R2, the R potentiometer, for 10kΩ
MODSET
9
Test points
resistance between TP9 (MODSET) and ground.
U3
U4
1
1
MAX3740ETG (24-pin QFN)
9) Apply a differential input signal (250mV
to
P-P
DS1858 (16-pin BGA, 1.5mm pitch)
2200mV ) between SMA connectors J5 and J7
P-P
(IN+ and IN-).
10) Attach a high-speed oscilloscope with a 50Ω input
Component Suppliers
to SMA connector J6 (OUT).
SUPPLIER
AVX
PHONE
FAX
11) Connect a +3.3V supply between TP20 (VCC) and
TP21 (GND). Adjust the power supply until the volt-
age between TP11 and ground is +3.3V.
803-946-0690
847-639-6400
814-237-1431
516-543-7100
803-626-3123
847-639-1469
814-238-0490
516-864-7630
Coilcraft
Murata
12) Adjust R1 (R
) until the desired laser bias
PWRSET
current is achieved.
Zetex
V
PIN1_JU5
I
=
BIAS
49.9Ω
2
_______________________________________________________________________________________
MAX3740 Evaluation Kit
13) The MD and BIAS currents can be monitored at TP1
(V ) and TP3 (V ) using the equa-
9) Adjust R16, the R
potentiometer, for 0Ω resis-
TC
tance between TP7 (TC1) and TP8 (TC2), to disable
temperature compensation.
PWRMON
tions below:
BIASMON
10) Adjust R2, the R
potentiometer, for 10kΩ
MODSET
V
2×R
PWRMON
I
=
=
resistance between TP9 (MODSET) and ground.
MD
PWRSET
11) Apply a differential input signal (250mV
to
P-P
2200mV ) between SMA connectors J5 and J7
P-P
9× V
(IN+ and IN-).
BIASMON
350Ω
I
BIAS
12) Attach the VCSEL fiber connector to an optical/elec-
trical converter.
Note: If the voltage at TP1 exceeds V
typ) or TP3 exceeds V
signal is asserted and latched.
(0.8V
PMTH
13) Connect a +3.3V supply between TP20 (VCC) and
TP21 (GND). Adjust the power supply until the volt-
age between TP11 and ground is +3.3V.
(0.8V typ), the FAULT
BMTH
14) Adjust R2 until the desired laser modulation current
is achieved.
14) Adjust R1 (R
) until desired average optical
PWRSET
power is achieved.
15) The MD and BIAS currents can be monitored at TP1
(V ) and TP3 (V ) using the follow-
Signal Amplitude (V)
I
=
MOD
PWRMON
ing equations:
BIASMON
50Ω
15) Adjust R14 (R
) until the desired amount of
PEAKSET
peaking is achieved.
V
2×R
PWRMON
I
=
=
MD
PWRSET
Optical Evaluation with Mechanical
Potentiometers
For optical evaluation of the MAX3740, configure the
evaluation kit as follows:
9× V
BIASMON
350Ω
I
BIAS
1) Place shunts on JU2, JU6, JU7, JU8, and JU10 (see
Note: If the voltage at TP1 exceeds V
(0.8V
PMTH
the Adjustment and Control Descriptions section).
typ) or TP3 exceeds V
(0.8V typ), the FAULT
BMTH
2) Remove components L2 and C9. Remove the
shunts from JU1, JU4, and JU5.
signal is asserted and latched.
16) Adjust R2 (R ) until the desired optical
MODSET
3) Install a 0Ω resistor at R7 to connect the anode of
amplitude is achieved. Optical amplitude can be
observed on an oscilloscope connected to an opti-
cal/electrical converter. VCSEL overshoot and ring-
ing can be improved by appropriate selection of
R10 and C10, as described in the Design
Procedure section of the MAX3740 data sheet.
the VCSEL to the output.
4) To enable the outputs, connect TX_DISABLE to
GND by placing a shunt on JU3.
5) Connect a common-cathode VCSEL as shown in
Figure 1. Keep leads short to reduce reflection.
17) To improve the falling edge of a VCSEL, adjust R14
Note: When performing the following resistance
checks, autoranging DMMs may forward bias the
on-chip ESD protection and cause inaccurate mea-
surements. To avoid this problem, manually set the
DMM to a high range.
(R
PEAKSET
).
Optical Evaluation Using the DS1858
Digital Potentiometer with Monitors
The MAX3740 optical evaluation side is similar to an SFP
transmitter. In this configuration, R
and R
PWRSET
6) Adjust R15, the R
potentiometer, for 1.7kΩ
MODSET
BIASSET
are provided by the DS1858 digital potentiometer. The
DS1858 also monitors the PWRMON and BIASMON out-
puts of the MAX3740. Control for the DS1858 is provided
through a two-wire interface at TP14 (MOD-DEF2) and
TP15 (MOD-DEF1). For control of the digital potentiome-
ter, refer to the DS1858 data sheet.
resistance between TP4 (BIASSET) and ground.
7) Adjust R1, the R potentiometer, for 10kΩ
PWRSET
resistance between TP2 (REF) and pin 1 (MD) of JU2.
8) Adjust R14, the R
potentiometer, for 20kΩ
PEAKSET
resistance between TP10 (PEAKSET) and ground to
disable peaking.
_______________________________________________________________________________________
3
MAX3740 Evaluation Kit
1) To enable the outputs, connect TX_DISABLE to
GND by placing a shunt on JU9.
V
PWRMON
I
=
MD
2 × R
9 × V
PWRSET
2) Connect a common-cathode VCSEL as shown in
Figure 2. Keep the leads short to reduce reflection.
BIASMON
350Ω
I
=
BIAS
3) Apply a differential input signal (250mV
to
P-P
Note: If the voltage at TP16 exceeds V
typ) or TP17 exceeds V
signal is asserted and latched.
(0.8V
2200mV ) between SMA connectors J9 and J10
PMTH
P-P
(0.8V typ), the FAULT
(IN+ and IN-).
BMTH
4) Attach the VCSEL fiber connector to an optical/elec-
trical converter.
8) Adjust the R resistor using the DS1858 until
MODSET
the desired optical amplitude is achieved. Optical
amplitude can be observed on an oscilloscope con-
nected to an optical/electrical converter. Refer to
the DS1858 data sheet for control instructions.
5) Connect a +3.3V supply between TP22 (VCCT) and
TP23 (GND). Adjust the power supply until the volt-
age between TP13 and ground is +3.3V.
6) Adjust the R
resistor using the DS1858 until
PWRSET
9) If needed, change the value of R
(R32) to
PEAKSET
desired average optical power is achieved. Refer to
the DS1858 data sheet for control instructions.
improve the falling edge of the VCSEL.
7) The MD and BIAS currents can be monitored
through the DS1858 (refer to DS1858 data sheet),
or at TP16 (V
) and TP17 (V
) using
BIASMON
PWRMON
the following equations:
Adjustment and Control Descriptions (see Quick Start)
COMPONENT
D2
NAME
FUNCTION
The LED is illuminated when a fault condition has occurred (refer to the Detailed
Description section of the MAX3740 data sheet).
Fault Indicator
JU1
COMP
PHOTODIODE
TX_DISABLE
IPD
Enables/disables the APC circuit. Remove the shunt to enable the APC circuit.
Installing a shunt connects the photodiode of the VCSEL to the MD pin. Used when a
VCSEL is installed.
JU2
JU3, JU9
JU4
Enable/disable the output currents. Install a shunt to enable output currents.
Determines the gain of the photodiode emulator. When JU4 is open, the gain is 0.02A/A.
When JU4 is shunted, the gain is 0.12A/A.
JU5
JU6
JU7
JU8
JU10
R1
APCOPEN
FAULT
Installing a shunt connects the electrical output of the part to the emulation circuit.
Installing a shunt enables the external fault-indicator circuit.
Installing a shunt enables the squelch function.
SQUELCH
POWER
Installing a shunt enables power to the part.
VCCEXT
Installing a shunt provides power to the emulation and fault-indicator circuits.
Adjusts transmit optical power to be maintained by the APC loop.
Adjusts the laser modulation current.
R
PWRSET
MODSET
PEAKSET
R2
R
R14
R
Adjusts the peaking for the falling edge of the VCSEL.
In a closed-loop configuration, adjusts the maximum bias current available to the APC. In
an open-loop configuration, adjusts the bias level of the output.
R15
R
BIASSET
R16
TP14
TP15
R
Adjusts the temperature compensation of the modulation current.
TC
MOD-DEF2
MOD-DEF1
Part of the two-wire interface for the DS1858. Refer to the DS1858 data sheet.
Part of the two-wire interface for the DS1858. Refer to the DS1858 data sheet.
4
_______________________________________________________________________________________
MAX3740 Evaluation Kit
A P C O P E N
5
J U
P E O N
R 3
6
P E O N
R 3
4
P E A K S E T
R 1 4 2 0
Ω k
B I A S S E T
R 1 5 5 0
Ω k
P E O N
R 2
7
M O D S E T
R 2 1 0 k
P E A K S E T
M O D S E T
B I A S M O N
Ω
V C C
C O M P
C O M P
J U
1
D
G N
F µ 7 0 . 0 4
C 3
M D
R E F
T C 2
T C 1
V C C
P W R M O N
Figure 1. MAX3740 EV Kit Electrical Schematic
_______________________________________________________________________________________
5
MAX3740 Evaluation Kit
G N D
L 1
L 0
H 1
M O N 1
M O N 2
P M O N +
B M O N +
S D A
O U T 2
P E A K S E T
M O D S E T
B I A S M O N
V C C
C O M P
M D
D
G N
T C 2
T C 1
V C C
R E F
P W R M O N
Figure 2. MAX3740 EV Kit Optical Schematic with DS1858
6
_______________________________________________________________________________________
MAX3740 Evaluation Kit
1.0"
1.0"
Figure 4. MAX3740 EV Kit PC Board Layout—Component Side
Figure 3. MAX3740 EV Kit Component Placement Guide—
Component Side
_______________________________________________________________________________________
7
MAX3740 Evaluation Kit
1.0"
1.0"
Figure 5. MAX3740 EV Kit PC Board Layout—Ground Plane
Figure 6. MAX3740 EV Kit PC Board Layout—Power Plane
8
_______________________________________________________________________________________
MAX3740 Evaluation Kit
1.0"
Figure 7. MAX3740 EV Kit PC Board Layout—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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