MAX3532 [MAXIM]
Upstream CATV Driver Amplifier; CATV上行驱动放大器
| 型号： | MAX3532 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Upstream CATV Driver Amplifier |
| 文件： | 总8页 (文件大小：86K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1331; Rev 1; 6/98
Up s t re a m CATV Drive r Am p lifie r
MAX532
________________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
The MAX3532 is a programmable power amplifier for
use in upstream cable applications. The device outputs
up to 62dBmV (continuous wave) through a 1:2 (voltage
ratio) transformer when driven with 36dBmV at its input.
It features variable gain, which is controlled via a 3-wire
digital serial bus and available in 1dB steps. The operat-
ing frequency ranges from 5MHz to 42MHz.
♦ Single +5V Supply
♦ Output Level Ranges from Less than 8dBmV
to 62dBmV, in 1dB Steps
♦ Gain Programmable in 1dB Steps
♦ 350mW Typical Power Dissipation
♦ Transmit-Disable Mode
The MAX3532 offers three operating modes: high power,
low nois e , a nd tra ns mit d is a b le . Hig h-p owe r mod e
achieves the highest output levels, while low-noise mode
achieves the lowest output noise when driving lower out-
put levels. Transmit disable mode places the device in a
high-isolation state with minimum output noise, for use
between bursts in TDMA systems.
♦ Two Shutdown Modes
_______________Ord e rin g In fo rm a t io n
PART
TEMP. RANGE
PIN-PACKAGE
MAX3532EAX
-40°C to +85°C
36 SSOP
Two power-down modes are also available. Software shut-
down mode permits power-down of all analog circuitry while
maintaining the programmed gain setting. Shutdown mode
disables all circuitry and reduces current consumption
below 10µA.
___________________P in Co n fig u ra t io n
The MAX3532 comes in a 36-pin SSOP package screened
for the extended-industrial temperature range (-40°C to
+85°C).
TOP VIEW
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
2
3
4
5
6
7
8
9
36 SHDN
35 TXEN
34 VOUT-
33 VOUT+
32 GND
________________________Ap p lic a t io n s
Cable Modems
Telephony over Cable
CATV Set-Top Box
__________Typ ic a l Op e ra t in g Circ u it
MAX3532
31 V 2
EE
8.0Ω
1:2
36
34
30
29
V 2
CC
VOUT-
SHDN
OUTPUT
CONTROL
LOGIC
V
CC
35
28 VIN+
27 VIN-
TXEN
GND
8.0Ω
33
31
VOUT+
1–10, 12, 13, 15–17,
21–25, 32
GND 10
V 1 11
EE
26 V
EE
GND 12
GND 13
25 GND
24 GND
23 GND
22 GND
21 GND
20 SCLK
19 SDA
V 2
EE
MAX3532
0.1µF
0.001µF
30
29
28
VIN+
VIN-
V
2
V
CC
INPUT
CC
V 1 14
CC
27
V
CC
V
CC
GND 15
GND 16
GND 17
CS 18
0.001µF
0.1µF
26
20
19
V
EE
SCLK
SDA
14
V
1
V
CC
CC
CONTROL
LOGIC
0.1µF
11
V 1
EE
18
CS
SSOP
†
Protected under U.S. Patent 5,748,027
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
Up s t re a m CATV Drive r Am p lifie r
ABSOLUTE MAXIMUM RATINGS
V
........................................................................-0.5V to +7.0V
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +165°C
Lead Temperature (soldering, 10sec) .............................+300°C
CC
Input Voltage Levels (all inputs).................-0.3V to (V + 0.3V)
Continuous RMS Input Voltage (VIN+, VIN-)..................60dBmV
Continuous Current (VOUT+, VOUT-)...............................100mA
CC
Continuous Power Dissipation (T = +70°C)
A
36-Pin SSOP (denote at 11mW/°C above +70°C) ........900mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
MAX532
DC ELECTRICAL CHARACTERISTICS
(V = +4.75V to +5.25V, no RF applied, T = -40°C to +85°C, unless otherwise noted.)
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
5.25
95
UNITS
Supply Voltage
V
CC
4.75
V
mA RMS
mA
µA
Supply Current
I
CC
75
1.5
0.1
TXEN = 1, SHDN = 1, D7 and D6 = 1X or 01
TXEN = X, SHDN = 1, D7 and D6 = 00
TXEN = X, SHDN = 0, D7 and D6 = XX
CS, SDA, SCLK, TXEN, SHDN
Software Shutdown Current
Shutdown Current
I
CC
2
I
CC
10
Digital Input High Voltage
Digital Input Low Voltage
Digital Input High Current
Digital Input Low Current
V
IH
2.4
V
V
IL
0.8
V
CS, SDA, SCLK, TXEN, SHDN
I
IH
100
µA
CS, SDA, SCLK, TXEN, SHDN
I
IL
-100
µA
CS, SDA, SCLK, TXEN, SHDN
AC ELECTRICAL CHARACTERISTICS
(V = +5V, V = 36dBmV, SHDN = TXEN = 1, f = 20MHz, Z = 75Ω through a 1:2 transformer with two precision 8.0Ω back-
CC
IN
IN
LOAD
termination resistors, T = -40°C to +85°C, unless otherwise noted. Typical values are measured at T = +25°C.)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
3.6
26
MAX
UNITS
Output Signal Swing
V
TXOUT
Vp-p
High power, D7–D0 = 11111101
Low noise, D7–D0 = 1001000
24
Voltage Gain
A
V
dB
-32
1
-28
Output Step Size
dB
dB
Isolation in Standby Mode
TXEN = 0, f = 42MHz, V
= 58dBmV
36
IN
OUT
Two-Tone Third-Order
Distortion (Note 1)
Two input tones at 40MHz and 40.25MHz, both at
30dBmV; V = 52dBmV per tone
IMR3
HD2
HD3
-43
-37.5
dBc
dBc
dBc
OUT
f
= 20MHz, V
= 52dBmV
= 58dBmV
= 52dBmV
= 58dBmV
-59
-46
-67
-57
0.1
1
-55
-40
-58
-48
IN
OUT
Second Harmonic Distortion
(Note 1)
f
IN
= 20MHz, V
OUT
f
IN
= 14MHz, V
OUT
Third Harmonic Distortion
(Note 1)
f
IN
= 14MHz, V
OUT
AM to AM
AM to PM
AMAM
AMPM
V
IN
= 36dBmV to 40dBmV, A = 22dB
V
dB
V
IN
= 36dBmV to 40dBmV, A = 22dB
V
degrees
Output Noise
(High-Power Mode) (Note 1)
D7 and D6 = 11, BW = 160kHz,
= 46dBmV to 62dBmV, f = 5MHz to 42MHz
-80
-79
dBc
V
OUT
2
_______________________________________________________________________________________
Up s t re a m CATV Drive r Am p lifie r
MAX532
AC ELECTRICAL CHARACTERISTICS (continued)
(V = +5V, V = 36dBmV, SHDN = TXEN = 1, f = 20MHz, Z = 75Ω through a 1:2 transformer with two precision 8.0Ω back-
CC
IN
IN
LOAD
termination resistors, T = -40°C to +85°C, unless otherwise noted. Typical values are measured at T = +25°C.)
A
A
PARAMETER
SYMBOL
CONDITIONS
D7 and D6 = 10, V > 27dBmV,
MIN
TYP
MAX
UNITS
OUT
-75
-73
dBc
Output Noise
BW = 160kHz, f = 5MHz to 42MHz
(Low-Power Mode)
D7 and D6 = 10, V ≤ 27dBmV,
OUT
(Note 1)
-47
-47
-45
-45
dBmV
dBmV
BW = 160kHz, f = 5MHz to 42MHz
Output Noise
(Standby Mode) (Note 1)
TXEN = 0, BW = 160kHz,
f = 5MHz to 42MHz
Output Return Loss (Note 1)
TXEN Transient Duration
TXEN Transient Step Size
f
= 5MHz to 42MHz
12
1
dB
µs
IN
TXEN rise/fall time < 100ns, T = +25°C (Note 1)
3
7
A
T
= +25°C, A = 22dB (Note 1)
V
25
100
mV
A
Power-Enable Transient
Duration (Note 1)
T
= +25°C
2.5
5
µs
A
SERIAL INTERFACE
t
(Note 1)
(Note 1)
20
20
ns
ns
CS to SCLK Setup Time
CSS
t
CS to SCLK Hold Time
CSH
SDA to SCLK Setup Time
SDA to SCLK Hold Time
SCLK Pulse Width High
SCLK Pulse Width Low
t
(Note 1)
(Note 1)
(Note 1)
(Note 1)
20
20
50
50
ns
ns
ns
ns
SDAS
t
SDAH
t
SCLKH
t
SCLKL
Note 1: Guaranteed by design and characterization.
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V = 5.0V, V = 36dBmV, f = 20MHz, SHDN = TXEN = 1, Z = 75Ω through a 1:2 transformer with two precision 8.0Ω back-
CC
IN
IN
LOAD
termination resistors, T = +25°C, unless otherwise noted.)
A
SUPPLY CURRENT vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. OUTPUT LEVEL
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
85
80
75
70
65
60
V
CC
= 5.25V
T = +85°C
A
T = +25°C
A
T = 0°C
A
T = -40°C
A
V
= 5.0V
CC
V
CC
= 4.75V
4.75
5
5.25
-40
-20
0
25
50
85
12 16 21 26 31 36 41 45 50 55 59 64
OUTPUT LEVEL (dBmV)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
_______________________________________________________________________________________
3
Up s t re a m CATV Drive r Am p lifie r
_____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V = +5V, V = 36dBmV, SHDN = TXEN = 1, f = 20MHz, Z = 75Ω through a 1:2 transformer with two precision 8.0Ω back-
CC
IN
IN
LOAD
termination resistors, T = -40°C to +85°C, unless otherwise noted. Typical values are measured at T = +25°C.)
A
A
GAIN vs. FREQUENCY
OUTPUT NOISE vs. GAIN STATE
OUTPUT LEVEL vs. GAIN STATE
40
30
70
60
50
40
30
20
10
0
-10
-15
-20
-25
-30
-35
-40
-45
-50
57
GAIN STATE 60
HIGH-POWER MODE
20
54
48
60
54
48
MAX532
10
0
HIGH-POWER MODE
LOW-NOISE MODE
42
36
30
-10
-20
-30
-40
LOW-NOISE MODE
24
18
HIGH-POWER MODE
LOW-NOISE MODE
-10
0
20 40 60 80 100 120 140
FREQUENCY (MHz)
5
10 15 20 25 30 35 40 45 50 55 60
GAIN STATE
0
5
10 15 20 25 30 35 40 45 50 55 60
GAIN STATE
REAL AND IMAGINARY INPUT
IMPEDANCE vs. FREQUENCY
REAL AND IMAGINARY OUTPUT
IMPEDANCE vs. FREQUENCY
12,000
10,000
8000
6000
4000
2000
0
120
100
80
REAL
60
REAL
40
-2000
-4000
-6000
IMAGINARY
20
IMAGINARY
0
5
10
20
30
40
50
75 100
0
20
40
60
80
100
FREQUENCY (MHz)
FREQUENCY (MHz)
THIRD HARMONIC DISTORTION vs.
INPUT FREQUENCY
SECOND HARMONIC DISTORTION vs.
INPUT FREQUENCY
-30
-35
-40
-45
-50
-55
-60
-65
-70
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
V
OUT
= 55dBmV
V
OUT
= 55dBmV
V
= 52dBmV
= 25dBmV
OUT
V
OUT
= 40dBmV
V
OUT
= 25dBmV
V
OUT
V
OUT
= 40dBmV
10 15 20 25 30 35 40 45 50
INPUT FREQUENCY (MHz)
10 15 20 25 30 35 40 45 50
INPUT FREQUENCY (MHz)
4
_______________________________________________________________________________________
Up s t re a m CATV Drive r Am p lifie r
MAX532
______________________________________________________________P in De s c rip t io n
PIN
NAME
FUNCTION
1–10, 12, 13,
15, 16, 17,
21–25, 32
GND
Ground Pins
Serial Data Interface Ground. As with all grounds, maintain the shortest possible
(low-inductance) connections to the ground plane.
11
14
V 1
EE
Serial Data Interface +5V Supply. Bypass this pin with a 0.1µF decoupling capacitor as close to the
part as possible.
V
1
CC
18
19
20
Serial-Interface Enable. TTL-compatible input. See Serial Interface section.
Serial-Interface Data. TTL-compatible input. See Serial Interface section.
Serial-Interface Clock. TTL-compatible input. See Serial Interface section.
CS
SDA
SCLK
Programmable Gain Amplifier (PGA) Ground. As with all grounds, maintain the shortest possible
(low-inductance) connection to the ground plane.
26
27
V
EE
Negative Input. When not used, this port must be AC coupled to ground. Along with VIN+, this port
forms a high-impedance differential input to the PGA. Driving this port differentially will increase the
rejection of second-order distortion.
VIN-
Positive Input. Along with VIN-, this port forms a high-impedance differential input to the PGA. Driving
this port differentially will increase the rejection of second-order distortion. AC couple to this pin.
28
29
30
VIN+
V
CC
PGA +5V Supply. Bypass this pin with a decoupling capacitor as close to the part as possible.
Power Amplifier +5V Supply. Bypass this pin with a decoupling capacitor as close to the part as
possible.
V
CC
2
Power Amplifier Ground. As with all grounds, connections maintain the shortest possible (low-induc-
tance) length to the ground plane.
31
33
34
V 2
EE
Positive Output. Along with VOUT-, this pin forms a low-impedance output. Typically this port drives
a 1:2 transformer through 8Ω series resistors.
VOUT+
Negative Output. Along with VOUT+, this pin forms a low-impedance output. Typically this port
drives a 1:2 transformer through 8Ω series resistors.
VOUT-
TXEN
Transmit Amplifier Enable. Setting this pin low places the transmitter in a high-isolation state (transmit
disable mode). In this mode, however, significant common-mode voltage swings exist. It is, there-
fore, important to maintain good balance of the differential output through to the transformer primary.
35
36
Shutdown. When this pin is set low, all functions (including the serial interface) are disabled, leaving
only leakage currents to flow.
SHDN
_______________________________________________________________________________________
5
Up s t re a m CATV Drive r Am p lifie r
S h u t d o w n Mo d e
In normal operation the shutdown pin (SHDN) is driven
high. When SHDN is asserted low, all circuits within the
IC a re disa ble d . Only le a ka ge c urre nts flow in this
state. Data stored within the serial-data interface latch-
es will be lost upon shutting down the part.
SHDN
BIAS
VOUT-
MAX3532
PGA
VIN+
VIN-
TXEN
Tra n s m it -Dis a b le Mo d e
When the TXEN pin is asserted high, the device is in
transmit mode. When TXEN is driven low, the transmit
amplifier switches to common-mode operation and the
output signal appears at the output pins VOUT+ and
VOUT- with the same phase. These identical signals
cancel within the output transformer core, providing
high isolation from input to output. Optimum isolation is
achieved in low-noise mode with a low gain setting.
VOUT+
MAX532
SERIAL-DATA INTERFACE
CS
SDA SCLK
Figure 1. Functional Diagram
S e ria l In t e rfa c e
The serial interface has an active-low enable (CS) to
bracket the data, with data clocked in MSB first on the
rising edge of SCLK. Data is stored in the storage latch
on the rising edge of CS. The serial interface controls
the state of the PGA and output amplifier. The register
format is shown in Tables 1 and 2. Serial-interface tim-
ing is shown in Figure 2.
_______________De t a ile d De s c rip t io n
The following sections describe the blocks shown in the
Functional Diagram (Figure 1).
P ro g ra m m a b le -Ga in Am p lifie r
The MAX3532’s processing path is made up of the pro-
g ra mma b le -g a in a mp lifie r (PGA) a nd the tra ns mit
power amplifier, which together provide better than
64dB of output level control in 1dB steps.
Transmit Modes
The hardware TXEN line is ANDed with software bit D7,
so both TXEN and D7 must be high to transmit. Bit D6
governs whether the device is set to high-gain mode (D6
= 1) or to low-noise mode (D6 = 0). High-power mode
should be used for output levels above 45dBmV. This
transition point optimizes the MAX3532’s distortion perfor-
mance, but either mode may be used throughout the full
complement of programmed gain states. Bits D5–D0
define 64 PGA gain states, nominally 1dB each.
The PGA is implemented as a programmable Gilbert
cell attenuator. It uses a differential architecture to
achieve maximum linearity. When it is driven single
ended, specified performance is achieved given that
the unused input is decoupled to ground. The gain of
the PGA is determined by the serial-data interface. See
Table 2.
Tra n s m it P o w e r Am p lifie r
The transmit power amp is capable of driving +8dBmV
to +62dBmV differentially when driven with +36dBmV. To
achieve the necessary swing from a single +5V supply,
an external 1:2 transformer must be used. The output of
the transmit power amplifier is a very low-impedance
emitter follower, which requires two 8Ω series termination
resistors to achieve adequate output return loss.
Table 1. Serial-Interface Control Words
BIT
MNEMONIC
DESCRIPTION
Chip-State Control MSB
Chip-State Control LSB
Gain Control, Bit 5
Gain Control, Bit 4
Gain Control, Bit 3
Gain Control, Bit 2
Gain Control, Bit 1
Gain Control, Bit 0
MSB 7
D7
D6
D5
D4
D3
D2
D1
D0
6
The power amplifier’s gain is set via the serial-data
interface. The transmit power amplifier has a switchable
+16dB or +0dB gain to achieve high linearity or low
noise, respectively. High-gain mode sets the power
amp’s gain to +16dB, allowing for the highest output
signal swings. Low-noise mode sets the gain to 0dB,
which achieves the lowest output noise.
5
4
3
2
1
LSB 0
6
_______________________________________________________________________________________
Up s t re a m CATV Drive r Am p lifie r
MAX532
Table 2. Chip-State Control Bits
TXEN
D7
D6
D5
D4
D3
D2
D1
D0
STATE
1
1
1
1
0
X
0
1
1
1
1
1
1
0
X
X
X
X
X
X
X
X
X
X
X
X
High-power transmit
Low-noise transmit; subtract 16dB from V
OUT
X
0*
X
1
1
X
X
X
X
X
X
Transmit disabled
X
0
X
0
X
0
X
1
X
1
X
0
X
1
All analog circuitry off
0
V
= +8dBmV
= +9dBmV
—
OUT
1
0
0
0
1
1
1
0
V
OUT
—
1
—
1
—
1
—
1
—
0
—
1
—
0
—
1
V
= +56dBmV
= +57dBmV
OUT
1
1
1
1
0
1
1
0
V
OUT
*Except state 000XXXXXX, which is software shutdown.
Transformer
To achieve the rated output levels, a 1:2 (voltage ratio)
transformer is required. This transformer must have
adequate bandwidth to cover the intended application.
Note that most RF transformers specify a bandwidth
with a 50Ω load on the primary and a matching resis-
ta nc e on the s e c ond a ry wind ing . The muc h lowe r
(approximately 16Ω due to the back-termination resis-
tors) impedance of the MAX3532’s output will tend to
shift the low-frequency edge of the bandwidth specifi-
cation down by a factor of three or more due to primary
inductance. Keep this in mind when specifying a trans-
former.
A
B
C
D
E
F
D7
D6
D5
D4
C: t
D3
D2
D1
D0
A: t
B: t
E: t
F: t
CSS
SDAS
SDAH
SCKH
CSH
D: t
SCKL
Figure 2. Serial-Interface Timing Diagram
RF transformer cores are inherently nonlinear devices,
which must be operated in their linear region if distor-
tion is a critical consideration. In general, the size of the
transformer core used and the number of turns will gov-
ern the distortion performance of the transformer for a
given output level. Therefore a transformer of adequate
size must be used to minimize its contribution to the
overall distortion budget.
Software Shutdown Mode
Software-shutdown mode is enabled when both D7 and
D6 are low (D7, D6 = 00). This mode minimizes current
consumption while maintaining the programmed gain
state stored in the serial data-interface’s latch. All ana-
log functions are disabled in this mode.
__________Ap p lic a t io n s In fo rm a t io n
Back-Termination Resistors
The value of the back-termination resistors depends on
two parameters: the ultimate output impedance (as
referred through the output transformer), and the quali-
ty of the output match desired. The output impedance
depends on the value of the termination resistors by the
following formula:
Ou t p u t Ma t c h
The MAX3532’s output circuit is a differential emitter fol-
lower that has a near-zero impedance over the operat-
ing frequency range. In order to match to a single-
ended impedance, a transformer and back-termination
resistors are required. Furthermore, operation from a
single +5V supply requires that the output signal swing
b e s te p p e d up to a c hie ve the ra te d outp ut le ve ls .
These are described in the next two sections.
Z
= 4 x [ 2 x (R + R )]
term P
OUT
where R
is the value of one termination resistor and
term
R is parasitic resistance.
P
_______________________________________________________________________________________
7
Up s t re a m CATV Drive r Am p lifie r
Some allowance must be made for parasitic inductance
in the tra ns forme r a s we ll a s on the p rinte d c irc uit
board. Therefore, choose a resistance value lower than
a perfect match. Two 8.0Ω resistors will provide a near-
optimum match.
Since the MAX3532 has a low-impedance output, the
output traces must also be kept as short as possible,
as small amounts of inductance can have an impact at
hig he r fre q ue nc ie s . The b a c k-te rmina tion re s is tors
should be kept as close to the device as possible.
If the output match is less than critical, the back-termina-
tion resistors can be set to a lower value. This will extend
the upper limit of the output level range (by dropping less
voltage across the resistors and more across the load),
and may improve distortion performance for a given out-
put level.
Power-Supply Layout
For minimal coupling between different sections of the
IC, the ideal power-supply layout is a star configuration.
This c onfig ura tion ha s a la rg e va lue d d e c oup ling
MAX532
capacitor at the central V
node. The V
traces
CC
CC
branch out from this node, each going to a separate
node in the MAX3532 circuit. At the end of each of
V
CC
La yo u t Is s u e s
A well designed printed circuit board is an essential
part of an RF circuit. For best performance pay atten-
tion to power-supply layout issues, as well the output
circuit layout.
these traces is a decoupling capacitor that provides a
very low impedance at the frequency of interest. This
arrangement provides local V
decoupling at each
CC
V
CC
pin.
The traces leading from the supply to V (pin 29) and
CC
Output Circuit Layout
The differential implementation of the MAX3532’s out-
put has the benefit of significantly reducing even-order
distortion, the most significant of which is second-har-
monic distortion. The degree of distortion cancellation
depends on the amplitude and phase balance of the
overall circuit. It is critical that the traces leading from
the output pins be exactly the same length.
V
CC
2 (pin 30) must be made as thick as practical to
keep resistance well below 1Ω.
Ground inductance degrades distortion performance.
Therefore, ground plane connections to V (pin 26)
EE
and V
(pin 31) should be made with multiple vias if
EE2
possible.
Ch ip In fo rm a t io n
TRANSISTOR COUNT: 1100
________________________________________________________P a c k a g e In fo rm a t io n
8
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