MAX3440EESA-T [MAXIM]
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| 型号： | MAX3440EESA-T |
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MAXIM INTEGRATED PRODUCTS |
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19-2666; Rev 0; 10/02
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
General Description
Features
The MAX3440E–MAX3444E fault-protected RS-485 and
J1708 transceivers feature 60V protection from signal
faults on communication bus lines. Each device contains
one differential line driver with three-state output and one
differential line receiver with three-state input. The 1/4-unit-
load receiver input impedance allows up to 128 trans-
ceivers on a single bus. The devices operate from a 5V
supply at data rates of up to 10Mbps. True fail-safe inputs
guarantee a logic-high receiver output when the receiver
inputs are open, shorted, or connected to an idle data line.
ꢀ
ꢀ
15kV ESD Protection
60V Fault Protection
ꢀ Guaranteed 10Mbps Data Rate
(MAX3441E/MAX3443E)
ꢀ Hot Swappable for Telecom Applications
ꢀ True Fail-Safe Receiver Inputs
ꢀ Enhanced Slew-Rate-Limiting Facilitates
Error-Free Data Transmission
(MAX3440E/MAX3442E/MAX3444E)
Hot-swap circuitry eliminates false transitions on the
data bus during circuit initialization or connection to a
live backplane. Short-circuit current-limiting and ther-
mal shutdown circuitry protect the driver against exces-
sive power dissipation, and on-chip 15kV ESD
protection eliminates costly external protection devices.
ꢀ Allow Up to 128 Transceivers on the Bus
ꢀ -7V to +12V Common-Mode Input Range
ꢀ Automotive Temperature Range (-40°C to +125°C)
ꢀ Industry-Standard Pinout
The MAX3440E–MAX3444E are available in 8-pin SO
and PDIP packages and are specified over industrial
and automotive temperature ranges.
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
8 SO
Applications
RS-422/RS-485 Communications
Truck and Trailer Applications
Industrial Networks
Telecommunications Systems
Automotive Applications
MAX3440EESA
MAX3440EEPA
MAX3440EASA
MAX3440EAPA
8 PDIP
8 SO
8 PDIP
Ordering Information continued at end of data sheet.
HVAC Controls
Selector Guide
DATA RATE
(Mbps)
LOW-POWER
SHUTDOWN
RECEIVER/DRIVER TRANSCEIVERS
PART
TYPE
HOT SWAP
ENABLE
ON BUS
MAX3440E
MAX3441E
MAX3442E
MAX3443E
MAX3444E
RS-485
RS-485
RS-485
RS-485
J1708
0.25
2.5 to 10
0.25
No
No
Yes
Yes
Yes
Yes
Yes
128
128
128
128
128
Yes
Yes
Yes
Yes
Yes
Yes
2.5 to 10
0.25
Yes
Yes (only RE)
-in Configurations and Typical Operating Circuits
TOP VIEW
DE/RE
MAX3440E
MAX3441E
FAULT
RO
FAULT
RO
V
1
2
3
4
1
2
3
4
8
7
8
7
6
5
V
CC
D
CC
Rt
DI
B
B
A
R
R
B
A
Rt
6
DE/RE
DI
DE/RE
DI
A
RO
R
GND
D
D
5
GND
FAULT
DIP/SO
DIP/SO
Pin Configurations and Typical Operating Circuits continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to GND
Operating Temperature Ranges
V
........................................................................................+7V
MAX344_EE_ _ ...............................................-40°C to +85°C
MAX344_EA_ _ .............................................-40°C to +125°C
Storage Temperature Range.............................-±5°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
FAULT, DE/RE, RE, DE, DE, DI, TXD..........-0.3V to (V
A, B (Note 1) ........................................................................±±0V
RO ..............................................................-0.3V to (V + 0.3V)
+ 0.3V)
CC
CC
Short-Circuit Duration (RO, A, B) ...............................Continuous
Continuous Power Dissipation (T = +70°C)
A
8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW
8-Pin PDIP (derate 9.09mW/°C above +70°C).............727mW
Note 1: A, B must be terminated with 54Ω or 100Ω to guarantee ±±0V fault protection.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER
Figure 1, R = 100Ω
2
V
V
L
CC
CC
Differential Driver Output
V
V
V
V
V
OD
Figure 1, R = 54Ω
1.5
L
Change in Magnitude of
Differential Output Voltage
∆V
Figure 1, R = 100Ω or 54Ω (Note 2)
0.2
3
OD
OC
L
Driver Common-Mode
Output Voltage
V
Figure 1, R = 100Ω or 54Ω
V
/ 2
CC
L
Change in Magnitude of
Common-Mode Voltage
∆V
Figure 1, R = 100Ω or 54Ω (Note 2)
0.2
OC
L
DRIVER LOGIC
Driver Input High Voltage
Driver Input Low Voltage
Driver Input Current
V
2
V
V
DIH
V
0.8
2
DIL
I
µA
DIN
0 ≤ V
≤ +12V
OUT
+350
Driver Short-Circuit Output Current
(Note 3)
I
mA
mA
OSD
-7V ≤ V
≤ V
-350
+25
OUT
CC
(V
CC
- 1V) ≤ V
≤ +12V (Note 3)
OUT
Driver Short-Circuit Foldback
Output Current
I
OSDF
-7V ≤ V
≤ +1V (Note 3)
-25
OUT
RECEIVER
V
V
V
= GND, V
= 12V
A, B
250
-150
±
CC
µA
mA
mV
mV
Input Current
I
A, B
= -7V
A,B
A, B
A, B
=
±0V
Receiver Differential Threshold
Voltage
V
-7V ≤ V
≤ +12V
-200
-50
TH
CM
Receiver Input Hysteresis
V
25
TH
∆
2
_______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
DC ELECTRICAL CHARACTERISTICS (continued)
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RECEIVER LOGIC
Output High Voltage
Output Low Voltage
V
Figure 2, I
= -1.±mA
V - 0.±
CC
V
V
OH
OH
V
Figure 2, I = 1mA
0.4
1
OL
OL
Three-State Output Current at
Receiver
I
0 ≤ V
≤ V
CC
µA
kΩ
mA
OZR
A, B
Receiver Input Resistance
R
-7V ≤ V
≤ +12V
48
IN
CM
Receiver Output Short-Circuit
Current
I
0 ≤ V
≤ V
CC
95
OSR
RO
CONTROL
Control Input High Voltage
V
DE, DE, RE, DE/RE
DE, DE/RE, RE
2
V
CIH
Input Current Latch During First
Rising Edge
I
90
µA
IN
SUPPLY CURRENT
MAX3440E (DE/RE = V ),
CC
MAX3442E (DE = V
RE = GND),
MAX3444E (DE = RE = GND)
,
CC
30
10
No load,
DI = V
Normal Operation
I
mA
Q
CC
or GND
MAX3441E (DE/RE = V ),
CC
MAX3443E (DE = V
,
CC
RE = GND)
DE = GND, RE = V
MAX3443E)
(MAX3442E/
CC
20
10
DE = GND, RE = V , T = +25°C
CC
A
Supply Current in Shutdown Mode
I
µA
SHDN
(MAX3442E/MAX3443E)
DE = RE = V (MAX3444E)
100
10
CC
DE = RE = V , T = +25°C (MAX3444E)
CC
A
Supply Current with Output
Shorted to ±0V
DE = GND, RE = GND, no load
output in three-state (MAX3443E)
I
±15
mA
SHRT
PROTECTION SPECIFICATIONS
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V = +5V and T = +25°C.)
CC A
CC
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
= 0, R = 54Ω
MIN
TYP
MAX
UNITS
Overvoltage Protection
ESD Protection
A, B; R
A, B
±0
V
SOURCE
L
Human Body Model
15
kV
FAULT DETECTION
Receiver Differential Threshold
Receiver Differential Threshold
F
V
V
= 0, high limit
270
450
mV
mV
DIPH
CM
CM
F
= 0, low limit
-450
-270
DIPL
Fault-Detection Common-Mode
Input Voltage Positive
12
V
V
Fault-Detection Common-Mode
Input Voltage Negative
-7
_______________________________________________________________________________________
3
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
SWITCHING CHARACTERISTICS (MAX3440E/MAX3442E/MAX3444E)
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V = +5V and T = +25°C.)
MAX CC A
CC
MIN
PARAMETER
SYMBOL
CONDITIONS
MAX3440E/MAX3442E,
MIN
200
250
TYP
MAX UNITS
t
PLHA,
Figure 3, R = 54Ω, C = 50pF
Driver Propagation Delay
2000
ns
L
L
t
PLHB
MAX3444E, R
= ±0Ω, C
= 100pF
DIFF
DIFF
t
DPLH,
Driver Differential Propagation Delay
Figure 4, R = 54Ω, C = 50pF
2000
2000
ns
ns
L
L
t
DPHL
Driver Differential Output
Transition Time
t
,t
Figure 4, R = 54Ω, C = 50pF
L L
LH HL
R = 54Ω, C = 50pF,
L
L
t
,
SKEWAB
t
= |t
- t
PLHA PHLB
|,
|
Driver Output Skew
350
200
ns
ns
SKEWAB
SKEWBA
t
SKEWBA
t
= |t
- t
PLHB PHLA
R = 54Ω, C = 50pF,
L
L
Differential Driver Output Skew
t
DSKEW
t
= |t
- t
|
DSKEW
DPLH DPHL
Maximum Data Rate
f
kbps
ns
MAX
Driver Enable Time to Output High
t
Figure 5, R = 500Ω, C = 50pF
2000
2000
PDZH
PDHZ
L
L
Driver Disable Time from Output High
t
Figure 5, R = 500Ω, C = 50pF
ns
L
L
Driver Enable Time from Shutdown to
Output High
Figure 5, R = 500Ω, C = 50pF
L L
(MAX3442E/MAX3444E)
t
4.2
µs
PDHS
Driver Enable Time to Output Low
Driver Disable Time from Output Low
t
t
Figure ±, R = 500Ω, C = 50pF
2000
2000
ns
ns
PDZL
PDLZ
L
L
Figure ±, R = 500Ω, C = 50pF
L
L
Driver Enable Time from Shutdown to
Output Low
Figure ±, R = 500Ω, C = 50pF
L L
(MAX3442E/MAX3444E)
t
4.2
800
µs
ns
ns
PDLS
Driver Time to Shutdown
t
SHDN
R = 500Ω, C = 50pF (MAX3442E/MAX3444E)
L
L
t
,
RPLH
Receiver Propagation Delay
Figure 7, C = 20pF, V = 2V, V = 0
CM
2000
L
ID
t
RPHL
Receiver Output Skew
t
C = 20pF, t
= |t - t |
RPLH RPHL
200
2000
2000
ns
ns
ns
RSKEW
L
RSKEW
Receiver Enable Time to Output High
Receiver Disable Time from Output High
t
t
Figure 8, R = 1kΩ, C = 20pF
L L
RPZH
RPHZ
Figure 8, R = 1kΩ, C = 20pF
L
L
Figure 8, R = 1kΩ, C = 20pF
(MAX3442E/MAX3444E)
L
L
Receiver Wake Time from Shutdown
t
4.2
µs
RPWAKE
Receiver Enable Time to Output Low
Receiver Disable Time from Output Low
t
t
Figure 8, R = 1kΩ, C = 20pF
2000
2000
ns
ns
RPZL
L
L
Figure 8, R = 1kΩ, C = 20pF
RPLZ
L
L
R = 500Ω, C = 50pF
(MAX3442E/MAX3444E)
L
L
Receiver Time to Shutdown
t
800
ns
SHDN
4
_______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
SWITCHING CHARACTERISTICS (MAX3441E/MAX3443E)
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
Figure 3, R = 27Ω, C = 50pF
MIN
TYP
MAX UNITS
t
PLHA,
Driver Propagation Delay
±0
±0
25
ns
ns
ns
L
L
t
PLHB
t
DPLH,
Driver Differential Propagation Delay
Figure 4, R = 54Ω, C = 50pF
L L
t
DPHL
Driver Differential Output
Transition Time
t
,t
Figure 4, R = 54Ω, C = 50pF
L L
LH HL
R = 54Ω, C = 50pF,
L
L
t
t
,
SKEWAB
Driver Output Skew
t
= |t
- t
|,
|
10
10
ns
ns
SKEWAB
SKEWBA
PLHA PHLB
SKEWBA
t
= |t
- t
PLHB PHLA
R = 54Ω, C = 50pF,
L
L
Differential Driver Output Skew
t
DSKEW
t
= |t
- t
|
DSKEW
DPLH DPHL
Maximum Data Rate
f
10
Mbps
ns
MAX
Driver Enable Time to Output High
t
Figure 5, R = 500Ω, C = 50pF
1200
1200
PDZH
PDHZ
L
L
Driver Disable Time from Output High
t
Figure 5, R = 500Ω, C = 50pF
ns
L
L
Driver Enable Time from Shutdown to
Output High
t
Figure 5, R = 500Ω, C = 50pF (MAX3443E)
4.2
µs
PDHS
L
L
Driver Enable Time to Output Low
Driver Disable Time from Output Low
t
t
Figure ±, R = 500Ω, C = 50pF
1200
1200
ns
ns
PDZL
PDLZ
L
L
Figure ±, R = 500Ω, C = 50pF
L
L
Driver Enable Time from Shutdown to
Output Low
t
Figure ±, R = 500Ω, C = 50pF (MAX3443E)
4.2
µs
ns
PDLS
L
L
Driver Time to Shutdown
t
Figure ±, R = 500Ω, C = 50pF (MAX3443E)
800
SHDN
L
L
t
t
,
RPLH
Receiver Propagation Delay
Figure 7, C = 20pF, V = 2V, V = 0
CM
85
ns
L
ID
RPHL
Receiver Output Skew
t
C = 20pF, t
= |t - t |
RPLH RPHL
15
ns
ns
ns
µs
RSKEW
L
RSKEW
Receiver Enable Time to Output High
Receiver Disable Time from Output High
Receiver Wake Time from Shutdown
t
t
Figure 8, R = 1kΩ, C = 20pF
400
400
4.2
RPZH
RPHZ
L
L
Figure 8, R = 1kΩ, C = 20pF
L
L
t
Figure 8, R = 1kΩ, C = 20pF (MAX3443E)
L L
RPWAKE
Receiver Enable Wake Time from
Shutdown
t
Figure 8, R = 1kΩ, C = 20pF
400
ns
RPSH
L
L
Receiver Disable Time from Output Low
Receiver Time to Shutdown
t
Figure 8, R = 1kΩ, C = 20pF
400
800
ns
ns
RPLZ
L
L
t
R = 500Ω, C = 50pF (MAX3443E)
L L
SHDN
Note 2: ∆V
and ∆V
are the changes in V
and V , respectively, when the DI input changes state.
OD
OC
OD OC
Note 3: The short-circuit output current applies to peak current just before foldback current limiting; the short-circuit foldback output
current applies during current limiting to allow a recovery from bus contention.
_______________________________________________________________________________________
5
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Typical Operating Characteristics
(V
= +5V, T = +25°C, unless otherwise noted.)
CC
A
NO-LOAD SUPPLY CURRENT
vs. TEMPERATURE
NO-LOAD SUPPLY CURRENT
vs. TEMPERATURE
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
6
5
4
3
2
1
0
10
1
24
DRIVER AND RECEIVER
ENABLED
DRIVER AND RECEIVER
ENABLED
20
16
DRIVER DISABLED,
RECEIVER ENABLED
12
8
DRIVER DISABLED,
RECEIVER ENABLED
0.1
0.01
4
MAX3441E/MAX3443E
MAX3440E/MAX3442E/MAX3444E
MAX3442E/MAX3443E/MAX3444E
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
RECEIVER OUTPUT CURRENT
vs. OUTPUT LOW VOLTAGE
RECEIVER OUTPUT CURRENT
vs. OUTPUT HIGH VOLTAGE
RECEIVER OUTPUT VOLTAGE
vs. TEMPERATURE
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
, I
= +10mA
OH OUT
V
, I
= -10mA
OL OUT
0
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT LOW VOLTAGE (V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT HIGH VOLTAGE (V)
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
DRIVER OUTPUT CURRENT
vs. DIFFERENTIAL OUTPUT VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs. TEMPERATURE
A, B CURRENT
vs. A, B VOLTAGE (TO GROUND)
80
70
60
50
40
30
20
10
0
3.5
3.0
2000
1600
1200
800
R = 100Ω
L
R = 54Ω
L
2.5
400
2.0
1.5
1.0
0.5
R = 54Ω
L
0
-400
-800
-1200
-1600
-2000
DRIVER DISABLED,
RECEIVER ENABLED
MAX3441E/MAX3443E
0
0
0.5 1.0
1.5
2.0 2.5 3.0 3.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
-60 -50 -40 -30 -20 -10
0 10 20 30 40 50 60
DIFFERENTIAL OUTPUT VOLTAGE (V - V ) (V)
TEMPERATURE (°C)
A, B VOLTAGE (V)
A
B
6
_______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Test Circuits and Waveforms
R
L
2
A
B
V
OD
DI
D
R
L
V
OC
V
2
CC
Figure 1. Driver V
and V
OC
OD
A
ID
B
RO
V
R
0
V
OH
V
I
I
OH
(-)
OL
OL
(+)
Figure 2. Receiver V
and V
OH
OL
3V
0
V
OM
DI
1.5V
1.5V
R
2
L
A
S1
t
t
PHLA
DI
PLHA
OUT
D
V
OH
OL
GENERATOR
(NOTE 4)
B
50Ω
C = 50pF
L
(NOTE 5)
V
V
OM
OM
A
B
V
CC
V
t
t
PHLB
PLHB
V
+ V
2
OH
OL
V
=
≈ 1.5V
OM
V
V
OH
V
V
OM
OM
OL
Figure 3. Driver Propagation Times
3V
0
1.5V
1.5V
DPLH
DI
A
C
C
L
DI
D
OUT
t
DPHL
t
R
L
GENERATOR
(NOTE 4)
B
50Ω
≈ 2.0V
90%
90%
V
CC
50%
10%
50%
10%
L
(A–B)
≈ -2.0V
C = 50pF (NOTE 5)
L
t
t
HL
LH
Figure 4. Driver Differential Output Delay and Transition Times
_______________________________________________________________________________________
7
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Test Circuits and Waveforms (continued)
3V
A
B
S1
DI
A, B
0 OR 3V
D
DE
1.5V
1.5V
PDZH
t
0
DE
R = 500
L
t
t
PDHZ
PDHS
C = 50pF
L
(NOTE 5)
GENERATOR
(NOTE 4)
V
50
OH
0.25V
A, B
V
OM
V
OH
+ V
2
OL
V
OM
=
1.5V
0
Figure 5. Driver Enable and Disable Times
V
CC
3V
0
R = 500Ω
L
1.5V
1.5V
PDZL
DE
A
S1
t
t
DI
A, B
0 OR 3V
D
t
PDLS
PDLZ
B
DE
C = 50pF
L
(NOTE 5)
V
V
CC
OL
GENERATOR
(NOTE 4)
A, B
V
OM
50Ω
0.25V
Figure 6. Driver Enable and Disable Times
2.0V
A
R
O
V
ID
R
(A–B)
1.0V
1.0V
GENERATOR
(NOTE 4)
50Ω
B
C = 20pF
0
L
(NOTE 5)
t
t
RPHL
RPLH
V
CC
1.0V
0
V
V
OM
OM
RO
0
Figure 7. Receiver Propagation Delay
8
_______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Test Circuits and Waveforms (continued)
S1
S3
1.5V
A
B
V
CC
1kΩ
R
O
-1.5V
V
ID
R
S2
C = 20pF
L
(NOTE 5)
GENERATOR
(NOTE 4)
50Ω
3V
0
3V
0
S1 OPEN
S2 CLOSED
S3 = 1.5V
S1 CLOSED
S2 OPEN
RE
RE
RO
RE
RO
1.5V
1.5V
S3 = -1.5V
t
RPZH
t
t
RPZL
RPSL
t
t
RPSH
RPWAKE
V
0
OH
V
V
CC
RO
1.5V
1.5V
OL
3V
0
3V
0
S1 OPEN
S2 CLOSED
S3 = 1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
RE
1.5V
1.5V
t
RPHZ
t
RPLZ
V
OH
V
CC
RO
0.5V
0.5V
0
V
OL
Figure 8. Receiver Enable and Disable Times
Note 4: The input pulse is supplied by a generator with the following characteristics: f = 5MHz, 50% duty cycle; tr ≤ ±ns; Z = 50Ω.
0
Note 5: C includes probe and stray capacitance.
L
_______________________________________________________________________________________
9
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
-in Description
PIN
NAME
FUNCTION
MAX3440E
MAX3441E
MAX3442E
MAX3443E
MAX3444E
Fault output. 1 = fault; 0 = normal operation
A or B under the following conditions:
• A-B differential <200mV
• A shorted to B
1
—
—
FAULT
• A shorted to a voltage within the common-mode range
(detected only when the driver is enabled)
• B shorted to a voltage within the common-mode range
(detected only when the driver is enabled)
• A or B outside the common-mode range
Receiver Output. If receiver enabled and (A-B) ≥ -50mV,
RO = high; if (A-B) ≤ -200mV, RO = low.
2
1
2
1
2
RO
—
RE
Receiver Output Enable. Pull RE low to enable RO.
Driver Output Enable. Pull DE low to enable the outputs.
Force DE high to three-state the outputs. Drive RE and DE
high to enter low-power shutdown mode.
—
3
—
—
3
3
DE
DE/RE
DE
Driver/Receiver Output Enable. Pull DE/RE low to three-
state the driver output and enable RO. Force DE/RE high to
enable driver output and three-state RO.
—
—
Driver Output Enable. Force DE high to enable driver. Pull
DE low to three-state the driver output. Drive RE high and
pull DE low to enter low-power shutdown mode.
—
Driver Input. A logic low on DI forces the noninverting
output low and the inverting output high. A logic high on
DI forces the noninverting output high and the inverting
output low.
4
4
—
DI
J1708 Input. A logic low on TXD forces outputs A and B to
the dominant state. A logic high on TXD forces outputs A
and B to the recessive state.
—
—
4
TXD
5
±
7
8
5
±
7
8
5
±
7
8
GND
A
Ground
Noninverting Receiver Input/Driver Output
Inverting Receiver Input/Driver Output
B
V
Positive Supply, V
= +4.75V to +5.25V
CC
CC
10 ______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Function Tables
Table 1. MAX3440E/MAX3441E Fault Table
INPUTS
OUTPUTS
A-B
DIFFERENTIAL
INPUT VOLTAGE
FAULT
CONDITIONED
BY DELAY
FAULT CONDITION
COMMON-MODE
VOLTAGE
V
RO
ID
≥0.45V
1
1
1
0
Normal operation
Indeterminate
<0.45V and ≥0.27V
<0.27V and ≥-0.05V
Indeterminate
1
Low-input differential voltage
Indeterminate
(Note 1)
≤-0.05V and ≥-0.2V
1
Low-input differential voltage
Low-input differential voltage
Indeterminate
≤12V and ≥-7V
≤-0.2V and >-0.27V
0
1
≤-0.27V and >-0.45V
0
Indeterminate
≤-0.45V
0
0
1
X
<-7V or >+12V
Indeterminate
Outside common-mode voltage range
X = Don’t care.
Note 1: Receiver output may oscillate with this differential input condition.
Table 3. MAX3442E/MAX3443E
(RS-485/RS-422)
Table 2. MAX3440E/MAX3441E
(RS-485/RS-422)
TRANSMITTING
INPUTS
OUTPUTS
RE
0
DE
0
DI
X
0
A
B
TRANSMITTING
High-Z
High-Z
INPUTS
OUTPUTS
0
1
0
1
1
0
DE/RE
DI
X
A
B
0
1
1
0
1
1
High-Z
High-Z
1
0
X
0
Shutdown Shutdown
0
0
1
1
0
1
1
0
1
1
0
1
1
1
1
X = Don’t care.
X = Don’t care.
Table 5. MAX3440E/MAX3441E
(RS-485/RS-422)
Table 4. MAX3444E (J1708) Application
TRANSMITTING
RECEIVING
INPUTS
INPUTS
OUTPUTS
CONDITIONS
OUTPUTS
TXD
DE
1
A
B
—
DE/RE
(A - B)
≥-0.05V
≤-0.2V
RO
0
1
0
1
High-Z
High-Z
1
High-Z
High-Z
0
—
0
0
0
1
1
1
—
0
1
0
Dominant state
Recessive state
Open/shorted
X
0
High-Z
High-Z
High-Z
X = Don’t care.
______________________________________________________________________________________ 11
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Function Tables (continued)
Table 6. MAX3442E/MAX3443E
(RS-485/RS-422)
Table 7. MAX3444E (RS-485/RS-422)
RECEIVING
INPUTS
DE
RECEIVING
OUTPUTS
INPUTS
OUTPUTS
RE
0
(A - B)
RO
RE
0
DE
X
(A - B)
RO
X
X
X
1
0
≥-0.05V
1
≥-0.05V
1
0
≤-0.2V
0
1
0
X
≤-0.2V
0
1
0
Open/shorted
0
X
Open/shorted
1
X
X
High-Z
Shutdown
1
0
X
X
High-Z
Shutdown
1
1
1
X = Don’t care.
X = Don’t care.
Lowꢀ-ower Shutdown
Detailed Description
(MAX3442E/MAX3443E/MAX3444E)
The MAX3442E/MAX3443E/MAX3444E offer a low-power
shutdown mode. Force DE low and RE high to shut down
the MAX3442E/MAX3443E. Force DE and RE high to
shut down the MAX3444E. A time delay of 50ns prevents
the device from accidentally entering shutdown due to
logic skews when switching between transmit and
receive modes. Holding DE low and RE high for at least
800ns guarantees that the MAX3442E/MAX3443E enter
shutdown. In shutdown, the devices consume a maxi-
mum 20µA supply current.
The MAX3440E–MAX3444E fault-protected transceivers
for RS-485/RS-422 and J1708 communication contain
one driver and one receiver. These devices feature fail-
safe circuitry, which guarantees a logic-high receiver
output when the receiver inputs are open or shorted, or
when they are connected to a terminated transmission
line with all drivers disabled (see the True Fail-Safe
section). All devices have a hot-swap input structure
that prevents disturbances on the differential signal
lines when a circuit board is plugged into a hot back-
plane (see the Hot-Swap Capability section). The
MAX3440E/MAX3442E/MAX3444E feature a reduced
slew-rate driver that minimizes EMI and reduces reflec-
tions caused by improperly terminated cables, allowing
error-free data transmission up to 250kbps (see the
Reduced EMI and Reflections section). The MAX3441E/
MAX3443E drivers are not slew-rate limited, allowing
transmit speeds up to 10Mbps.
ꢁ0k Fault -rotection
The driver outputs/receiver inputs of RS-485 devices in
industrial network applications often experience voltage
faults resulting from shorts to the power grid that
exceed the -7V to +12V range specified in the EIA/TIA-
485 standard. In these applications, ordinary RS-485
devices (typical absolute maximum -8V to +12.5V)
require costly external protection devices. To reduce
system complexity and eliminate this need for external
protection, the driver outputs/receiver inputs of the
MAX3440E–MAX3444E withstand voltage faults up to
±0V with respect to ground without damage.
Protection is guaranteed regardless whether the device
is active, shut down, or without power.
Driver
The driver accepts a single-ended, logic-level input
(DI) and transfers it to a differential, RS-485/RS-422
level output (A and B). Deasserting the driver enable
places the driver outputs (A and B) into a high-imped-
ance state.
Receiver
The receiver accepts a differential, RS-485/RS-422
level input (A and B), and transfers it to a single-ended,
logic-level output (RO). Deasserting the receiver enable
places the receiver inputs (A and B) into a high-imped-
ance state (see Tables 1–7).
True FailꢀSafe
The MAX3440E–MAX3444E use a -50mV to -200mV
differential input threshold to ensure true fail-safe
receiver inputs. This threshold guarantees the receiver
outputs a logic high for shorted, open, or idle data
lines. The -50mV to -200mV threshold complies with
the ±200mV threshold EIA/TIA-485 standard.
12 ______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Human Body Model
Figure 9a shows the Human Body Model, and Figure
9b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the device through a
1.5kΩ resistor.
±±15k ESD -rotection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against ESD
encountered during handling and assembly. The
MAX3440E–MAX3444E receiver inputs/driver outputs
(A, B) have extra protection against static electricity
found in normal operation. Maxim’s engineers have
developed state-of-the-art structures to protect these
pins against ±15kV ESD without damage. After an ESD
event, the MAX3440E–MAX3444E continue working
without latchup.
Driver Output -rotection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or bus contention.
The first, a foldback current limit on the driver output
stage, provides immediate protection against short cir-
cuits over the whole common-mode voltage range. The
second, a thermal shutdown circuit, forces the driver out-
puts into a high-impedance state if the die temperature
exceeds +1±0°C. Normal operation resumes when the
die temperature cools to +140°C, resulting in a pulsed
output during continuous short-circuit conditions.
ESD protection can be tested in several ways. The
receiver inputs are characterized for protection to
±15kV using the Human Body Model.
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
R
R
D
1.5k
C
1M
I
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
P
r
DISCHARGE
RESISTANCE
CHARGE-CURRENT-
LIMIT RESISTOR
AMPERES
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
36.8%
C
STORAGE
CAPACITOR
s
100pF
10%
0
SOURCE
TIME
0
t
RL
t
DL
CURRENT WAVEFORM
Figure 9b. Human Body Model Current Waveform
Figure 9a. Human Body ESD Test Model
______________________________________________________________________________________ 13
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
HotꢀSwap Capability
__________Applications Information
Hot-Swap Inputs
±28 Transceivers on the Bus
Inserting circuit boards into a hot, or powered, back-
The MAX3440E–MAX3444E transceivers 1/4-unit-load
plane may cause voltage transients on DE, DE/RE, RE,
receiver input impedance (48kΩ) allows up to 128
and receiver inputs A and B that can lead to data errors.
transceivers connected in parallel on one communica-
For example, upon initial circuit board insertion, the
tion line. Connect any combination of these devices,
processor undergoes a power-up sequence. During this
and/or other RS-485 devices, for a maximum of 32-unit
period, the high-impedance state of the output drivers
loads to the line.
makes them unable to drive the MAX3440E–MAX3444E
enable inputs to a defined logic level. Meanwhile, leak-
Reduced EMI and Reflections
age currents of up to 10µA from the high-impedance out-
The MAX3440E/MAX3442E/MAX3444E are slew-rate
limited, minimizing EMI and reducing reflections
caused by improperly terminated cables. Figure 11
shows the driver output waveform and its Fourier analy-
sis of a 125kHz signal transmitted by a MAX3443E.
High-frequency harmonic components with large ampli-
tudes are evident.
put, or capacitively coupled noise from V
or GND,
CC
could cause an input to drift to an incorrect logic state.
To prevent such a condition from occurring, the
MAX3440E–MAX3443E feature hot-swap input circuitry
on DE, DE/RE, and RE to guard against unwanted dri-
ver activation during hot-swap situations. The
MAX3444E has hot-swap input circuitry only on RE.
Figure 12 shows the same signal displayed for a
MAX3442E transmitting under the same conditions.
Figure 12’s high-frequency harmonic components are
much lower in amplitude, compared with Figure 11’s,
and the potential for EMI is significantly reduced.
When V
rises, an internal pulldown (or pullup for RE)
CC
circuit holds DE low for at least 10µs, and until the cur-
rent into DE exceeds 200µA. After the initial power-up
sequence, the pulldown circuit becomes transparent,
resetting the hot-swap tolerable input.
Hot-Swap Input Circuitry
At the driver-enable input (DE), there are two NMOS
devices, M1 and M2 (Figure 10). When V
ramps from
CC
V
CC
zero, an internal 15µs timer turns on M2 and sets the
SR latch, which also turns on M1. Transistors M2, a
2mA current sink, and M1, a 100µA current sink, pull
DE to GND through a 5.±kΩ resistor. M2 pulls DE to the
disabled state against an external parasitic capaci-
tance up to 100pF that may drive DE high. After 15µs,
the timer deactivates M2 while M1 remains on, holding
DE low against three-state leakage currents that may
drive DE high. M1 remains on until an external current
source overcomes the required input current. At this
time, the SR latch resets M1 and turns off. When M1
turns off, DE reverts to a standard, high-impedance
15µs
TIMER
TIMER
5.6kΩ
DE
CMOS input. Whenever V
is reset.
drops below 1V, the input
CC
(HOT SWAP)
2mA
A complementary circuit for RE uses two PMOS
devices to pull RE to V
100µA
.
CC
M1
M2
Figure 10. Simplified Structure of the Driver Enable Pin (DE)
14 ______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
In general, a transmitter’s rise time relates directly to
the length of an unterminated stub, which can be dri-
ven with only minor waveform reflections. The following
equation expresses this relationship conservatively:
J±708 Applications
The MAX3444E is designed for J1708 applications. To
configure the MAX3444E, connect DE and RE to GND.
Connect the signal to be transmitted to TXD. Terminate
the bus with the load circuit as shown in Figure 15. The
drivers used by SAE J1708 are used in a dominant-
mode application. DE is active low; a high input on DE
places the outputs in high impedance. When the driver is
disabled (TXD high or DE high), the bus is pulled high by
external bias resistors R1 and R2. Therefore, a logic level
high is encoded as recessive. When all transceivers are
idle in this configuration, all receivers output logic high
because of the pullup resistor on A and pulldown resistor
on B. R1 and R2 provide the bias for the recessive state.
C1 and C2 combine to form a ±MHz lowpass filter, effec-
tive for reducing FM interference. R2, C1, R4, and C2
combine to form a 1.±MHz lowpass filter, effective for
reducing AM interference. Because the bus is untermi-
nated, at high frequencies, R3 and R4 perform a
pseudotermination. This makes the implementation more
flexible, as no specific termination nodes are required at
the ends of the bus.
Length = t
/ (10 x 1.5ns/ft)
RISE
where t
is the transmitter’s rise time.
RISE
For example, the MAX3442E’s rise time is typically
800ns, which results in excellent waveforms with a stub
length up to 53ft. A system can work well with longer
unterminated stubs, even with severe reflections, if the
waveform settles out before the UART samples them.
RSꢀ481 Applications
The MAX3440E–MAX3443E transceivers provide bidi-
rectional data communications on multipoint bus trans-
mission lines. Figures 13 and 14 show a typical network
applications circuit. The RS-485 standard covers line
lengths up to 4000ft. To minimize reflections and
reduce data errors, terminate the signal line at both
ends in its characteristic impedance, and keep stub
lengths off the main line as short as possible.
20dB/div
2V/div
20dB/div
2V/div
0
500kHz/div
5.00MHz
0
500kHz/div
5.00MHz
Figure 11. Driver Output Waveform and FFT Plot of MAX3443E
Transmitting a 125kHz Signal
Figure 12. Driver Output Waveform and FFT Plot of MAX3442E
Transmitting a 125kHz Signal
______________________________________________________________________________________ 15
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
120Ω
120Ω
DE/RE
DI
B
A
B
A
DI
D
D
DE/RE
B
A
B
A
RO
RO
R
R
FAULT
FAULT
R
R
D
D
MAX3440E
MAX3441E
DE/RE
DI
DI
RO
DE/RE RO
FAULT
FAULT
Figure 13. MAX3440E/MAX3441E Typical RS-485 Network
120Ω
120Ω
DE
DI
B
B
DI
D
D
DE
A
A
B
A
B
A
RO
RE
RO
RE
R
R
R
R
D
D
MAX3442E
MAX3443E
DE
DI
DI
RO
DE
RO
RE
RE
Figure 14. MAX3442E/MAX3443E Typical RS-485 Network
16 ______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Chip Information
V
CC
TRANSISTOR COUNT: 310
PROCESS: BiCMOS
DE
R1
4.7kΩ
R3
Tx
D
TXD
47Ω
B
A
C1
2.2nF
J1708 BUS
C2
MAX3444E
2.2nF
R4
47Ω
R2
4.7kΩ
Rx
R
RO
RE
Figure 15. J1708 Application Circuit
-in Configurations and Typical Operating Circuits (continued)
TOP VIEW
DE
MAX3442E
MAX3443E
RO
RE
DE
DI
R
R
RO
RE
DE
DI
1
2
3
4
1
2
3
4
V
CC
8
7
8
7
6
5
V
D
CC
Rt
DI
B
B
A
B
Rt
6
A
A
RO
R
D
D
GND
5
GND
RE
DIP/SO
DIP/SO
DE
MAX3444E
R
R
V
RO
1
RO
1
8
7
8
V
CC
D
CC
TXD
B
B
2
3
4
2
3
4
B
RE
DE
RE
DE
7
6
5
Rt
Rt
6
A
A
A
RO
R
TXD
GND
TXD
D
D
5
GND
RE
DIP/SO
DIP/SO
______________________________________________________________________________________ 17
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
Ordering Information (continued)
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
0°C to +70°C
PIN-PACKAGE
8 SO
MAX3441EESA
MAX3441EEPA
MAX3441EASA
MAX3441EAPA
MAX3442EESA
MAX3442EEPA
MAX3442EASA
MAX3442EAPA
MAX3443ECSA
MAX3443ECPA
MAX3443EESA
MAX3443EEPA
MAX3443EASA
MAX3443EAPA
MAX3444EESA
MAX3444EEPA
MAX3444EASA
MAX3444EAPA
8 PDIP
8 SO
8 PDIP
8 SO
8 PDIP
8 SO
8 PDIP
8 SO
0°C to +70°C
8 PDIP
8 SO
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
8 PDIP
8 SO
8 PDIP
8 SO
8 PDIP
8 SO
8 PDIP
18 ______________________________________________________________________________________
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
-ac5age Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
INCHES
MILLIMETERS
MAX
MAX
1.75
0.25
0.49
0.25
DIM
A
MIN
MIN
1.35
0.10
0.35
0.19
0.053
0.004
0.014
0.007
0.069
0.010
0.019
0.010
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
MAX
0.197
0.344
0.394
MAX
5.00
DIM
D
MIN
MIN
4.80
8.55
9.80
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0 -8
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
______________________________________________________________________________________ 19
±±15k ESDꢀ-rotected, ±ꢁ0k Faultꢀ-rotected,
±0Mbps, FailꢀSafe RSꢀ481/J±708 Transceivers
-ac5age Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated -roducts, ±20 San Gabriel Drive, Sunnyvale, CA 9408ꢁ 408ꢀ737ꢀ7ꢁ00
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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