MAX34406FETG T [MAXIM]
Quad Current-Sense Amplifier with Overcurrent Threshold Comparators; 四电流检测放大器具有过流阈值比较
| 型号： | MAX34406FETG T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Quad Current-Sense Amplifier with Overcurrent Threshold Comparators |
| 文件： | 总11页 (文件大小：1545K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5930; Rev 1; 1/12
E V A L U A T I O N K I T A V A I L A B L E
General Description
Features
The MAX34406 is a quad, high-side, unidirectional, cur-
rent-sense amplifier that offers precision accuracy. It
provides analog outputs for each of the four amplifiers
that can be routed to an external ADC, and contains four
overcurrent comparators with a fixed 1.0V threshold. All
four comparators are logically ORed, and the result can
be delayed/filtered with an external capacitor before it is
fed to a latched common shutdown open-drain output pin.
S Four Precision Current-Sense Amplifiers
S Fixed Gains of 25V/V, 50V/V, 100V/V, and 200V/V
S Less Than ±±00ꢀV of ꢁnput ꢂffset
S Less Than ±0ꢃ±6 of Gain ꢄrror ꢅT/F/ꢆH or ±0ꢃꢇ6 of
Gain ꢄrror ꢅWH
S Wide 2ꢃ0V to 2ꢇV Common Mode Range
S Analog Voltage ꢂutputs for ꢄach Amplifier
S ꢁndependent ꢂvercurrent Comparators with Fixed
Applications
1ꢃ0V Threshold
Network Switches/Routers
Base Stations
S Low Power Consumption
S -40NC to +ꢇ5NC Temperature Range
S Small 24-Pin TQFN ꢅ4mm x 4mmH Package
Servers
Smart Grid Network Systems
Industrial Controls
Ordering Information appears at end of data sheet.
Block Diagram
V
DD
ENA
AMPLIFIER 4
AMPLIFIER 3
POR
AMPLIFIER 2
AMPLIFIER 1
MAX34406
R1
OR
4
INx+
R1
4
P
INx-
OR
CLR
D
R
OUT
SHTDN
5µA
6V
CLAMP
N
N
CK
Q
N
LATCH THRESHOLD = V x 50%
DD
1.0V
REFERENCE
4
4
OUTx
GND
OCx
CDLY
For related parts and recommended products to use with this part, refer to: www.maxim-ic.com/MAX34406.related
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1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
ABSꢂLUTꢄ MAXꢁMUM RATꢁNGS
Voltage Range on INx+ and INx-
OUT1, OUT2, OUT3, OUT4 Short Circuit to GND ....Continuous
Operating Junction Temperature Range ........... -40NC to +85NC
Storage Temperature Range............................ -55NC to +125NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Relative to GND.................................................-0.3V to +30V
Voltage Range on V
Relative to GND.................-0.3V to +6V
DD
Voltage Range on Remaining Pins
Relative to GND.................................... -0.3V to (V
+ 0.3V)
DD
Continuous Power Dissipation (T = +70NC)
A
TQFN (derate 27.8mW/NC above +70NC)...............2222.2mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ꢄLꢄCTRꢁCAL CꢆARACTꢄRꢁSTꢁCS
(V
= V
= 12V, V
= 0V, T = -40NC to +85NC, unless otherwise noted. Typical values are T = +25NC) (Note 1)
INx+
INx-
SENSE
A
A
PARAMꢄTꢄR
SYMBꢂL
CꢂNDꢁTꢁꢂNS
MꢁN
TYP
MAX
5.5
UNꢁTS
V
V
V
Operating Range
Supply Current
V
2.7
DD
DD
I
(Note 2)
Guaranteed by CMRR
> 2.0V at T = +25NC
200
28
FA
V
DD
DD
Common-Mode Input Range
Common-Mode Rejection Ratio
Input Offset Voltage
V
2.0
86
CM
CMRR
V
120
Q100
25
dB
FV
INx+
A
V
(Note 3)
Q600
OS
MAX34406T
MAX34406F
MAX34406H
MAX34406W
MAX34406T/F/H
MAX34406W
MAX34406T/F/H
MAX34406W
MAX34406T
MAX34406F
MAX34406H
MAX34406W
MAX34406T
MAX34406F
MAX34406H
MAX34406W
50
Gain (0.5V < V
< 1.5V)
G
V/V
OUTx
100
200
Q0.6
Q0.8
Gain Error
GE
(Note 4)
(Note 5)
%
10
20
OUTx Output Resistance
OUTx Low Voltage
R
kω
OUTx
15
30
V
mV
OL
60
120
125
60
V
= 2.0V
OUTx
Bandwidth
BW
kHz
(Note 5)
30
15
V
x
V
+
DD
0.7
DD
0.3
ENA Input Logic-High
ENA Input Logic-Low
V
V
V
IH
V
GND
0.3
-
V
x
DD
0.3
V
IL
ENA Input Leakage
Q1
FA
Output Logic-Low (SHTDN, OCx)
V
I
= 2mA
0.3
V
OL
OL
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2
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
ꢄLꢄCTRꢁCAL CꢆARACTꢄRꢁSTꢁCS ꢅcontinuedH
(V
= V
= 12V, V
= 0V, T = -40NC to +85NC, unless otherwise noted. Typical values are T = +25NC) (Note 1)x
INx+
INx-
SENSE
A
A
PARAMꢄTꢄR
SYMBꢂL
CꢂNDꢁTꢁꢂNS
MꢁN
TYP
1.00
20
MAX
Q1
UNꢁTS
FA
Output Leakage (SHTDN, OCx)
Comparator Threshold
I
O
V
0.98
1.02
Q5
V
TH
Comparator Offset
V
mV
mV
Fs
COS
Comparator Hysteresis
V
HYS
Comparator Propagation Delay
t
Overdrive = Q50mV, output load = 2mA
3
D
V
V
V
V
V
V
= 3.3V, C
= 3.3V, C
= 3.3V, C
= 5.0V, C
= 5.0V, C
= 5.0V, C
= 10nF
= 22nF
= 33nF
= 10nF
= 22nF
= 33nF
3.3
7.3
11
5
DD
DD
DD
DD
DD
DD
CDLY
CDLY
CDLY
CDLY
CDLY
CDLY
SHTDN Delay
t
ms
DLY
11
16
Note 1: All devices are 100% production tested at T = +25NC. All temperature limits are guaranteed by design.
A
Note 2: V
, V
, V
, V
= 0V. All open-drain outputs left disconnected.
OUT1 OUT2 OUT3 OUT4
Note 3: V
is extrapolated from measurements for the gain-error test.
Note 4: Gain error is calculated by applying two values of V
OS
and calculating the error of the slope vs. the ideal: Gain = 100,
SENSE
V
is 5mV and 15mV.
SENSE
Note 5: The device is stable for any external capacitance value.
Typical Operating Characteristics
(V
= V
= 12V, T = +25°C, unless otherwise noted.)
INx+
INx- A
+25°C INPUT OFFSET
+25°C GAIN ERROR
V vs. I
OL OL
20
18
16
14
12
10
8
25
160
140
120
100
80
20
15
10
5
OC1
SHTDN
60
6
40
4
20
2
0
0
0
-200 -150 -100 -50
0
50 100 150
-0.15 -0.10 -0.05
0
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40
GAIN ERROR (%)
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
CURRENT IN (mA)
OFFSET (µV)
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3
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Typical Operating Characteristics (continued)
((V
= V
= 12V, T = +25°C, unless otherwise noted.)
INx+
INx- A
INPUT OFFSET
vs. COMMON-MODE VOLTAGE
GAIN ERROR
vs. COMMON-MODE VOLTAGE
INPUT OFFSET vs. TEMPERATURE
30
20
0.5
0.4
0.3
0.2
0.1
0
0
-10
-20
-30
-40
-50
-60
10
0
-10
-20
-30
-0.1
0
5
10
15
20
25
30
0
5
10
15
20
25
30
-40
-15
10
35
60
85
1000
85
COMMON-MODE VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
TEMPERATURE (°C)
SMALL-SIGNAL PULSE RESPONSE
(GAIN = 100)
SMALL-SIGNAL GAIN
vs. FREQUENCY (GAIN = 100)
GAIN ERROR vs. TEMPERATURE
MAX34406 toc09
0.5
0.4
0.3
0.2
0.1
0
50
45
40
35
30
25
20
15
10
5
10mV
5mV
V
SENSE
1.0V
0.5V
V
OUTx
0
20µs/div
-40
-15
10
35
60
85
1
10
100
TEMPERATURE (°C)
FREQUENCY (kHz)
LARGE-SIGNAL PULSE RESPONSE
(GAIN = 100)
COMPARATOR THRESHOLD
vs. TEMPERATURE
SHTDN DELAY vs. TEMPERATURE
MAX34406 toc10
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
C
CDLY
= 10nF
25mV
V
SENSE
5mV
2.5V
V
OUTx
0.5V
20µs/div
-40
-15
10
35
60
-45
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
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4
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Pin Configuration
TOP VIEW
18
17
16
15
14
13
12
11
10
9
V
19
OC4
OC3
OC2
DD
ENA 20
SHTDN 21
CDLY 22
MAX34406
OC1
N.C.
N.C.
N.C.
GND
8
23
24
EP
5
+
7
1
2
3
4
6
TQFN
(4mm x 4mm)
Pin Description
PꢁN
NAMꢄ
FUNCTꢁꢂN
External Sense Resistor Power-Side Connection for Amplifier 1. Bias at this pin also provides the supply
voltage for amplifier 1. This pin can be left open circuit if not needed.
1
IN1+
2
3
4
5
IN1-
OUT1
OUT2
IN2-
External Sense Resistor Load-Side Connection for Amplifier 1
Output Voltage from Amplifier 1 Proportional to V
Output Voltage from Amplifier 2 Proportional to V
. This output is clamped at 6V.
. This output is clamped at 6V.
SENSE
SENSE
External Sense Resistor Load-Side Connection for Amplifier 2
External Sense Resistor Power-Side Connection for Amplifier 2. Bias at this pin also provides the supply
voltage for amplifier 2. This pin can be left open circuit if not needed.
6
7, 8, 23
9
IN2+
N.C.
OC1
No Connection. Not internally connected.
Overcurrent Threshold Comparator Associated with Amplifier 1. Open-drain output. This output
transitions to high impedance during an overcurrent event.
Overcurrent Threshold Comparator Associated with Amplifier 2. Open-drain output. This output
transitions to high impedance during an overcurrent event.
10
11
12
13
OC2
OC3
OC4
IN3+
Overcurrent Threshold Comparator Associated with Amplifier 3. Open-drain output. This output
transitions to high impedance during an overcurrent event.
Overcurrent Threshold Comparator Associated with Amplifier 4. Open-drain output. This output
transitions to high impedance during an overcurrent event.
External Sense Resistor Power-Side Connection for Amplifier 3. Bias at this pin also provides the supply
voltage for amplifier 3. This pin can be left open circuit if not needed.
����������������������������������������������������������������� Maxim Integrated Products
5
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Pin Description (continued)
PꢁN
14
15
16
17
NAMꢄ
IN3-
FUNCTꢁꢂN
External Sense Resistor Load-Side Connection for Amplifier 3
OUT3
OUT4
IN4-
Output Voltage from Amplifier 3 Proportional to V
Output Voltage from Amplifier 4 Proportional to V
. This output is clamped at 6V.
. This output is clamped at 6V.
SENSE
SENSE
External Sense Resistor Load-Side Connection for Amplifier 4
External Sense Resistor Power-Side Connection for Amplifier 4. Bias at this pin also provides the supply
voltage for amplifier 4. This pin can be left open circuit if not needed.
18
19
IN4+
Supply Voltage for Reference, Comparators, and Logic. A +2.7V to +5.5V supply. This pin should be
decoupled to GND with a 100nF ceramic capacitor.
V
DD
SHTDN Enable Input. CMOS digital input. Connect to GND to clear the latch and unconditionally
20
21
ENA
deassert (force low) the SHTDN output. Connect to V
to enable normal latch operation of the SHTDN
DD
output. ENA should be toggled low once V
reaches nominal operating voltage.
DD
Shutdown Output. Open-drain output. This output transitions to high impedance when any of the four
overcurrent comparator outputs (OC1 to OC4) are asserted (high impedance) as long as the ENA pin is
high. Toggling the ENA pin allows SHTDN to reset to logic-low.
SHTDN
Shutdown Delay Capacitor. A capacitor (C
) from this pin to GND delays the transition of the
CDLY
SHTDN pin. The delay time can be calculated by the following formula: t
= C
x (V /10FA). The
DLY
CDLY DD
22
CDLY
capacitor connected to CDLY is discharged when ENA is low and upon V
being applied (i.e., at power-
DD
on reset), and also any time all OCx outputs are low (i.e., inactive). If the shutdown delay is not required,
this pin can be left unconnected.
24
—
GND
EP
Ground Reference
Exposed Pad. Connect to ground or leave unconnected.
����������������������������������������������������������������� Maxim Integrated Products
±
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Typical Application Circuit
V
V
V
V
V
DD
1
2
3
4
IN1+
IN1-
V
DD
R
R
R
R
SENSE1
SENSE2
SENSE3
SENSE4
GND
ENA
V
DD
IN2+
IN2-
R
PU
SHTDN
V
DD
MAX34406
R
PU
IN3+
IN3-
OC1
OC2
OC3
OC4
µC
OUT1
OUT2
OUT3
OUT4
ADC
INPUTS
IN4+
IN4-
CDLY
C
CDLY
����������������������������������������������������������������� Maxim Integrated Products
7
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Detailed Description
Applications Information
The MAX34406 quad-channel, unidirectional, high-side,
current-sense amplifier features a 2.0V to 28V input
common-mode range. This feature allows the monitoring
of current out of a voltage supply as low as 2.0V. The
device monitors current through a current-sense resistor
and amplifies the voltage across that resistor.
Choosing the Sense Resistor
Choose R
lowing sections.
based on the criteria detailed in the fol-
SENSE
Voltage Loss
value causes the power-source voltage
to drop due to IR loss. For minimal voltage loss, use the
lowest R value.
A high R
SENSE
Current-sense amplifier output voltages (OUT1 to OUT4)
SENSE
are compared to a fixed 1.0V reference; if V
OUTx
OUTx Swing vs. V
and V
SENSE
exceeds 1.0V, the corresponding overcurrent warning
output (OC1 to OC4) is asserted. If the enable input
(ENA) is logic-high, SHTDN asserts when any of the four
overcurrent outputs go logic-high. Assertion of SHTDN on
overcurrent can be delayed and/or filtered by attaching
an external capacitor to CDLY. Once SHTDN is latched
high impedance, it remains so until ENA is toggled.
INx+
The device is unique because the supply voltage for
the current-sense amplifier in each channel is the input
common-mode voltage for that channel (the average
voltage at INx+ and INx-). There are no separate supply
voltage pins for the current-sense amplifiers. Therefore,
the OUTx voltage swing for a given channel is limited by
the minimum voltage at IN+ for that channel.
The unidirectional current-sense amplifiers used in each
channel of the device have a well established history. For
each channel, an op amp is used to force the current
through an internal gain resistor at IN+, which has a value
of R1, such that its voltage drop equals the voltage drop
V
= V
- V
- V
OH
OUTx(MAX)
INx+(MIN)
SENSE(MAX)
and
V
(MAX)
OUTx
R
=
SENSE
G ×I
(MAX)
LOAD
across an external sense resistor, R . There is an
SENSE
internal resistor at IN- with the same value as R1 to mini-
mize offset voltage. The current through R1 is sourced by
a high-voltage p-channel FET. Its source current is the
same as its drain current, which flows through a second
V
full scale should be less than V
/gain at the
SENSE
OUTx
minimum INx+ voltage. For best performance with a 3.6V
supply voltage, select R
120mV (gain of 25V/V), 60mV (gain of 50V/V), 30mV (gain
of 100V/V), or 15mV (gain of 200V/V) of sense voltage for
the full-scale current in each application. These can be
increased by use of a higher minimum input voltage.
to provide approximately
SENSE
gain resistor, R
. This produces an output voltage,
OUTx
V , whose magnitude is I
OUTx
x R
x R /R1.
OUTx
LOAD
SENSE
The gain accuracy is based on the matching of the two
gain resistors, R1 and R (Table 1). Total gain = 25V/V
OUTx
Accuracy
), there are
for the MAX34406T, 50V/V for the MAX34406F, 100V/V
for the MAX34406H, and 200V/V for the MAX34406W.
The output is protected from input overdrive by use of a
6V clamp-protection circuit.
In the linear region (V
two components to accuracy: input offset voltage (V
< V
OUTx
OUTx(MAX)
)
OS
and gain error (GE). For all variants of the device,
= P 600FV (max); gain error is 0.6% (max) for the
V
OS
MAX34406T/F/H or 0.8% (max) for the MAX34406W. Use
the linear equation to calculate total error:
Table 1ꢃ ꢁnternal Gain Setting Resistors
ꢅTypical ValuesH
V
OS
Error (%) = GE ±
×100
GAꢁN ꢅV/VH
R1 ꢅIH
100
R
ꢅkIH
V
ꢂUTx
SENSE
200
100
50
20
where GE is gain error, V
is the voltage across
SENSE
100
10
10
10
the sense resistor R
high R
, and V
SENSE
is offset voltage. A
OS
200
value allows lower currents to be measured
SENSE
25
400
more accurately because offsets are less significant
when the sense voltage is larger.
����������������������������������������������������������������� Maxim Integrated Products
ꢇ
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Efficiency and Power Dissipation
consider using a ceramic capacitor across OUTx and
GND to hold V constant during sampling. This also
2
At high current levels, the I R losses in R
can be
SENSE
OUTx
significant. Take this into consideration when choosing
the resistor value and its power dissipation (wattage)
rating. Also, the sense resistor’s value might drift if it is
decreases the small-signal bandwidth of the current-
sense amplifier and reduces noise at OUTx.
Input Filters
Some applications of current-sense amplifiers need to
measure currents accurately even in the presence of
both differential and common-mode ripple, as well as a
wide variety of input transient conditions. For example,
high-frequency ripple at the output of a switching buck or
boost regulator results in a common-mode voltage at the
device’s inputs. Alternatively, the fast load-current tran-
sients, when measuring at the input of a switching buck
or boost regulator, can cause high-frequency differential
sense voltages to occur at the device’s inputs, although
the signal of interest is the average DC value. Such high-
frequency differential sense voltages can result in a volt-
age offset at the device output.
allowed to heat up excessively. The precision V
of the
OS
device allows the use of small sense resistors to reduce
power dissipation and reduce hot spots.
Kelvin Connections
Because of the high currents that flow through R
,
SENSE
take care to eliminate parasitic trace resistance from
causing errors in the sense voltage. Either use a four-
terminal current-sense resistor or use Kelvin (force and
sense) PCB layout techniques.
Minimizing Trace Resistance
PCB trace resistance from R
to the INx+ inputs
SENSE
contributes to gain error in the current-sense amplifiers.
Care should be taken to minimize this resistance (shown
The device allows a method of filtering to help improve
performance in the presence of input common-mode
voltage and input differential voltage transients. Figure 2
shows a differential input filter.
as R
in Figure 1). Total gain including error caused by
TRC
trace resistance can be calculated as follows:
R
OUTx
G =
R1 + R
TRC
The capacitor C between INx+ and INx- along with the
IN
resistor R between the sense resistor and INx- helps
IN
For example, assume a gain of 100V/V, as in the
MAX34406H. FromTable1, R1=100IandR =10kI.
Then every 10mI of PCB trace resistance adds -0.01%
filter against input differential voltages and prevents them
from reaching the device.
OUTx
The corner frequency of this filter is determined by the
gain error.
choice of R , C , and the value of the input resistance
IN IN
Optional Output Filter Capacitor
When designing a system that uses a sample-and-hold
stage in the ADC, the sampling capacitor momentarily
loads OUTx and causes a drop in the output voltage. If
sampling time is very short (less than a microsecond),
at INx- (R1). See Table 1 for R1 values at the different
gain options.
The value of R should be chosen to minimize its effect
IN
on the input offset voltage due to the bias current at INx-.
R
SENSE
R
SENSE
LOAD
R
IN
LOAD
R
TRC
C
IN
INx+
INx-
INx+
INx-
OUTx
MAX34406
OUTx
MAX34406
GND
GND
Figure 1. Input Trace Resistance
Figure 2. Differential Input Filter
����������������������������������������������������������������� Maxim Integrated Products
9
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
R
x I
contributes to the input voltage offset. I
Measurement of the two separate outputs with respect
to GND yields an accurate measure of the bidirectional
currents (Figure 3).
IN
BIAS
BIAS
is typically 0.2FA.
Placing R at the INx- input voltage does not affect the
IN
gain error of the device because the gain is given by the
ratio between R
Choosing the Delay Capacitor
The SHTDN output asserts upon overcurrent detection
on any of the 4 channels. OC1 to OC4 are logically ORed
together; SHTDN latches the output after some delay.
SHTDN latch delay is determined by the following equation:
and R1 at INx+.
OUTx
Bidirectional Application
Some systems can require a precise bidirectional cur-
rent-sense amplifier to accurately monitor currents.
t
= C
× (V
÷ 10µA)
DLY
CDLY
DD
Example C
Characteristics table.
and t
pairs are given in the Electrical
DLY
CDLY
I
LOAD
R
SENSE
IN1+
GND
OUT1
IN1- IN2+ IN2-
V
= 3.3V
DD
MAX34406
µC
OUT2
ADC
INPUTS
Figure 3. Bidirectional Application
Ordering Information
PART
MAX34406TETG+*
MAX34406TETG+T*
MAX34406FETG+*
MAX34406FETG+T*
MAX34406HETG+
MAX34406HETG+T
MAX34406WETG+*
MAX34406WETG+T*
GAꢁN ꢅV/VH
TꢄMP RANGꢄ
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
PꢁN-PACKAGꢄ
24 TQFN-EP**
24 TQFN-EP**
24 TQFN-EP**
24 TQFN-EP**
24 TQFN-EP**
24 TQFN-EP**
24 TQFN-EP**
24 TQFN-EP**
25
25
50
50
100
100
200
200
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*Future product—contact factory for availability.
**EP = Exposed pad.
Package Information
For the latest package outline information and land patterns (footprints), go to wwwꢃmaxim-icꢃcom/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains
to the package regardless of RoHS status.
PACKAGꢄ TYPꢄ
PACKAGꢄ CꢂDꢄ
ꢂUTLꢁNꢄ Nꢂꢃ
21-0139
LAND PATTꢄRN Nꢂꢃ
90-0022
24 TQFN-EP
T2444+4
���������������������������������������������������������������� Maxim Integrated Products 10
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Revision History
RꢄVꢁSꢁꢂN RꢄVꢁSꢁꢂN
PAGꢄS
DꢄSCRꢁPTꢁꢂN
CꢆANGꢄD
NUMBꢄR
DATꢄ
0
6/11
Initial release
—
Removed the requirement for the bleed resistor on CDLY; added the function to
discharge the CDLY capacitor when all four OCx outputs are low (Block Diagram,
1
1/12
1, 3, 6, 7, 10
Electrical Characteristics table t
specification, Pin Description, Typical
DLY
Application Circuit, and Choosing the Delay Capacitor section)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
11
©
2012 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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