MAX31725_V01 [MAXIM]
±0.5°C Local Temperature Sensors;
| 型号： | MAX31725_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | ±0.5°C Local Temperature Sensors |
| 文件： | 总15页 (文件大小：483K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
General Description
Benefits and Features
The MAX31725/MAX31726 temperature sensors
accurately measure temperature and provide an
overtemperature alarm/interrupt/shutdown output. These
devices convert the temperature measurements to digital
form using a high-resolution, sigma-delta, analog-to-
digital converter (ADC). Accuracy is Q0.5NC from -40NC
S High Accuracy and Low-Voltage Operation Aids
Designers in Meeting Error and Power Budgets
ꢀ±±0.5° Accuracy ꢀroꢁ -ꢂ±5° to ꢃ+±.5°
ꢀ+6-Bit (±0±±39±62.5°) Teꢁperature Resolution
ꢀ20.V to 307V Supply Voltage Range
S One-Shot and Shutdown Modes Help Reduce
Power Usage
2
to +105NC. Communication is through an I C-compatible
2-wire serial interface.
ꢀ92.μA (ꢁax) Operating Supply °urrent
2
The I C serial interface accepts standard write byte, read
S Extended Teꢁperature Range Enables
Measureꢁents in High Teꢁperature Systeꢁs
(Measures Up to ꢃ+.±5°)
byte, send byte, and receive byte commands to read
the temperature data and configure the behavior of the
open-drain overtemperature shutdown output.
S Digital Functions Make Integration Easier into Any
Systeꢁ
The MAX31725 features three address select lines with a
total of 32 available addresses. The MAX31726 features
two address select lines with a total of 16 available
addresses and a RESET input. The sensors have a
2.5V to 3.7V supply voltage range, low 600FA supply
ꢀSelectable Tiꢁeout Prevents Bus Lockup
(Deꢀault Enabled ꢀor MAX3+72.; Deꢀault
ꢀDisabled ꢀor MAX3+726)
Separate Open-Drain OS Output Operates as
ꢀInterrupt or °oꢁparator/Therꢁostat Output
ꢀRESET Input (MAX3+726)
2
current, and a lockup-protected I C-compatible interface
that make them ideal for a wide range of applications,
including PCs, electronic test equipment, and office
electronics.
Applications
Both devices are available in an 8-pin TDFN package and
operate over the -55NC to +150NC temperature range.
Servers
Telecom
Industrial
Networking
Ordering Information appears at end of data sheet.
Typical Application Circuits
+2.5V TO +3.7V
+2.5V TO +3.7V
4.7kΩ
4.7kΩ
SDA
SCL
OS
V
SDA
SCL
OS
V
DD
A0
DD
A0
2
2
TO I C
TO I C
0.1µF
0.1µF
MASTER
MASTER
MAX31725
MAX31726
A1
A2
A1
GND
GND
RESET
For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX31725.related
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-6477; Rev 2; 12/14
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
ABSOLUTE MAXIMUM RATINGS
(All voltages relative to GND.)
Voltage Range on V , SDA, SCL, A0, A1 ............-0.3V to +4V
ESD Protection (All Pins, Human Body Model) (Note 1).... Q4000V
Operating Temperature Range........................ -55NC to +150NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) .....................................+260NC
DD
Voltage Range on A2, RESET, OS........... -0.3V to (V
Input Current at Any Pin ................................................... +5mA
Package Input Current ................................................... +20mA
+ 0.3V)
DD
Continuous Power Dissipation (T = +70NC)
A
TDFN (derate 24.4mW/NC above +70NC)...............1951.2mW
Note +: Human Body Model, 100pF discharged through a 1.5kI resistor.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PA°KAGE THERMAL °HARA°TERISTI°S (Note 2)
TDFN
Junction-to-Ambient Thermal Resistance (q ) ..........41°C/W
JA
Junction-to-Case Thermal Resistance (q ).................8°C/W
JC
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www0ꢁaxiꢁintegrated0coꢁ/therꢁal-tutorial.
RE°OMMENDED OPERATING °ONDITIONS
N
N
(T = -55 C to +150 C, unless otherwise noted.) (Notes 3, 4)
A
PARAMETER
Operating Supply Voltage
Input High Voltage
SYMBOL
°ONDITIONS
MIN
TYP
MAX
UNITS
V
2.5
3.3
3.7
V
V
V
DD
V
V
x 0.7
IH
DD
Input Low Voltage
V
V
x 0.3
DD
IL
ELE°TRI°AL °HARA°TERISTI°S
N
N
(V
= 2.5V to 3.7V, T = -55 C to +150 C, unless otherwise noted. Typical values are V
= 3.3V, T = +25NC.) (Note 3)
DD
A
DD A
PARAMETER
SYMBOL
°ONDITIONS
2.5V P+ V P 3.7V, -40NC P T P+105NC
MIN
-0.5
-0.7
TYP
MAX
+0.5
+0.7
UNITS
0.1
DD
A
Accuracy (Note 5)
NC
2.5V P+ V P 3.7V, -55NC P T P+150NC
DD
A
Temperature Conversion Noise
Temperature Data Resolution
Conversion Time
0.0625
44
NC
Bits
ms
ms
16
16
50
First Conversion Completed
Data ready after POR
2
50
I C inactive, T = -40NC to +125NC
600
2.5
925
A
2
Shutdown mode, I C inactive, T
=
A
3.5
-40NC to +125NC
Quiescent Supply Current
I
FA
DD
2
I C inactive, T = +150NC
800
4.2
A
2
Shutdown mode, I C inactive,
T
= +150NC
A
Maxim Integrated
2
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
ELE°TRI°AL °HARA°TERISTI°S (continued)
N
N
(V
= 2.5V to 3.7V, T = -55 C to +150 C, unless otherwise noted. Typical values are V
= 3.3V, T = +25NC.) (Note 3)
DD
A
DD A
PARAMETER
OS Delay
SYMBOL
°ONDITIONS
Depends on fault queue setting
Factory default setting
MIN
1
TYP
MAX
6
UNITS
Conversions
T
T
Default Temperature
80
75
80
75
80
NC
NC
V
OS
Default Temperature
Factory default setting
75
HYST
POR Voltage Threshold
POR Hysteresis
2.26
130
0.005
0.005
5
mV
FA
FA
pF
FA
V
Input-High Leakage Current
Input-Low Leakage Current
Input Capacitance
I
V
V
= 3.3V (all digital inputs)
= 0V (all digital inputs )
1
1
IH
IN
I
IL
IN
All digital inputs
Output-High Leakage Current
OS Output Saturation Voltage
Output Low Voltage
V
= 3.3V (SDA and OS)
1
IN
I
= 4.0mA
0.8
0.4
OUT
I
= 3mA (SDA)
V
OL
2
I ° A° ELE°TRI°AL °HARA°TERISTI°S
N
N
(V
= 2.5V to 3.7V, T = -55 C to +150NC, unless otherwise noted. Typical values are V
= 3.3V, T = +25 C.) (Notes 3, 6) (Figure 1)
DD
A
DD
A
PARAMETER
SYMBOL
°ONDITIONS
MIN
DC
TYP
MAX
UNITS
kHz
Serial Clock Frequency
f
(Note 7)
400
SCL
t
MAX31726 only
100
ns
Minimum RESET Pulse Width
RESET
Bus Free Time Between STOP
and START Conditions
t
1.3
Fs
BUF
START Condition Hold Time
STOP Condition Setup Time
Clock Low Period
t
0.6
600
1.3
0.6
100
100
100
0
Fs
ns
Fs
Fs
ns
ns
ns
Fs
HD:STA
t
90% of SCL to 10% of SDA
SU:STO
t
LOW
Clock High Period
t
HIGH
START Condition Setup Time
Data Setup Time
t
90% of SCL to 90% of SDA
10% of SDA to 10% of SCL
(Note 8)
SU:STA
SU:DAT
t
Data Out Hold Time
t
DH
HD:DAT
Data In Hold Time
t
10% of SCL to 10% of SDA (Note 8)
0.9
Maximum Receive SCL/SDA Rise
Time
t
t
(Note 9)
(Note 9)
(Note 9)
(Note 9)
(Note 9)
300
ns
ns
ns
ns
ns
R
R
Minimum Receive SCL/SDA Rise
Time
20 +
0.1C
B
Maximum Receive SCL/SDA Fall
Time
t
t
t
300
F
F
F
Minimum Receive SCL/SDA Fall
Time
20 +
0.1C
B
20 +
Transmit SDA Fall Time
250
0.1C
B
Maxim Integrated
3
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
2
I ° A° ELE°TRI°AL °HARA°TERISTI°S (continued)
N
N
(V
= 2.5V to 3.7V, T = -55 C to +150NC, unless otherwise noted. Typical values are V
= 3.3V, T = +25 C.) (Notes 3, 6) (Figure 1)
DD
A
DD A
PARAMETER
SYMBOL
°ONDITIONS
MIN
TYP
MAX
UNITS
Pulse Width of Suppressed Spike
t
(Note 10)
(Note 7)
0
50
ns
SP
SDA Time Low for Reset of Serial
Interface
t
45
50
55
ms
TIMEOUT
Note 3: Limits are 100% production tested at T = +25NC and/or T = +85NC. Limits over the operating temperature range and
A
A
relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
Note ꢂ: All voltages are referenced to ground. Currents entering the IC are specified positive.
Note .: These limits represent a 3-sigma distribution.
Note 6: All timing specifications are guaranteed by design.
Note 7: Holding the SDA line low for a time greater than t
causes the devices to reset SDA to the idle state of the serial
TIMEOUT
bus communication (SDA released).
Note 8: A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s fall-
ing edge.
Note 9:
C = total capacitance of one bus line in pF. Tested with C = 400pF.
B
B
Note +±: Input filters on SDA and SCL suppress noise spikes less than 50ns.
SDA
t
BUF
t
F
t
SP
t
HD:STA
t
LOW
SCL
t
HIGH
t
SU:STA
t
t
R
HD:STA
t
SU:STO
t
t
SU:DAT
HD:DAT
STOP
START
REPEATED
START
NOTE: TIMING IS REFERENCED TO V
AND V
.
IH(MIN)
IL(MAX)
2
Figure 1. I C Timing Diagram
Maxim Integrated
4
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
STATIC QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
STATIC QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE (SHUTDOWN MODE)
1500
1200
900
600
300
0
10
8
3.3V
DD
3.7V
6
DD
3.7V
4
DD
3.3V
DD
2
2.5V
DD
2.5V
DD
0
-70
-20
30
80
130
-70
-20
30
80
130
TEMPERATURE (°C)
TEMPERATURE (°C)
ACCURACY vs. TEMPERATURE
(V = 2.5V)
ACCURACY vs. TEMPERATURE
(V = 3.3V)
DD
DD
1.0
0.5
0
1.5
0.8
0
+3 SIGMA ERROR
+3 SIGMA ERROR
MEAN ERROR
-3 SIGMA ERROR
MEAN ERROR
-3 SIGMA ERROR
-0.5
-1.0
-0.8
-1.5
-55 -30
-5
20
45
70
95 120
-55 -30 -5 20 45 70 95 120 145 170
TEMPERATURE (°C)
TEMPERATURE (°C)
Maxim Integrated
5
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Pin Configuration
TOP VIEW
A2
V
DD
8
A0
7
A1 (RESET)
6
5
MAX31725
MAX31726
EP
4
+
1
2
3
SDA SCL
OS GND
TDFN
(3mm x 3mm)
( ) MAX31726 ONLY.
Pin Description
PIN
NAME
SDA
FUN°TION
MAX3+72. MAX3+726
Serial-Data Input/Output Line. Open drain. Connect SDA to a pullup resistor. High impedance
for supply voltages from 0 to 3.7V.
1
2
1
2
Serial-Data Clock Input. Open drain. Connect SCL to a pullup resistor. High impedance for
supply voltages from 0 to 3.7V.
SCL
3
4
3
4
OS
Overtemperature Shutdown Output. Open drain. Connect OS to a pullup resistor.
Ground
GND
2
2
I C Slave Address Input. Connect A2 to GND or V
to set the desired I C bus address. Do
DD
5
—
5
A2
not leave unconnected (Table 1).
Active-Low Reset Input. Pull RESET low for longer than the minimum reset pulse width to
reset the I C bus and all internal registers to their POR values.
—
RESET
2
2
2
I C Slave Address Input. Connect A1 to GND, V , SDA, or SCL to set the desired I C bus
DD
6
7
6
7
A1
A0
address. Do not leave unconnected (Table 1). High impedance for supply voltages from 0 to
3.7V.
2
2
I C Slave Address Input. Connect A0 to GND, V , SDA, or SCL to set the desired I C bus
DD
address. Do not leave unconnected (Table 1). High impedance for supply voltages from 0 to
3.7V.
8
8
V
Positive Supply Voltage Input. Bypass to GND with a 0.1mF bypass capacitor.
DD
—
—
EP
Exposed Pad (Bottom Side of Package). Connect EP to GND.
Maxim Integrated
6
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Block Diagram
DIGITAL LOGIC BLOCK
MAX31725
MAX31726
OS
ACTIVATE
T
REGISTER
OS
OS
TEMP REGISTER
REGISTER
DIGITAL
COMPARATOR
THERMOSTAT
LOGIC
N
T
HYST
2
I C BLOCK
FAULT
QUEUE
BITS
COMPARE/
INTERRUPT
BIT
OS
POLARITY
BIT
DATA POINTER
MSB
0
LSB
D1 D0
0
0
0
0
0
DATA REGISTER BLOCK
MS BYTE
LS BYTE
D1 D0
MSB
LSB MSB
LSB
0
0
6
5
4
3
2
1
0
-1 -2 -3 -4 -5 -6 -7 -8
TEMP
S
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
SDA
SCL
SERIAL LOGIC
MSB
ONE
LSB
3
FAULT FAULT
QUEUE QUEUE
[1]
DATA
FORMAT
OS
POLARITY
COMPARATOR/
INTERRUPT
0
1
CONFIG
TIMEOUT
SHUTDOWN
SHOT
[2]
2
MS BYTE
LS BYTE
MSB
S
LSB MSB
LSB
A0
A1
6
5
4
3
2
1
0
-1 -2 -3 -4 -5 -6 -7 -8
1
1
0
1
T
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
HYST
ADDRESS
DECODER
6
5
4
3
2
1
0
-1 -2 -3 -4 -5 -6 -7 -8
T
OS
S
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
A2
(RESET)
TEMPERATURE CORE BLOCK
POR
BLOCK
ONE-SHOT BIT
SHUTDOWN BIT
DIGITAL CONTROL
V
DD
VOLTAGE
REFERENCE
V
DD
16-BIT
Σ∆ ADC
TEMPERATURE
SENSOR
GND
( ) MAX31726 ONLY.
Maxim Integrated
7
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
OS Output, T
In comparator mode, the OS output behaves like a
thermostat (Figure 2). The output asserts when the
and T
Limits
OS
HYST
Detailed Description
The MAX31725/MAX31726 temperature sensors measure
temperature and convert the data into digital form. An
temperature rises above the limit set in the T
register.
OS
2
I C-compatible two-wire serial interface allows access
The output deasserts when the temperature falls below
the limit set in the T register. In comparator mode,
2
to conversion results. The devices accept standard I C
HYST
commandstoreadthedata,settheovertemperaturealarm
(OS) trip thresholds, and configure other characteristics.
While reading the temperature register, any changes in
temperature are ignored until the read is completed. The
temperature register is updated for the new temperature
measurement upon completion of the read operation.
the OS output can be used to turn on a cooling fan,
initiate an emergency shutdown signal, or reduce system
clock speed.
In interrupt mode, exceeding T
also asserts OS. OS
OS
remains asserted until a read operation is performed
on any of the registers. Once OS has asserted due to
T
OS
TEMPERATURE
T
HYST
INACTIVE
OS OUTPUT
(COMPARATOR MODE)
OS SET ACTIVE LOW
ACTIVE
INACTIVE
OS OUTPUT
(INTERRUPT MODE)
OS SET ACTIVE LOW
ACTIVE
READ
READ
READ
OPERATION
OPERATION
OPERATION
Figure 2. OS Output Temperature Response Diagram
Maxim Integrated
8
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
crossing above T and is then reset, it is asserted again
OS
Table +a0 MAX3+72. Slave Address Selection
only when the temperature drops below T
. The
HYST
SLAVE
output then remains asserted until it is reset by a read.
It is then asserted again if the temperature rises above
A2
A+
A±
ADDRESS
BYTE
°ONNE°TION °ONNE°TION °ONNE°TION
T
, and so on. Putting the MAX31725 or MAX31726 into
OS
(hex)
shutdown mode also resets OS.
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
90h
92h
82h
80h
94h
96h
86h
84h
B4h
B6h
A6h
A4h
B0h
B2h
A2h
A0h
98h
9Ah
8Ah
88h
9Ch
9Eh
8Eh
8Ch
BCh
BEh
AEh
ACh
B8h
BAh
AAh
A8h
2
I C-Compatible Bus Interface
2
V
A standard I C-compatible 2-wire serial interface reads
DD
temperature data from the temperature registers and
reads and writes control bits and alarm threshold data to
and from the alarm and configuration registers.
SCL
SDA
GND
V
V
V
V
DD
DD
DD
DD
2
Each device responds to its own I C slave address, which
V
DD
is selected using the A0, A1, and A2 pins for the MAX31725
or the A0 and A1 pins for the MAX31726. A0 and A1 can
be connected to the supply voltage, ground, SDA, or
SCL. A2 can be connected to supply voltage or ground to
provide up to 32 unique addresses for the MAX31725 and
up to 16 unique addresses for the MAX31726.
SCL
SDA
GND
SCL
SCL
SCL
SCL
SDA
SDA
SDA
SDA
GND
GND
GND
GND
V
DD
SCL
SDA
GND
Table 1a and Table 1b show how the A0, A1, and A2
connections determine the slave address.
V
Table +b0 MAX3+726 Slave Address Selection
DD
SCL
SDA
GND
SLAVE
ADDRESS BYTE
(hex)
A+
A±
°ONNE°TION
°ONNE°TION
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
V
GND
GND
GND
GND
GND
98h
9Ah
8Ah
88h
9Ch
9Eh
8Eh
8Ch
BCh
BEh
AEh
ACh
B8h
BAh
AAh
A8h
DD
SCL
SDA
GND
V
DD
SCL
SDA
GND
V
V
V
V
DD
DD
DD
DD
V
DD
V
V
V
V
DD
DD
DD
DD
SCL
SDA
GND
V
DD
SCL
SDA
GND
SCL
SCL
SCL
SCL
SDA
SDA
SDA
SDA
V
SCL
SCL
SCL
SCL
SDA
SDA
SDA
SDA
DD
SCL
SDA
GND
V
DD
SCL
SDA
GND
V
DD
SCL
SDA
V
DD
SCL
SDA
Maxim Integrated
9
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
2
be written for each I C transaction. All registers are read
and write, except for the read-only temperature register.
Internal Registers
The device contains four registers, each of which consists
of 2 bytes. The configuration register contains only 1
byte of actual data and, when read as a 2-byte register,
repeats the same data for the second byte. During a
2-byte write to the configuration register the second
byte written takes precedence. The device’s pointer
register selects between the four data registers shown
in Table 2. During reads and writes the pointer register
auto increments after every 2 data bytes, but does not
wrap from address 03h-00h. The pointer register must
Write to the configuration register by writing the slave
address byte, the pointer register byte to value 01h, and
a data byte. The T
and T
registers require the
OS
HYST
slave address byte, pointer register byte, and 2 data
bytes. If only 1 data byte is written, it is saved in bits
D[15:8] of the respective register. If more than 2 data
bytes are written, the pointer register auto increments
and if pointing to a valid address, additional data writes
to the next address. See Figure 3.
Table 20 Register Functions and POR State
POR STATE
BINARY
REGISTER
NAME
ADDRESS
(Hex)
POR STATE
(5°)
READ/
WRITE
Hex
Temperature
00
0000h
0000 0000 0000 0000
0
Read-only
Configuration
MAX31725
01
00h
40h
0000 0000
—
R/W
Configuration
MAX31726
01
0100 0000
—
R/W
T
02
03
4B00h
5000h
0100 1011 0000 0000
0101 0000 0000 0000
75
80
R/W
R/W
HYST
T
OS
1
9
1
0
9
1
9
STOP
1
0
D5* D4* D3* D2* D1* R/W
0
0
0
0
0
D1 D0
D7 D6 D5 D4 D3 D2 D1
D0
COND BY
MASTER
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
START
BY
MASTER
ADDRESS
BYTE
POINTER
BYTE
CONFIGURATION
BYTE
(a) CONFIGURATION REGISTER WRITE.
1
1
9
1
0
9
1
9
1
9
STOP
COND BY
MASTER
0
D5* D4* D3* D2* D1* R/W
ADDRESS
0
0
0
0
0
D1 D0
D7 D6 D5 D4 D3 D2 D1
D0
D7 D6 D5 D4 D3 D2 D1
D0
START
BY
MASTER
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
POINTER
BYTE
MOST SIGNIFICANT
DATA BYTE
LEAST SIGNIFICANT
DATA BYTE
BYTE
(b) T AND T
OS
WRITE.
HYST
*SEE TABLE 1A.
2
Figure 3. I C-Compatible Timing Diagram (Write)
Maxim Integrated
10
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Perform a read operation by issuing the slave address
Bits D[15:0] contains the temperature data, with the LSB
representing 0.00390625NC and the MSB representing
the sign bit; see Table 3. The MSB is transmitted first.
byte (write), pointer byte, repeat START, another slave
address byte (read), and then reading the data byte.
After 2 data bytes the pointer register auto increments
and, if pointing to a valid address, additional data can be
read. See Figure 4.
In addition to the normal two’s complement temperature
data format, the MAX31725 and MAX31726 offer an
optional extended data format that allows temperatures
equal to or greater than +128NC to be read. In the
extended format, selected by bit 5 of the configuration
register, the measured temperature is the value in the
temperature register plus 64NC, as shown in Table 4.
Temperature Registers
Temperature data is stored in the temperature, T
set
OS
point, and T
set point registers. The temperature
HYST
data format is 16 bits, two’s complement, and the register
is read out in 2 bytes: an upper byte and a lower byte.
1
1
9
1
0
9
1
1
9
1
9
STOP
COND BY
MASTER
0
D5* D4* D3* D2* D1* R/W
0
0
0
0
0
D1 D0
0
D5* D4* D3* D2* D1* R/W
D7 D6 D5 D4 D3 D2 D1 D0
START
BY
MASTER
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
ACK BY
MAX31725/
MAX31726
NO
ACK BY
MASTER
ADDRESS
BYTE
POINTER
BYTE
REPEAT
START
BY
ADDRESS
BYTE
DATA
BYTE
MASTER
(a) TYPICAL POINTER SET FOLLOWED BY IMMEDIATE READ FROM CONFIGURATION REGISTER.
1
1
9
1
0
9
0
D5* D4* D3* D2* D1* R/W
ADDRESS BYTE
0
0
0
0
0
D1 D0
ACK BY
MAX31725/
MAX31726
START
BY
MASTER
ACK BY
MAX31725/
MAX31726
POINTER BYTE
1
1
9
1
9
1
9
STOP
COND BY
MASTER
0
D5* D4* D3* D2* D1* R/W
ADDRESS
D7 D6 D5 D4
D3 D2 D1
D0
D7 D6 D5 D4
D3 D2
D1 D0
REPEAT
START
BY
NO
ACK BY
MASTER
ACK BY
MAX31725/
MAX31726
ACK BY
MASTER
MOST SIGNIFICANT
DATA BYTE
LEAST SIGNIFICANT
DATA BYTE
MASTER
BYTE
(b) TYPICAL POINTER SET FOLLOWED BY IMMEDIATE READ FOR 2-BYTE REGISTER SUCH AS TEMPERATURE, T , AND T
OS
.
HYST
*SEE TABLE 1A.
2
Figure 4. I C-Compatible Timing Diagram (Read)
Table 30 Teꢁperature, T
, and T
Register Deꢀinition
HYST
OS
UPPER BYTE
LOWER BYTE
D3
D+.
D+ꢂ
D+3
D+2
D++ D+±
D9
D8
D7
D6
D.
Dꢂ
D2
D+
D±
MSB
32NC 16NC 8NC
4NC
2NC 1NC 0.5NC 0.25NC 0.125NC 0.0625NC 0.03125NC 0.015625NC 0.0078125NC 0.00390625NC
N
64 C
S
6
5
4
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Maxim Integrated
11
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Table ꢂ0 Teꢁperature Data Output Forꢁat
NORMAL FORMAT
EXTENDED FORMAT
BINARY
TEMPERATURE (5°)
BINARY
Hex
Hex
+150
+128
+127
+125
+64
+25
+0.5
0
0111 1111 1111 1111
0111 1111 1111 1111
0111 1111 0000 0000
0111 1101 0000 0000
0100 0000 0000 0000
0001 1001 0000 0000
0000 0000 1000 0000
0000 0000 0000 0000
1111 1111 1000 0000
1110 0111 0000 0000
1100 1001 0000 0000
7FFFh
7FFFh
7F00h
7D00h
4000h
1900h
0080h
0000h
FF80h
E700h
C900h
0101 0110 0000 0000
5600h
4000h
3F00h
3D00h
0000h
D900h
C080h
C000h
BF80h
A700h
8900h
0100 0000 0000 0000
0011 1111 0000 0000
0011 1101 0000 0000
0000 0000 0000 0000
1101 1001 0000 0000
1100 0000 1000 0000
1100 0000 0000 0000
1011 1111 1000 0000
1010 0111 0000 0000
1000 1001 0000 0000
-0.5
-25
-55
Table .0 °onꢀiguration Register Deꢀinition
D7
D6
D.
Dꢂ
D3
D2
D+
D±
DATA
FORMAT
FAULT
QUEUE [1]
FAULT
QUEUE [0]
OS
POLARITY
COMPARATOR/
INTERRUPT
ONE-SHOT
SHUTDOWN
TIMEOUT
Set bit D1 to 1 to operate OS in interrupt mode. In
interrupt mode, exceeding T also asserts OS. OS
remains asserted until a read operation is performed
on any of the registers. Once OS has asserted due to
Configuration Register
The configuration register contains 8 bits of data and
initiates single conversions (ONE-SHOT), enables bus
timeout, controls shutdown, sets the fault queue, sets the
data format, selects OS polarity, and determines whether
the OS output functions in comparator or interrupt mode.
See Table 5.
OS
crossing above T and is then reset, it is asserted again
OS
only when the temperature drops below T
. The
HYST
output then remains asserted until it is reset by a read.
It is then asserted again if the temperature rises above
Shutdown
Set bit D0 to 1 to place the device in shutdown mode
and reduce supply current to 3.5FA or less. If bit D0 is
set to 1 when a temperature conversion is taking place,
the device completes the conversion and then shuts
down. In interrupt mode, entering shutdown resets the
T
, and so on. Putting the MAX31725 into shutdown
OS
mode also resets OS. Note that if the mode is changed
while OS is active, an OS reset may be required before it
begins to behave normally.
OS Polarity
Set bit D2, the OS POLARITY bit, to 0 to force the OS
output polarity to active low. Set bit D2 to 1 to set the OS
output polarity to active high. OS is an open-drain output
under all conditions and requires a pullup resistor to
output a high voltage. See Figure 2.
2
OS output. While in shutdown, the I C interface remains
active and all registers remain accessible to the master.
Setting D0 to 0 takes the device out of shutdown and
starts a new conversion. The results of this conversion
are available to read after the max conversion time.
Fault Queue
Bits D4 and D3, the fault queue bits, determine the
number of faults necessary to trigger an OS condition.
See Table 6. The number of faults set in the queue must
occur consecutively to trip the OS output. The fault queue
prevents OS false tripping in noisy environments.
COMPARATOR/INTERRUPT Mode
Set bit D1, the COMPARATOR/INTERRUPT bit to 0 to
operate OS in comparator mode. In comparator mode,
OS is asserted when the temperature rises above the
T
value. OS is deasserted when the temperature drops
OS
below the T
value. See Figure 2.
HYST
Maxim Integrated
12
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
• Normal data format
Table 60 °onꢀiguration Register Fault
• Timeout enabled for MAX31725; timeout disabled for
MAX31726
Queue Bits
FAULT QUEUE [+] FAULT QUEUE [±]
NUMBER OF
FAULTS
RESET Input (MAX31726 Only)
BIT Dꢂ
BIT D3
The RESET input on the MAX31726 provides a way to
0
0
1
1
0
1
0
1
1 (POR state)
2
reset the I C bus and all the internal registers to their
2
4
6
initial POR values. To reset, apply a low pulse width
a duration of at least the minimum reset pulse width
(t ) to the RESET input.
RESET
Applications Information
Data Format
Bit D5 selects the temperature data format for the
temperature, T , and T registers. When D5 is 0
(normal format), the data format is two’s complement with
The MAX31725 and MAX31726 measure the temperature
of their own die. The thermal path between the die and
the outside world determines the accuracy of temperature
measurements. External temperature is conducted to the
die primarily through the leads and the exposed pad.
Because of this, the device most easily measures the PCB
temperature. For ambient temperature measurements,
mount the device on a PCB (or a section of the PCB) that
is at ambient temperature. Temperature errors due to
self-heating of the device die are minimal due to the low
supply current.
OS
HYST
a range of -128NC to +127.99609375NC.
Set D5 to 1 for extended temperature format. In extended
format, the measured temperature equals the two’s
complementvalueplus64NC, therebyextendingtheupper
temperature data range to 191.99609375NC and allowing
temperatures as high as 150NC to be measured. See
Table 4. Once set, the data format does not update until
the completion of the following temperature conversion.
After setting D5 to 1, new extended temperature data
is guaranteed ready after a time equal to twice the max
conversion time.
Digital Noise Issues
Both devices feature an integrated lowpass filter on the
SCL and SDA digital lines to mitigate the effects of bus
noise. Although this filtering makes communication robust
in noisy environments, good layout practices are always
recommended. Minimize noise coupling by keeping
digital traces away from switching power supplies.
Ensure that digital lines containing high-speed data cross
at right angles to the SDA and SCL lines. Excessive noise
coupling into the SDA and SCL lines on the device—
TIMEOUT Enable
Set D6 to 1 to disable bus timeout.
2
Set D6 to 0 to reset the I C-compatible interface when
SDA is low for more than 50ms (nominal).
One-Shot
The ONE-SHOT function helps to reduce average supply
current when continuous conversions are not necessary.
Setting D7 to 1 while the device is in shutdown mode
immediately begins a new temperature conversion. After
the conversion has completed, the device returns to
shutdown mode. D7 returns to 0 when the conversion
completes. Writing 1 to D7 has no effect when the device
is not in shutdown.
specifically noise with amplitude greater than 400mV
(typical hysteresis), overshoot greater than 300mV above
P-P
+V , and undershoot more than 300mV below GND—
DD
can prevent successful serial communication. Serial bus
not-acknowledge is the most common symptom, causing
unnecessary traffic on the bus. Care must be taken to
ensure proper termination within a system with long PCB
traces or multiple slaves on the bus. Resistance can be
added in series with the SDA and SCL lines to further
help filter noise and ringing. If it proves to be necessary,
a 5kI resistor should be placed in series with the SCL
line, placed as close as possible to the SCL pin. This 5kI
resistor, with the 5pF to 10pF stray capacitance of the
device provide a 6MHz to 12MHz lowpass filter, which is
sufficient filtering in most cases.
Power-On Reset Value
The configuration register always powers up to a known
state, as indicated in Table 2. These default POR values
correspond to the following modes of operation:
• Comparator mode
• OS active low
• 1 fault, fault queue
Maxim Integrated
13
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Ordering Information
PART
TEMP RANGE
-55NC to +150NC
-55NC to +150NC
RESET
No
TIMEOUT ENABLED AT POR
PIN-PA°KAGE
8 TDFN-EP*
MAX3+72.MTA+
MAX3+726MTA+
Yes
No
Yes
8 TDFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Package Information
For the latest package outline information and land patterns (footprints), go to www0ꢁaxiꢁintegrated0coꢁ/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PA°KAGE TYPE
PA°KAGE °ODE
OUTLINE NO0
2+-±+37
LAND PATTERN NO0
9±-±±.9
8 TDFN-EP
T833+2
Maxim Integrated
14
MAX31725/MAX31726
±±05ꢀ°C LocaCꢁTemTꢂcꢃtꢂTCꢄTꢅnLꢂn
Revision History
REVISION REVISION
PAGES
DES°RIPTION
°HANGED
NUMBER
DATE
0
1
2
9/12
Initial release
—
3/13
Added the MAX31726
All
1
12/14
Updated Benefits and Features section
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
15
©
2014 Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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