MAX20330AEWA+T [MAXIM]
Precision HV Capable ID Detector;
| 型号： | MAX20330AEWA+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Precision HV Capable ID Detector |
| 文件： | 总21页 (文件大小：699K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX20330A
Precision HV Capable ID Detector
General Description
Benefits and Features
● Protects Battery Connected Modules with Minimum
The MAX20330A is an ID detection IC that detects the ID
resistor values when it is enabled. The device automatically
adjusts the detection current to check the wide range of
the ID resistor values while keeping the average supply
current low.
Power Consumption
• Ultra-Low Shutdown Current: 2.8µA (Typ)
• Ultra-Low ID Detection Current: 2µA (Typ)
● Flexible ID Detection and Support
• Automatic and Manual ID Value Detection
• Factory Mode Detection
The MAX20330A supports the factory mode for direct
system or battery current measurement. The device
protects the internal supply from the overvoltage on ID
pin up to 40V.
• Automatic Device Detection and Interrupt
● ID Overvoltage Protection
• Blocking High-Voltage Input
The device is available in an 8-bump (0.35mm pitch,
1.77mm x 1.03mm) wafer-level package (WLP) and
operates over the -40°C to +85°C extended temperature
range.
● Provides Premium Security in System Reliability
• High Input Voltage Tolerant
• Thermal Shutdown Protection
● Space Saving
Applications
● Smart Phones
● Tablet PCs
● E-Readers
• 8-Bump, 0.35mm Pitch, 1.77mm x 1.03mm WLP
Ordering Information appears at end of data sheet.
19-100293; Rev 1; 6/18
MAX20330A
Precision HV Capable ID Detector
Absolute Maximum Ratings
(All voltages referenced to GND.)
ID, EN, PCON to GND..........................................-0.3V to +40V
Operating Temperature Range........................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Soldering Temperature (reflow).......................................+260°C
SDA, SCL, INT, V
to GND..................................-0.3V to +6V
Continuous Current into all pins.........................................±0.1A
CC
Continuous Power Dissipation (T = +70°C)
A
WLP (derate 10.9mW/°C above +70°C)......................872mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
WLP
Junction-to-Ambient Thermal Resistance (θ ) .....91.72°C/W
JA
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= 2.6V to 5.5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= 3.3V, T = +25°C) (Note 2)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
V
V
V
Voltage Range
Supply Current
Shutdown Current
V
2.6
3.3
130
2.8
5.5
200
5
V
CC
CC
V
= 4.2V, I
= 0mA , manual
CC
SRC
I
µA
µA
CC
CC
detection mode, ENb = 0
V = 4.2V, ENb = 1
CC
I
CC
CC_SHDN
ID Current Source
Current Source Accuracy
-5
+5
2
%
V
Current Source Open
Voltage
ISRC = 2µA
2
6
18
54
162
2.5
µA
Current Source
I
ID
mA
µA
162µA max current ,
IS_PERIOD ≥ 130x, ISRC_MAN = 0
Average Current Source
I
2
ID_AVG
PCON
Open-Drain Voltage
Output Low Voltage
Leakage Current
36
0.2
1
V
V
V
I
= 10mA
0.1
OL
SINK
I
Open-drain, PCON < ID + 7V
µA
LEAK
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MAX20330A
Precision HV Capable ID Detector
Electrical Characteristics (continued)
(V
= 2.6V to 5.5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= 3.3V, T = +25°C) (Note 2)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ADC
Resolution
8
Bit
mV
%
Voltage Step
Full-Scale Error
Noise Filtering
Full Scale
5.9
-2
+2
100
1.5
µs
V
DIGITAL SIGNALS (SDA, SCL, INT)
Output Low Voltage
Leakage Current
Input Logic-High
V
V
V
= 3.3V, I = 3mA
SINK
0.4
1
V
µA
V
OL
IO
= 2.6V, open-drain
IO
V
1.4
-1
IH
Input Logic-Low
V
0.4
+1
V
IL
Input Leakage Current
DIGITAL SIGNAL (EN)
EN Logic-Low
V
= 0V, V = 2.6V
µA
IN
IN
With respect to V
55
20
%V
CC
CC
EN Hysteresis
%V
CC
Input Leakage Current
I
V
= 0V, V = 2.6V
-1
+1
µA
IN
IN
IN
TIMING CHARACTERISTICS (Note 3)
ID Current Source On Time
t
Programmable
Programmable
100
ms
ms
ms
%
IS_TDET
ID Current Source Off
Period Time
t
ID off to ID turn on
IS_PERIOD
EN Debounce Time
Programmable Time
Accuracy
-10
+10
2
I C Maximum Clock
400
kHz
Frequency
THERMAL PROTECTION
Thermal Shutdown
125
20
°C
°C
Thermal Shutdown
Hysteresis
Note 2: All devices are 100% production tested at T = +25°C. Specifications over the operating temperature range are guaranteed
A
by design.
Note 3: All timing characteristics are measured using 20% and 80% level unless otherwise specified.
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MAX20330A
Precision HV Capable ID Detector
Typical Operating Characteristics
(V
= 4.2V, T = +25°C, unless otherwise noted.)
CC
A
VCC SUPPLY CURRENT
vs. SUPPLY VOLTAGE
VCC AVERAGE SUPPLY CURRENT
vs. TEMPERATURE
VCC AVERAGE SUPPLY CURRENT
vs. TEMPERATURE
toc03
toc01
toc02
180
160
150
145
140
135
130
125
120
115
110
105
100
150
145
140
135
130
125
120
115
110
105
100
140
120
100
80
TA = +85ºC
TA = +25ºC
60
40
TA = -40ºC
ID = 30Ω
I2C DEFAULT SETTING
20
ID = 30Ω
IS_PERIOD = 00 (4x)
EN_IS = 0
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (ºC)
TEMPERATURE (ºC)
ID DETECTION WAVEFORM
OF FACTORY MODE
VCC AVERAGE SUPPLY CURRENT
VCC SHUTDOWN CURRENT
vs. TEMPERATURE
vs. TEMPERATURE
toc06
toc04
toc05
150
145
140
135
130
125
120
115
110
105
100
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VID
2V/div
2V/div
VBAT
ID = 700kΩ
I2C DEFAULT SETTING
EN HIGH
60
-40
-15
10
35
60
85
-40
-15
10
35
85
1s/div
TEMPERATURE (ºC)
TEMPERATURE (ºC)
ID DETECTION WAVEFORM
ID DETECTION WAVEFORM
ID DETECTION WAVEFORM
toc07
toc08
toc09
VID
VID
VID
10mV/div
200mV/div
500mV/div
VBUS ID = 700kΩ
VBUS ID = 100kΩ
VBUS ID = 10Ω
4ms/div
4ms/div
4ms/div
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MAX20330A
Precision HV Capable ID Detector
Bump Configuration
TOP VIEW
(BUMPS ON BOTTOM)
1
2
3
4
MAX20330A
A
B
SDA
SCL
PCON
GND
EN
ID
INT
V
CC
Bump Description
BUMP
NAME
FUNCTION
External P-FET Control. Open-drain, high-voltage to drive an external, back-to-back open-drain
in factory mode.
A1
PCON
A2
A3
A4
B1
EN
GND
SDA
ID
Active-Low Enable ID Detection
Ground
2
I C Data Line. Connect SDA to an external pullup resistor.
ID of USB Connector. For proper ESD and surge protection, place the external TVS on ID.
2
Supply for the I C Digital Block. Bypass V
device as possible.
to ground with a 0.1µF capacitor as close to the
CC
B2
V
CC
B3
B4
INT
Interrupt Output.
2
SCL
I C Clock Line. Connect SCL to an external pullup resistor.
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MAX20330A
Precision HV Capable ID Detector
Functional Diagram
PCON
MAX20330A
ID
OVLO
ZCD
EN
POR
BG
V
CC
I
DAC
SOURCE
ADC
SCL
SDA
INT
LOGIC CONTROL
2
I C
TIMER
GND
Table 1. Register Map
ADDRESS
0x00
NAME
CHIP ID
TYPE
Read Only
RW
DEFAULT
0x80
0x6A
0x00
0x00
0xFF
0x03
0x13
0x0C
0x00
0x6E
0x00
0x02
0xAF
0x82
DESCRIPTION
Device ID Register
0x01
CONTROL 1
STATUS
System Control 1
0x02
Read Only
Status Register
0x03
INTERRUPT
MASK
Clear on Read
Interrupt Register
0x04
RW
RW
Mask Register
0x06
I_SRC
Current Source Threshold
Current Source On Timer
System Control 2
0x07
I_SRC_TMR
CONTROL 2
PCON CTRL
ACCDET_REF
ISRC_ADC
FM_I_SET
FM_HI_LIM
FM_LO_LIM
RW
0x08
RW
0x09
RW
PCON Control
0x0A
0x0B
0x0D
0x0E
0x0F
RW
Accessory Detection Threshold
Current Source Output
Factory Mode
Read Only
RW
RW
Factory Mode High Limit
Factory Mode Low Limit
RW
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map
CHIP ID 0x00 (Read Only)
BIT
7
6
0
5
0
4
0
3
0
2
1
0
0
0
BIT NAME
Reset Value
Description
CHIP_ID
CHIP_REV
1
0
Chip ID and Revision
CONTROL 1 0x01 (Read/Write)
BIT
7
6
EN_IS
1
5
CZC
1
4
RFU
0
3
RFU
1
2
RFU
0
1
FM_ENb
1
0
ENb
0
BIT NAME
Reset Value
RFU
RFU
0
Reserved for future use
Current Source (I_SRC) Enable
0 = I_SRC disabled
1 = I_SRC enabled (default)
EN_IS
CZC
Control of Zero-Crossing Detection
0 = CZC disabled
1 = CZC enabled (default)
Factory Mode Active-Low Enable
0 = FM is enabled
1 = FM is disabled (default)
FM_ENb
ENb
Device Active-Low Enable
0 = device is in active mode (default)
1 = device is in sleep mode
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
STATUS 0x02 (Read Only)
BIT
7
VIN_OK
0
6
ZCS
0
5
EOC
0
4
3
2
1
ID_OVLO
0
0
THERM_
SHDN
OVLO_
ENb
BIT NAME
Reset Value
TP_OUT ACC_DET
0
0
0
0
VIN (ID) is above 2.7V (typ) in factory mode
0 = ID is below 2.7V
VIN_OK
1 = ID is above 2.7V
Zero-Crossing Flag (only valid when CZC = 1)
0 = no ZC
ZCS
1 = ZC in last IS_TDET
End of ADC Conversion
EOC
0 = no conversion since last read
1 = new ADC data since last read
Timer Period Out
TP_OUT
ACC_DET
THERM_SHDN
ID_OVLO
OVLO_ENb
0 = timer period not expired
1 = timer period expired
Accessory Detection Status
0 = no change
1 = accessory detected
Thermal Shutdown
0 = no thermal shutdown
1 = thermal shutdown
ID Overvoltage
0 = ID not overvoltage
1 = ID overvoltage (2V typ)
EN Pin Status
0 = EN pin disabled (high)
1 = EN pin enabled (low)
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
INTERRUPT 0x03 (Clear on Read)
BIT
7
VIN_OKi
0
6
ZCSi
0
5
EOCi
0
4
TP_OUTi
0
3
2
1
ID_OVLOi
0
0
ACC_
DETi
THERM_
SHDNi
OVLO_
ENbi
BIT NAME
Reset Value
0
0
0
VIN (ID) is above 2.7V interrupt
0 = interrupt not occurred
1 = interrupt occurred
VIN_OKi
ZCS Flag interrupt
ZCSi
0 = interrupt not occurred
1 = interrupt occurred
ADC EOC interrupt
EOCi
0 = interrupt not occurred
1 = interrupt occurred
Timer Period OUT interrupt
0 = interrupt not occurred
1 = interrupt occurred
TP_OUTi
ACC_DETi
THERM_SHDNi
ID_OVLOi
OVLO_ENbi
Accessory Detection interrupt
0 = interrupt not occurred
1 = interrupt occurred
Thermal Shutdown interrupt
0 = interrupt not occurred
1 = interrupt occurred
ID OVLO interrupt
0 = interrupt not occurred
1 = interrupt occurred
EN pin interrupt
0 = interrupt not occurred
1 = interrupt occurred
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
MASK 0x04 (Read/Write)
BIT
7
VIN_OKm
1
6
ZCSm
1
5
EOCm
1
4
3
2
1
0
TP_
OUTm
ACC_
DETm
THERM_
SHDNm
ID_
OVLOm
OVLO_
ENbm
BIT NAME
Reset Value
1
1
1
1
1
VIN (ID) is above 2.7V interrupt
0 = not masked
VIN_OKm
1 = masked
ZCS interrupt
0 = not masked
1 = masked
ZCSm
ADC EOC interrupt
0 = not masked
1 = masked
EOCm
Timer Period OUT interrupt
0 = not masked
1 = masked
TP_OUTm
ACC_DETm
THERM_SHDNm
ID_OVLOm
OVLO_ENbm
Accessory Detection interrupt
0 = not masked
1 = masked
Thermal Shutdown interrupt
0 = not masked
1 = masked
ID OVLO interrupt
0 = not masked
1 = masked
EN pin interrupt
0 = not masked
1 = masked
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
I_SRC 0x06 (Read/Write)
BIT
7
RFU
0
6
5
4
0
3
RFU
0
2
0
1
0
1
BIT NAME
Reset Value
RFU
I_SRC_MON
0
I_SRC_SET
1
0
Reserved for future use.
Current source monitor
000 = off
001 = 2µA
010 = 6µA
011 = 18µA
100 = 54µA
I_SRC_MON
(Read Only)
101 = 162µA
110 = 2500µA
111 = reserved
Current source set
In auto mode, it is the maximum current source set. Above this value, the auto ID detection is skipped.
In manual mode, it is the fixed current source set.
000 = off
001 = 2µA
I_SRC_SET
010 = 6µA
011 = 18µA (default)
100 = 54µA
101 = 162µA
110 = 2500µA
111 = reserved
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
I_SRC_TMR 0x07 (Read/Write)
BIT
7
6
5
4
1
3
2
0
1
IS_TDET
1
0
1
IS_INIT_
SET
BIT NAME
RFU
IS_PERIOD
Reset Value
RFU
0
0
0
0
Reserved for future use.
Repeat period, off period
00 = 4x
IS_PERIOD
01 = 130x (default)
10 = 250x
11 = 1600x
Set the initial value different from IS_PERIOD and IS_TDET for the ID detection auto-mode
0 = use IS_PERIOD and IS_TDET for the initial check (2µA) (default)
IS_INIT_SET
1 = use IS_PERIOD = 00 and IS_TDET = 101 as the initial value. If the current source needs to
increase, then use the programmed IS_PERIOD and IS_TDET value for the current source larger
than 2µA.
Current source on time for detection
000 = 2500µs
001 = 3500µs
010 = 4000µs
IS_TDET
011 = 10000µs (default)
100 = 40000µs
101 = 100000µs
110 = 400000µs
111 = 1sec
CONTROL2 0x08 (Read/Write)
BIT
7
RFU
0
6
RFU
0
5
RFU
0
4
RFU
0
3
2
1
0
BIT NAME
Reset Value
AUT_ISRC_SCL
ISRC_MAN ISRC_ST
1
1
0
0
RFU
Reserved for future use.
Automatic scaling for impedance detection reference
00 = 10% of full ADC scale
AUT_ISRC_SCL
01 = 20% of full ADC scale
10 = 30% of full ADC scale
11 = 30% of full ADC scale (default)
Current source manual detection
0 = automatic scaling for detection when ENb = 0 (default)
1 = manual detection when ENb = 0, fixed based on I_SRC and ISRC_TMR register values (register
0x06 and 0x07)
ISRC_MAN
ISRC_ST
Current source manual start and ADC conversion. The bit is cleared after one impedance detection.
0 = disable (default)
1 = start one manual impedance detection
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
PCON CTRL 0x09 (Read/Write)
BIT
7
RFU
0
6
RFU
0
5
RFU
0
4
RFU
0
3
2
RFU
0
1
0
PCON_
RDY
PCON_
EN
PCON_
MAN
BIT NAME
Reset Value
RFU
0
0
0
Reserved for future use
PCON output is ready to be on as ADC value is within factory mode range. The PCON output will be
turned on if the next immediate ADC value is 0xFF with 150µA.
0 = PCON output is disabled
PCON_RDY
(Read Only)
1 = PCON output is ready
Open-drain output for the external P-FET control output enable in manual mode
0 = output is disabled (output is hi-Z) (default)
PCON_EN
1 = output is enabled (output is active low)
PCON output manual control
PCON_MAN
0 = PCON output is controlled by the automatic factory mode (default)
1 = PCON output is controlled by the PCON_EN bit
ACCDET_REF 0x0A (Read/Write)
BIT
7
6
1
5
1
4
3
2
1
1
1
0
0
BIT NAME
Reset Value
ACC_DET_TH
0
0
1
Accessory Detection Threshold
Accessory is detected (ACC_DET = 1) if ADC_1 (0x0B) final reading is lower than ACC_DET_TH
ACC_DET_TH
ISRC_ADC 0x0B (Read Only)
BIT
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
BIT NAME
Reset Value
ADC_1
ID ADC reading: 0V to 1.5V
Voltage step 5.9mV (typ)
ADC_1
FM_I_SET 0x0D (Read/Write)
BIT
7
0
6
0
5
RFU
0
4
0
3
0
2
0
1
FIS
1
0
0
BIT NAME
Reset Value
The current source set for the factory mode resistor value.
000 = off (no factory mode)
001 = 2µA
010 = 6µA (default)
011 = 18µA
FIS
100 = 54µA
101 = 162µA
110 = 2500µA
111 = off (no factory mode)
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MAX20330A
Precision HV Capable ID Detector
Table 2. Detailed Register Map (continued)
FM_HI_LIM 0x0E (Read/Write)
BIT
7
1
6
0
5
1
4
0
3
1
2
1
1
1
0
1
BIT NAME
Reset Value
FHL
The factory mode ADC value high limit value
1010 1111 = 1032.5mV (172kΩ)
FHL
FM_LO_LIM 0x0F (Read/Write)
BIT
7
1
6
0
5
0
4
0
3
0
2
0
1
1
0
0
BIT NAME
Reset Value
FLL
The factory mode ADC value low limit value
1000 0010 = 767mV (127.8kΩ)
FLL
IS_TDET
IS_TDET
IS_PERIOD
V
OVSO
ID
V
IDTH
ADC ADC ADC ADC
ID DETECT
ENABLE
CASE 1: LOW-IMPEDANCE RESISTOR UNPLUGGED DURING THE IS_PERIOD.
IS_TDET
IS_TDET
IS_TDET
IS_PERIOD
V
OVSO
ID
V
IDTH
ID DETECT
ENABLE
CASE 2: HIGH-IMPEDANCE RESISTOR UNPLUGGED DURING THE IS_PERIOD.
IS_TDET
IS_TDET
IS_PERIOD
V
OVSO
ID
V
IDTH
ADC ADC ADC ADC
ID DETECT
ENABLE
CASE 3: LOW-IMPEDANCE RESISTOR CONTINUOUSLY CONNECTED DURING THE IS_PERIOD.
Figure 1. Current Source On-Time Timing Diagram (IS_INIT_SET = 0)
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MAX20330A
Precision HV Capable ID Detector
mode is cancelled either the ID resistor changes prior to
the presence of the factory mode power supply presence
or removing of the factory bias voltage. Also set ENb bit
Detailed Description
The MAX20330Ais a universal ID detection IC that detects
the ID resistor values when it is enabled. The device
automatically adjusts the detection current to check the
wide range of the ID resistor values while keeping the
average supply current low. The device can be used in
many different applications such as accessory detection,
secure factory mode, connector wet detection, etc.
2
in I C register high cancels the factory mode.
3.5mm Moisture Detection Application
The MAX20330A can be used to determine the faulty
insertion of the jack due to a wrong impedance detection
of the connector by moisture intrusion. The ACC_DET
interrupt can be used to identify the valid accessory insertion
and disconnect detection of the accessory.
EN pin and ENb Bit
The MAX20330A is enabled by EN pin and ENb bit. ENb
bit is defaulted to 0. The ID check is enabled when EN
goes low after debounce time (100ms, typ).
The accessory detection threshold can be adjusted for
issuing the proper accessory detection interrupt based on
a valid jack impedance.
All the registers are reset to default values when the
device enters shutdown.
Thermal Shutdown
Thermal shutdown circuitry protects the devices from
overheating. When the junction temperature exceeds
+125°C (typ), the THERM_SHDN bit and interrupt are on.
2
EN (pin)
ENb (I C)
STATUS
Shutdown
Shutdown
Active
1
1
0
0
0
1
0
1
Application Information
2
Shutdown
I C Interface
2
When in I C mode, the MAX20330A operates as a slave
2
36VDC (40V Abs Max) Withstanding
device that sends and receives data through an I C-
The MAX20330A can withstand the DC voltage up to 40V
on ID pin. If 40V input is expected, it is recommended
to use the external TVS that clamps the surge to 40V or
below.
compatible 2-wire interface. The interface uses a serial
data line (SDA) and a serial clock line (SCL) to achieve
bidirectional communication between master(s) and
slave(s). A master (typically a microcontroller) initiates all
data transfers to and from the MAX20330A and generates
the SCL clock that synchronizes the data transfer. The
SDA line operates as both an input and an open-drain
output. A pullup resistor is required on SDA. The SCL line
operates only as an input. A pullup resistor is required on
SCL if there are multiple masters on the 2-wire interface,
or if the master in a single-master system has an open-
drain SCL output. Each transmission consists of a START
condition sent by a master, followed by the MAX20330A
7-bit slave address plus R/W bit, a register address byte,
one or more data bytes, and finally a STOP condition
(Figure 2).
Factory Mode
When the MAX20330A determines that the final ADC
value is within the range of the factory resistor value in the
2
preset I C registers, it enables the factory mode check.
2
The factory mode can be enabled or disabled by the I C
register bit FM_ENb.
The factory mode starts when the MAX20330A finds the
ADC resistor value is within the factory resistor value
range. Then the device must find out that the ID pin is
biased with the voltage higher than 2.7V (typ). The factory
ID resistor must be present for at least the total period
equals to the sum of 2xIS_TDET and IS_PERIOD. There
is no limit how long the resistor can be present until the ID
is biased by the factory mode power supply. The factory
Maxim Integrated
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MAX20330A
Precision HV Capable ID Detector
Start and Stop Conditions
Bit Transfer
Both SCL and SDA remain high when the interface is not
busy. A master signals the beginning of a transmission
with a START (S) condition by transitioning SDA from high
to low while SCL is high (Figure 3). When the master has
finished communicating with the slave, it issues a STOP
(P) condition by transitioning SDA from low to high while
SCL is high. The bus is then free for another transmission.
One data bit is transferred during each clock pulse
(Figure 4). The data on SDA must remain stable while
SCL is high. Changes in SDA while SCK is high and
stable are considered control signals (see Start and Stop
Conditions).
t
R
SDA
t
BUF
t
t
SU:STA
SU:DAT
t
HD:STA
t
LOW
t
SU:STO
t
HD:DAT
t
SCL
HIGH
t
HD:STA
t
R
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
2
Figure 2. I C Interface Timing Details
SDA
SCL
S
P
START
STOP
CONDITION
CONDITION
Figure 3. Start and Stop Conditions
SDA
SCL
DATA LINE
STABLE;
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 4. Bit Transfer
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MAX20330A
Precision HV Capable ID Detector
Acknowledge
Bus Reset
2
The acknowledge bit is a clocked 9th bit (Figure 5), which
the recipient uses to handshake receipt of each byte of
data. Thus, each byte transferred effectively requires 9
The MAX20330A resets the bus with the I C start condition
for reads. When the R/W bit is set to 1, the device
transmits data to the master, thus the master is reading
from the device.
th
bits. The master generates the 9 clock pulse, and the
recipient pulls down SDA during the acknowledge clock
pulse. The SDA line is stable low during the high period
of the clock pulse. When the master is transmitting to the
MAX20330A, it generates the acknowledge bit because
the device is the recipient. When the device is transmitting
to the master, the master generates the acknowledge bit
because the master is the recipient. If the device did not
pull SDA low, a not acknowledge is indicated.
Format for Writing
A write to the MAX20330A comprises the transmission of
the slave address with the R/W bit set to zero, followed
by at least 1 byte of information. The first byte of information
is the register address or command byte. The register
address determines which register of the device is to be
written by the next byte, if received. If a STOP (P) condition
is detected after the register address is received, then the
device takes no further action beyond storing the register
address. Any bytes received after the register address
are data bytes. The first data byte goes into the register
selected by the register address and subsequent data
bytes go into subsequent registers (Figure 6). If multiple
data bytes are transmitted before a STOP condition,
these bytes are stored in subsequent registers because
the register addresses autoincrement (Figure 7).
Slave Address
The MAX20330A features a 7-bit slave address: 1010
111. The bit following a 7-bit slave address is the R/W
bit, which is low for a write command and high for a read
command.
CLOCK PULSE FOR
ACKNOWLEDGEMENT
START
CONDITION
SCL
1
2
8
9
SDA BY
TRANSMITTER
SDA BY
RECEIVER
S
Figure 5. Acknowledge
ADDRESS = 0xAE
REGISTER ADDRESS = 0x01
0 = WRITE
S
1
0
1
0
1
1
1
0
A
P
0
0
0
0
0
0
0
1
A
REGISTER 0x01 WRITE DATA
S = START BIT
P = STOP BIT
A = ACK
d7
d6
d5
d4
d3
d2
d1
d0
A
N = NACK
d_ = DATA BIT
2
Figure 6. Format for I C Write
Maxim Integrated
│ 17
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MAX20330A
Precision HV Capable ID Detector
performing a write (Figure 8). The master can now read
consecutive bytes from the device, with the first data byte
being read from the register addressed pointed by the
previously written register address (Figure 9). Once the
master sounds a NACK, the MAX20330A stops sending
valid data.
Format for Reading
The MAX20330A is read using the internally stored
register address as an address pointer, the same way the
stored register address is used as an address pointer for
a write. The pointer autoincrements after each data byte
is read using the same rules as for a write. Thus, a read
is initiated by first configuring the register address by
ADDRESS = 0xAE
REGISTER ADDRESS = 0x01
0 = WRITE
S
1
0
1
0
1
1
1
0
A
0
0
0
0
0
0
0
1
A
REGISTER 0x02 WRITE DATA
REGISTER 0x01 WRITE DATA
d7
d6
d5
d4
d3
d2
d1
d0
A
A/N
d7
d6
d5
d4
d3
d2
d1
d0
P
Figure 7. Format for Writing to Multiple Registers
0 = WRITE
REGISTER ADDRESS = 0x01
ADDRESS = 0xAE
A
S
1
1
0
0
1
1
0
1
1
1
1
0
0
0
0
0
0
0
0
1
A/N
1 = READ
ADDRESS = 0xAF
REGISTER 0x01 READ DATA
A
Sr
0
1
1
1
d7
d6
d5
d4
d3
d2
d1
d0
A/N
P
Figure 8. Format for Reads (Repeated Start)
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│ 18
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MAX20330A
Precision HV Capable ID Detector
0 = WRITE
REGISTER ADDRESS = 0x01
ADDRESS = 0xAE
A
A
S
Sr
d7
1
1
0
0
1
1
0
1
1
1
1
1
0
0
d7
d7
0
d6
d6
0
0
0
0
0
d1
d1
1
d0
d0
A/N
1 = READ
ADDRESS = 0xAF
REGISTER 0x01 READ DATA
0
1
1
d5
d4
d3
d2
A
REGISTER 0x02 READ DATA
REGISTER 0x03 READ DATA
A
d6
d5
d4
d3
d2
d1
d0
d5
d4
d3
d2
A/N
P
Figure 9. Format for Reading Multiple Registers
Typical Application Circuits
PMIC
SW_CHG
IN
OUT
QBAT
V
SYS
V
BAT
BATTERY NOT INSTALLED
FOR FACTORY MODE
R
GPU
V
SYS
V
V
V
IO
IO
IO
USB micro B
VBUS
V
CC
R
R
R
PU
PU
PU
SDA
SCL
INT
SDA
SCL
INT
APPS
PROCESSOR
PCON
ID
ID
EN
ID_EN
MAX20330A
GND
GND
Maxim Integrated
│ 19
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MAX20330A
Precision HV Capable ID Detector
Typical Application Circuits (continued)
AUDIO CODEC
SW_CHG
3.5mm JACK
MIC
R
MIC
MIC_BIAS
MIC_IN
RA
R-Aud io
L-Aud io
LA
1MΩ IS OPTIONAL
DEPENDING ON L-DET BIAS
BY THE AUDIO CODEC
V
V
CC
CC
GND
100kΩ 1MΩ
V
V
V
IO
IO
IO
EN
R
R
R
PU
PU
PU
SDA
SDA
SCL
INT
PCON
APPS
PROCESSOR
SCL
INT
L-DET
ID
10kΩ
MAX20330A
GND
Ordering Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
TOP
MARK
TEMP
RANGE
PIN-
PACKAGE
PART
MAX20330AEWA+T
CB
-40°C TO +85°C
8 WLP
+ Denotes lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
PACKAGE PACKAGE
OUTLINE
NO.
LAND
PATTERN NO.
TYPE
CODE
Refer to
Application
Note 1891
Chip Information
PROCESS: BiCMOS
8 WLP
W81B1+1
21-100229
Maxim Integrated
│ 20
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MAX20330A
Precision HV Capable ID Detector
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
3/18
6/18
Initial release
—
Updated Table 2
12
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2018 Maxim Integrated Products, Inc.
│ 21
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