MAX19791ETX+ [MAXIM]
50MHz to 4000MHz Dual Analog Voltage Variable 50MHz to 4000MHz Dual Analog Voltage Variable;
| 型号： | MAX19791ETX+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 50MHz to 4000MHz Dual Analog Voltage Variable 50MHz to 4000MHz Dual Analog Voltage Variable 信息通信管理 |
| 文件： | 总24页 (文件大小：4188K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
General Description
Features
The MAX19791 dual general-purpose analog voltage
variable attenuator (VVA) is designed to interface with
50I systems operating in the 50MHz to 4000MHz
frequency range. The device includes a patented con-
trol circuit that provides 23dB of attenuation range (per
attenuator) with a typical linear control slope of 8dB/V.
S Wideband Coverage
50MHz to 4000MHz RF Frequency Range
S High Linearity
Greater Than +37.4dBm IIP3 Over the Full
Attenuation Range
+22.6dBm Input P
1dB
Both attenuators share a common analog control and
can be cascaded together to yield 46dB of total attenua-
tion range with a typical combined linear control slope of
16dB/V (5V operation).
S Integrates Two Analog Attenuators in One
Monolithic Device
S Two Convenient Control Options
Single Analog Voltage
Alternatively, the on-chip 4-wire SPI-controlled 10-bit
DAC can be used to control both attenuators. In addi-
tion, a step-up/down feature allows user-programmable
attenuator stepping through command pulses without
reprogramming the SPI interface.
On-Chip SPI-Controlled 10-Bit DAC
S Step-Up/Down Pulse Command Inputs
S Flexible Attenuation Control Ranges
ꢀ23dB (Per Attenuator)
ꢀ46dB (Both Attenuators Cascaded)
The MAX19791 is a monolithic device designed using
one of Maxim’s proprietary SiGe BiCMOS processes. The
part operates from a single +5V supply or alternatively
from a single +3.3V supply. It is available in a compact
36-pin TQFN package (6mm x 6mm x 0.8mm) with an
exposed pad. Electrical performance is guaranteed over
the -40NC to +100NC extended temperature range.
S Linear dB/V Analog Control Response Curve
Simplifies Automatic Leveling Control and
Gain-Trim Algorithms
S Excellent Attenuation Flatness Over Wide
Frequency Ranges and Attenuation Settings
S On-Chip Comparator (for Successive
Approximation Measurement of Attenuator
Control Voltage)
Applications
Broadband System Applications, Including
Wireless Infrastructure Digital and
Spread-Spectrum Communication Systems
S Low 13mA Supply Current
S Single 5V or 3.3V Supply Voltage
S Pin-Compatible with the MAX19792 and MAX19793
WCDMA/LTE, TD-SCDMA/TD-LTE, WiMAX®,
M
S Pin-Compatible with the MAX19794 with Addition
cdma2000 , GSM/EDGE, and
of Two Shunt Capacitors
MMDS Base Stations
S PCB-Compatible with the MAX19790
S Lead(Pb)-Free Package
VSAT/Satellite Modems
Microwave Point-to-Point Systems
Lineup Gain Trim
Ordering Information appears at end of data sheet.
Temperature-Compensation Circuits
Automatic Level Control (ALC)
Transmitter Gain Control
Receiver Gain Control
For related parts and recommended products to use with this part,
refer to www.maximintegrated.com/MAX19791.related.
General Test Equipment
WiMAX® is a registered certification mark and registered service mark of WiMAX Forum.
cdma2000 is a registered trademark of Telecommunications Industry Association.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6454; Rev 2; 5/15
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
ABSOLUTE MAXIMUM RATINGS
CC
V
.......................................................................-0.3V to +5.5V
RF Input Power at IN_A, IN_B, OUT_A, OUT_B ...........+20dBm
Continuous Power Dissipation (Note 1) ..............................2.8W
Operating Case Temperature Range (Note 2)…-40NC to +100NC
Maximum Junction Temperature.....................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
REF_IN..............................-0.3V to Minimum (V
+ 0.3V, 3.6V)
CC
REF_SEL DAC_LOGIC, MODE, DWN, UP,
,
DIN, CLK, CS............... -0.3V to Minimum (V
+ 0.3V, 3.6V)
CC
COMP_OUT, DOUT..............................................-0.3V to +3.6V
IN_A, OUT_A, IN_B, OUT_B .......................-0.3V to V
CTRL (except for test mode).......................-0.3V to V
Maximum CTRL Pin Load Current
+ 0.3V
+ 0.3V
CC
CC
(CTRL configured as an output)....................................0.3mA
Note 1: Based on junction temperature T = T + (B x V x I ). This formula can be used when the temperature of the
J
C
JC
CC
CC
exposed pad is known while the device is soldered down to a PCB. See the Applications Information section for details.
The junction temperature must not exceed +150NC.
Note 2: T is the temperature on the exposed pad of the package. T is the ambient temperature of the device and PCB.
C
A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS
TQFN
Junction-to-Ambient Thermal Resistance (q
)
Junction-to-Case Thermal Resistance (q
)
JA
JC
(Notes 3, 4)............................................................... +36NC/W
(Notes 1, 4)............................................................... +10NC/W
Note 3: Junction temperature T = T + (B x V x I ). This formula can be used when the ambient temperature of the PCB is
J
A
JA
CC
CC
known. The junction temperature must not exceed +150NC.
Note 4: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
3.3V DC ELECTRICAL CHARACTERISTICS
(V
= 3.15V to 3.45V, V
= 1V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, no RF signals applied, all input and output
CC
CTRL
DAC_LOGIC
ports terminated with 50I through DC blocks, T = -40NC to +100NC, unless otherwise noted. Typical values are at V
= 3.3V,
C
CC
V
= 1V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, T = +25NC, unless otherwise noted.) (Note 5)
CTRL
DAC_LOGIC C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
3.3
MAX
3.45
14
UNITS
Supply Voltage
V
3.15
V
mA
V
CC
Supply Current
I
9.5
CC
Control Voltage Range
CTRL Input Resistance
Input Current Logic-High
V
R
1
2.5
CTRL
1.0
MI
µA
CTRL
I
-1
-1
+1
+1
IH
Input Current Logic-Low
REF_IN Voltage
I
µA
V
IL
1.4
1.0
REF_IN Input Resistance
DAC Number of Bits
Input Voltage Logic-High
MI
Bits
V
Monotonic
10
V
2
IH
Input Voltage Logic-Low
V
0.8
V
IL
RDBK_EN(D9, REG3) = logic 1,
= 47kI
COMP_OUT Logic-High
3.3
0
V
R
LOAD
RDBK_EN(D9, REG3) = logic 1,
= 47kI
COMP_OUT Logic-Low
V
R
LOAD
Maxim Integrated
2
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
5V DC ELECTRICAL CHARACTERISTICS
(V
CC
= 4.75V to 5.25V, V
= 1V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, no RF signals applied, all input and output
CTRL
ports terminated with 50I through DC blocks, T = -40NC to +100NC, unless otherwise noted. Typical values are at V
DAC_LOGIC
= 5V, V
CTRL
C
CC
= 1V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, T = +25NC, unless otherwise noted.) (Note 5)
DAC_LOGIC
C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
5.0
13
MAX
5.25
20
UNITS
Supply Voltage
V
4.75
V
mA
V
CC
Supply Current
I
CC
CTRL Voltage Range
CTRL Input Resistance
Input Current Logic-High
V
R
1
4
CTRL
124
kI
µA
CTRL
I
-1
-1
+1
+1
IH
Input Current Logic-Low
REF_IN Voltage Range
REF_IN Input Resistance
DAC Number of Bits
I
µA
V
IL
1.4
1.0
10
MI
Bits
V
Monotonic
Input Voltage Logic-High
V
2
IH
Input Voltage Logic-Low
V
0.8
V
IL
RDBK_EN(D9, REG3) = logic 1,
= 47kI
COMP_OUT Logic-High
3.3
0
V
R
LOAD
RDBK_EN(D9, REG3) = logic 1,
= 47kI
COMP_OUT Logic-Low
V
R
LOAD
RECOMMENDED AC OPERATING CONDITIONS
PARAMETER
RF Frequency Range
RF Port Input Power
SYMBOL
CONDITIONS
MIN
TYP
MAX
4000
15
UNITS
MHz
f
(Note 6)
Continuous operation
50
RF
P
dBm
RF
Maxim Integrated
3
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
3.3V AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, one attenuator, V
= 3.15V to 3.45V, RF ports are driven from 50Isources and loaded into 50I, input
CC
P
= 0dBm, f = 900MHz, V
= 1V to 2.5V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, T = -40NC to +100NC. Typical
RF
RF
CTRL
DAC_LOGIC C
values are for T = +25NC, V
= 3.3V, input P = 0dBm, f = 900MHz, V
= 1V,
V
= 0V, RDBK_EN (D9, REG3) =
C
CC
RF
RF
CTRL
DAC_LOGIC
logic 0, unless otherwise noted.) (Notes 5, 7)
PARAMETER
Insertion Loss
SYMBOL
CONDITIONS
One attenuator
Two attenuators
MIN
TYP
2.0
MAX
UNITS
IL
dB
3.9
Loss Variation Over
Temperature
T
= -40NC to +100NC
0.25
16.4
dB
C
Input P
IP
dBm
1dB
1dB
One attenuator, f
+f
term,
RF1 RF2
f
P
-f
= 1MHz, V
= 1V to 2.5V,
RF1 RF2
CTRL
59
= 0dBm/tone applied to attenuator
RF
Minimum Input Second-Order
Intercept Point Over Full
Attenuation Range (Note 8)
input
IIP2
IIP3
dBm
dBm
Two attenuators, f
+ f
term,
= 1V to 2.5V,
RF1
= 1MHz, V
RF2
f
- f
RF1 RF2
CTRL
55.6
P
= 0dBm/tone applied to attenuator
RF
input
One attenuator, V
= 1V to 2.5V,
CTRL
f
- f
= 1MHz, P = 0dBm/tone
33.9
32.8
RF1 RF2
RF
Minimum Input Third-Order
Intercept Point Over Full
Attenuation Range (Note 8)
applied to attenuator input
Two attenuators, V = 1V to 2.0V,
CTRL
f
- f
= 1MHz, P = 0dBm/tone
RF1 RF2 RF
applied to attenuator input
Second Harmonic
Third Harmonic
71
91
dBc
dBc
One attenuator, V
= 1V to 2.5V
23.1
CTRL
Attenuation Control Range
dB
Two attenuators, V
= 1V to 2.5V
46.2
CTRL
Average Attenuation-Control
Slope
V
V
V
= 1.4V to 2.3V
22.2
dB/V
dB/V
dB
CTRL
CTRL
CTRL
Maximum Attenuation-Control
Slope
= 1V to 2.5V
49
S21 Attenuation Deviation from
a Straight Line
= 1.4V to 2.1V
0.4
Maxim Integrated
4
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
5V AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, one attenuator, V
= 4.75V to 5.25V, RF ports are driven from 50Isources and loaded into 50I, input
CC
P
= 0dBm, f = 900MHz, V
= 1V to 4V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, T = -40NC to +100NC. Typical
RF
RF
CTRL
DAC_LOGIC C
values are for T = +25NC, V
= 5V, input P = 0dBm, f = 900MHz, V
= 1V,
V
= 0V, RDBK_EN (D9, REG3) =
C
CC
RF
RF
CTRL
DAC_LOGIC
logic 0, unless otherwise noted.) (Notes 5, 7)
PARAMETER
Insertion Loss
SYMBOL
CONDITIONS
MIN
TYP
2.0
MAX
UNIT
One attenuator
Two attenuators
IL
dB
3.9
Loss Variation Over
Temperature
T
= -40NC to +100NC
0.26
22.6
dB
C
Input P
IP
dBm
1dB
1dB
One attenuator, f
+ f
term,
RF1
RF2
f
P
input
- f
= 1MHz, V
= 1V to 4V,
RF1 RF2
CTRL
65.7
62.5
= 0dBm/tone applied to attenuator
RF
Minimum Input Second-Order
Intercept Point Over Full
Attenuation Range (Note 8)
IIP2
IIP3
dBm
dBm
Two attenuators, f
+ f
term,
RF1
= 1MHz, V
RF2
f
- f
= 1V to 4V,
RF1 RF2
CTRL
P
= 0dBm/tone applied to attenuator
RF
input
One attenuator, V
from 1V to 4V,
CTRL
f
- f
= 1MHz, P = 0dBm/tone
37.4
35.5
RF1 RF2
RF
Minimum Input Third-Order
Intercept Point Over Full
Attenuation Range (Note 8)
applied to attenuator input
Two attenuators, V from 1V to 3.5V,
CTRL
f
- f
= 1MHz, P = 0dBm/tone
RF1 RF2 RF
applied to attenuator input
Second Harmonic
Third Harmonic
78
94
23
46
dBc
dBc
dB
One attenuator, V
= 1V to 4V
CTRL
Attenuation Control Range
Two attenuators, V
= 1V to 4V
dB
CTRL
Average Attenuation-Control
Slope
V
= 1.4V to 3.1V
8.0
32
dB/V
dB/V
dB
CTRL
Maximum Attenuation-Control
Slope
V
= 1V to 3.5V
= 1V to 3.1V
CTRL
CTRL
Attenuation Flatness Over Any
125MHz Band
V
f
0.1
= 250MHz to 2500MHz
RF
Maxim Integrated
5
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
5V AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, one attenuator, V
= 4.75V to 5.25V, RF ports are driven from 50Isources and loaded into 50I, input
CC
P
= 0dBm, f = 900MHz, V
= 1V to 4V, V
= 0V, RDBK_EN(D9, REG3) = logic 0, T = -40NC to +100NC. Typical
RF
RF
CTRL
DAC_LOGIC C
values are for T = +25NC, V
= 5V, input P = 0dBm, f = 900MHz, V
= 1V,
V
= 0V, RDBK_EN (D9, REG3) =
C
CC
RF
RF
CTRL
DAC_LOGIC
logic 0, unless otherwise noted.) (Notes 5, 7)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
350
860
840
2300
580
1950
24.5
23
MAX
UNIT
13dB to 0dB range
0dB to 13dB range
17dB to 0dB range
0dB to 17dB range
CTRL Switching Time (Note 9)
ns
ns
ns
CS Switching Time (Note 10)
10dB to 0dB range (MODE 1 to 0)
0dB to 10dB range (MODE 0 to 1)
MODE Switching Time
(Note 11)
Input Return Loss
Output Return Loss
Group Delay
dB
dB
ps
Input/output 50I lines deembedded
190
Group Delay Flatness Over
125MHz Band
Peak to peak
20
ps
ps
Group Delay Change
V
V
= 1V to 4V
= 1V to 4V
-80
14.8
CTRL
Insertion Phase Change vs.
Attenuation Control
Degrees
CTRL
S21 Attenuation Deviation from
a Straight Line
V
= 1.4V to 3.1V
0.4
dB
CTRL
SERIAL PERIPHERAL INTERFACE (SPI)
Maximum Clock Speed
20
2
MHz
ns
Data-to-Clock Setup Time
Data-to-Clock Hold Time
t
(Note 12)
(Note 12)
(Note 12)
(Note 12)
(Note 12)
CS
t
2.5
3
ns
CH
t
ns
CS-to-CLK Setup Time
CS Positive Pulse Width
Clock Pulse Width
EWS
t
7
ns
EW
t
5
ns
CW
Note 5: Production tested at T = +100NC. All other temperatures are guaranteed by design and characterization.
C
Note 6: Recommended functional range. Not production tested. Operation outside this range is possible, but with degraded
performance of some parameters.
Note 7: All limits include external component losses, connectors and PCB traces. Output measurements taken at the RF port of
the Typical Application Circuit.
Note 8:
f
= 901MHz, f
= 900MHz, P = 0dBm/tone applied to attenuator input.
RF
RF1
RF2
Note 9: Switching time measured from 50% of the CTRL signal to when the RF output settles to Q1dB (R3 = 0I).
Note 10: Switching time measured from when CS is asserted to when the RF output settles to Q1dB.
Note 11: Switching time measured from when MODE is asserted to when the RF output settles to Q1dB.
Note 12: Typical minimum time for proper SPI operation.
Maxim Integrated
6
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics
(Typical Application Circuit, V
= 5V, configured for single attenuator, RF ports are driven from 50I sources and loaded into 50I,
CC
V
= 0V, RDBK_EN = Logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL
IN
RF
C
INPUT MATCH vs. RF FREQUENCY
OVER CODE SETTINGS
OUTPUT MATCH vs. RF FREQUENCY
OVER CODE SETTINGS
SUPPLY CURRENT vs. V
CC
15
14
13
12
11
0
-10
-20
-30
-40
-50
0
-10
-20
-30
-40
-50
T
= +85°C
C
T
= +25°C
C
T
= -40°C
C
10
4.750
4.875
5.000
(V)
5.125
5.250
0
1000
2000
3000
4000
0
1000
2000
3000
4000
V
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
CC
S21 vs. RF FREQUENCY
OVER CODE SETTINGS
INPUT MATCH vs. DAC CODE
OUTPUT MATCH vs. DAC CODE
0
-10
-20
0
-10
-20
-30
-40
0
-10
-20
-30
-40
4000MHz
4000MHz
900MHz
2500MHz
50MHz
100MHz
500MHz
50MHz
100MHz
512
500MHz
900MHz
2500MHz
-30
0
1000
2000
3000
4000
0
256
768
1024
0
256
512
DAC CODE
768
1024
RF FREQUENCY (MHz)
DAC CODE
S21 vs. DAC CODE
S21 vs. DAC CODE
0
-5
0
f
RF
= 900MHz
-5
50MHz
4000MHz
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
100MHz
T
C
= -40°C, +25°C, +85°C
500MHz, 900MHz, 2500MHz
0
256
512
768
1024
0
256
512
768
1024
DAC CODE
DAC CODE
Maxim Integrated
7
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 5V, configured for single attenuator, RF ports are driven from 50I sources and loaded into 50I,
CC
V
= 0V, RDBK_EN = Logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL IN RF C
INPUT IP3 vs. V
INPUT IP3 vs. V
CTRL
S21 PHASE CHANGE vs. DAC CODE
CTRL
55
50
60
55
50
45
40
35
30
100
75
REFERENCED TO INSERTION LOSS STATE
POSITIVE PHASE = ELECTRICALLY SHORTER
f
P
= 50MHz
= 0dBm/TONE
f
P
= 100MHz
= 0dBm/TONE
RF
RF
IN
IN
4000MHz
50
2500MHz
900MHz
500MHz
45
40
25
0
-25
-50
-75
100MHz
50MHz
35
30
LSB, USB
3.0
LSB, USB
1.0
2.0
4.0
1.0
2.0
3.0
4.0
0
256
512
768
1024
V
CTRL
(V)
V
CTRL
(V)
DAC CODE
INPUT IP3 vs. V
INPUT IP3 vs. V
INPUT IP3 vs. V
CTRL
CTRL
CTRL
55
50
45
40
35
30
55
50
45
40
35
30
55
50
45
40
35
30
LSB, USB
LSB, USB
T
= -40°C, +25°C, +85°C
LSB, USB
C
f
P
= 500MHz
f
P
= 900MHz
f
P
= 900MHz
RF
RF
RF
= 0dBm/TONE
= 0dBm/TONE
= 0dBm/TONE
IN
IN
IN
1.0
2.0
3.0
4.0
1.0
2.0
3.0
4.0
1.0
2.0
3.0
4.0
V
CTRL
(V)
V
CTRL
(V)
V
CTRL
(V)
INPUT IP3 vs. V
INPUT IP3 vs. V
CTRL
CTRL
55
50
45
40
35
50
45
40
35
30
f
P
= 2200MHz
= 0dBm/TONE
RF
IN
LSB, USB
LSB, USB
f
P
= 3000MHz
RF
IN
= 0dBm/TONE
30
1.0
2.0
3.0
4.0
1.0
2.0
3.0
4.0
V
CTRL
(V)
V
CTRL
(V)
Maxim Integrated
8
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 5V, configured for single attenuator, RF ports are driven from 50I sources and loaded into 50I,
CC
V
= 0V, RDBK_EN = Logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL IN RF C
INPUT IP2 vs. V
INPUT IP2 vs. V
INPUT IP2 vs. V
CTRL
CTRL
CTRL
75
65
55
45
100
80
90
80
70
60
50
60
f
P
= 50MHz
= 0dBm/TONE
f
P
= 100MHz
RF
IN
RF
IN
f
RF
= 500MHz
= 0dBm/TONE
2.0
P
IN
= 0dBm/TONE
35
40
1.0
2.0
3.0
4.0
1.0
3.0
4.0
1.0
0
1.0
2.0
3.0
4.0
V
(V)
V
CTRL
(V)
V
(V)
CTRL
CTRL
INPUT IP2 vs. V
INPUT IP2 vs. V
CTRL
CTRL
100
90
80
70
60
100
f
RF
= 900MHz
= 0dBm/TONE
f
= 2200MHz
P = 0dBm/TONE
RF
IN
P
IN
90
80
70
60
T
= -40°C, +25°C, +85°C
3.0
C
1.0
2.0
4.0
2.0
3.0
4.0
V
CTRL
(V)
V
(V)
CTRL
INPUT IP2 vs. V
CTRL
INPUT P1dB vs. RF FREQUENCY
100
90
80
70
60
26
25
24
23
22
21
20
f
RF
= 3000MHz
= 0dBm/TONE
P
IN
T
= +25°C
C
T
= -40°C
C
T
C
= +85°C
1.0
2.0
3.0
4.0
1000
2000
3000
V
(V)
CTRL
RF FREQUENCY(MHz)
Maxim Integrated
9
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 5V, configured for single attenuator, RF ports are driven from 50I sources and loaded into 50I,
CC
V
= 0V, RDBK_EN = Logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL
IN
RF
C
INPUT P1dB vs. RF FREQUENCY
RESPONSE TIME V
STEP
RESPONSE TIME V
STEP
CTRL
CTRL
26
25
24
23
22
21
0
-5
0
-5
V
STEP OCCURS AT t = t
0
CTRL
V
= 5.25V
CC
-10
-15
-20
-25
-30
V
V
STEP FROM 1V TO 3V
STEP FROM 1V TO 4V
-10
-15
-20
-25
-30
CTRL
CTRL
V
STEP FROM 3V TO 1V
CTRL
V
STEP FROM 4V TO 1V
CTRL
V
= 5.00V
CC
V
STEP OCCURS AT t = t
0
CTRL
V
= 4.75V
CC
0
1000
2000
3000
0
500
1000
TIME (ns)
1500
2000
0
250
500
750
1000
RF FREQUENCY(MHz)
TIME (ns)
RESPONSE TIME WITH CS STEP
RESPONSE TIME WITH CS STEP
RESPONSE TIME WITH MODE STEP
0
-5
0
-5
0
-5
CS STEP OCCURS AT t = t
0
MODE 1 TO 0 (CODE 500 TO 0)
MODE 1 TO 0 (CODE 1023 TO 0)
CODE 0 TO 500
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
CODE 500 TO 0
CODE 0 TO 750
MODE 0 TO 1 (CODE 0 TO 500)
MODE 0 TO 1 (CODE 0 TO 1023)
CODE 750 TO 0
CODE 1023 TO 0
CS STEP OCCURS AT t = t
0
CODE 0 TO 1023
1000
MODE STEP OCCURS AT t = t
0
0
2000
3000
4000
0
500
1000
1500
2000
0
1000
2000
3000
4000
TIME (ns)
TIME (ns)
TIME (ns)
Maxim Integrated
10
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 3.3V, configured for single attenuator, RF ports are driven from 50Isources and loaded into 50I,
CC
V
= 0V, RDBK_EN = logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL IN RF C
INPUT MATCH vs. RF FREQUENCY
OVER CODE SETTINGS
OUTPUT MATCH vs. RF FREQUENCY
OVER CODE SETTINGS
SUPPLY CURRENT vs. V
CC
11
0
-10
-20
-30
-40
-50
0
-10
-20
-30
-40
-50
T
C
= +85°C
10
9
T
= +25°C
C
T
= -40°C
C
8
3.15 3.20 3.25 3.30 3.35 3.40 3.45
(V)
0
1000
2000
3000
4000
0
1000
2000
3000
4000
V
CC
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
S21 vs. RF FREQUENCY
OVER CODE SETTINGS
INPUT MATCH vs. DAC CODE
OUTPUT MATCH vs. DAC CODE
0
-10
-20
-30
0
-10
-20
-30
-40
0
-10
-20
-30
-40
4000MHz
4000MHz
900MHz
50MHz
2500MHz
900MHz
500MHz
500MHz
50MHz
100MHz, 2500MHz
256
100MHz
256
0
1000
2000
3000
4000
0
512
DAC CODE
768
1024
0
512
DAC CODE
768
1024
RF FREQUENCY (MHz)
S21 vs. DAC CODE
S21 vs. DAC CODE
S21 PHASE CHANGE vs. DAC CODE
0
-5
0
-5
100
75
REFERENCED TO INSERTION LOSS STATE
POSITIVE PHASE =
f
RF
= 900MHz
ELECTRICALLY SHORTER
4000MHz
2500MHz
50MHz
50
4000MHz
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
25
900MHz
100MHz
T
C
= -40°C, +25°C, +85°C
0
500MHz
-25
-50
-75
100MHz
50MHz
500MHz, 900MHz, 2500MHz
0
256
512
768
1024
0
256
512
768
1024
0
256
512
768
1024
DAC CODE
DAC CODE
DAC CODE
Maxim Integrated
11
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 3.3V, configured for single attenuator, RF ports are driven from 50Isources and loaded into 50I,
CC
V
= 0V, RDBK_EN = logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL
IN
RF
C
INPUT IP3 vs. V
INPUT IP3 vs. V
INPUT IP3 vs. V
CTRL
CTRL
CTRL
50
45
40
35
30
45
40
35
30
45
40
35
30
f
P
= 100MHz
= 0dBm/TONE
f
= 500MHz
f
P
= 50MHz
= 0dBm/TONE
RF
IN
RF
IN
RF
IN
P = 0dBm/TONE
LSB
USB
LSB, USB
LSB, USB
25
1.0
1.5
2.0
2.5
1.0
1.5
2.0
2.5
2.5
1.0
1.0
1.5
2.0
2.5
V
(V)
V
(V)
V
(V)
CTRL
CTRL
CTRL
INPUT IP3 vs. V
INPUT IP3 vs. V
INPUT IP3 vs. V
CTRL
CTRL
CTRL
55
55
50
45
40
35
30
55
50
45
40
35
30
f
P
= 900MHz
f
P
= 900MHz
f
= 2200MHz
RF
RF
RF
= 0dBm/TONE
= 0dBm/TONE
P = 0dBm/TONE
IN
IN
IN
50
45
40
35
30
LSB, USB
LSB, USB
T
C
= -40°C, +25°C, +85°C
LSB, USB
1.0
1.5
2.0
2.5
1.0
1.5
2.0
1.0
1.5
2.0
2.5
V
(V)
V
(V)
V
CTRL
(V)
CTRL
CTRL
INPUT IP3 vs. V
INPUT IP2 vs. V
CTRL
CTRL
50
80
70
60
50
40
30
f
= 3000MHz
= 0dBm/TONE
f
= 50MHz
RF
RF
IN
P
P = 0dBm/TONE
IN
45
40
35
30
LSB, USB
1.0
1.5
2.0
2.5
1.5
2.0
2.5
V
CTRL
(V)
V
CTRL
(V)
Maxim Integrated
12
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 3.3V, configured for single attenuator, RF ports are driven from 50Isources and loaded into 50I,
CC
V
= 0V, RDBK_EN = logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL
IN
RF
C
INPUT IP2 vs. V
INPUT IP2 vs. V
INPUT IP2 vs. V
CTRL
CTRL
CTRL
80
90
80
70
60
50
100
90
80
70
60
50
f
P
= 100MHz
= 0dBm/TONE
f
P
= 500MHz
= 0dBm/TONE
RF
IN
RF
IN
f
RF
= 900MHz
P
IN
= 0dBm/TONE
70
60
50
40
T
C
= -40°C, +25°C, +85°C
2.0
1.0
1.5
2.0
2.5
1.0
1.5
2.0
2.5
1.0
1.5
2.5
V
(V)
V
CTRL
(V)
V
CTRL
(V)
CTRL
INPUT IP2 vs. V
INPUT IP2 vs. V
CTRL
CTRL
INPUT P1dB vs. RF FREQUENCY
100
90
80
70
60
50
90
80
70
60
50
40
19
18
17
16
15
14
f
P
= 2200MHz
= 0dBm/TONE
f
= 3000MHz
RF
IN
RF
IN
P = 0dBm/TONE
T
= +25°C, +85°C
C
T
= -40°C
C
1.0
1.5
2.0
2.5
1.0
1.5
2.0
2.5
0
1000
2000
3000
V
CTRL
(V)
V
(V)
CTRL
RF FREQUENCY(MHz)
INPUT P1dB vs. RF FREQUENCY
RESPONSE TIME V
STEP
CTRL
19
18
17
16
15
14
0
-5
V
= 3.45V
CC
V
STEP FROM 1V TO 1.5V
STEP FROM 1V TO 2.5V
-10
-15
-20
-25
-30
CTRL
V
= 3.3V
CC
V
CTRL
V
= 3.15V
CC
V
STEP OCCURS AT t = t
0
CTRL
0
1000
2000
3000
0
500
1000
1500
2000
RF FREQUENCY(MHz)
TIME (ns)
Maxim Integrated
13
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 3.3V, configured for single attenuator, RF ports are driven from 50Isources and loaded into 50I,
CC
V
= 0V, RDBK_EN = logic 0, V
= 1V, P = 0dBm, f = 900MHz, T = 25°C, unless otherwise noted.).
DAC_LOGIC
CTRL
IN
RF
C
RESPONSE TIME V
STEP
RESPONSE TIME WITH CS STEP
CTRL
0
-5
0
-5
CODE 0 TO 500
V
STEP FROM 1.5V TO 1V
CTRL
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
CODE 0 TO 750
V
STEP FROM 2.5V TO 1V
CTRL
CODE 0 TO 1023
CS STEP OCCURS AT t = t
0
V
STEP OCCURS AT t = t
0
CTRL
0
250
500
750
1000
0
1000
2000
3000
4000
TIME (ns)
TIME (ns)
RESPONSE TIME WITH CS STEP
RESPONSE TIME WITH MODE STEP
0
-5
0
-5
CODE 500 TO 0
CODE 750 TO 0
MODE 0 TO 1 (CODE 0 TO 500)
MODE 1 TO 0 (CODE 500 TO 0)
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
MODE 1 TO 0 (CODE 1023 TO 0)
MODE 0 TO 1 (CODE 0 TO 1023)
CODE 1023 TO 0
CS STEP OCCURS AT t = t
MODE STEP OCCURS AT t = t
0
0
0
500
1000
1500
2000
0
1000
2000
3000
4000
TIME (ns)
TIME (ns)
Maxim Integrated
14
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Pin Configuration
TOP VIEW
27 26 25 24 23 22 21 20 19
18
17 COMP_OUT
16
MODE
GND 28
OUT_B 29
GND 30
DAC_LOGIC
MAX19791
N.C. 31
15 REF_SEL
14 REF_IN
V
32
33
CC
GND
13
12 GND
CTRL
10 GND
V
CC
GND 34
IN_B 35
GND 36
11
EP*
+
1
2
3
4
5
6
7
8
9
TQFN
(6mm x 6mm)
*INTERNALLY CONNECTED TO GND.
Pin Description
PIN
NAME
DESCRIPTION
1, 3, 6, 7, 9, 10,
12, 26, 27, 28,
30, 33, 34, 36
GND
Ground. Connect to the board’s ground plane using low-inductance layout techniques.
Attenuator A RF Output. Internally matched to 50I over the operating frequency band. This pin,
if used, requires a DC block. If this attenuator is not used, the pin can be left unconnected.
2
OUT_A
N.C.
No Internal Connection. This pin can be left open or ground.
Note: If a common layout is desired to support the MAX19794, connect a 0402 capacitor
to ground on each of these pins.
4, 31
Attenuator A Power Supply. Bypass to GND with a capacitor and resistor, as shown in the
5
8
V
CC
Typical Application Circuit
.
Attenuator A RF Input. Internally matched to 50I over the operating frequency band. This pin, if
IN_A
used, requires a DC block. If this attenuator is not used, the pin can be left unconnected.
Attenuator Control Voltage Input. Except in test mode, where no voltage can be applied
11
CTRL
to this pin. V
must be present unless using a current-limiting resistor as noted in the
CC
Applications Information section.
Maxim Integrated
15
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Pin Description (continued)
PIN
13
NAME
DESCRIPTION
Analog Supply Voltage. Bypass to GND with a capacitor as close as possible to the device.
V
CC
See the Typical Application Circuit.
14
REF_IN
DAC Reference Voltage Input (Optional)
DAC Reference Voltage Selection Logic Input
Logic = 0 to enable on-chip DAC reference.
Logic = 1 to use off-chip DAC reference (pin 14).
15
REF_SEL
16
17
DAC_LOGIC DAC Logic Control Input (Table 1)
Comparator Logic Output. Use a 4.7pF capacitor to reduce any potential rise-time glitching
COMP_OUT
when the comparator changes state.
Attenuator Control Mode Logic Input
18
MODE
Logic = 1 to enable attenuator step control.
Logic = 0 to enable attenuator SPI control.
Down Pulse Input
Logic pulse = 0 for each step-down.
19
20
DWN
UP
Up Pulse Input
Logic pulse = 0 for each step-up.
19/20
21
DWN/UP
CLK
Logic = 0 to both pins to reset the attenuator to a minimum attenuation state
SPI Clock Input
SPI Data Input
22
DIN
23
DOUT
CS
SPI Data Output
SPI Chip-Select Input
24
Digital Supply Voltage. Bypass to GND with a capacitor as close as possible to the device.
See the Typical Application Circuit.
25
29
32
35
V
CC
Attenuator B RF Output. Internally matched to 50I over the operating frequency band. This pin,
if used, requires a DC block. If this attenuator is not used, the pin can be left unconnected.
OUT_B
Attenuator B Power Supply. Bypass to GND with a capacitor and resistor, as shown in the
Typical Application Circuit.
V
CC
Attenuator B RF Input. Internally matched to 50I over the operating frequency band. This pin,
if used, requires a DC block. If this attenuator is not used, the pin can be left unconnected.
IN_B
EP
Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses
multiple ground vias to provide heat transfer out of the device into the PCB ground planes.
These multiple via grounds are also required to achieve the noted RF performance. See the
Layout Considerations section.
—
Maxim Integrated
16
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
DAC Mode Control
In the Table 1 state (1, 0), the attenuators are controlled
Detailed Description
The MAX19791 is a dual general-purpose analog VVA
designed to interface with 50I systems operating in the
50MHz to 4000MHz frequency range. Each attenuator
provides 23dB of attenuation range with a linear control
slope of 8dB/V. Both attenuators share a common analog
control and can be cascaded together to yield 46dB of
total dynamic range with a combined linear control slope
of 16dB/V. Alternatively, the on-chip 4-wire SPI-controlled
10-bit DAC can be used to control both attenuators. In
addition, a step-up/down feature allows user-programma-
ble attenuator stepping through command pulses without
reprogramming the SPI interface.
by the on-chip 10-bit DAC register. See the Register
Mode Up/Down Operation section. In this condition, no
signal is applied to the CTRL pin and the load on the
CTRL pin should be > 100kI. The DAC is set using the
SPI-loaded code in the registers, along with the setting
of the MODE pin.
Analog Mode Control
with Alarm Monitoring
In the Table 1 state (0, 1), the attenuators are controlled
using a voltage applied to the CTRL pin of the device.
See the Register Mode Up/Down Operation section.
In this condition, the DAC is enabled and a voltage is
also applied to the CTRL pin. The on-chip switches are
set to compare the DAC voltage to the CTRL voltage
at the comparator input; the output of the comparator
Applications Information
Attenuation Control and Features
The device has various states used to control the analog
attenuator along with some monitoring conditions. The
device can be controlled by an external control voltage,
an internal SPI bus, or a combination of the two. The
various states are described in Table 1. The SPI bus has
multiple registers used to control the device when not
configured for the analog-only mode. For cases where
(COMP_OUT) trips from high to low when V
the on-chip DAC voltage.
exceeds
CTRL
DAC Test Mode
In the Table 1 state (1, 1), the attenuators are controlled
by the on-chip 10-bit DAC register. See the Register
Mode Up/Down Operation section. In this condition, the
DAC is enabled and the DAC voltage appears at the
CTRL pin. In this condition, no signal can be applied to
the CTRL pin and the load on the CTRL pin should be >
100kI. This mode is only used in production testing of the
DAC voltage and is not recommended for customer use.
CTRL is used, the control range is 1V to 4V for V
= 5V,
CC
and is 1V to 2.5V for V
= 3.3V.
CC
Up to 23dB of attenuation control range is provided per
attenuator. At the insertion-loss setting, the single attenu-
ator’s loss is approximately 2dB. If a larger attenuation-
control range is desired, the second on-chip attenuator
can be connected in series to provide an additional 23dB
of gain-control range.
Register Mode Up/Down Operation
The device has four 13-bit registers that are used for the
operation of the device. The first bit is the read/write bit,
the following two are address bits, and the remaining 10
are the desired data bits. The read/write bit determines
whether the register is being written to or read from. The
next two address bits select the desired register to write
or read from. These address bits can be seen in Table 2.
Table 3 describes the contents of the four registers.
Note that the on-chip control driver simultaneously
adjusts both on-chip attenuators. It is suggested that a
current-limiting resistor be included in series with CTRL
to limit the input current to less than 40mA, should the
control voltage be applied when V
series resistor of greater than 200I provides complete
is not present. A
CC
Figure 1 shows the configuration of the internal regis-
ters of the device and Figure 2 shows the timing of the
SPI bus. Register 0 sets the DAC code to the desired
value, register 1 selects the step-up code, and register 2
selects the step-down code.
protection for 5V control voltage ranges.
Analog-Only Mode Control
In the Table 1 state (0, 0), the attenuators are controlled
using a voltage applied to the CTRL pin of the device and
the on-chip DAC is disabled. In cases where features of
the SPI bus are not needed, the part can be operated in
a pure analog control mode by grounding pins 14–25.
This method allows the MAX19791 to be pin compatible
with the MAX19790.
The device also contains a mode control pin (Table 4),
along with UP and DWN controls (Table 5). When MODE
is 0, the contents of register 0 get loaded into the 10-bit
DAC register and set the value of the on-chip DAC. In this
condition, the UP and DWN control pins have no effect on
Maxim Integrated
17
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
the part. In MODE 1, the effective DAC code fed to the
10-bit DAC register is equal to:
SPI Interface
Thedevicecanbecontrolledwitha4-wire, SPI-compatible
serial interface. Figure 2 shows a timing diagram for the
interface. In the write mode, a 13-bit word is loaded into
the device through the DIN pin, with CS set low. The first
bit of the word in the write mode is 0, and the next two
bits select the register to be written to (Table 2). The
next 10 bits contain the data to be written to the selected
register. After the 13 bits are shifted in, a low-to-high CS
command is applied and this latches the 10 bits into the
selected register. The entire write command is ignored if
CS is pulsed low to high before the last data bit is suc-
cessfully captured.
m x Register 1 - n x Register 2
where m and n are the number of UP and DWN control
steps accumulated, respectively.
After powering up the device, UP and DWN should both
be set to 0 to reset the m and n counters to 0. This results
in a 10-bit all 0 code out of the mathematical block in
Figure 1, and applied to the 10-bit DAC register that
drives the DAC. To increase (decrease) the code using
the UP (DWN) pin, the DWN (UP) pin must be high and
the UP (DWN) pin should be pulsed low to high. The
device is designed to produce no wraparounds when
using UP and DWN stepping so that the DAC code
maxes out at 1023 or goes no lower than 0. See Figure 3
for the UP and DWN control operation.
For the read cycle, the first bit clocked in is a 1 and this
establishes that a register is to be read. The next two
clocked bits form the address of the register to be read
(Table 2). In this read mode, data starts to get clocked
out of the DOUT pin after A0 is captured. The DOUT
pin goes to a high-impedance state after the 10 bits are
transmitted or if CS goes high at any point during the
transmission.
Switching back to MODE = 0 produces the same 10-bit
DAC code as was previously loaded into register 0.
Switching back to MODE = 1 results in the previous
10-bit DAC code from the register 1 and 2 combiner/
multiplier block.
Voltage Reference
The device has an on-chip voltage reference for the DAC
and a provision to operate with an off-chip reference.
Table 6 provides details in selecting the desired reference.
Register 3 is used to set the RDBK_EN register in the
write mode and is used to read back the RDBK_EN reg-
ister and COMP_OUT in the read mode.
Table 1. Attenuator Control Logic States
RDBK_EN
(D9, REG 3)
INTERNAL SWITCH
STATES
DAC_LOGIC
ATTENUATOR
10-BIT DAC
Disabled
S1 = closed
S2, S3, S4 = open
Controlled by an external analog voltage on the
CTRL pin.
0
1
0
0
S1, S3, S4 = open
S2 = closed
Controlled by an on-chip DAC; no voltage is
applied to the CTRL pin.
Enabled
Controlled by an external analog voltage on the
CTRL pin. CTRL is compared with the
DAC output. The comparator drives the
COMP_OUT pin.
Enabled
S1, S3, S4 = closed
S2 = open
(update DAC code
to estimate voltage
on the CTRL pin)
0
1
1
1
Controlled by an on-chip DAC. The DAC output
is connected to the CTRL pin. This state can be
used to test the DAC output. In this condition,
no voltage can be applied to the CTRL pin and
the load on this pin must be > 100kΩ.
S1, S2 = closed
S3, S4 = open
Enabled
Maxim Integrated
18
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Table 2. Address Data Bits
R/W
A1
A0
0
DESCRIPTION
0
0
Write to register 0 using DIN
Write to register 1 using DIN
Write to register 2 using DIN
Write to register 3 using DIN
0
0
1
0
1
0
0
1
1
1
0
0
Read from register 0 using DOUT
Read from register 1 using DOUT
Read from register 2 using DOUT
Read from register 3 using DOUT
1
0
1
1
1
0
1
1
1
Table 3. Register Definitions
D9
REGISTER 0 (Read/Write Bits, 10-Bit DAC Code)
DAC MSB
D8
D7
D6
D5
—
—
—
D4
—
—
—
D3
—
—
—
D2
—
—
—
D1
—
—
—
D0
—
—
—
DAC LSB
REGISTER 1 (Read/Write Bits, 10-Bit Step-Up Code)
Step-up MSB
REGISTER 2 (Read/Write Bits, 10-Bit Step-Down Code)
—
—
—
Step-up LSB
Step-down LSB
Step-down MSB
—
—
—
REGISTER 3 (Write Bits)*
not
used
set = 0
not
used
set = 0
not
used
set = 0
not
used
set = 0
not
used
set = 0
not
used
set = 0
not
used
set = 0
not used set
= 0
RDBK_EN
not used set = 0
not used set = 0
REGISTER 3 (Read Bits)**
RDBK_EN COMP_OUT
not
used
not
used
not
used
not
used
not
used
not
used
not
used
set = 0
set = 0
set = 0
set = 0
set = 0
set = 0
set = 0
*RDBK_EN = Enable bit for the voltage comparator that drives the COMP_OUT pin.
**RDBK_EN = Enable bit for the voltage comparator that drives the COMP_OUT pin.
COMP_OUT = Read logic level of COMP_OUT pin.
DIN DOUT
REGISTER 0
MODE
UP
OR
10-BIT DAC REGISTER
m
n
REGISTER 1
m x REGISTER 1 - n x REGISTER 2
m = NUMBER OF UP PULSES
n = NUMBER OF DOWN PULSES
REGISTER 2
REGISTER 3
DOWN
RESET TO ALL ZEROS WHEN UP/DOWN
PULSED TOGETHER
Figure 1. Register Configuration Diagram
Maxim Integrated
19
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Table 4. Attenuator-Mode Control Logic State
MODE PIN
ATTENUATOR
SPI-mode control (the DAC code is located in register 0).
0
Step-mode control using the UP and DWN pins (the step-up code is located in register 1 and the step-down
code is located in register 2).
1
Table 5. Step-Mode Logic State (MODE = 1)
UP
DWN
ATTENUATOR
Logic 0
Logic 0
Reset the DAC for the minimum attenuation state (DAC code = 0000000000).
Increase the DAC code* by the amount located in register 1.
UP is pulsed from high to low to high (see Figure 3).
Logic 0 pulse
Logic 1
Logic 1
Decrease the DAC code* by amount located in register 2.
DWN is pulsed from high to low to high (see Figure 3).
Logic 0 pulse
*Continued UP or DWN stepping results in saturation (no code wrapping).
Table 6. REF_SEL Logic State
REF_SEL
DAC REFERENCE
0
1
Uses an on-chip DAC reference.
User provides off-chip DAC reference voltage on REF_IN pin.
SPI Interface Programming
DIN
R/W A1 A0
D[9:0] TO REGISTER 0, 1, 2, 3
1
HIGH-
IMPEDANCE
HIGH-
IMPEDANCE
UP
D[9:0] FROM REGISTER 0, 1, 2, 3
DOUT
CLK
0
1
t
t
CH
CS
DWN
0
t
EWS
CS
NO DAC
CODE CHANGE
DAC CODE
INCREASED
BY UP STEP
DAC CODE DAC CODE
DECREASED RESET TO
BY DWN STEP ALL 0's
t
ES
t
CW
t
EW
Figure 2. SPI Timing Diagram
Figure 3. UP/DWN Control Diagram (MODE = 1)
Maxim Integrated
20
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Layout Considerations
A properly designed PCB is an essential part of any RF/
microwave circuit. Keep RF signal lines as short as pos-
sible to reduce losses, radiation, and inductance. For best
performance, route the ground-pin traces directly to the
exposed pad underneath the package. This pad MUST
be connected to the ground plane of the board by using
multiple vias under the device to provide the best RF and
thermal conduction path. Solder the exposed pad on the
bottom of the device package to a PCB. Pins 4 and 31
for the MAX19791 have no internal connection. These two
pins are in place to support the MAX19794 part in the fam-
ily. The MAX19794 requires an additional bypass capaci-
tor on each of these pins for proper operation. If desired
to have a common layout to support the MAX19794, then
include these capacitors in the common layout. Refer to
the MAX19794 data sheet for details.
Table 7. Typical Application Circuit
Component Values
DESIGNATION QTY
DESCRIPTION
3900pF Q10%, 50V X7R ceramic
capacitors (0402)
C1, C2, C4
3
1
5
1
3900pF Q10%, 50V X7R ceramic
capacitor (0402)
Not installed for two attenuators
in cascade.
C3
1000pF Q5%, 50V C0G ceramic
capacitors (0402)
C5–C9
C12
120pF Q5%, 50V C0G ceramic
capacitor (0402)
Provides some external noise
filtering along with R3.
Power-Supply Bypassing
Not installed, 4.7pF capacitor
could be used to reduce any
potential rise time glitching when
the comparator changes state.
Proper voltage-supply bypassing is essential for high-
C13
0
2
frequency circuit stability. Bypass each V
pin with
CC
capacitors placed as close as possible to the device.
Place the smallest capacitor closest to the device. See
the Typical Application Circuit and Table 7 for details.
R1, R2
10I Q5% resistors* (0402)
200I Q5% resistor (0402)
Exposed Pad RF and
Thermal Considerations
Use this resistor to provide some
lowpass noise filtering when used
with C12. The value of R3 slows
down the response time. R3 also
provides protection for the device
R3
U1
1
1
The exposed pad (EP) of the device’s 36-pin TQFN pack-
age provides a low thermal-resistance path to the die. It
is important that the PCB on which the IC is mounted be
designed to conduct heat from this contact.
in case V
is applied without
CTRL
V
present.
CC
In addition, provide the EP with a low-inductance RF
ground path for the device. The EP must be soldered to
a ground plane on the PCB, either directly or through an
array of plated via holes. Soldering the pad to ground is
also critical for efficient heat transfer. Use a solid ground
plane wherever possible.
Maxim MAX19791
*Add two additional 10I series resistors between V ’s lead-
CC
ing to C5 and C6, unless a V
power plane is used.
CC
Maxim Integrated
21
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Typical Application Circuit
V
CC
C9
CS DOUT DIN CLK UP DWN
27
26
25
24
23
22
21
20
19
MODE
GND
OUT_B
GND
28
29
30
31
18
17
16
15
14
13
12
11
10
MODE
MAX19791
C4
R2
COMP_OUT
DAC_LOGIC
REF_SEL
REF_IN
EP
RFOUT_B
COMP_OUT
DAC_LOGIC
REF_SEL
REF_IN
C13
S3
S2
S4
N.C.
ATTEN_B
V
CC
DAC
ATTENUATION-
CONTROL
CIRCUITRY
V
CC
32
33
34
S1
V
CC
V
CC
C8
C6
GND
GND
IN_B
GND
C7
GND
CTRL
GND
C3
R3
ATTEN_A
35
36
V
CTRL
RF_AB
C12
C2
1
2
3
4
5
6
7
8
9
R1
C1
RFIN_A
V
CC
C5
NOTE:
FOR ATTENUATOR A ONLY CONFIGURATION, REMOVE C3 AND MOVE C2 DIAGONALLY TO CONNECT
PIN 2 TO THE OUTPUT CONNECTION RF_AB.
FOR ATTENUATOR B ONLY CONFIGURATION, REMOVE C2.
FOR CASCADED CONFIGURATION, REMOVE C3 AND USE C2 TO CONNECT OUT_A TO IN_B.
Maxim Integrated
22
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Ordering Information
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PART
TEMP RANGE
-40NC to +100NC
-40NC to +100NC
PIN-PACKAGE
36 TQFN-EP*
36 TQFN-EP*
MAX19791ETX+
MAX19791ETX+T
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
T = Tape and reel.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
36 TQFN-EP
T3666+2
21-0141
90-0049
Chip Information
PROCESS: SiGe BiCMOS
Maxim Integrated
23
MAX19791
50MHz to 4000MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
2
8/12
Initial release
—
5
10/12
5/15
Updated Electrical Characteristics Table
Removed military reference from Applications
1
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
24
©
2015 Maxim Integrated
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
相关型号：
MAX19791ETX+T
Analog Circuit, 1 Func, BICMOS, 6 X 6 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, TQFN-36
MAXIM
MAX19791_V01
50MHz to 4000MHz Dual Analog Voltage Variable 50MHz to 4000MHz Dual Analog Voltage Variable
MAXIM
MAX19792
500MHz to 4000MHz Dual Analog Voltage Variable Attenuator with On-Chip 10-Bit SPI-Controlled DAC
MAXIM
MAX19793
1500MHz to 6000MHz Dual Analog Voltage Variable Attenuator with On-Chip 10-Bit SPI-Controlled DAC
MAXIM
MAX19793ETX+
Analog Circuit, 1 Func, BICMOS, 6 X 6 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, TQFN-36
MAXIM
MAX19794
10MHz to 500MHz Dual Analog Voltage Variable Attenuator with On-Chip 10-Bit SPI-Controlled DAC
MAXIM
MAX19794ETX
10MHz to 500MHz Dual Analog Voltage Variable Attenuator with On-Chip 10-Bit SPI-Controlled DAC
MAXIM
MAX19794ETXT
10MHz to 500MHz Dual Analog Voltage Variable Attenuator with On-Chip 10-Bit SPI-Controlled DAC
MAXIM
©2020 ICPDF网 联系我们和版权申明