MAX1909ETI-T [MAXIM]
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| 型号： | MAX1909ETI-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
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19-2805; Rev 2; 9/04
Multichemistry Battery Chargers with Automatic
System Power Selector
General Description
Features
✕ ±0.5% Accurate Charge Voltage (0°C to +85°C)
The MAX1909/MAX8725 highly integrated control ICs
simplify construction of accurate and efficient multi-
chemistry battery chargers. The MAX1909/MAX8725
use analog inputs to control charge current and volt-
age, and can be programmed by a host microcontroller
(µC) or hardwired. High efficiency is achieved through
use of buck topology with synchronous rectification.
✕ ±3% Accurate Input Current Limiting
✕ ±5% Accurate Charge Current
✕ Programmable Charge Current >4A
✕ Automatic System Power-Source Selection
✕ Analog Inputs Control Charge Current and
Charge Voltage
✕ Monitor Outputs for
The maximum current drawn from the AC adapter is pro-
grammable to avoid overloading the AC adapter when
supplying the load and the battery charger simultane-
ously. The MAX1909/MAX8725 provide a digital output
that indicates the presence of an AC adapter, and an
analog output that monitors the current drawn from the
AC adapter. Based on the presence or absence of the
AC adapter, the MAX1909/MAX8725 automatically select
the appropriate source for supplying power to the sys-
tem by controlling two external p-channel MOSFETs.
Under system control, the MAX1909/MAX8725 allow the
battery to undergo a relearning or conditioning cycle in
which the battery is completely discharged through the
system load and then recharged.
Current Drawn from AC Input Source
AC Adapter Presence
✕ Up to 17.65V (max) Battery Voltage
✕ Maximum 28V Input Voltage
✕ Greater than 95% Efficiency
✕ Charge Any Battery Chemistry: Li+, NiCd, NiMH,
Lead Acid, etc.
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 Thin QFN
28 Thin QFN
28 Thin QFN
28 Thin QFN
MAX1909ETI
MAX1909ETI+
MAX8725ETI
MAX8725ETI+
The MAX1909 includes a conditioning charge feature
while the MAX8725 does not. The MAX1909/MAX8725
are available in space-saving 28-pin, 5mm ✕ 5mm thin
QFN packages and operate over the extended -40°C to
+85°C temperature range. The MAX1909/MAX8725 are
now available in lead-free packages.
+
Denotes lead-free package.
Minimum Operating Circuit
P3
TO
0.01Ω
EXTERNAL LOAD
AC ADAPTER: INPUT
Applications
SRC
Notebook and Subnotebook Computers
Hand-Held Data Terminals
CSSP
CSSN
DHIV
PDS
SRC
PDL
P2
DCIN
Pin Configuration
MAX1909
MAX8725
LDO
VCTL
ICTL
TOP VIEW
LDO
MODE
DLOV
DHI
28 27
26
25 24 23
22
ACIN
P1
LDO
IINP
REF
IINP
CLS
DCIN
LDO
1
2
3
4
5
6
7
21 DLOV
20
19
DLO
ACOK
ACIN
PGND
LDO
N1
DLO
10µH
REF
18 CSIP
17 CSIN
MAX1909
MAX8725
GND/PKPRES
ACOK
PGND
CSIP
PKPRES
MAX8725 ONLY
16
BATT
0.015Ω
MODE
15 GND
CCV
CCI
CSIN
8
9
10 11 12 13
14
BATT
GND
CCS
REF
THIN QFN
Functional Diagrams appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Multichemistry Battery Chargers with Automatic
System Power Selector
ABSOLUTE MAXIMUM RATINGS
DCIN, CSSP, CSSN, SRC, ACOK to GND..............-0.3V to +30V
DHIV ........................................................…SRC + 0.3, SRC - 6V
DLOV to LDO.........................................................-0.3V to +0.3V
DLO to PGND..........................................-0.3V to (DLOV + 0.3V)
LDO Short-Circuit Current...................................................50mA
DHI, PDL, PDS to GND...............................-0.3V to (V
+ 0.3)
SRC
BATT, CSIP, CSIN to GND .....................................-0.3V to +20V
CSIP to CSIN or CSSP to CSSN or PGND to GND ...-0.3V to +0.3V
CCI, CCS, CCV, DLO, IINP, REF,
Continuous Power Dissipation (T = +70°C)
A
28-Pin TQFN (derate 20.8mW/°C above +70°C) .......1666mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ACIN to GND........................................-0.3V to (V
DLOV, VCTL, ICTL, MODE, CLS, LDO,
+ 0.3V)
LDO
PKPRES to GND...................................................-0.3V to +6V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
CHARGE VOLTAGE REGULATION
VCTL Range
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0
3.6
V
V
= 3.6V (3 or 4 cells);
VCTL
-0.8
+0.8
not including VCTL resistor tolerances
V
= 3.6V/20 (3 or 4 cells); not including
VCTL
-0.8
-1.0
-0.5
+0.8
+1.0
+0.5
VCTL resistor tolerances
Battery Regulation Voltage
Accuracy
%
V
= 3.6V (3 or 4 cells); including VCTL
VCTL
resistor tolerances of 1%
V
= V (3 or 4 cells, default
VCTL
LDO
threshold of 4.2V/cell)
V
Default Threshold
V
V
V
rising
= 3V
4.1
0
4.3
2.5
12
V
VCTL
VCTL
VCTL
DCIN
VCTL Input Bias Current
CHARGE-CURRENT REGULATION
ICTL Range
µA
= 0, V
= 5V
0
VCTL
MAX1909
MAX8725
0
0
3.6
3.2
V
CSIP-to-CSIN Full-Scale Current-
Sense Voltage
69.37
-7.5
-5
75.00
80.63
+7.5
+5
mV
MAX1909: V
resistor tolerances)
= 3.6V (not including ICTL
ICTL
MAX8725: V = 3.2V (not including ICTL
ICTL
resistor tolerances)
MAX1909: V = 3.6V x 0.5, MAX8725:
ICTL
Charge-Current Accuracy
V
= 3.2V x 0.5 (not including ICTL
-5
+5
%
ICTL
resistor tolerances)
MAX1909: V = 0.9V (not including ICTL
resistor tolerances)
ICTL
-7.5
-30
+7.5
+30
MAX8725: V = 0.18V (not including
ICTL
ICTL resistor tolerances)
2
_______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX1909: V
= 3.6V x 0.5, MAX8725:
ICTL
V
= 3.2V x 0.5 (including ICTL resistor
-7.0
+7.0
ICTL
Charge-Current Accuracy
%
tolerances of 1%)
V
V
= V
-5
+5
ICTL
ICTL
LDO (default threshold of 45mV)
rising
V
Default Threshold
4.1
4.2
4.3
V
V
ICTL
BATT/CSIP/CSIN Input Voltage
Range
0
19
Charging enabled
Charging disabled; V
MAX1909
350
0.1
650
1
CSIP/CSIN Input Current
µA
V
= 0 or V
= 0
ICTL
DCIN
0.75
0.06
ICTL Power-Down Mode
Threshold Voltage
MAX8725
MAX1909
0.85
0.11
-1
ICTL Power-Up Mode Threshold
Voltage
V
MAX8725
V
V
= 3V
+1
+1
ICTL
ICTL Input Bias Current
µA
= 0V, V
= 5V
ICTL
-1
DCIN
INPUT CURRENT REGULATION
CSSP-to-CSSN Full-Scale
Current-Sense Voltage
72.75
75.00
77.25
mV
%
V
V
V
= REF
-3
-3
+3
+3
+4
28
CLS
CLS
CLS
Input Current-Limit
Accuracy
= REF x 0.75
= REF x 0.5
-4
CSSP/CSSN Input Voltage Range
CSSP/CSSN Input Current
8.0
V
V
V
= V
= 0
= V
> 8.0V
450
0.1
730
1
CSSP
DCIN
CSSN
DCIN
µA
CLS Input Range
1.6
-1
REF
+1
3.3
V
CLS Input Bias Current
IINP Transconductance
V
V
V
= 2.0V
µA
CLS
- V
= 56mV
2.7
3.0
mA/V
CSSP
CSSN
CSSN
- V
= 75mV, terminated with
= 56mV, terminated with
= 20mV, terminated with
CSSP
-7.5
-5
+7.5
+5
10kΩ
V
10kΩ
- V
- V
CSSP
CSSN
CSSN
IINP Accuracy
%
V
10kΩ
CSSP
-10
+10
IINP Output Current
IINP Output Voltage
V
V
- V
- V
= 150mV, V
= 150mV, V
= 0V
350
3.5
µA
V
CSSP
CSSP
CSSN
IINP
= float
CSSN
IINP
_______________________________________________________________________________________
3
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range
V
8.0
7
28
V
V
DCIN
DCIN falling
DCIN rising
7.4
7.5
2.7
0.1
0.1
200
5.4
80
DCIN Undervoltage-Lockout Trip
Point
7.85
6
DCIN Quiescent Current
I
I
8.0V < V
< 28V
DCIN
mA
DCIN
V
V
V
= 19V, V
= 0V, or ICTL = 0V
= 19V, ICTL = 0V
1
BATT
BATT
BATT
DCIN
BATT Input Current
µA
= 16.8V, V
1
BATT
DCIN
= 2V to 19V, V
> V
+ 0.3V
BATT
500
5.55
115
DCIN
LDO Output Voltage
LDO Load Regulation
8.0V < V
< 28V, no load
5.25
3.20
V
DCIN
0 < I
< 10mA
mV
LDO
LDO Undervoltage-Lockout Trip
Point
V
= 8.0V
4
5.15
V
DCIN
REFERENCE
REF Output Voltage
Ref
0 < I
< 500µA
4.2023 4.2235 4.2447
V
V
REF
REF Undervoltage-Lockout Trip
Point
REF falling
3.1
3.9
TRIP POINTS
BATT POWER_FAIL Threshold
V
- V
, V
falling
50
100
200
150
300
mV
mV
DCIN
BATT DCIN
BATT POWER_FAIL Threshold
Hysteresis
100
ACIN Threshold
ACIN rising
2.007
10
2.048
20
2.089
30
V
ACIN Threshold Hysteresis
ACIN Input Bias Current
SWITCHING REGULATOR
DHI Off-Time
mV
µA
V
= 2.048V
-1
+1
ACIN
V
V
= 16.0V, V
= 16.0V, V
= 19V, V
= 17V, V
= 3.6V
= 3.6V
360
260
400
300
5
440
350
10
ns
ns
µA
BATT
BATT
DCIN
MODE
DHI Minimum Off-Time
DLOV Supply Current
DCIN
MODE
I
DLO low
DLOV
Sense Voltage for Minimum
Discontinuous Mode Ripple
Current
7.5
mV
Cycle-by-Cycle Current-Limit
Sense Voltage
97
mV
mV
Sense Voltage for Battery
Undervoltage Charge Current
MAX1909 only, BATT = 3.0V per cell
3
4.5
6
MAX1909 only, MODE = float (3 cell),
rising
9.18
9.42
V
BATT
Battery Undervoltage Threshold
DHIV Output Voltage
V
V
MAX1909 only, MODE = LDO (4 cell),
rising
12.235
-4.5
12.565
-5.5
V
BATT
With respect to SRC
-5.0
4
_______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
DHIV Sink Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
10
mA
Ω
DHI On-Resistance Low
DHI On-Resistance High
DLO On-Resistance High
DLO On-Resistance Low
ERROR AMPLIFIERS
DHI = V
DHI = V
, I
= -10mA
= 10mA
2
2
3
1
5
4
7
3
DHIV DHI
, I
Ω
CSSN DHI
V
V
= 4.5V, I
= 4.5V, I
= +100mA
Ω
DLOV
DLOV
DLO
= -100mA
Ω
DLO
VCTL = 3.6, V
VCTL = 3.6, V
= 16.8V, MODE = LDO
0.0625
0.0833
0.125 0.2500
0.167 0.3330
BATT
GMV Loop Transconductance
mA/V
= 12.6V, MODE = FLOAT
BATT
MAX1909: ICTL = 3.6V, MAX8725: V
=
ICTL
GMI Loop Transconductance
GMS Loop Transconductance
CCI/CCS/CCV Clamp Voltage
0.5
0.5
150
1
1
2
2
mA/V
mA/V
mV
3.2V, V
- V
= 75mV
CSSP
CSIN
V
= 2.048V, V
- V
= 75mV
CLS
CSSP
CSSN
0.25V < V
0.25V < V
< 2.0V, 0.25V < V
< 2.0V
< 2.0V,
CCI
CCV
CCS
300
600
LOGIC LEVELS
MODE Input Low Voltage
MODE Input Middle Voltage
MODE Input High Voltage
MODE Input Bias Current
ACOK AND PKPRES
ACOK Input Voltage Range
ACOK Sink Current
0.8
2.0
V
V
1.6
2.8
-2
1.8
V
MODE = 0V or 3.6V
+2
28
µA
0
1
V
V
V
= 0.4V, ACIN = 1.5V
= 28V, ACIN = 2.5V
mA
µA
ACOK
ACOK
ACOK Leakage Current
1
PKPRES Input Voltage
Range
0
LDO
+1
V
PKPRES Input Bias Current
-1
55
µA
PKPRES Battery Removal Detect
Threshold
% of
LDO
MAX8725, PKPRES rising
PKPRES Hysteresis
MAX8725
1
%
PDS, PDL SWITCH CONTROL
PDS Switch Turn-Off Threshold
PDS Switch Threshold Hysteresis
V
V
- V
- V
, V
falling
50
100
200
150
300
mV
mV
DCIN
DCIN
BATT DCIN
100
BATT
PDS Output Low Voltage, PDS
Below SRC
I
= 0A
8
10
12
V
PDS
PDS Turn-On Current
PDS = SRC
6
12
50
mA
mA
mV
mV
PDS Turn-Off Current
V
V
V
= V
- 2V, V = 16V
DCIN
10
PDS
SRC
PDL Switch Turn-On Threshold
PDL Switch Threshold Hysteresis
- V
, V
falling
50
100
200
150
300
DCIN
DCIN
BATT DCIN
- V
100
BATT
_______________________________________________________________________________________
5
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
MAX
150
PARAMETER
PDL Turn-On Resistance
PDL Turn-Off Current
SYMBOL
CONDITIONS
MIN
50
6
TYP
100
12
UNITS
kΩ
PDL = GND
V
- V
= 1.5V
mA
SRC
PDL
SRC = 19V, DCIN = 0V
SRC = 19, V = 16V
1
SRC Input Bias Current
µA
µs
450
5
1000
BATT
Delay Time Between PDL and
PDS Transitions
2.5
7.5
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = -40°C to +85°C, unless otherwise noted.)
A
PARAMETER
CHARGE VOLTAGE REGULATION
VCTL Range
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0
3.6
V
V
= 3.6V (3 or 4 cells); not including
VCTL
-0.8
+0.8
VCTL resistor tolerances
V
= 3.6V/20 (3 or 4 cells); not including
VCTL
-0.8
-1.0
-0.8
+0.8
+1.0
+0.8
VCTL resistor tolerances
Battery Regulation Voltage
Accuracy
%
V
= 3.6V (3 or 4 cells); including VCTL
VCTL
resistor tolerances of 1%
V
= V (3 or 4 cells, default
VCTL
LDO
threshold of 4.2V/cell)
V
Default Threshold
V
V
V
rising
= 3V
4.1
0
4.3
2.5
12
V
VCTL
VCTL
VCTL
DCIN
VCTL Input Bias Current
CHARGE-CURRENT REGULATION
ICTL Range
µA
= 0V, V
= 5V
0
VCTL
MAX1909
MAX8725
0
0
3.6
3.2
V
CSIP-to-CSIN Full-Scale Current-
Sense Voltage
69.37
-7.5
-5
80.63
+7.5
+5
mV
MAX1909: V
resistor tolerances)
= 3.6V (not including ICTL
ICTL
MAX8725: V = 3.2V (not including ICTL
ICTL
resistor tolerances)
MAX1909: V = 3.6V x 0.5, MAX8725:
ICTL
Charge-Current Accuracy
V
= 3.2V x 0.5 (not including ICTL
-5
+5
%
ICTL
resistor tolerances)
MAX1909: V = 0.9V (not including ICTL
resistor tolerances)
ICTL
-7.5
-30
+7.5
+30
MAX8725: V = 0.18V (not including
ICTL
ICTL resistor tolerances)
6
_______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = -40°C to +85°C, unless otherwise noted.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
+7.0
+5
UNITS
MAX1909: V
= 3.6V x 0.5, MAX8725:
ICTL
V
= 3.2V x 0.5 (including ICTL resistor
tolerances of 1%)
-7.0
ICTL
Charge-Current Accuracy
%
V
V
= V
-5
ICTL
ICTL
LDO (default threshold of 45mV)
rising
V
Default Threshold
4.3
V
V
ICTL
BATT/CSIP/CSIN Input Voltage
Range
0
19
CSIP/CSIN Input Current
Charging enabled
MAX1909
650
0.75
0.06
µA
V
ICTL Power-Down Mode
Threshold Voltage
MAX8725
MAX1909
0.85
0.11
ICTL Power-Up Mode Threshold
Voltage
V
MAX8725
INPUT CURRENT REGULATION
CSSP-to-CSSN Full-Scale
Current-Sense Voltage
72.75
77.25
mV
%
V
V
V
= REF
-3
-3
+3
+3
CLS
CLS
CLS
Input Current-Limit Accuracy
= REF x 0.75
= REF x 0.5
-4
+4
CSSP/CSSN Input Voltage Range
CSSP/CSSN Input Current
CLS Input Range
8.0
28
V
µA
V
= V
= V > 8.0V
DCIN
730
REF
3.3
CSSP
CSSN
1.6
2.7
V
IINP Transconductance
V
V
10kΩ
- V
- V
= 56mV
mA/V
CSSP
CSSP
CSSN
= 75mV, terminated with
= 56mV, terminated with
= 20mV, terminated with
CSSN
-7.5
-5
+7.5
+5
V
10kΩ
- V
CSSP
CSSN
CSSN
IINP Accuracy
%
V
10kΩ
- V
CSSP
-10
+10
IINP Output Current
IINP Output Voltage
V
V
- V
- V
= 150mV, V
= 150mV, V
= 0V
350
3.5
µA
V
CSSP
CSSP
CSSN
IINP
= float
CSSN
IINP
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range
V
8.0
7
28
V
V
DCIN
DCIN falling
DCIN rising
DCIN Undervoltage-Lockout Trip
Point
7.85
6
DCIN Quiescent Current
BATT Input Current
I
I
8.0V < V
< 28V
DCIN
mA
µA
V
DCIN
V
= 2V to 19V, V
> V + 0.3V
BATT
500
5.55
115
BATT
BATT
DCIN
LDO Output Voltage
LDO Load Regulation
8.0V < V
< 28V, no load
5.25
DCIN
0 < I
< 10mA
mV
LDO
_______________________________________________________________________________________
7
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = -40°C to +85°C, unless otherwise noted.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LDO Undervoltage-Lockout Trip
Point
V
= 8.0V
3.20
5.15
V
DCIN
REFERENCE
REF Output Voltage
Ref
0 < I
< 500µA
4.1960
4.2520
3.9
V
V
REF
REF Undervoltage-Lockout Trip
Point
REF falling
TRIP POINTS
BATT POWER_FAIL Threshold
V
- V , V falling
BATT DCIN
50
150
300
mV
mV
DCIN
BATT POWER_FAIL Threshold
Hysteresis
100
ACIN Threshold
ACIN rising
2.007
10
2.089
30
V
ACIN Threshold Hysteresis
SWITCHING REGULATOR
DHI Off-Time
mV
V
V
= 16.0V, V
= 16.0V, V
= 19V, V
= 17V, V
= 3.6V
= 3.6V
360
260
440
350
10
ns
ns
µA
BATT
BATT
DCIN
MODE
MODE
DHI Minimum Off-Time
DLOV Supply Current
DCIN
I
DLO low
DLOV
Sense Voltage for Battery
Undervoltage Charge Current
MAX1909 only, BATT = 3.0V per cell
3
6
mV
MAX1909 only, MODE = float (3 cell),
9.18
9.42
V
rising
BATT
Battery Undervoltage Threshold
V
MAX1909 only, MODE = LDO (4 cell),
rising
12.235
12.565
-5.5
V
BATT
DHIV Output Voltage
DHIV Sink Current
With respect to SRC
-4.5
10
V
mA
Ω
DHI On-Resistance Low
DHI On-Resistance High
DLO On-Resistance High
DLO On-Resistance Low
ERROR AMPLIFIERS
DHI = V
DHI = V
, I
= -10mA
= 10mA
5
4
7
3
DHIV DHI
, I
Ω
CSSN DHI
V
V
= 4.5V, I
= +100mA
= -100mA
Ω
DLOV
DLOV
DLO
= 4.5V, I
Ω
DLO
VCTL = 3.6, V
VCTL = 3.6, V
= 16.8V, MODE = LDO
0.0625
0.0833
0.2500
0.3330
BATT
GMV Loop Transconductance
mA/V
= 12.6V, MODE = FLOAT
BATT
MAX1909: ICTL = 3.6V, MAX8725: V
=
ICTL
GMI Loop Transconductance
GMS Loop Transconductance
CCI/CCS/CCV Clamp Voltage
0.5
0.5
150
2.0
2.0
600
mA/V
mA/V
mV
3.2V, V
- V
= 75mV
CSSP
CSIN
V
= 2.048V, V
- V = 75mV
CSSN
CLS
CSSP
0.25V < V
0.25V < V
< 2.0V, 0.25V < V
< 2.0V
< 2.0V,
CCI
CCV
CCS
LOGIC LEVELS
MODE Input Low Voltage
MODE Input Middle Voltage
0.8
2.0
V
V
1.6
8
_______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 18V, V
= V
= V
= 12V, V
= V
= 1.8V, MODE = float, ACIN = 0, CLS =
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
ICTL
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, T = -40°C to +85°C, unless otherwise noted.)
A
PARAMETER
MODE Input High Voltage
ACOK AND PKPRES
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2.8
V
ACOK Input Voltage Range
ACOK Sink Current
0
1
0
28
V
mA
V
V
= 0.4V, ACIN = 1.5V
ACOK
PKPRES Input Voltage Range
LDO
PKPRES Battery Removal Detect
Threshold
% of
LDO
MAX8725, PKPRES rising
55
PDS, PDL SWITCH CONTROL
PDS Switch Turn-Off Threshold
PDS Switch Threshold Hysteresis
V
V
- V
- V
, V
falling
50
150
300
mV
mV
DCIN
DCIN
BATT DCIN
100
BATT
PDS Output Low Voltage, PDS
Below SRC
I
= 0A
8
12
V
PDS
PDS Turn-On Current
PDS = SRC
6
10
50
100
50
6
mA
mA
mV
mV
kΩ
PDS Turn-Off Current
V
V
V
= V
- 2V, V
= 16V
PDS
SRC
DCIN
PDL Switch Turn-On Threshold
PDL Switch Threshold Hysteresis
PDL Turn-On Resistance
PDL Turn-Off Current
- V
- V
, V
falling
150
300
150
DCIN
DCIN
BATT DCIN
BATT
PDL = GND
- V
V
= 1.5V
PDL
mA
µA
SRC
SRC Input Bias Current
SRC = 19, V
= 16V
1000
BATT
Note 1: Guaranteed by design. Not production tested.
Typical Operating Characteristics
(Circuit of Figure 2, V
= 20V, charge current = 3A, 4 Li+ series cells, T = +25°C, unless otherwise noted.)
A
DCIN
BATTERY INSERTION
AND REMOVAL RESPONSE
SYSTEM LOAD-TRANSIENT RESPONSE
MAX1909/MAX8725 toc01
MAX1909/MAX8725 toc02
5A
I
SYSTEMLOAD
17V
16V
0A
V
BATT
5A
5A/div
I
IN
I
BATT
0A
5A
V
0A
CCV
I
BATT
I
IN
0A
3V
2V
1V
0A 5A/div
CCS
3V
2V
V
CCV
V
CCI
V
CCI
V
, V
CCI CCV
V
CCI
V
CCV
1V
0V
CCI
V
V
0V
CCI
CCS
500µs/div
100µs/div
_______________________________________________________________________________________
9
Multichemistry Battery Chargers with Automatic
System Power Selector
Typical Operating Characteristics (continued)
(Circuit of Figure 2, V
= 20V, charge current = 3A, 4 Li+ series cells, T = +25°C, unless otherwise noted.)
A
DCIN
LINE-TRANSIENT RESPONSE
LDO LOAD REGULATION
MAX1909/MAX8725 toc03
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
30V
DCIN
20V
V
INDUCTOR CURRENT
200mA/div
3A
V
AC-COUPLED
BATT
200mV/div
1.8V
V
CCV
1.6V
500µs/div
0
1
2
3
4
5
6
7
8
9
10
LDO CURRENT (mA)
LDO LINE REGULATION
REF LOAD REGULATION
0.10
0.05
0
0
-0.02
-0.04
-0.06
-0.08
-0.10
-0.12
-0.14
-0.05
-0.10
0
10
20
30
0
200
400
600
800
1000
INPUT VOLTAGE (V)
REF CURRENT (µA)
EFFICIENCY vs. CHARGE CURRENT
REF vs. TEMPERATURE
100
98
96
94
92
90
88
86
84
82
80
0.10
0.05
0
4 CELLS
3 CELLS
-0.05
-0.10
-0.15
-0.20
-40
0
0.5
1.0
1.5
2.0
2.5
3.0
-15
10
35
60
85
CHARGE CURRENT (A)
TEMPERATURE (°C)
10 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Typical Operating Characteristics (continued)
(Circuit of Figure 2, V
= 20V, charge current = 3A, 4 Li+ series cells, T = +25°C, unless otherwise noted.)
A
DCIN
SWITCHING FREQUENCY vs. V - V
IINP ERROR vs. INPUT CURRENT
IN
BATT
500
450
400
350
300
250
200
150
100
50
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
CHARGER
DISABLED
0
0
2
4
6
8
10
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
INPUT CURRENT (A)
V
- V
(V)
IN
BATT
INPUT CURRENT-LIMIT ACCURACY
vs. SYSTEM LOAD
IINP ACCURACY vs. INPUT CURRENT
8
6
4
3
V
= 13V
BATT
V
= 10V
BATT
4
2
2
0
1
V
= 16V
BATT
-2
-4
-6
-8
V
= 12V
BATT
0
I
= 3A
CHARGE
-1
-2
MAX1909 ONLY
0.5 1.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
INPUT CURRENT (A)
1.5
2.0
2.5
3.0
SYSTEM LOAD (A)
INPUT CURRENT-LIMIT ACCURACY
vs. SYSTEM LOAD
INPUT CURRENT-LIMIT ACCURACY vs. V
3
CLS
4
3
2
1
0
2
1
V
= 16V
V
= 12V
BATT
0
BATT
-1
-2
-3
-1
-2
V
= 10V
BATT
V
= 13V
BATT
1.5
2.0
2.5
(V)
3.0
3.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
SYSTEM LOAD (A)
V
CLS
______________________________________________________________________________________ 11
Multichemistry Battery Chargers with Automatic
System Power Selector
Typical Operating Characteristics (continued)
(Circuit of Figure 2, V
= 20V, charge current = 3A, 4 Li+ series cells, T = +25°C, unless otherwise noted.)
A
DCIN
PDL-PDS SWITCHING,
PDS-PDL SWITCHOVER,
AC ADAPTER INSERTION
WALL ADAPTER REMOVAL
MAX1909/MAX8725 toc15
MAX1909/MAX8725 toc16
20V
10V
20V
10V
0V
V
V
V
SYSTEMLOAD
20V
10V
20V
10V
20V
10V
0V
V
WALLADAPTER
PDS
V
PDS
WALLADAPTER
V
V
V
, V
SYSTEMLOAD PDS
SYSTEM LOAD
V
PDL
PDS
V
PDL
20V
10V
0V
, V
PDL BATT
V
V
BATT
PDL
V
PDL
V
SYSTEMLOAD
100µs/div
500µs/div
PDS-PDL SWITCHOVER,
BATTERY INSERTION
PDL-PDS SWITCHING,
BATTERY REMOVAL
MAX1909/MAX8725 toc17
MAX1909/MAX8725 toc18
20V
15V
10V
5V
20V
V
V
V
PDS
SYSTEM
15V
10V
5V
CONDITIONING MODE
WALL ADAPTER = 18V
SYSTEM
CONDITIONING MODE
WALL ADAPTER = 18V
V
PDS
V
PKDET
V
PKPRES
0V
0V
V
PKPRES
V
V
PDL
15V
10V
5V
15V
10V
5V
V
BATT
PDL
BATT
MAX8725 ONLY
V
0V
0V
50µs/div
10µs/div
12 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Pin Description
PIN
1
NAME
DCIN
LDO
FUNCTION
DC Supply Voltage Input. Bypass DCIN with a 1µF capacitor to power ground.
Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass with a 1µF capacitor.
2
AC Detect Input. This uncommitted comparator input can be used to detect the presence of the charger’s
power source. The comparator’s open-drain output is the ACOK signal.
3
4
5
ACIN
REF
4.2235V Voltage Reference. Bypass with a 1µF capacitor to GND.
MAX1909: Ground this pin
GND
PKPRES MAX8725: Pull PKPRES high to disable charging. Used for detecting presence of battery pack.
AC Detect Output. High-voltage open-drain output is high impedance when ACIN is greater than 2.048V. The
ACOK output remains a high impedance when the MAX1909/MAX8725 are powered down.
6
7
ACOK
Trilevel Input for Setting Number of Cells and Asserting the Conditioning Mode:
MODE = GND; asserts conditioning mode.
MODE = float; charge with 3 times the cell voltage programmed at VCTL.
MODE
MODE = LDO; charge with 4 times the cell voltage programmed at VCTL.
Input Current Monitor Output. The current delivered at the IINP output is a scaled-down replica of the system
load current plus the input-referred charge current sensed across CSSP and CSSN inputs. The
transconductance of (CSSP - CSSN) to IINP is 3mA/V.
8
IINP
9
CLS
ICTL
VCTL
CCI
Source Current-Limit Input. Voltage input for setting the current limit of the input source.
Input for Setting Maximum Output Current
10
11
12
13
14
15
16
17
18
19
Input for Setting Maximum Output Voltage
Output Current-Regulation Loop-Compensation Point. Connect 0.01µF to GND.
Voltage-Regulation Loop-Compensation Point. Connect 10kΩ in series with 0.1µF to GND.
Input Current-Regulation Loop-Compensation Point. Use 0.01µF to GND.
Analog Ground
CCV
CCS
GND
BATT
CSIN
CSIP
PGND
Battery Voltage Feedback Input
Output Current-Sense Negative Input
Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
Power Ground
Low-Side Power-MOSFET Driver Output. Connect to low-side NMOS gate. When the MAX1909/MAX8725 are
shut down, the DLO output is LOW.
20
DLO
21
22
DLOV
DHIV
Low-Side Driver Supply. Bypass with a 1µF capacitor to ground.
High-Side Driver Supply. Bypass with a 0.1µF capacitor to SRC.
High-Side Power-MOSFET Driver Output. Connect to high-side PMOS gate. When the MAX1909/MAX8725 are
shut down, the DHI output is HIGH.
23
DHI
24
25
26
SRC
CSSN
CSSP
Source Connection for Driver for PDS/PDL Switches. Bypass SRC to power ground with a 1µF capacitor.
Input Current Sense for Charger (Negative Input)
Input Current Sense for Charger (Positive Input). Connect a current-sense resistor from CSSP to CSSN.
Power-Source PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDS output
is pulled to SRC through an internal 1MΩ resistor.
27
28
PDS
PDL
System-Load PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDL output
is pulled to ground through an internal 100kΩ resistor.
______________________________________________________________________________________ 13
Multichemistry Battery Chargers with Automatic
System Power Selector
P3
RS1
0.01Ω
TO
SYSTEM LOAD
AC ADAPTER
C1
22µF
0.1µF
0.1µF
SRC
OUTPUT VOLTAGE: 12.6V
CHARGE I LIMIT: 3.0A
C22
1µF
CSSP
CSSN
PDS
SRC
DCIN
C17
0.1µF
D4
R6
590kΩ
1%
DHIV
R7
196kΩ
1%
C5
1µF
MAX1909
MAX8725
PDL
LDO
P2
VCTL
ICTL
R4
100kΩ
C13
1µF
LDO
R13
33Ω
OUTPUT
DLOV
DHI
C16
1µF
ACIN
LDO
MODE
P1
(INPUT I LIMIT: 7.5A)
LDO
R8
1MΩ
REF
CLS
ACOK
N1
DLO
PGND
CSIP
TO
HOST
SYSTEM
L1
10µH
LDO
R9
10kΩ
RS2
0.015Ω
PKPRES (MAX8725 ONLY)
CCV
CCI
CSIN
BATT
BATT +
R5
10kΩ
C4
22µF
GND
CCS
REF
C9
0.01µF
C12
1µF
BATTERY
C10
0.01µF
C11
0.1µF
TEMP
GND
BATT -
PGND
GND
Figure 1. Typical Operating Circuit Demonstrating Hardwired Control
14 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
P3
P4
RS1
0.01Ω
TO
SYSTEM LOAD
AC ADAPTER
C1
22µF
0.1µF
0.1µF
SRC
OUTPUT VOLTAGE: 16.8V
C15
1µF
CSSP
CSSN
PDS
SRC
C17
0.1µF
D4
R6
590kΩ
1%
DHIV
R7
196kΩ
1%
DCIN
C5
1µF
MAX1909
MAX8725
PDL
LDO
P2
LDO
VCTL
ICTL
C13
1µF
R13
33Ω
D/A OUTPUT
OPEN-DRAIN
OUTPUTS
DLOV
DHI
C16
1µF
MODE
ACIN
LDO
P1
R8
1MΩ
ACOK
INPUT
PKPRES (MAX8725 ONLY)
IINP
OUTPUT
N1
DLO
L1
10µH
A/D INPUT
(INPUT I LIMIT: 7.5A)
REF
C14
0.1µF
PGND
CSIP
R9
10kΩ
CLS
CCV
R5
10kΩ
RS2
0.015Ω
HOST
C11
0.1µF
LDO
CSIN
BATT
BATT +
CCI
R21
10kΩ
C4
22µF
R19, R20
10kΩ
GND
CCS
REF
AV /REF
DD
SMART
BATTERY
C12
1µF
C9
0.01µF
C10
0.01µF
SCL
SDA
SCL
SDA
TEMP
BATT -
GND
PGND
GND
Figure 2. Smart-Battery Charger Circuit Demonstrating Operation with a Host Microcontroller
______________________________________________________________________________________ 15
Multichemistry Battery Chargers with Automatic
System Power Selector
DCIN
MAX8725 ONLY
PKPRES
LDO
REF
PACK_ON
ICTLOK
RDY
5.4V
LINEAR
REGULATOR
0.9 * LDO
4.2235V
REFERENCE
ACIN
ACOK
CHG
LOGIC
0.8V
BATT
DCIN
GND
2.048V
SRDY
DRIVER
SRC
PDS
GND
CHG
CCS
CLS
SRC-10V
DRIVER
PDL
MODE
100kΩ
GMS
CSSP
CSSN
CSIP
SWITCH LOGIC
LEVEL
SHIFTER
LEVEL
SHIFTER
Gm
IINP
CSIN
SRC
GMI
DRIVER
ICTL
DHI
CCI
DHIV
BATT
MAX1909 ONLY
BATT_UV
LVC
DC-DC
CONVERTER
CELL SELECT
LOGIC AND
3.0V/CELL
GMV
MODE
CCV
BATTERY VOLTAGE-
DIVIDER
DLOV
REF
DRIVER
R
R
DLO
9R
VCTL
MAX1909
MAX8725
PGND
Figure 3. Functional Diagram
16 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Setting the Charge Voltage
Detailed Description
The MAX1909/MAX8725 use a high-accuracy voltage
The MAX1909/MAX8725 include all of the functions
regulator for charge voltage. The VCTL input adjusts
necessary to charge Li+, NiMH, and NiCd batteries. A
the battery output voltage. In default mode (VCTL =
high-efficiency, synchronous-rectified step-down DC-
LDO), the overall accuracy of the charge voltage is
DC converter is used to implement a precision con-
0.5%. VCTL is allowed to vary from 0 to 3.6V, which
stant-current, constant-voltage charger with input
provides a 10% adjustment range of the battery volt-
current limiting. The DC-DC converter uses external
age. Limiting the adjustment range reduces the sensi-
p-channel/n-channel MOSFETs as the buck switch and
tivity of the charge voltage to external resistor
synchronous rectifier to convert the input voltage to the
tolerances from 1% to 0.05%. The overall accuracy
required charge current and voltage. The charge cur-
of the charge voltage is better than 1% when using
rent and input current-limit sense amplifiers have low-
1% resistors to divide down the reference to establish
input-referred offset errors and can use small-value
VCTL. The per-cell battery termination voltage is a func-
sense resistors. The MAX1909/MAX8725 feature a volt-
tion of the battery chemistry and construction. Consult
age-regulation loop (CCV) and two current-regulation
the battery manufacturer to determine this voltage. The
loops (CCI and CCS). The CCV voltage-regulation loop
battery voltage is calculated by the equation:
monitors BATT to ensure that its voltage never exceeds
the voltage set by VCTL. The CCI battery current-regu-
V
−1.8V
9.52
VCTL
lation loop monitors current delivered to BATT to ensure
that it never exceeds the current limit set by ICTL. A
third loop (CCS) takes control and reduces the charge
current when the sum of the system load and the input-
referred charge current exceeds the power source cur-
rent limit set by CLS. Tying CLS to the reference
voltage provides a 7.5A input current limit with a 10mΩ
sense resistor.
V
= CELL V +
REF
BATT
where V
= 4.2235V, and CELL is the number of cells
REF
selected with the MAX1909/MAX8725s’ trilevel MODE
control input. When MODE is tied to the LDO output,
CELL = 4. When MODE is left floating, CELL = 3. When
MODE is tied to ground, the charger enters condition-
ing mode, which is used to isolate the battery from the
charger and discharge it through the system load. See
the Conditioning Mode section. The internal error ampli-
fier (GMV) maintains voltage regulation (see Figure 3
for the Functional Diagram). The voltage-error amplifier
is compensated at CCV. The component values shown
in Figures 1 and 2 provide suitable performance for
most applications. Individual compensation of the volt-
age regulation and current-regulation loops allow for
optimal compensation. See the Compensation section.
The ICTL, VCTL, and CLS analog inputs set the charge
current, charge voltage, and input current limit, respec-
tively. For standard applications, internal set points for
ICTL and VCTL provide a 3A charge current using a
15mΩ sense resistor and a 4.2V per-cell charge volt-
age. The variable for controlling the number of cells is
set with the MODE input. The MAX8725 includes a
PKPRES input used for battery-pack detection.
Based on the presence or absence of the AC adapter,
the MAX1909/MAX8725 automatically provide an open-
drain logic output signal ACOK and select the appropri-
ate source for supplying power to the system. A
p-channel load switch controlled from the PDL output and
a similar p-channel source switch controlled from the PDS
output are used to implement this function. Using the
MODE control input, the MAX1909/MAX8725 can be pro-
grammed to perform a relearning, or conditioning, cycle
in which the battery is isolated from the charger and com-
pletely discharged through the system load. When the
battery reaches 100% depth of discharge, it is recharged
to full capacity.
Setting the Charge Current
The voltage on the ICTL input sets the maximum
voltage across current-sense resistor RS2, which in turn
determines the charge current. The full-scale differen-
tial voltage between CSIP and CSIN is 75mV; thus, for a
0.015Ω sense resistor, the maximum charge current is
5A. In default mode (ICTL = LDO), the sense voltage is
45mV with an overall accuracy of 5%. The charge cur-
rent is programmed with ICTL using the equation:
0.075
RS2
V
ICTL
3.6V
I
=
×
CHG
The circuit shown in Figure 1 demonstrates a simple
hardwired application, while Figure 2 shows a typical
application for smart-battery systems with variable
charge current and source switch configuration that sup-
ports battery conditioning. Smart-battery systems typical-
ly use a host µC to achieve this added functionality.
______________________________________________________________________________________ 17
Multichemistry Battery Chargers with Automatic
System Power Selector
The input range for ICTL is 0 to 3.6V on the MAX1909,
and 0 to 3.2V on the MAX8725. The charger shuts down
if ICTL is forced below 0.75V for the MAX1909 and 0.06V
for the MAX8725. When choosing current-sense resistor
RS2, note that it must have a sufficient power rating to
handle the full-load current. The sense resistor’s I2R
power loss reduces charger efficiency. Adjusting ICTL to
drop the voltage across the current-sense resistor
improves efficiency, but may degrade accuracy due to
the current-sense amplifier’s input offset error. The
charge-current error amplifier (GMI) is compensated at
the CCI pin. See the Compensation section.
Duty cycle affects the accuracy of the input current
limit. AC load current also affects accuracy (see the
Typical Operating Characteristics). Refer to the
MAX1909/MAX8725 EV kit data sheet for more details
on reducing the effects of switching noise.
When choosing the current-sense resistor RS1, carefully
calculate its power rating. Take into account variations
in the system’s load current and the overall accuracy of
the sense amplifier. Note that the voltage drop across
RS1 contributes additional power loss, which reduces
efficiency.
System currents normally fluctuate as portions of the
system are powered up or put to sleep. Without input
current regulation, the input source must be able to
deliver the maximum system current and the maximum
charger input current. By using the input current-limit
circuit, the output current capability of the AC wall
adapter can be lowered, reducing system cost.
Conditioning Charge
The MAX1909 includes a battery voltage comparator
that allows a conditioning charge of overdischarged
Li+ battery packs. If the battery-pack voltage is less
than 3.1V x the number of cells programmed by
CELLS, the MAX1909 charges the battery with 300mA
current when using sense resistor RS2 = 0.015Ω. After
the battery voltage exceeds the conditioning charge
threshold, the MAX1909 resumes full-charge mode,
charging to the programmed voltage and current limits.
The MAX8725 does not provide automatic support for
providing a conditioning charge. To configure the
MAX8725 to provide a conditioning charge current,
ICTL should be directly driven.
Current Measurement
The MAX1909/MAX8725 include an input current monitor
IINP. The current delivered at the IINP output is a scaled-
down replica of the system load current plus the input-
referred charge current that is sensed across CSSP and
CSSN inputs. The output voltage range is 0 to 3V.
The voltage of IINP is proportional to the input current
according to the following equation:
Setting the Input Current Limit
The total input current, from a wall cube or other DC
source, is the sum of the system supply current and the
current required by the charger. The MAX1909/MAX8725
reduce the source current by decreasing the charge cur-
rent when the input current exceeds the set input current
limit. This technique does not truly limit the input current.
As the system supply current rises, the available charge
current drops proportionally to zero. Thereafter, the total
input current can increase without limit.
V
= I
✕ R ✕ G ✕ R
S1 IINP 9
IINP
SOURCE
where I
is the DC current supplied by the AC
IINP
SOURCE
adapter power, G
(3mA/V typ), and R9 is the resistor connected between
IINP and ground.
is the transconductance of IINP
Leave the IINP pin unconnected if not used.
LDO Regulator
LDO provides a 5.4V supply derived from DCIN and
can deliver up to 10mA of extra load current. The low-
side MOSFET driver is powered by DLOV, which must
be connected to LDO as shown in Figure 1. LDO also
supplies the 4.2235V reference (REF) and most of the
control circuitry. Bypass LDO with a 1µF capacitor.
An internal amplifier compares the differential voltage
between CSSP and CSSN to a scaled voltage set with
the CLS input. V
can be driven directly or set with a
CLS
resistive voltage-divider between REF and GND.
Connect CLS to REF to set the input current-limit sense
voltage to the maximum value of 75mV. Calculate the
input current as follows:
Shutdown and Charge Inhibit (PKPRES)
When the AC adapter is removed, the MAX1909/
MAX8725 shut down to a low-power state that does not
significantly load the battery. Under these conditions, a
maximum of 6µA is drawn from the battery through the
combined load of the SRC, CSSP, CSSN, CSIP, CSIN,
and BATT inputs. The charger enters this low-power state
when DCIN falls below the undervoltage-lockout (UVLO)
threshold of 7V. The PDS switch turns off, the PDL switch
turns on, and the system runs from the battery.
0.075
RS1
V
CLS
I
=
×
IN
V
REF
V
determines the reference voltage of the GMS
CLS
error amplifier. Sense resistor RS1 sets the maximum
allowable source current. Once the input current limit is
reached, the charge current is decreased linearly until
the input current is below the desired threshold.
18 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
The body diode of the PDL switch prevents the voltage
on the power source output from collapsing.
Conditioning Mode
The MAX1909/MAX8725 can be programmed to per-
form a conditioning cycle to calibrate the battery’s fuel
gauge. This cycle consists of isolating the battery from
the charger and discharging it through the system load.
When the battery reaches 100% depth of discharge, it
is then recharged. Driving the MODE pin low places the
MAX1909/MAX8725 in conditioning mode, which stops
the charger from switching, turns the PDS switch off,
and turns the PDL switch on.
Charging can also be inhibited by driving ICTL below
0.035V, which suspends switching and pulls CCI, CCS,
and CCV to ground. The PDS and PDL drivers, LDO,
input current monitor, and control logic (ACOK) all
remain active in this state. Approximately 3mA of sup-
ply current is drawn from the AC adapter and 3µA
(max) is drawn from the battery to support these
functions.
To utilize the conditioning mode function, the configura-
tion of the PDS switch must be changed to two source-
connected FETs to prevent the AC adapter from sup-
plying current to the system through the MOSFET’s
body diode. See Figure 2. The SRC pin must be con-
nected to the common source node of the back-to-back
FETs to properly drive the MOSFETs.
In smart-battery systems, PKPRES is usually driven from a
voltage-divider formed with a low-value resistor or PTC
thermistor inside the battery pack and a local resistive
pullup. This arrangement automatically detects the pres-
ence of a battery. The MAX8725 threshold voltage is 55%
of V
, with hysteresis of 1% V
to prevent erratic
LDO
LDO
transitions.
It is essential to alert the user that the system
is performing a conditioning cycle. If the user termi-
nates the cycle prematurely, the battery can be dis-
charged even though the system was running off the
AC adapter for a substantial period of time. If the AC
adapter is in fact removed during conditioning, the
MAX1909/MAX8725 keep the PDL switch on and the
charger remains off as it would in normal operation.
AC Adapter Detection and
Power-Source Selection
The MAX1909/MAX8725 include a hysteretic compara-
tor that detects the presence of an AC power adapter
and automatically delivers power to the system load
from the appropriate available power source. When the
adapter is present, the open-drain ACOK output
becomes high impedance. The switch threshold at
ACIN is 2.048V. Use a resistive voltage-divider from the
adapter’s output to the ACIN pin to set the appropriate
detection threshold. When charging, the battery is iso-
lated from the system load with the p-channel PDL
switch, which is biased off. When the adapter is absent,
the drives to the switches change state in a fast break-
before-make sequence. PDL begins to turn on 7.5µs
after PDS begins to turn off.
In the MAX8725, if the battery is removed during condi-
tioning mode, the PKPRES control overrides condition-
ing mode. When MODE is grounded and PKPRES goes
high, the PDS switch starts turning on within 7.5µs and
the system is powered from the AC adapter.
In the MAX1909, disable conditioning mode before the
battery is overdischarged or removed.
DC-DC Converter
The threshold for selecting between the PDL and PDS
switches is set based on the voltage difference
between the DCIN and the BATT pins. If this voltage
difference drops below 100mV, the PDS is switched off
and PDL is switched on. Under these conditions, the
MAX1909/MAX8725 are completely powered down.
The PDL switch is kept on with a 100kΩ pulldown resis-
tor when the charger is powered down through ICTL or
PKPRES, or when the AC adapter is removed.
The MAX1909/MAX8725 employ a buck regulator with a
PMOS high-side switch and a low-side NMOS synchro-
nous rectifier. The MAX1909/MAX8725 feature a pseu-
do-fixed-frequency, cycle-by-cycle current-mode
control scheme. The off-time is dependent upon V
,
DCIN
V
, and a time constant, with a minimum t
of
BATT
OFF
300ns. The MAX1909/MAX8725 can also operate in
discontinuous conduction for improved light-load effi-
ciency. The operation of the DC-DC controller is deter-
mined by the following four comparators as shown in
Figure 4:
The drivers for PDL and PDS are fully integrated. The pos-
itive bias inputs for the drivers connect to the SRC pin and
the negative bias inputs connect to a negative regulator
referenced to SRC. With this arrangement, the drivers can
swing from SRC to approximately 10V below SRC.
• CCMP: Compares the control point (lowest voltage
clamp (LVC)) against the charge current (CSI). The
high-side MOSFET on-time is terminated if the CCMP
output is high.
______________________________________________________________________________________ 19
Multichemistry Battery Chargers with Automatic
System Power Selector
AC ADAPTER
CSSP
CSSN
MAX1909
MAX8725
DHI
CSS
20X
DHI
IMAX
COMP
IMIN
1.94V
R
S
Q
Q
DLO
DLO
0.15V
TOFF
ZCMP
0.1V
LVC
CLS
GMS
ICTL
CSIP
CSIN
LVC
GMI
CSI
20X
VCTL
GMV
BATT
CCV
CCI
CCS
C
OUT
R
CCV
CCV
CCI
CCS
Figure 4. DC-DC Converter Functional Diagram
20 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
• IMIN: Compares the control point (LVC) against
1
V
− V
V
CSSN
0.15V (typ). If IMIN output is low, then a new cycle
cannot begin. This comparator determines whether
the regulator operates in discontinuous mode.
CSSN BATT
t
=
OFF
f
NOM
• IMAX: Compares the charge current (CSI) to the
internally fixed cycle-by-cycle current limit. The
current-sense voltage limit is 97mV. With RS2 =
0.015Ω, this corresponds to 6A. The high-side
MOSFET on-time is terminated if the IMAX output is
high and a new cycle cannot begin until IMAX goes
low. IMAX protects against sudden overcurrent
faults.
where f
= 400kHz:
NOM
L ×I
RIPPLE
− V
t
=
ON
V
CSSN BATT
V
× t
BATT OFF
L
where I
=
RIPPLE
• ZCMP: Compares the charge current (CSI) to 333mA
(RS2 = 0.015Ω). The current-sense voltage threshold
is 5mV. If ZCMP output is high, then both MOSFETs
are turned off. The ZCMP comparator terminates the
switch on-time in discontinuous mode.
1
f =
t
+ t
ON OFF
These equations describe the controller’s pseudo-fixed-
frequency performance over the most common operat-
ing conditions.
CCV, CCI, CCS, and LVC Control Blocks
The MAX1909/MAX8725 control charge voltage (CCV
control loop), charge current (CCI control loop), or input
current (CCS control loop), depending on the operating
conditions. The three control loops, CCV, CCI, and CCS,
are brought together internally at the LVC amplifier. The
output of the LVC amplifier is the feedback control
signal for the DC-DC controller. The minimum
voltage at CCV, CCI, or CCS appears at the output of
the LVC amplifier and clamps the other two control
loops to within 0.3V above the control point. Clamping
the other two control loops close to the lowest control
loop ensures fast transition with minimal overshoot
when switching between different control loops (see the
Compensation section).
At the end of the fixed off-time, the controller can initiate
a new cycle if the control point (LVC) is greater than
0.15V (IMIN = high) and the peak charge current is less
than the cycle-by-cycle limit (IMAX = low). If the charge
current exceeds I
, the on-time is terminated by the
MAX
IMAX comparator.
If during the off-time the inductor current goes to zero,
ZCMP = high, both the high- and low-side MOSFETs
are turned off until another cycle is ready to begin. This
condition is discontinuous conduction. See the
Discontinuous Conduction section.
There is a minimum 0.3µs off-time when the (V
-
DCIN
≥ 0.88 x
Continuous Conduction Mode
With sufficient battery current loading, the MAX1909/
MAX8725s’ inductor current never reaches zero, which
is defined as continuous conduction mode. If the BATT
voltage is within the following range:
V
V
) differential becomes too small. If V
BATT
DCIN
BATT
, then the threshold for minimum off-time is
is fixed at 0.3µs. The switching
reached and the t
OFF
frequency in this mode varies according to the equation:
1
3.1V ✕ (number of cells) < V
< (0.88 ✕ V
)
BATT
DCIN
f =
V
BATT
the regulator is not in dropout and switches at f
=
NOM
t
+1
OFF
V
− V
BATT
400kHz. The controller starts a new cycle by turning on
the high-side p-channel MOSFET and turning off the
low-side n-channel MOSFET. When the charge current
is greater than the control point (LVC), CCMP goes high
and the off-time is started. The off-time turns off the
high-side p-channel MOSFET and turns on the low-side
n-channel MOSFET. The operating frequency is gov-
CSSN
Discontinuous Conduction
The MAX1909/MAX8725 enter discontinuous-conduc-
tion mode when the output of the LVC control point falls
below 0.15V. For RS2 = 0.015Ω, this corresponds to
0.5A:
erned by the off-time and is dependent upon V
DCIN
0.15V
20×RS2
and V
. The off-time is set by the following equation:
I
=
= 0.5A
BATT
MIN
where RS2 = 0.015Ω.
______________________________________________________________________________________ 21
Multichemistry Battery Chargers with Automatic
System Power Selector
In discontinuous mode, a new cycle is not started until
the LVC voltage rises above 0.15V. Discontinuous-
mode operation can occur during conditioning charge
BATT
GM
OUT
of overdischarged battery packs, when the charge cur-
rent has been reduced sufficiently by the CCS control
R
R
L
loop, or when the charger is in constant voltage mode
with a nearly full battery pack.
ESR
C
OUT
CCV
Compensation
The charge voltage, charge current, and input current-
limit regulation loops are compensated separately and
independently at the CCV, CCI, and CCS pins.
GMV
R
CV
R
OGMV
REF
C
CV
CCV Loop Compensation
The simplified schematic in Figure 5 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the voltage loop (CCV) is in control. The required com-
Figure 5. CCV Loop Diagram
pensation network is a pole-zero pair formed with C
CV
1
GM
=
OUT
and R . The pole is necessary to roll off the voltage
CV
A
× RS2
CSI
loop’s response at low frequency. The zero is necessary
to compensate the pole formed by the output capacitor
where A
= 20, and RS2 = 0.015Ω in the Typical
CSI
and the load. R
is the equivalent series resistance
ESR
Operating Circuits (Figures 1 and 2), so GM
=
OUT
(ESR) of the charger output capacitor (C
). R is the
L
OUT
L
3.33A/V.
equivalent charger output load, where R = ∆V
/
BATT
The loop transfer function is:
∆I
. The equivalent output impedance of the GMV
CHG
amplifier, R
, is greater than 10MΩ. The voltage
OGMV
R
× 1+sC ×R
CV CV
(
)
×
OGMV
loop transconductance (GMV = I
/ V ) depends
BATT
LTF = GM
×
CCV
OUT
1+sC ×R
(
)
CV
OGMV
on the MODE input, which determines the number of
cells. GMV = 0.125mA/mV for 4 cells and GMV =
0.167mA/mV for 3 cells. The DC-DC converter transcon-
ductance is dependent upon the charge current-sense
resistor RS2:
R
L
G
1+sC
×R
ESR
(
)
MV
OUT
1+sC
×R
L
(
)
OUT
Table 1. Poles and Zeros of the Voltage-Loop Transfer Function
NO.
NAME
CALCULATION
DESCRIPTION
Lowest frequency pole created by C and GMV’s finite output
CV
1
resistance. Since R
is very large and not well controlled, the
f
=
OGMV
P_CV
1
CCV pole
2πR
×C
CV
OGMV
exact value for the pole frequency is also not well controlled
(R > 10MΩ).
OGMV
Voltage-loop compensation zero. If this zero is at the same
frequency or lower than the output pole f , then the loop
transfer function approximates a single pole response near the
1
P_OUT
f
=
Z_CV
2
CCV zero
2πR ×C
CV
CV
crossover frequency. Choose C to place this zero at least one
CV
decade below crossover to ensure adequate phase margin.
Output pole formed with the effective load resistance R and the
L
1
f
=
P_OUT
output capacitance C . R influences the DC gain but does not
OUT L
3
4
Output pole
Output zero
2πR ×C
L
OUT
affect the stability of the system or the crossover frequency.
Output ESR Zero. This zero can keep the loop from crossing unity
1
gain if f
is less than the desired crossover frequency;
f
=
Z_OUT
Z_OUT
2πR
×C
OUT
ESR
therefore, choose a capacitor with an ESR zero greater than the
crossover frequency.
22 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
The poles and zeros of the voltage-loop transfer function
are listed from lowest frequency to highest frequency in
Table 1.
Setting the LTF = 1 to solve for the unity-gain frequency
yields:
R
CV
Near crossover, C
has a much lower impedance
is in parallel with R C
OGMV, CV
f
=
CV
CO_CV GM
× GMV
OUT
2π × C
than R
. Since C
OUT
OGMV
CV
dominates the parallel impedance near crossover.
Additionally, R has a much higher impedance than
For stability, choose a crossover frequency lower than
1/10th of the switching frequency. Choosing a
CV
C
CV
C
CV
and dominates the series combination of R
and
CV
, so:
crossover frequency of 30kHz and solving for R
using the component values listed in Figure 1 yields:
CV
R
× 1+sC ×R
CV CV
(
)
≅R
OGMV
MODE = V
(4 cells)
CC
CV
1+sC ×R
(
)
CV
OGMV
GMV = 0.125µA/mV
C
= 22µF
OUT
C
also has a much lower impedance than R near
L
OUT
crossover, so the parallel impedance is mostly capaci-
tive and:
V
= 16.8V
BATT
R = 0.2Ω
L
GM
f
= 3.33A/V
= 30kHz
OUT
R
1
L
≅
1+sC
(
×R
sC
OUT
CO_CV
)
OUT
L
f
= 400kHz
OSC
If R
is small enough, its associated output zero has
ESR
a negligible effect near crossover and the loop-transfer
function can be simplified as follows:
2π × C
× f
OUT CO_CV
R
=
= 10kΩ
CV
GMV ×GM
OUT
R
CV
LTF = GM
×
GMV
OUT
To ensure that the compensation zero adequately can-
cels the output pole, select f ≤ f
sC
OUT
:
P_OUT
Z_CV
C
≥ (R /R ) C
L CV OUT
CV
where C
≥ 4nF (assuming 4 cells and 4A maximum
CV
charge current).
Figure 6 shows the Bode plot of the voltage-loop fre-
quency response using the values calculated above.
CCI Loop Compensation
The simplified schematic in Figure 7 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the battery current loop (CCI) is in control. Since the
output capacitor’s impedance has little effect on the
response of the current loop, only a single pole is
80
60
40
20
0
0
-45
-90
-135
required to compensate this loop. A
is the internal
CSI
gain of the current-sense amplifier. RS2 is the charge
current-sense resistor, RS2 = 15mΩ. R
is the
OGMI
equivalent output impedance of the GMI amplifier,
which is greater than 10MΩ. GMI is the charge-current
amplifier transconductance = 1µA/mV. GM
DC-DC converter transconductance = 3.3A/V.
is the
OUT
-20
-40
MAG
PHASE
The loop transfer function is given by:
0.1
1
10 100 1k
FREQUENCY (Hz)
10k 100k 1M
R
OGMI
LTF = GM
× A
×RS2×GMI
CSI
OUT
1+sR
×C
OGMI
CI
Figure 6. CCV Loop Response
______________________________________________________________________________________ 23
Multichemistry Battery Chargers with Automatic
System Power Selector
100
80
60
40
20
0
0
MAG
PHASE
CSIP
CSIN
GM
OUT
RS2
CSI
-45
-90
CCI
GMI
-20
-40
C
CI
R
OGMI
0.1
10
1k
100k
ICTL
FREQUENCY (Hz)
Figure 7. CCI Loop Diagram
Figure 8. CCI Loop Response
This describes a single-pole system. Since:
1
CCS Loop Compensation
The simplified schematic in Figure 9 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the input current-limit loop (CCS) is in control. Since the
output capacitor’s impedance has little effect on the
response of the input current-limit loop, only a single
GM
=
OUT
A
×RS2
CSI
the loop transfer function simplifies to:
pole is required to compensate this loop. A
is the
CSS
R
OGMI
LTF = GMI
internal gain of the current-sense amplifier. RS1 is the
1+sR
×C
OGMI
CI
input current-sense resistor; RS1 = 10mΩ in the typical
operating circuits. R
is the equivalent output
OGMS
The crossover frequency is given by:
GMI
impedance of the GMS amplifier, which is greater than
10MΩ. GMS is the charge-current amplifier transcon-
ductance = 1µA/mV. GM is the DC-DC converter’s
IN
f
=
CO_CI
2πC
input-referred transconductance = (1/D) GM
(1/D) 3.3A/V.
=
OUT
CI
For stability, choose a crossover frequency lower than
1/10th of the switching frequency:
C
= GMI / (2π f
)
O_CI
ADAPTER
INPUT
CI
Choosing a crossover frequency of 30kHz and using the
component values listed in Figure 1 yields C > 5.4nF.
CI
CSSP
Values for C greater than 10 times the minimum value
CI
CLS
CSS
RS1
may slow down the current-loop response excessively.
Figure 8 shows the Bode plot of the current-loop fre-
quency response using the values calculated above.
CSSN
GMS
CCS
GM
IN
R
OGMS
C
CS
SYSTEM
LOAD
Figure 9. CCS Loop Diagram
24 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
MOSFET Drivers
The DHI and DLO outputs are optimized for driving
100
80
60
40
20
0
0
moderately-sized power MOSFETs. The MOSFET drive
capability is the same for both the low-side and high-
side switches. This is consistent with the variable duty
factor that occurs in the notebook computer environ-
ment where the battery voltage changes over a wide
range. An adaptive dead-time circuit monitors the DLO
output and prevents the high-side FET from turning on
until DLO is fully off. There must be a low-resistance,
low-inductance path from the DLO driver to the
MOSFET gate for the adaptive dead-time circuit to work
properly. Otherwise, the sense circuitry in the
MAX1909/MAX8725 interpret the MOSFET gate as “off”
while there is still charge left on the gate. Use very
short, wide traces measuring 10 squares to 20 squares
or less (1.25mm to 2.5mm wide if the MOSFET is 25mm
from the device). Unlike the DLO output, the DHI output
uses a fixed-delay 50ns time to prevent the low-side
FET from turning on until DHI is fully off. The same lay-
out considerations should be used for routing the DHI
signal to the high-side FET.
MAG
PHASE
-45
-20
-40
-90
10M
0.1
10
1k
100k
FREQUENCY (Hz)
Figure 10. CCS Loop Response
The loop transfer function is given by:
R
1+sR
OGMS
LTF = GM × A
×RS1×GMS
CSS
Since the transition time for a p-channel switch can be
much longer than an n-channel switch, the dead time
prior to the high-side PMOS turning on is more pro-
nounced than in other synchronous step-down regula-
tors, which use high-side n-channel switches. On the
high-to-low transition, the voltage on the inductor’s
“switched” terminal flies below ground until the low-side
switch turns on. A similar dead-time spike occurs on
the opposite low-to-high transition. Depending upon the
magnitude of the load current, these spikes usually
have a minor impact on efficiency.
IN
×C
OGMS
CS
Since:
1
GM
=
IN
A
×RS1
CSS
the loop transfer function simplifies to:
R
OGMS
LTF = GMS
1+sR
×C
OGMS
CS
The high-side driver (DHI) swings from SRC to 5V
below SRC and typically sources 0.9A and sinks 0.5A
from the gate of the p-channel FET. The internal pull-
down transistors that drive DHI high are robust, with a
2.0Ω (typ) on-resistance.
The crossover frequency is given by:
GMS
f
=
CO_CS
2πC
CS
The low-side driver (DLO) swings from DLOV to ground
and typically sources 0.5A and sinks 0.9A from the gate
of the n-channel FET. The internal pulldown transistors
that drive DLO low are robust, with a 1.0Ω (typ) on-
resistance. This helps prevent DLO from being pulled
up when the high-side switch turns on, due to capaci-
tive coupling from the drain to the gate of the low-side
MOSFET. This places some restrictions on the FETs
that can be used. Using a low-side FET with smaller
gate-to-drain capacitance can prevent these problems.
For stability, choose a crossover frequency lower than
1/10th the switching frequency:
C
CS
= GMS / (2π f
)
CO_CS
Choosing a crossover frequency of 30kHz and using
the component values listed in Figure 1 yields C
>
CS
5.4nF. Values for C greater than 10 times the mini-
CI
mum value may slow down the current-loop response
excessively. Figure 10 shows the Bode plot of the input
current-limit loop frequency response using the values
calculated above.
______________________________________________________________________________________ 25
Multichemistry Battery Chargers with Automatic
System Power Selector
Table 2. Recommended Components
REFERENCE QTY
DESCRIPTION
REFERENCE QTY
DESCRIPTION
Dual n- and p-channel MOSFETs, 7A,
30V and -5A, -30V, 8-pin SO, MOSFET
Fairchild FDS8958A or
Single n-channel MOSFETs, +13.5A,
+30V FDS6670S and
22µF ±20%, 35V E-size low-ESR
tantalum capacitors
AVX TPSE226M035R0300
Kemet T495X226M035AS
C1, C4
C5, C15
C9, C10
2
2
N1/P1
1
1µF ±10%, 25V, X7R ceramic capacitors
(1206)
Murata GRM31MR71E105K
Taiyo Yuden TMK316BJ105KL
TDK C3216X7R1E105K
Single p-channel MOSFETs, -13.5A,
-30V FDS66709Z
Single, p-channel, -11A, -30V, 8-pin SO
MOSFETs
Fairchild FDS6675
P2, P3, P4
3
0.01µF ±10%, 25V, X7R ceramic
capacitors (0402)
Murata GRP155R71E103K
TDK C1005X7R1E103K
R4
R5, R9, R21
R6
1
2
1
1
1
1
1
2
100kΩ, ±5% resistor (0603)
10kΩ ±1% resistors (0603)
590kΩ ±1% resistor (0603)
196kΩ ±1% resistor (0603)
1MΩ ±5% resistor (0603)
1kΩ ±5% resistor (0603)
33Ω ±5% resistor (0603)
10kΩ ±5% resistors (0603)
2
3
0.1µF ±10%, 25V, X7R ceramic
capacitors (0603)
Murata GRM188R71E104K
TDK C1608X7R1E104K
R7
C11, C14,
C17
R8
R11
R16
1µF ±10%, 6.3V, X5R ceramic
capacitors (0603)
Murata GRM188R60J105K
Taiyo Yuden JMK107BJ105KA
TDK C1608X5R1A105K
R19, R20
C12, C13,
C16
3
1
0.01Ω ±1%, 0.5W sense resistor (2010)
Vishay Dale WSL2010 0.010 1.0%
IRC LRC-LR2010-01-R010-F
RS1
1
Schottky diode, 0.5A, 30V SOD-123
Diodes Inc. B0530W
General Semiconductor MBR0530
ON Semiconductor MBR0530
0.015Ω ±1%, 0.5W sense resistor (2010)
Vishay Dale WSL2010 0.015 1.0%
IRC LRC-LR2010-01-R015-F
RS2
U1
1
1
D4
MAX1909ETI/MAX8725ETI (28-pin thin
QFN-EP)
25V 1% zener diode
CMDZ5253B
D5
L1
1
1
10µH, 4.4A inductor
Sumida CDRH104R-100NC
TOKO 919AS-100M
for these devices focus on the challenge of obtaining
high load-current capability when using high-voltage
(>20V) AC adapters. Low-current applications usually
require less attention. The high-side MOSFET (P1) must
be able to dissipate the resistive losses plus the switching
Design Procedure
Table 2 lists the recommended components and refers
to the circuit of Figure 2. The following sections
describe how to select these components.
losses at both V
and V
.
DCIN(MIN)
DCIN(MAX)
MOSFET Selection
MOSFETs P2 and P3 (Figure 1) provide power to the
system load when the AC adapter is inserted. These
devices may have modest switching speeds, but must
be able to deliver the maximum input current as set by
RS1. As always, care should be taken not to exceed
the device’s maximum voltage ratings or the maximum
operating temperature.
Ideally, the losses at V
should be roughly equal
DCIN(MIN)
, with lower losses in between. If
to losses at V
DCIN(MAX)
the losses at V
are significantly higher than the
DCIN(MIN)
losses at V
, consider increasing the size of P1.
DCIN(MAX)
Conversely, if the losses at V
higher than the losses at V
are significantly
DCIN(MAX)
consider reducing
DCIN(MIN),
the size of P1. If DCIN does not vary over a wide range,
the minimum power dissipation occurs where the resistive
losses equal the switching losses.
The p-channel/n-channel MOSFETs (P1, N1) are the
switching devices for the buck controller. The guidelines
26 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (R
), comes in a moderate-
DS(ON)
1.5
1.0
0.5
0
sized package, and is reasonably priced. Make sure
that the DLO gate driver can supply sufficient current to
support the gate charge and the current injected into
the parasitic gate-to-drain capacitor caused by the
high-side MOSFET turning on; otherwise, cross-con-
duction problems can occur.
3 CELLS
4 CELLS
The MAX1909/MAX8725 have an adaptive dead-time cir-
cuit that prevents the high-side and low-side MOSFETs
from conducting at the same time (see the MOSFET
Drivers section). Even with this protection, it is still possi-
ble for delays internal to the MOSFET to prevent one
MOSFET from turning off when the other is turned on.
V
DCIN
= 19V
VCTL = ICTL = LDO
8
9
10 11 12 13 14 15 16 17 18
(V)
Select devices that have low turn-off times. To be
V
BATT
conservative, make sure that P1(t
) -
DOFF(MAX)
N1(t
) < 40ns. Failure to do so may result in
DON(MIN)
efficiency-killing shoot-through currents. If delay mis-
match causes shoot-through currents, consider adding
extra capacitance from gate to source on N1 to slow
down its turn-on time.
Figure 11. Ripple Current vs. Battery Voltage (MAX1909)
following switching-loss calculation provides only a very
rough estimate and is no substitute for breadboard
evaluation, preferably including a verification using a
thermocouple mounted on P1:
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation (PD) due to resistance occurs at the
minimum supply voltage:
2
V
×C
× f ×I
DCIN(MAX)
RSS SW LOAD
PD(P1_Switching) =
2 I
GATE
where CRSS is the reverse transfer capacitance of P1,
and I is the peak gate-drive source/sink current.
2
V
V
I
LOAD
BATT
PD(P1) =
× R
DS(ON)
GATE
2
DCIN
For the low-side MOSFET (N1), the worst-case power
dissipation always occurs at maximum input voltage:
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
2
V
V
I
LOAD
However, the R
required to stay within package
BATT
DS(ON)
×R
PD(N1) = 1−
DS(ON)
power-dissipation limits often limits how small the
MOSFET can be. The optimum occurs when the switch-
2
DCIN
ing (AC) losses equal the conduction (I2R
)
Choose a Schottky diode (D1, Figure 2) with a forward
voltage low enough to prevent the N1 MOSFET body
diode from turning on during the dead time. As a gen-
eral rule, a diode with a DC current rating equal to 1/3rd
the load current is sufficient. This diode is optional and
can be removed if efficiency is not critical.
DS(ON)
losses. High-side switching losses do not usually
become an issue until the input is greater than approxi-
mately 15V. Switching losses in the high-side MOSFET
can become an insidious heat problem when maximum
AC adapter voltages are applied, due to the squared
term in the CV2 f switching-loss equation. If the high-
side MOSFET that was chosen for adequate R
low supply voltages becomes extraordinarily hot when
subjected to V then choose a MOSFET with
lower losses. Calculating the power dissipation in P1
due to switching losses is difficult since it must allow for
difficult quantifying factors that influence the turn-on
and turn-off times. These factors include the internal
gate resistance, gate charge, threshold voltage, source
inductance, and PC board layout characteristics. The
Inductor Selection
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics.
Inductor L1 must have a saturation current rating of at
least the maximum charge current plus 1/2 of the ripple
current (∆IL):
at
DS(ON)
DCIN(MAX),
I
= I
+ (1/2) ∆IL
CHG
SAT
______________________________________________________________________________________ 27
Multichemistry Battery Chargers with Automatic
System Power Selector
The ripple current is determined by:
Applications Information
∆IL = V
t
/ L
BATT OFF
Startup Conditioning Charge for
Overdischarged Cells
where:
or:
It is desirable to charge deeply discharged Li+ batter-
ies at a low rate to improve cycle life. The
MAX1909/MAX8725 automatically reduces the charge
current when the voltage per cell is below 3.1V. The
t
= 2.5µs (V
- V
) / V
for
OFF
DCIN
BATT
< 0.88 V
DCIN
DCIN
V
BATT
charge current-sense voltage is set to 4.5mV (I
=
CHG
t
= 0.3µs for V
> 0.88 V
BATT DCIN
OFF
300mA with RS2 = 15mΩ) until the battery voltage rises
above the threshold. There is approximately 300mV for
3 cell, 400mV for 4 cell of hysteresis to prevent the
charge-current magnitude from chattering between the
two values.
Figure 11 illustrates the variation of the ripple current
vs. battery voltage when the circuit is charging at 3A
with a fixed input voltage of 19V.
Higher inductor values decrease the ripple current.
Smaller inductor values require high-saturation current
capabilities and degrade efficiency. Designs that set
LIR = ∆IL / I
between inductor size and efficiency.
For the MAX8725, control the ICTL voltage to set a con-
ditioning charge rate.
= 0.3 usually result in a good balance
CHG
Layout and Bypassing
Bypass DCIN with a 1µF capacitor to ground (Figure 1).
D4 protects the MAX1909/MAX8725 when the DC
power source input is reversed. A signal diode for D4 is
adequate because DCIN only powers the LDO and the
internal reference. Bypass LDO, DHIV, DLOV, and
other pins as shown in Figure 1.
Input-Capacitor Selection
The input capacitor must meet the ripple current
requirement (I ) imposed by the switching currents.
RMS
Nontantalum chemistries (ceramic, aluminum, or OS-
CON) are preferred due to their resilience to power-up
surge currents.
Good PC board layout is required to achieve specified
noise, efficiency, and stable performance. The PC
board layout artist must be given explicit instructions—
preferably, a sketch showing the placement of the
power-switching components and high-current routing.
Refer to the PC board layout in the MAX1909/MAX8725
evaluation kit for examples. A ground plane is essential
for optimum performance. In most applications, the cir-
cuit is located on a multilayer board, and full use of the
four or more copper layers is recommended. Use the
top layer for high-current connections, the bottom layer
for quiet connections, and the inner layers for an unin-
terrupted ground plane.
V
(V
− V )
BATT
BATT DCIN
I
=I
RMS CHG
V
DCIN
The input capacitors should be sized so that the
temperature rise due to ripple current in continuous
conduction does not exceed approximately 10°C. The
maximum ripple current occurs at 50% duty factor or
V
= 2 ✕ V
, which equates to 0.5 ✕ I
. If the
DCIN
BATT
CHG
application of interest does not achieve the maximum
value, size the input capacitors according to the
worst-case conditions.
Output-Capacitor Selection
The output capacitor absorbs the inductor ripple cur-
rent and must tolerate the surge current delivered from
the battery when it is initially plugged into the charger.
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter
and to ensure the stability of the DC-DC converter (see
the Compensation section). Beyond the stability
requirements, it is often sufficient to make sure that the
output capacitor’s ESR is much lower than the battery’s
ESR. Either tantalum or ceramic capacitors can be
used on the output. Ceramic devices are preferable
because of their good voltage ratings and resilience to
surge currents.
Use the following step-by-step guide:
1) Place the high-power connections first, with their
grounds adjacent:
a) Minimize the current-sense resistor trace
lengths, and ensure accurate current sensing
with Kelvin connections.
b) Minimize ground trace lengths in the high-current
paths.
c) Minimize other trace lengths in the high-current
paths.
d) Use > 5mm wide traces.
28 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
e) Connect C1 and C2 to the high-side MOSFET
(10mm max length). Return these capacitors to
the power ground plane.
f) Minimize the LX node (MOSFETs, rectifier cath-
ode, inductor (15mm max length)).
PGND
POWER PATH
Ideally, surface-mount power components are
flush against one another with their ground
terminals almost touching. These high-current
grounds are then connected to each other with
a wide, filled zone of top-layer copper, so they
do not go through vias.
QUIET GROUND
ISLAND
The resulting top-layer ground plane is connected
to the normal inner-layer ground plane at the out-
put ground terminals, which ensures that the IC’s
analog ground is sensing at the supply’s output
terminals without interference from IR drops and
KELVIN-SENSE VIAS
UNDER THE SENSE
RESISTOR
(REFER TO EVALUATION KIT)
ground noise. Other high-current paths should
also be minimized, but focusing primarily on short
ground and current-sense connections eliminates
INDUCTOR
about 90% of all PC board layout problems.
2) Place the IC and signal components. Keep the main
switching node (LX node) away from sensitive ana-
log components (current-sense traces and REF
C
C
OUT
OUT
capacitor). Important: the IC should be less than
10mm from the current-sense resistors.
Quiet connections to REF, VCTL, ICTL, CCV, CCI,
CCS, IINP, ACIN, and DCIN should be returned to a
separate ground (GND) island. The appropriate
traces are marked on the schematic with the
ground symbol ( ). There is very little current flow-
ing in these traces, so the ground island need not
be very large. When placed on an inner layer, a siz-
able ground island can help simplify the layout
because the low-current connections can be made
through vias. The ground pad on the backside of
the package should also be connected to this quiet
ground island.
C
IN
OUTPUT
INPUT
GND
Figure 12. PC Board Layout Examples
3) Keep the gate drive traces (DHI and DLO) as short
as possible (L < 20mm), and route them away from
the current-sense lines and REF. These traces
should also be relatively wide (W > 1.25mm).
Chip Information
TRANSISTOR COUNT: 2720
PROCESS: BiCMOS
4) Place ceramic bypass capacitors close to the IC.
The bulk capacitors can be placed further away.
5) Use a single-point star ground placed directly
below the part at the PGND pin. Connect the power
ground (ground plane) and the quiet ground island
at this location. See Figure 12.
______________________________________________________________________________________ 29
Multichemistry Battery Chargers with Automatic
System Power Selector
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
D2
0.15
C A
D
b
0.10 M
C A B
C
L
D2/2
D/2
k
0.15
C
B
MARKING
XXXXX
E/2
E2/2
C
L
(NE-1) X
e
E2
E
k
L
DETAIL A
e
PIN # 1
I.D.
PIN # 1 I.D.
0.35x45∞
(ND-1) X
e
DETAIL B
e
L
C
C
L
L1
L
L
L
e
e
0.10
C
A
0.08
C
C
A3
A1
PACKAGE OUTLINE,
16, 20, 28, 32L THIN QFN, 5x5x0.8mm
1
-DRAWING NOT TO SCALE-
21-0140
F
2
COMMON DIMENSIONS
20L 5x5 28L 5x5
EXPOSED PAD VARIATIONS
D2 E2
MIN. NOM. MAX. MIN. NOM. MAX. ±0.15
DOWN
BONDS
ALLOWED
L
PKG.
SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX.
16L 5x5
32L 5x5
PKG.
CODES
T1655-1
T1655-2
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
NO
YES
NO
A
**
**
**
**
0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80
0.02 0.05 0.02 0.05 0.02 0.05 0.02 0.05
0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF.
A1
0
0
0
0
T1655N-1 3.00 3.10 3.20 3.00 3.10 3.20
A3
b
T2055-2
T2055-3
T2055-4
T2055-5
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
NO
YES
NO
Y
0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
**
**
D
E
3.15 3.25 3.35 3.15 3.25 3.35 0.40
e
0.80 BSC.
0.25
0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50
0.65 BSC.
0.50 BSC.
0.50 BSC.
T2855-1
T2855-2
3.15 3.25 3.35 3.15 3.25 3.35
2.60 2.70 2.80 2.60 2.70 2.80
NO
NO
**
**
**
**
k
-
-
0.25
-
-
0.25
-
-
0.25
-
-
L
T2855-3
T2855-4
3.15 3.25 3.35 3.15 3.25 3.35
2.60 2.70 2.80 2.60 2.70 2.80
2.60 2.70 2.80 2.60 2.70 2.80
3.15 3.25 3.35 3.15 3.25 3.35
YES
YES
NO
L1
-
-
-
-
-
-
-
-
-
-
-
-
N
ND
16
4
20
5
28
7
32
8
T2855-5
T2855-6
T2855-7
T2855-8
**
NO
YES
**
**
0.40
4
5
7
8
NE
2.80
3.35
3.35
3.20
2.60 2.70
3.15 3.25
2.60 2.70 2.80
3.15 3.25 3.35
3.15 3.25 3.35
3.00 3.10 3.20
WHHB
WHHC
WHHD-1
WHHD-2
JEDEC
Y
N
NO
T2855N-1 3.15 3.25
**
**
**
NOTES:
T3255-2
T3255-3
T3255-4
3.00 3.10
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
YES
NO
**
**
NO
T3255N-1 3.00 3.10 3.20 3.00 3.10 3.20
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL
CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE
OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1
IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
**SEE COMMON DIMENSIONS TABLE
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1,
T2855-3 AND T2855-6.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
PACKAGE OUTLINE,
16, 20, 28, 32L THIN QFN, 5x5x0.8mm
2
-DRAWING NOT TO SCALE-
21-0140
F
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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