MAX17600 [MAXIM]
4A Sink /Source Current, 12ns, Dual MOSFET Drivers; 4A吸入/源出电流，为12ns ，双MOSFET驱动器
| 型号： | MAX17600 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 4A Sink /Source Current, 12ns, Dual MOSFET Drivers |
| 文件： | 总12页 (文件大小：2831K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-6177; Rev 1; 5/12
E V A L U A T I O N K I T A V A I L A B L E
General Description
Features
The MAX17600–MAX17605 devices are high-speed
MOSFET drivers capable of sinking/sourcing 4A peak
currents. The devices have various inverting and non-
inverting part options that provide greater flexibility in
controlling the MOSFET. The devices have internal logic
circuitry that prevents shoot-through during output-state
changes. The logic inputs are protected against voltage
S Dual Drivers with Enable Inputs
S +4V to +14V Single Power-Supply Range
S 4A Peak Sink/Source Current
S Inputs Rated to +14V, Regardless of V
Voltage
DD
S Low 12ns Propagation Delay
S 6ns Typical Rise and 5ns Typical Fall Times with
spikes up to +14V, regardless of V voltage. Propagation
DD
1nF Load
delay time is minimized and matched between the dual
channels. The devices have very fast switching time,
combined with short propagation delays (12ns typ),
making them ideal for high-frequency circuits. The
devices operate from a +4V to +14V single power
supply and typically consume 1mA of supply cur-
rent. The MAX17600/MAX17601 have standard TTL
input logic levels, while the MAX17603/MAX17604/
MAX17605 have CMOS-like high-noise margin (HNM)
input logic levels. The MAX17600/MAX17603 are dual
inverting input drivers, the MAX17601/MAX17604 are
dual noninverting input drivers, and the MAX17602/
MAX17605 devices have one noninverting and one
inverting input. These devices are provided with enable
pins (ENA, ENB) for better control of driver operation.
S Matched Delays Between Channels
S Parallel Operation of Dual Outputs for Larger
Driver Output Current
S TTL or HNM Logic-Level Inputs with Hysteresis for
Noise Immunity
S Low Input Capacitance: 10pF (typ)
S Thermal Shutdown Protection
S TDFN, µMAX, and SO Package Options
S -40NC to +125NC Operating Temperature Range
Typical Operating Circuit
These devices are available in 8-pin (3mm x 3mm) TDFN,
®
8-pin (3mm x 5mm) FMAX , and 8-pin SO packages and
operate over the -40NC to +125NC temperature range.
ENA
V
DD
(UP TO +14V)
V
DD
Applications
OUTA
ENB
MAX17600
MAX17601
MAX17602
MAX17603
MAX17604
MAX17605
Power MOSFET Switching
Switch-Mode Power Supplies
DC-DC Converters
INA
INB
OUTB
GND
Motor Control
Power-Supply Modules
Ordering Information appears at end of data sheet.
µMAX is a registered trademark of Maxim Integrated
Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
ABSOLUTE MAXIMUM RATINGS
V
, INA, INB, ENA, ENB to GND........................-0.3V to +16V
Operating Temperature Range........................ -40NC to +125NC
Junction Temperature ................................................... +150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+240NC
DD
OUTA, OUTB to GND............................................-0.3V to +16V
Junction Operating Temperature Range ......... -40NC to +125NC
Continuous Power Dissipation (T = +70NC)
A
8-Pin TDFN (derate 23.8mW/NC above +70NC) ........1904mW
8-Pin SO (derate 74mW/NC above +70NC)............. 588.2mW*
8-Pin FMAX (derate 12.9mW/NC above +70NC).....1030.9mW
*As per JEDEC 51 standard.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TDFN
FMAX
Junction-to-Ambient Thermal Resistance (B ) .......77.6NC/W
Junction-to-Ambient Thermal Resistance (B ) ..........42NC/W
JA
JA
Junction-to-Case Thermal Resistance (B ).................8NC/W
Junction-to-Case Thermal Resistance (B ).................5NC/W
JC
JC
SO
Junction-to-Ambient Thermal Resistance (B ) ........136NC/W
JA
Junction-to-Case Thermal Resistance (B )...............38NC/W
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
= 12V, C = 0F, at T = -40NC to +125NC, unless otherwise noted. Typical values are specified at T = +25NC. Parameters
DD
L
A
A
specified at V
= 4V apply to the TTL versions only.) (Note 2)
DD
PARAMETER
POWER SUPPLY (V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
)
DD
TTL versions
4
6
3
14
14
V
Operating Range
V
V
DD
DD
HNM versions
V
V
V
Undervoltage Lockout
UVLO Hysteresis
UVLO
V
rising
3.5
200
120
1
3.85
V
DD
DD
DD
DD
DD
mV
Fs
UVLO to OUT_ Delay
V
rising
IDD_Q
Not switching, V
= 14V (Note 3)
2
DD
V
Supply Current
mA
V
= 4.5V, C = 1nF, both channels
L
DD
DD
IDD_SW
12
18
switching at 1MHz
DRIVER OUTPUT (SOURCE) (OUTA, OUTB)
Peak Output Current (Sourcing)
I
V
V
V
= 14V, C = 10nF (Note 3)
4
A
PK-P
DD
DD
DD
L
= 14V, I
= 100mA
0.88
0.91
1.85
1.95
Driver Output Resistance Pulling Up
(Note 4)
OUT_
R
I
ON-P
= 4V, I
= 100mA
OUT_
DRIVER OUTPUT (SINK) (OUTA, OUTB)
Peak Output Current (Sinking)
I
V
V
V
= 14V, C = 10nF (Note 3)
4
A
PK-N
DD
DD
DD
L
= 14V, I
= -100mA
0.5
0.52
0.95
1
Driver Output Resistance Pulling
Down (Note 4)
OUT_
R
I
ON-N
= 4V, I
= -100mA
OUT_
2
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
ELECTRICAL CHARACTERISTICS (continued)
(V
= 12V, C = 0F, at T = -40NC to +125NC, unless otherwise noted. Typical values are specified at T = +25NC. Parameters
DD
L
A
A
specified at V
= 4V apply to the TTL versions only.) (Note 2)
DD
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC INPUT (INA, INB)
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
2.1
V
Logic-High Input Voltage
Logic-Low Input Voltage
V
V
V
V
IN_
IN_
IH
4.25
0.8
2.0
V
V
IL
0.34
0.9
Logic Input Hysteresis
V
HYS
Logic Input Leakage Current
Logic Input Bias Current
Logic Input Capacitance
ENABLE (ENA, ENB)
I
V
= V
= 0V or V
(MAX17600/1/2)
(MAX17603/4/5)
-1
+0.02
+1
FA
FA
pF
LKG
INA
INA
INB
INB
DD
DD
I
V
= V
= 0V or V
10
10
BIAS
C
(Note 3)
IN
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
EN_ rising
2.1
V
High Level Voltage
Low Level Voltage
V
V
EN_H
EN_L
4.25
0.8
2.0
V
0.34
0.9
100
200
7
Enable Hysteresis
EN_
V
HYS
50
200
400
Enable Pullup Resistor to V
R
kI
ns
DD
pu
100
Propagation Delay from EN_ to OUT_
(Note 3)
t
pd
EN_ falling
7
SWITCHING CHARACTERISTICS (V
= 14V) (Note 3)
DD
C = 1nF
6
20
40
6
L
OUT_ Rise Time
t
C = 4.7pF
ns
ns
R
L
C = 10nF
L
C = 1nF
L
OUT_ Fall Time
t
C = 4.7nF
16
25
12
12
F
L
C = 10nF
L
Turn-On Delay Time
t
C = 1nF
ns
ns
D-ON
L
Turn-Off Delay Time
t
C = 1nF
L
D-OFF
SWITCHING CHARACTERISTICS (V
= 4.5V) (Note 3)
DD
C = 1nF
5
L
OUT_ Rise Time
OUT_ Fall Time
t
C = 4.7pF
15
28
5
ns
ns
R
L
C = 10nF
L
C = 1nF
L
t
C = 4.7nF
10
18
F
L
C = 10nF
L
3
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
ELECTRICAL CHARACTERISTICS (continued)
(V
= 12V, C = 0F, at T = -40NC to +125NC, unless otherwise noted. Typical values are specified at T = +25NC. Parameters
DD
L
A
A
specified at V
= 4V apply to the TTL versions only.) (Note 2)
DD
PARAMETER
Turn-On Delay Time
Turn-Off Delay Time
SYMBOL
CONDITIONS
MIN
TYP
12
MAX
UNITS
ns
t
C = 1nF
L
D-ON
t
C = 1nF
12
ns
D-OFF
L
MATCHING CHARACTERISTICS (Note 3)
Matching Propagation Delays
Between Channel A and Channel B
V
= 14V, C = 10nF
8
ns
DD
L
Note 2: All devices are production tested at T = +25NC. Limits over temperature are guaranteed by design.
A
Note 3: Design guaranteed by bench characterization. Limits are not production tested.
Note 4: For SOIC package options, these are only Typ parameters.
Typical Operating Characteristics
(C = 1nF, T = +25NC, unless otherwise noted.)
L
A
RISE TIME vs. SUPPLY VOLTAGE
FALL TIME vs. SUPPLY VOLTAGE
(C = 1nF)
PROPAGATION DELAY TIME (LOW TO HIGH)
(C
OUT_
= 1nF)
vs. SUPPLY VOLTAGE (C
= 1nF)
OUT_
OUT_
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
18
16
14
12
10
8
T
A
= +125°C
T
= +85°C
T
= +85°C
A
A
T
A
= +125°C
T
T
= +125°C
T
= +85°C
A
A
T
= +25°C
= +25°C
A
T
= +25°C
A
A
T
= -40°C
A
T
A
= 0°C
8
T
= -40°C
12
A
T
= 0°C
T
A
= 0°C
A
T
= -40°C
A
4
6
8
10
14
4
6
10
12
14
4
6
8
10
12
14
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
DD
SUPPLY VOLTAGE, V (V)
DD
DD
PROPAGATION DELAY TIME (HIGH TO LOW)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(C = 0nF)
SUPPLY CURRRENT vs. LOAD CAPACITANCE
vs. SUPPLY VOLTAGE (C
= 1nF)
(V = 12V, C
= 0nF)
OUT_
OUT_
DD
OUTB
18
16
14
12
10
8
3.0
2.5
2.0
1.5
1.0
0.5
140
130
120
110
100
90
80
70
60
50
T
A
= +125°C
1MHz
500kHz
T
= +85°C
500kHz
A
T
A
= +25°C
1MHz
100kHz
T
6
= 0°C
A
40
30
20
10
NO
SWITCHING
T
A
= -40°C
100kHz
NO SWITCHING
0
4
8
10
12
14
4
6
8
10
12
14
0
1
2
3
4
5
6
7
8
9
10
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
LOAD CAPACITANCE (nF)
DD
DD
4
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Typical Operating Characteristics (continued)
(C = 1nF, T = +25NC, unless otherwise noted.)
L
A
INPUT THRESHOLD VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. LOGIC INPUT
vs. SUPPLY VOLTAGE (C
= 0nF)
(V = 12V, C
= 0nF)
VOLTAGE (V = 12V, C
= 0nF)
OUT_
DD
OUT_
DD
OUT_
3.0
2.5
2.0
1.5
1.0
0.5
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
1MHz
RISING
500kHz
RISING
FALLING
FALLING
100kHz
NO SWITCHING
4
6
8
10
12
14
-40 -20
0
20 40 60 80 100 120
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14
SUPPLY VOLTAGE, V (V)
AMBIENT TEMPERATURE (°C)
LOGIC INPUT VOLTAGE (V)
DD
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
(V = +4V, C = 4.7nF)
MAX17600 toc12
vs. OUTPUT VOLTAGE (MAX17601)
(V = +4V, C = 4.7nF)
(V = +4V, C
= 10nF)
DD
OUTA
DD
OUTA
DD
OUTA
MAX17600 toc10
MAX17600 toc11
INA
INA
2V/div
2V/div
INA
2V/div
OUTA
2V/div
OUTA
2V/div
OUTA
2V/div
20ns/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
(V = +4V, C = 10nF)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
(V = +14V, C = 4.7nF)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
(V = +14V, C = 10nF)
MAX17600 toc15
DD
OUTA
DD
OUTA
DD
OUTA
MAX17600 toc13
MAX17600 toc14
INA
INA
5V/div
5V/div
INA
2V/div
OUTA
5V/div
OUTA
5V/div
OUTA
2V/div
20ns/div
20ns/div
20ns/div
5
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Typical Operating Characteristics (continued)
(C = 1nF, T = +25NC, unless otherwise noted.)
L
A
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C
= 4.7nF)
(V = +14V, C
= 10nF)
(V = +14V, C
= 4.7nF)
OUTA
MAX17600 toc18
DD
OUTA
DD
OUTA
DD
MAX17600 toc16
MAX17600 toc17
INA
5V/div
INA
INA
5V/div
5V/div
OUTA
5V/div
OUTA
OUTA
5V/div
5V/div
20ns/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C = 10nF)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C = 4.7nF)
DD
OUTA
DD
OUTA
MAX17600 toc19
MAX17600 toc20
INA
5V/div
INA
5V/div
OUTA
5V/div
OUTA
5V/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C = 10nF)
LOGIC OUTPUT vs. ENABLE
(V = +14V, C = 0nF)
DD
OUTA
DD
OUTA
MAX17600 toc22
MAX17600 toc21
V
DD
5V/div
ENA
5V/div
INA
5V/div
INA
5V/div
OUTA
OUTA
10V/div
5V/div
4µs/div
20ns/div
6
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Pin Configurations
TOP VIEW
ENB OUTA
8
V
OUTB
5
DD
TOP VIEW
7
6
TOP VIEW
+
ENA
INA
1
2
3
4
8
7
6
5
ENB
MAX17600
MAX17601
MAX17602
MAX17603
MAX17604
MAX17605
+ MAX17600
MAX17601
MAX17602
MAX17603
MAX17604
MAX17605
MAX17600
MAX17601
MAX17602
MAX17603
MAX17604
MAX17605
ENA
INA
1
8
7
6
5
ENB
2
3
4
OUTA
OUTA
GND
INB
V
DD
OUTB
GND
INB
V
DD
+
µMAX
OUTB
1
2
3
4
SO
ENA INA GND INB
TDFN
Pin Description
PIN
NAME
FUNCTION
through a 100kI resistor. Leave unconnected for
always-on operation. Connect to GND for disabling the corresponding channel.
Enable Input for Driver A. Internally pulled to V
DD
1
ENA
2
3
4
INA
GND
INB
Logic Input for Channel A
Ground
Logic Input for Channel B
Channel B Driver Output. Sources and sinks current for channel B to turn the external MOSFET at OUTB
on or off.
5
6
7
OUTB
V
Power-Supply Input. Bypass to GND with one or more low-ESR 0.1FF ceramic capacitors.
DD
Channel A Driver Output. Sources and sinks current for channel A to turn the external MOSFET at OUTA
on or off.
OUTA
Enable Input for Driver B. Internally pulled to V
always-on operation. Connect to GND for disabling the corresponding channel.
through a 100kI resistor. Leave unconnected for
DD
8
ENB
EP
—
Exposed Pad (TDFN Only). Internally connected to GND. Do not use the EP as the only ground connection.
7
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Functional Diagram
INA
V
IH
V
IL
OUTA
90%
CHANNEL B
GND
10%
t
t
D-ON
D-OFF
t
t
F
R
IN LOGIC
LEVEL SHIFT DOWN
PREDRIVER
INB
INB
V
IH
V = 5V
L
V
IL
OUTB
BBM
OUTB
90%
ENB
10%
t
IN LOGIC
LEVEL SHIFT UP
t
D-OFF
D-ON
PREDRIVER
t
t
F
R
V
DD
- 5V
BG + UVLO +
TSHDN
Figure 1. Timing Diagram for the MAX17601/MAX17604
V
DD
BG + UVLO +
TSHDN
INA
V
IH
V
DD
- 5V
V
IL
OUTA
IN LOGIC
LEVEL SHIFT UP
90%
10%
PREDRIVER
ENA
INA
t
t
D-OFF
D-ON
OUTA
t
R
t
F
BBM
V = 5V
L
INA
V
IH
IN LOGIC
LEVEL SHIFT DOWN
V
IL
PREDRIVER
OUTB
90%
GND
10%
CHANNEL A
t
t
D-ON
D-OFF
t
t
F
R
Figure 2. Timing Diagram for the MAX17602/MAX17605
8
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Detailed Description
INA
V
IH
The MAX17600–MAX17605 are high-speed MOSFET
drivers capable of sinking/sourcing 4A peak currents.
The devices have various inverting and noninverting part
options that provide greater flexibility in controlling the
MOSFET. The devices have internal logic circuitry that
prevents shoot-through during output-state changes.
The logic inputs are protected against voltage spikes
V
IL
OUTA
90%
10%
t
t
D-OFF
D-ON
t
R
t
F
up to +16V, regardless of V
voltage. Propagation
DD
delay time is minimized and matched between the dual
channels. The devices have very fast switching time,
combined with short propagation delays (12ns typ),
making them ideal for high-frequency circuits. The
devices operate from a +4V to +14V single power
supply and typically consume 1mA of supply current.
The MAX17600/MAX17601/MAX17602 have standard
TTL input logic levels, while the MAX17603/MAX17604/
MAX17605 have CMOS-like high-noise margin (HNM)
input logic levels. The MAX17600/MAX17603 are dual
inverting input drivers, the MAX17601/MAX17604 are
dual noninverting input drivers, and the MAX17602/
MAX17605 have one noninverting and one inverting
input. These devices are provided with enable pins
(ENA and ENB) for better control of driver operation.
INB
V
IH
V
IL
OUTB
90%
10%
t
t
D-OFF
D-ON
t
t
F
R
Figure 3. Timing Diagram for the MAX17600/MAX17603
ENA
INA
ENB
MAX17600
MAX17601
MAX17602
MAX17603
MAX17604
MAX17605
Logic Inputs
The MAX17600/MAX17601/MAX17602 have standard
TTL input logic levels, while the MAX17603/MAX17604/
MAX17605 have CMOS-like HNM input logic levels (see
the Electrical Characteristics table). Table 1 gives the
truth table for various part options.
OUTA
C
OUTA
V
DD
GND
INB
V
DD
OUTB
C
OUTB
Figure 4. Test Circuit for the Timing Diagrams
Table 1. Truth Table
ENABLE
INPUTS
LOGIC
INPUTS
DUAL NONINVERTING
DRIVER
DUAL INVERTING
DRIVER
ONE INVERTING AND ONE
NONINVERTING DRIVER
ENA
ENB
H
INA
INB
H
OUTA
OUTB
OUTA
OUTB
OUTA
OUTB
H
H
H
H
L
H
H
L
H
H
L
H
L
L
L
L
H
L
L
L
H
L
H
L
H
H
H
L
H
H
L
H
H
L
H
L
H
L
L
L
H
L
L
X
X
L
L
L
L = Logic-low, H = Logic-high.
9
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
these components must be kept below the maximum
power-dissipation limit.
Undervoltage Lockout (UVLO)
is below the UVLO threshold, the output
When V
DD
stage n-channel device is on and the p-channel is off,
independent of the state of the inputs. This holds the
outputs low. The UVLO is typically 3.6V with 200mV
typical hysteresis to avoid chattering. A typical falling
delay of 2Fs makes the UVLO immune to narrow negative
transients in noisy environments.
The quiescent current is 1mA typical. The current
required to charge and discharge the internal nodes
is frequency dependent (see the Typical Operating
Characteristics). The devices’ power dissipation when
driving a ground referenced resistive load is:
P = D x R
(MAX) x I 2 per channel
LOAD
ON
Driver Outputs
The devices feature 4A peak sourcing/sinking capa-
bilities to provide fast rise and fall times of the MOSFET
gate. Add a resistor in series with OUT_ to slow the cor-
responding rise/fall time of the MOSFET gate.
where D is the fraction of the period the devices’ output
pulls high, R (MAX) is the maximum pullup on-resist-
ON
ance of the device with the output high, and I
output load current of the devices.
is the
LOAD
For capacitive loads, the power dissipation is:
P = C
x (V )2 x FREQ per channel
Applications Information
LOAD
DD
where C
is the capacitive load, V
is the supply
LOAD
DD
Supply Bypassing, Device
Grounding, and Placement
Ample supply bypassing and device grounding are
extremely important because when large external
voltage, and FREQ is the switching frequency.
Layout Information
The devices’ MOSFET drivers source and sink large
currents to create very fast rise and fall edges at the
gate of the switching MOSFET. The high di/dt can cause
unacceptable ringing if the trace lengths and
impedances are not well controlled. The following PCB
layout guidelines are recommended when designing with
the devices:
capacitive loads are driven, the peak current at the V
DD
pin can approach 4A, while at the GND pin, the peak
current can approach 4A. V drops and ground shifts
DD
are forms of negative feedback for inverters and, if
excessive, can cause multiple switching when the
inverting input is used and the input slew rate is low. The
device driving the input should be referenced to the devic-
es’ GND pin, especially when the inverting input is used.
Ground shifts due to insufficient device grounding can
disturb other circuits sharing the same AC ground return
•ꢀ Placeꢀatꢀleastꢀoneꢀ2.2FF decoupling ceramic capacitor
from V
to GND as close as possible to the IC. At least
DD
one storage capacitor of 10FF (min) should be located
on the PCB with a low-resistance path to the V pin
DD
path. Any series inductance in the V , OUT_, and/or
DD
of the devices. There are two AC current loops formed
between the IC and the gate of the MOSFET being
driven. The MOSFET looks like a large capacitance
from gate to source when the gate is being pulled low.
The active current loop is from OUT_ of the devices to
the MOSFET gate to the MOSFET source and to GND
of the devices. When the gate of the MOSFET is being
pulled high, the active current loop is from OUT_ of the
devices to the MOSFET gate to the MOSFET source to
the GND terminal of the decoupling capacitor to the
GND paths can cause oscillations due to the very high
di/dt that results when the devices are switched with any
capacitive load. A 2.2FF or larger value ceramic
capacitor is recommended, bypassing V
to GND and
DD
placed as close as possible to the pins. When driving
very large loads (e.g., 10nF) at minimum rise time, 10FF or
more of parallel storage capacitance is recommended. A
ground plane is highly recommended to minimize ground
return resistance and series inductance. Care should be
taken to place the devices as close as possible to the
external MOSFET being driven to further minimize board
inductance and AC path resistance.
V
V
terminal of the decoupling capacitor and to the
terminal of the devices. While the charging current
DD
DD
loop is important, the discharging current loop is also
critical. It is important to minimize the physical distance
and the impedance in these AC current paths.
Power Dissipation
Power dissipation of the devices consists of three
components, caused by the quiescent current, capacitive
charge and discharge of internal nodes, and the output
current (either capacitive or resistive load). The sum of
•ꢀ Inꢀ aꢀ multilayerꢀ PCB,ꢀ theꢀ componentꢀ surfaceꢀ layerꢀ
surrounding the devices should consist of a ground plane
containing the discharging and charging current loops.
10
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Ordering Information/Selector Guide
PART
PIN-PACKAGE
8 TDFN-EP* (3mm x 3mm)
8 SO
CONFIGURATION
Dual/Inverting
LOGIC LEVELS
TTL
TOP MARK
+BOJ
+
MAX17600ATA+
MAX17600ASA+
MAX17600AUA+
MAX17601ATA+
MAX17601ASA+
MAX17601AUA+
MAX17602ATA+
MAX17602ASA+
MAX17602AUA+
MAX17603ATA+
MAX17603ASA+
MAX17603AUA+
MAX17604ATA+
MAX17604ASA+
MAX17604AUA+
MAX17605ATA+
MAX17605ASA+
MAX17605AUA+
Dual/Inverting
TTL
8 FMAX-EP*
Dual/Inverting
TTL
+AACI
+BOK
+
8 TDFN-EP* (3mm x 3mm)
8 SO
Dual/Noninverting
Dual/Noninverting
Dual/Noninverting
Inverting/Noninverting
Inverting/Noninverting
Inverting/Noninverting
Dual/Inverting
TTL
TTL
8 FMAX-EP*
TTL
+AACJ
+BOL
+
8 TDFN-EP* (3mm x 3mm)
8 SO
TTL
TTL
8 FMAX-EP*
TTL
+AACK
+BOM
+
8 TDFN-EP* (3mm x 3mm)
8 SO
HNM
HNM
HNM
HNM
HNM
HNM
HNM
HNM
HNM
Dual/Inverting
8 FMAX-EP*
Dual/Inverting
+AACL
+BON
+
8 TDFN-EP* (3mm x 3mm)
8 SO
Dual/Noninverting
Dual/Noninverting
Dual/Noninverting
Inverting/Noninverting
Inverting/Noninverting
Inverting/Noninverting
8 FMAX-EP*
+AACM
+BOO
+
8 TDFN-EP* (3mm x 3mm)
8 SO
8 FMAX-EP*
+AACN
Note: All devices are specified over the -40°C to +125°C temperature range. Optional 8-pin 2mm x 3mm TDFN package is
available. Contact your Maxim sales representative for more information.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 TDFN-EP
8 SO
T833+2
S8+2
21-0137
21-0041
21-0107
90-0059
90-0096
90-0145
8 FMAX
U8E+2
11
MAX17600–MAX17605
4A Sink/Source Current, 12ns, Dual MOSFET Drivers
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
1/12
Initial release
—
5/12
Added the MAX17600
1–12
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, Inc. 160 Rio Robles Drive, San Jose, CA 95134 408-601-1000
12
©
2012 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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