MAX17126A [MAXIM]
Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVs;
| 型号： | MAX17126A |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVs CD 电视 |
| 文件： | 总34页 (文件大小：2579K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4681; Rev 1; 3/10
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
General Description
Features
S 8.0V to 16.5V IN Supply-Voltage Range
The MAX17126/MAX17126A generate all the supply rails
for thin-film transistor liquid-crystal display (TFT LCD)
TV panels operating from a regulated 12V input. They
include a step-down and a step-up regulator, a positive
and a negative charge pump, an operational amplifier,
a high-accuracy high-voltage gamma reference, and
a high-voltage switch control block. The MAX17126/
MAX17126A can operate from input voltages from 8V
to 16.5V and is optimized for an LCD TV panel running
directly from 12V supplies.
S Selectable Frequency (500kHz/750kHz)
S Current-Mode Step-Up Regulator
Fast Load-Transient Response
High-Accuracy Output Voltage (1.0%)
Built-In 20V, 4.2A, 100mI MOSFET
High Efficiency
Adjustable Soft-Start
Adjustable Current Limit
Low Duty-Cycle Operation (13.2V - 13.5V AVDD)
IN
The step-up and step-down switching regulators feature
internal power MOSFETs and high-frequency opera-
tion allowing the use of small inductors and capacitors,
resulting in a compact solution. The step-up regulator
provides TFT source driver supply voltage, while the
step-down regulator provides the system with logic sup-
ply voltage. Both regulators use fixed-frequency current-
mode control architectures, providing fast load-transient
response and easy compensation. A current-limit func-
tion for internal switches and output-fault shutdown pro-
tects the step-up and step-down power supplies against
fault conditions. The MAX17126/MAX17126A provide
soft-start functions to limit inrush current during startup.
In addition, the MAX17126/MAX17126A integrate a con-
trol block that can drive an external p-channel MOSFET
to sequence power to source drivers.
S Current-Mode Step-Down Regulator
Fast Load-Transient Response
Built-In 20V, 3.2A, 100mI MOSFET
High Efficiency
3ms Internal Soft-Start
S Adjustable Positive Charge-Pump Regulator
S Adjustable Negative Charge-Pump Regulator
S Integrated High-Voltage Switch with Adjustable
Turn-On Delay
S High-Speed Operational Amplifier
Q200mA Short-Circuit Current
45V/µs Slew Rate
S High-Accuracy Reference for Gamma Buffer
Q1% Feedback Voltage
Up to 30mA Load Current
Low-Dropout Voltage 0.5V at 60mA
The positive and negative charge-pump regulators pro-
vide TFT gate-driver supply voltages. Both output volt-
ages can be adjusted with external resistive voltage-
dividers. A logic-controlled, high-voltage switch block
allows the manipulation of the positive gate-driver supply.
S External p-Channel Gate Control for AVDD
Sequencing
S PGOOD Comparator
The MAX17126/MAX17126A include one high-current
operational amplifier designed to drive the LCD back-
plane (VCOM). The amplifier features high output cur-
rent (Q200mA), fast slew rate (45V/Fs), wide bandwidth
(20MHz), and rail-to-rail outputs.
S Input Undervoltage Lockout and Thermal-
Overload Protection
S 48-Pin, 7mm x 7mm, Thin QFN Package
Ordering Information
Also featured in the MAX17126/MAX17126A is a high-
accuracy, high-voltage adjustable reference for gamma
correction.
PART
TEMP RANGE
-40NC to +85NC
-40NC to +85NC
PIN-PACKAGE
48 Thin QFN-EP*
48 Thin QFN-EP*
MAX17126ETM+
MAX17126AETM+
The MAX17126/MAX17126A are available in a small (7mm
x 7mm), ultra-thin (0.8mm), 48-pin thin QFN package and
operate over the -40NC to +85NC temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Applications
LCD TV Panels
Pin Configuration appears at end of data sheet.
_______________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ABSOLUTE MAXIMUM RATINGS
INVL, IN2, VOP, EN, FSEL to GND .......................-0.3V to +24V
PGND, OGND, CPGND to GND ..........................-0.3V to +0.3V
DLY1, GVOFF, THR, VL to GND ..........................-0.3V to +7.5V
REF, FBP, FBN, FB1, FB2, COMP, SS, CLIM,
VREF_I to GND......................................................-0.3V to +24V
VREF_O to GND.......................................-0.3V, (V
+ 0.3)V
REF_I
REF Short Circuit to GND..........................................Continuous
RMS LX1 Current (total for both pins).................................3.2 A
RMS PGND CURRENT (total for both pins)........................3.2 A
RMS IN2 Current (total for both pins) .................................3.2 A
RMS LX2 Current (total for both pins).................................3.2 A
RMS DRVN, DRVP Current ..................................................0.8A
RMS VL Current..................................................................50mA
PGOOD, VDET, VREF_FB, OUT to GND........-0.3V, (V + 0.3)
L
GD, GD_I to GND..................................................-0.3V to +24V
LX1 to PGND.........................................................-0.3V to +24V
OPP, OPN, OPO to OGND......................... -0.3V to VOP + 0.3V
DRVP to CPGND ...................................... -0.3V to SUPP + 0.3V
DRVN to CPGND......................................-0.3V to SUPN + 0.3V
LX2 to PGND................................................-0.7 to (IN2 + 0.3V)
SUPN to GND.............................................-0.3V to (IN2 + 0.3V)
SUPP to GND ..........................................-0.3V to (GD_I + 0.3V)
BST to VL...............................................................-0.3V to +30V
VGH to GND..........................................................-0.3V to +40V
VGHM, DRN to GND..................................... -0.3V, VGH + 0.3V
VGHM to DRN .......................................................-0.3V to +40V
Continuous Power Dissipation (T
48-Pin TQFN
+70NC)
A =
(derated 38.5mW/NC above +70NC).......................3076.9mW
Junction Temperature .....................................................+160NC
Storage Temperature Range............................ -65NC to +165NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V
erwise noted.)
= V
INVL
= 12V, V
= V
= 15V, T = 0°C to +85°C. Typical values are at T = +25NC, unless oth-
VREF_I A A
IN2
VOP
PARAMETER
GENERAL
CONDITIONS
MIN
TYP
MAX
UNITS
INVL, IN2 Input-Voltage Range
8
16.5
20
V
Only LX2 switching (V
EN = VL, FSEL = high
= V
= 1.5V, V = 0V)
FBN
FB1
FBP
INVL + IN2 Quiescent Current
8.5
24
mA
LX2 not switching (V
= V
= V
= 1.5V,
FB1
FB2
FBP
INVL + IN2 Standby Current
SMPS Operating Frequency
5
mA
kHz
V
V
FBN
= 0V), EN = VL, FSEL = high
FSEL = INVL or high impedance
FSEL = GND
630
420
750
500
870
580
INVL Undervoltage-Lockout
Threshold
INVL rising, 150mV typical hysteresis
6.0
7.0
8.0
VL REGULATOR
I
= 25mA, V
= V
= V
= 1.1V, V = 0.4V
FBN
VL
FB1
FB2
FBP
VL Output Voltage
4.85
3.5
5
5.15
4.3
V
V
(all regulators switching)
VL Undervoltage-Lockout
Threshold
VL rising, 50mV typical hysteresis
3.9
REFERENCE
REF Output Voltage
REF Load Regulation
REF Sink Current
No external load
1.2375
10
1.250 1.2625
5
V
0V < I
< 50FA
mV
FA
LOAD
In regulation
REF Undervoltage-Lockout
Threshold
Rising edge, 250mV typical hysteresis
1.0
1.2
V
2
______________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
erwise noted.)
= V
INVL
= 12V, V
= V
= 15V, T = 0°C to +85°C. Typical values are at T = +25NC, unless oth-
IN2
VOP
VREF_I
A
A
TYP
3.3
PARAMETER
CONDITIONS
MIN
MAX
UNITS
STEP-DOWN REGULATOR
0°C < T = +85°C
3.25
3.267
1.23
3.35
3.333
1.27
FB2 = GND, no load
(Note 1)
A
OUT Voltage in Fixed Mode
V
V
V
T
A
= +25°C
0°C < T = +85°C
1.25
0.15
FB2 Voltage in Adjustable
Mode
V
= 2.5V, no load
A
OUT
(Note 1)
T
A
= +25°C
1.2375
1.2625
FB2 Adjustable Mode
Threshold Voltage
Dual Mode™ comparator
0.10
0.20
Output Voltage Adjust Range
FB2 Fault-Trip Level
1.5
0.96
50
5
V
V
Falling edge
1.0
125
0.5
0.1
1.04
200
FB2 Input Leakage Current
DC Load Regulation
V
FB2
= 1.25V
nA
%
0V < I
< 2A
LOAD
DC Line Regulation
No load, 10.8V < V
< 13.2V
%/V
IN2
LX2-to-IN2 nMOS Switch
On-Resistance
100
10
200
23
mI
I
LX2-to-GND2 nMOS Switch
On-Resistance
6
BST-to-VL pMOS Switch
On-Resistance
40
30
110
I
Low-Frequency Operation
OUT Threshold
LX2 only
0.8
V
FSEL = INVL
FSEL = GND
MAX17126
125
83
Low-Frequency Operation
Switching Frequency
kHz
A
2.50
3.0
3.20
3.5
3
3.90
4.0
LX2 Positive Current Limit
MAX17126A
Zero to full limit
Soft-Start Ramp Time
Maximum Duty Factor
ms
%
70
78
85
10
Minimum Duty Factor
Char/Design Limit Only
%
STEP-UP REGULATOR
Output Voltage Range
Oscillator Maximum Duty Cycle
FB1 Regulation Voltage
FB1 Fault Trip Level
VIN
70
20
85
V
%
78
1.25
1.0
FB1 = COMP, C
Falling edge
= 1nF
1.2375
0.96
1.2625
1.04
V
COMP
V
FB1 Load Regulation
FB1 Line Regulation
0V < I
< full
0.5
%
LOAD
10.8V < V < 13.2V
0.08
125
320
1400
10
%/V
nA
FS
V/V
FA
IN
FB1 Input Bias Current
FB1 Transconductance
FB1 Voltage Gain
V
= 1.25V
30
200
560
FB1
DI = Q2.5FA at COMP, FB1 = COMP
150
FB1 to COMP
LX1 Leakage Current
V
FB1
= 1.5V, V
= 20V
40
LX1
Dual Mode is a trademark of Maxim Integrated Products, Inc.
_______________________________________________________________________________________
3
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
erwise noted.)
= V
INVL
= 12V, V
= V
= 15V, T = 0°C to +85°C. Typical values are at T = +25NC, unless oth-
VREF_I A A
IN2
VOP
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
= 1.1V, R
= unconnected
3.6
4.2
4.8
FB1
FB1
CLIM
4.2 -
(68k/
LX1 Current Limit
A
= 1.1V, with R
at CLIM pin
-20%
+20%
CLIM
R
)
CLIM
0.625
0.21
100
16
CLIM Voltage
R
= 60.5kI
0.56
0.19
0.69
0.25
185
V
CLIM
Current-Sense Transresistance
LX1 On-Resistance
V/A
mI
ms
FA
Soft-Start Period
C
< 200pF
SS
SS Charge Current
V
SS
= 1.2V
4
5
6
POSITIVE CHARGE-PUMP REGULATORS
GD_I Input Supply Range
8.0
20
0.3
V
mA
V
GD_I Input Supply Current
GD_I Overvoltage Threshold
FBP Regulation Voltage
FBP Line Regulation Error
FBP Input Bias Current
V
= 1.5V (not switching)
0.15
21
FBP
GD_I rising, 250mV typical hysteresis (Note 2)
20.1
22
1.2375
1.25
1.2625
0.2
V
V
V
= 11V to 16V, not in dropout
%/V
nA
SUP
FBP
= 1.5V, T = +25°C
-50
+50
A
DRVP p-Channel MOSFET
On-Resistance
1.5
3
I
DRVP n-Channel MOSFET
On-Resistance
1
1.0
4
2
I
FBP Fault Trip Level
Falling edge
0.96
1.04
V
7-bit voltage ramp with filtering to prevent high peak
currents 500kHz frequency
ms
ms
Positive Charge-Pump
Soft-Start Period
750kHz frequency
3
NEGATIVE CHARGE-PUMP REGULATORS
FBN Regulation Voltage
FBN Input Bias Current
FBN Line Regulation Error
V
REF
V
FBN
V
IN2
- V
0.99
-50
1.00
1.01
+50
0.2
3
V
nA
%/V
I
FBN
= 0mV, T = +25°C
A
= 11V to 16V, not in dropout
DRVN P
On-Resistance
On-Resistance
1.5
1
CH
DRVN N
2
I
CH
FBN Fault Trip Level
Rising edge
720
800
880
mV
7-bit voltage ramp with filtering to prevent high peak
currents 500kHz frequency
3
2
Negative Charge-Pump Soft-
Start Period
ms
750kHz frequency
AVDD SWITCH GATE CONTROL
GD to GD_I Pullup Resistance
GD Output Sink Current
EN = GND
EN = VL
25
10
6
50
15
7
I
FA
V
5
5
GD Done Threshold
EN = VL, V
- V
GD_I GD
OPERATIONAL AMPLIFIERS
VOP Supply Range
8
20
V
4
______________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
erwise noted.)
= V
INVL
= 12V, V
= V
= 15V, T = 0°C to +85°C. Typical values are at T = +25NC, unless oth-
IN2
VOP
VREF_I
A
A
PARAMETER
CONDITIONS
= rising, hysteresis = 200mV (Note 2)
MIN
TYP
MAX
UNITS
VOP Overvoltage Fault
Threshold
V
20.1
21
22
V
VOP
VOP Supply Current
Input Offset Voltage
Input Bias Current
Buffer configuration, V
= V
= VOP/2, no load
2
3
4
mA
mV
FA
OPP
OPN
2V < (V
2V < (V
, V
) < (V
- 2V)
- 2V)
14
+1
OPP OPN
VOP
VOP
, V
) < (V
-1
0
OPP OPN
Input Common-Mode
Voltage Range
VOP
300
V
Input Common-Mode
Rejection Ratio
2V < (V
, V
) < (V
- 2V)
80
dB
mV
OPP OPN
VOP
VOP -
320
VOP -
150
Output Voltage Swing High
I
I
= 25mA
OPO
Output Voltage Swing Low
Large-Signal Voltage Gain
Slew Rate
= -25mA
150
80
mV
dB
OPO
2V < (V
, V
) < (V
) < (V
) < (V
- 2V)
OPP OPN
OP
OP
OP
2V < (V
, V
- 2V)
- 2V)
45
V/Fs
MHz
OPP OPN
-3dB Bandwidth
2V < (V
, V
20
OPP OPN
Short to V
Short to V
/2, sourcing
/2, sinking
200
200
VOP
Short-Circuit Current
mA
VOP
HIGH-VOLTAGE SWITCH ARRAY
VGH Supply Range
35
V
VGH Supply Current
150
5
300
FA
VGHM-to-VGH Switch
On-Resistance
V
= 2V, GVOFF = VL
10
I
mA
I
DLY1
VGHM-to-VGH Switch
Saturation Current
V
V
V
- V
> 5V
150
390
20
VGH
VGHM
VGHM-to-DRN Switch
On-Resistance
= 2V, GVOFF = GND
50
DLY1
VGHM-to-DRN Switch
Saturation Current
- V
> 5V
75
200
2.5
mA
kI
VGHM
DRN
VGHM-to-GND Switch
On-Resistance
DLY1 = GND
1.0
4.0
0.6
GVOFF Input Low Voltage
GVOFF Input High Voltage
GVOFF Input Current
V
V
1.6
-1
V
= 0V or VL, T = +25°C
+1
FA
GVOFF
A
1kI from DRN to CPGND, V
load on VGHM, measured from GVOFF = 2V to VGHM
= 20%
= 0V to VL step, no
GVOFF
GVOFF-to-VGHM Rising
Propagation Delay
100
ns
1kIfrom DRN to CPGND, V
= VL to 0V step, no
GVOFF
GVOFF-to-VGHM Falling
Propagation Delay
load on VGHM, DRN falling, no load on DRN and VGHM,
measured from V = 0.6V to VGHM = 80%
200
10
ns
GVOFF
THR-to-VGHM Voltage Gain
9.4
10.6
V/V
_______________________________________________________________________________________
5
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
erwise noted.)
= V
INVL
= 12V, V
= V
= 15V, T = 0°C to +85°C. Typical values are at T = +25NC, unless oth-
IN2
VOP
VREF_I
A
A
PARAMETER
SEQUENCE CONTROL
EN Pulldown Resistance
CONDITIONS
MIN
TYP
MAX
UNITS
1
8
MI
FA
V
V
= 1V; when DLY1 cap is not used, there is no
DLY1
DLY1 Charge Current
6
10
delay
EN, DLY1 Turn-On Threshold
1.19
1.25
10
1.31
DLY1 Discharge Switch
On-Resistance
EN = GND or fault tripped
I
FBN Discharge Switch
On-Resistance
(EN = GND and INVL < UVLO) or fault tripped
3
kI
GAMMA REFERENCE
VREF_I Input-Voltage Range
VREF_I Input Bias Current
VREF_O Dropout Voltage
10
18.0
250
V
FA
V
No load
125
0.25
I
= 60mA
0.5
VREF_O
V
= 13.5V, 1mA PI
from 10V to 18V, I
P30mA, V
= 9.5V
= 9.5V
1.243
60
1.250
1.256
P 0.9
V
VREF_I
VREF_O
VREF_O
VREF_FB Regulation Voltage
V
= 20mA, V
mV/V
VREF_I
VREF_O
VREF_O
VREF_O Maximum Output
Current
mA
PGOOD FUNCTION
VDET Threshold
VDET rising
1.274
50
1.3
50
1.326
V
mV
nA
V
VDET Hysteresis
VDET Input Bias Current
PGOOD Output Voltage
FAULT DETECTION
Duration-to-Trigger Fault
175
300
0.4
VDET = AGND, I
For UVP only
= 1mA
PGOOD
50
ms
V
0.36 x
0.4 x
0.44 x
V
REF
Step-Up Short-Circuit Protection FB1 falling edge
V
V
REF
REF
0.18 x
0.2 x
0.22 x
V
REF
Adjustable mode FB2 falling
V
V
REF
REF
Step-Down Short-Circuit
Protection
V
V
Fixed mode OUT falling, internal feedback divider
voltage
0.18 x
0.2 x
0.22 x
V
REF
V
V
REF
REF
Positive Charge-Pump
Short-Circuit Protection
0.36 x
0.4 x
0.44 x
V
REF
FBP falling edge
V
V
REF
REF
Negative Charge-Pump
Short-Circuit Protection
V
REF
- V
0.4
0.45
0.5
V
FBN
Thermal-Shutdown Threshold
Latch protection
+160
NC
6
______________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
erwise noted.)
= V
INVL
= 12V, V
= V
= 15V, T = 0°C to +85°C. Typical values are at T = +25NC, unless oth-
IN2
VOP
VREF_I
A
A
PARAMETER
SWITCHING FREQUENCY SELECTION
CONDITIONS
MIN
TYP
MAX
UNITS
FSEL Input Low Voltage
FSEL Input High Voltage
FSEL Pullup Resistance
500kHz
750kHz
0.6
V
V
1.6
1
MI
ELECTRICAL CHARACTERISTICS
(V
INVL
= V
= 12V, V
= V
= 15V, T = -40NC to +85NC.) (Note 3)
IN2
VOP
VREF_I
A
PARAMETER
GENERAL
CONDITIONS
MIN
TYP
MAX
UNITS
INVL, IN2 Input-Voltage Range
8
16.5
870
580
V
FSEL = INVL or high impedance
FSEL = GND
630
420
SMPS Operating Frequency
kHz
INVL Undervoltage-Lockout
Threshold
INVL rising, 150mV typical hysteresis
6.0
8.0
V
VL REGULATOR
I
= 25mA, V
= V
= V = 1.1V, V
= 0.4V
VL
FB1
FB2
FB
FBN
VL Output Voltage
4.85
3.5
5.15
4.3
V
V
(all regulators switching)
VL Undervoltage-Lockout
Threshold
VL rising, 50mV typical hysteresis
REFERENCE
REF Output Voltage
No external load
1.235
1.265
1.2
V
V
REF Undervoltage-Lockout
Threshold
Rising edge, 25mV typical hysteresis
STEP-DOWN REGULATOR
OUT Voltage in Fixed Mode
FB2 Voltage in Adjustable Mode
FB2 = GND, no load (Note 1)
3.267
3.333
V
V
V
= 2.5V, no load (Note 1)
1.2375
1.2625
OUT
FB2 Adjustable Mode
Threshold Voltage
Dual-mode comparator
Falling edge
0.10
0.20
V
Output Voltage Adjust Range
FB2 Fault Trip Level
1.5
5
V
V
0.96
1.04
LX2-to-IN2 nMOS Switch
On-Resistance
200
23
mI
I
LX2-to-GND2 nMOS Switch
On-Resistance
6
BST-to-VL pMOS Switch
On-Resistance
40
110
I
MAX17126
2.50
3.0
70
3.90
4.0
85
LX2 Positive Current Limit
Maximum Duty Factor
A
MAX17126A
%
_______________________________________________________________________________________
7
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(V
INVL
= V
= 12V, V
= V
= 15V, T = -40NC to +85NC.) (Note 3)
IN2
VOP
VREF_I
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
STEP-UP REGULATOR
Output-Voltage Range
VIN
70
20
85
V
%
V
Oscillator Maximum Duty Cycle
FB1 Regulation Voltage
FB1 Fault Trip Level
FB1 = COMP, C
Falling edge
= 1nF
1.2375
0.96
150
1.2625
1.04
560
40
COMP
V
FB1 Transconductance
LX1 Input Bias Current
DI = Q2.5FA at COMP, FB1 = COMP
FS
FA
V
V
V
= 1.5V, V
= 20V
LX1
FB1
FB1
FB1
= 1.1V, R
= unconnected
3.6
4.8
CLIM
LX1 Current Limit
A
= 1.1V , with R
at CLIM pin, limit = 3.5A -
CLIM
-20%
+20%
(60.5K/R
)
CLIM
CLIM Voltage
R
= 60.5kI
0.56
0.19
0.69
0.25
185
6
V
CLIM
Current-Sense Transresistance
LX1 On-Resistance
SS Charge Current
V/A
mI
FA
V
= 1.2V
4
SS
POSITIVE CHARGE-PUMP REGULATORS
GD_I Input Supply Range
8.0
20
0.2
V
mA
V
GD_I Input Supply Current
GD_I Overvoltage Threshold
FBP Regulation Voltage
V
= 1.5V (not switching)
FBP
GD_I rising, 250mV typical hysteresis (Note 2)
V = 11V to 16V, not in dropout
SUP
20.1
22
1.243
1.256
0.2
V
FBP Line Regulation Error
%/V
DRVP p-Channel MOSFET
On-Resistance
3
I
DRVP n-Channel MOSFET
On-Resistance
1
I
FBP Fault Trip Level
Falling edge
0.96
0.99
1.04
V
NEGATIVE CHARGE-PUMP REGULATORS
FBN Regulation Voltage
FBN Line Regulation Error
V
REF
V
IN2
- V
1.01
0.2
3
V
FBN
= 11V to 16V, not in dropout
%/V
I
DRVN P
On-Resistance
On-Resistance
CH
DRVN N
1
I
CH
FBN Fault Trip Level
Rising edge
720
880
mV
AVDD SWITCH GATE CONTROL
GD Output Sink Current
GD Done Threshold
EN = VL
5
5
15
7
FA
EN = VL, VGD_I - VGD
V
8
______________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(V
INVL
= V
= 12V, V
= V
= 15V, T = -40NC to +85NC.) (Note 3)
IN2
VOP
VREF_I
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OPERATIONAL AMPLIFIERS
VOP Supply Range
8
20
22
4
V
V
VOP Overvoltage Fault Threshold
VOP Supply Current
V
= rising, hysteresis = 200mV (Note 2)
20.1
OP
Buffer configuration, V
= V
= V /2, no load
mA
mV
OPP
OPN
OP
Input Offset Voltage
2V < (V
, V
) < (V
- 2V)
14
OPP OPN
OP
Input Common-Mode
Voltage Range
0
OVIN
V
VOP -
320
Output Voltage Swing High
Output Voltage Swing Low
Short-Circuit Current
I
I
= 25mA
mV
mV
mA
OPO
OPO
= -25mA
300
Short to V
Short to V
/2, sourcing
/2, sinking
200
200
OPO
OPO
HIGH-VOLTAGE SWITCH ARRAY
VGH Supply Range
35
V
VGH Supply Current
300
FA
VGHM-to-VGH Switch
On-Resistance
V
V
V
V
= 2V, GVOFF = VL
10
I
mA
I
DLY1
VGHM-to-VGH Switch
Saturation Current
- V
> 5V
150
VGH
VGHM
VGHM-to-DRN Switch
On-Resistance
= 2V, GVOFF = GND
50
DLY1
VGHM-to-DRN Switch
Saturation Current
- V
> 5V
75
mA
kI
VGHM
DRN
VGHM-to-GND Switch
On-Resistance
DLY1 = GND
1.0
4.0
0.6
GVOFF Input Low Voltage
GVOFF Input High Voltage
THR-to-VGHM Voltage Gain
SEQUENCE CONTROL
EN Input Low Voltage
V
V
1.6
9.4
10.6
0.6
V/V
V
V
EN Input High Voltage
1.6
6
V
= 1V; when DLY1 cap is not used,
DLY1
DLY1 Charge Current
10
FA
there is no delay
DLY1 Turn-On Threshold
1.19
1.31
V
_______________________________________________________________________________________
9
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(V
INVL
= V
= 12V, V
= V
= 15V, T = -40NC to +85NC.) (Note 3)
IN2
VOP
VREF_I
A
PARAMETER
GAMMA REFERENCE
CONDITIONS
MIN
TYP
MAX
UNITS
VREF_I Input Voltage Range
VREF_I Undervoltage Lockout
VREF_I Input Bias Current
VREF_O Dropout Voltage
10
18.0
5.2
V
V
VREF_I rising
No load
250
FA
V
I
= 60mA
0.5
VREF_O
V
V
= 13.5V, 1mA ≤ I
≤ 30mA
= 20mA
1.2375
60
1.2625
P 0.9
V
REF_I
REF_I
VREF_O
VREF_FB Regulation Voltage
from 10V to 18V, I
mV/V
VREF_O
VREF_O Maximum
Output Current
mA
PGOOD FUNCTION
VDET Threshold
VDET rising
1.274
1.326
0.4
V
V
PGOOD Output Voltage
FAULT DETECTION
VDET = AGND, I
= 1mA
PGOOD
Step-Up Short-Circuit
Protection
0.36 x
0.44 x
V
REF
FB1 falling edge
V
V
V
V
V
V
REF
0.18 x
0.22 x
V
REF
Adjustable mode FB2 falling
V
REF
Step-Down Short-Circuit
Protection
Fixed mode OUT falling, internal feedback divider
voltage
0.18 x
0.22 x
V
REF
V
REF
Positive Charge-Pump
Short-Circuit Protection
0.36 x
0.44 x
V
REF
FBP falling edge
V
REF
Negative Charge-Pump
Short-Circuit Protection
V
- V
0.4
0.5
0.6
REF
FBN
SWITCHING FREQUENCY SELECTION
FSEL Input Low Voltage
FSEL Input High Voltage
500kHz
750kHz
V
V
1.6
Note 1: When the step-down inductor is in continuous conduction (EN = VL or heavy load), the output voltage has a DC regulation
level lower than the error comparator threshold by 50% of the output voltage ripple. In discontinuous conduction (EN = GND
with light load), the output voltage has a DC regulation level higher than the error comparator threshold by 50% of the output
voltage ripple.
Note 2: Disables boost switching if either GD_I or VOP exceeds the threshold. Switching resumes when no threshold is exceeded.
Note 3: Specifications to T = -40NC are guaranteed by design, not production tested.
A
10 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
STEP-DOWN REGULATOR EFFICIENCY
STEP-DOWN REGULATOR OUTPUT
VOLTAGE vs. LOAD CURRENT
vs. LOAD CURRENT
85
80
75
70
65
60
55
50
3.350
3.325
3.300
3.275
750kHz
750kHz
500kHz
500kHz
0.10
1.00
10.00
0
0.42 0.80 1.20 1.60 2.00 2.40
LOAD CURRENT (A)
LOAD CURRENT (A)
STEP-DOWN REGULATOR LOAD
STEP-DOWN REGULATOR HEAVY-LOAD
TRANSIENT RESPONSE (0.3A TO 1.8A)
SOFT-START (1A)
MAX17126 toc03
MAX17126 toc04
V
IN
5V/div
V
OUT
V
OUT
0V
(AC-COUPLED)
200mV/div
1V/div
0V
0V
I
L2
I
L2
1A/div
0A
0A
1A/div
0A
0A
I
LOAD
LX2
10V/div
1A/div
20Fs/div
4ms/div
L = 4.7FH
STEP-UP REGULATOR OUTPUT
VOLTAGE vs. LOAD CURRENT
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT
16.445
16.440
16.435
16.430
16.425
16.420
16.415
16.410
100
95
90
85
80
75
70
65
60
55
50
500kHz
750kHz
500kHz
750kHz
0
0.5
1.0
1.5
2.0
2.5
0.01
0.10
1.00
10.00
LOAD CURRENT (A)
LOAD CURRENT (A)
______________________________________________________________________________________ 11
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
STEP-UP REGULATOR LOAD TRANSIENT
RESPONSE (0.1A TO 1.1A)
STEP-UP REGULATOR PULSED LOAD
TRANSIENT RESPONSE (0.1A TO 1.9mA)
MAX17126 toc07
MAX17126 toc08
I
I
LOAD
1A/div
LOAD
0V
0A
1A/div
0V
0A
V
V
AVDD
(AC-COUPLED)
200mV/div
AVDD
(AC-COUPLED)
200mV/div
I
I
L1
1A/div
L1
0A
0A
1A/div
20Fs/div
10Fs/div
L = 10FH
L = 10FH
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
STEP-UP REGULATOR HEAVY LOAD
SOFT-START (0.5A)
MAX17126 toc09
498
497
496
495
494
493
492
491
490
489
488
EN
5V/div
0V
0V
V
AVDD
5V/div
V
GD
5V/div
0V
0A
I
L1
1A/div
8
10
12
(V)
14
16
1ms/div
V
IN
GAMMA REFERENCE LOAD
REFERENCE VOLTAGE LOAD
REGULATION
GAMMA REFERENCE LINE REGULATION
(LOAD = 20mA)
REGULATION (V
= 16V)
REF
15.2
15.1
15.0
14.9
14.8
14.7
14.6
14.5
1.2490
1.2485
1.2480
1.2475
1.2470
1.2465
15.14
15.09
15.04
14.99
14.94
14.89
14.84
SWITCHING
NO SWITCHING
0
50
100
150
200
250
0
50
100
150
200
15.0 15.5 16.0 16.5 17.0 17.5 18.0
VOP VOLTAGE (V)
LOAD CURRENT (mA)
LOAD CURRENT (FA)
12 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
POSITIVE CHARGE-PUMP REGULATOR
NORMALIZED LINE REGULATION
POSITIVE CHARGE-PUMP REGULATOR
NORMALIZED LOAD REGULATION
2
0
0.5
0
I
= 0A
GON
-2
-0.5
-1.0
-1.5
-2.0
-4
I
= 25mA
-6
GON
-8
-10
-12
10 11 12 13 14 15 16 17 18
SUPP VOLTAGE (V)
0
50
100
150
LOAD CURRENT (mA)
NEGATIVE CHARGE-PUMP REGULATOR
NORMALIZED LINE REGULATION
POSITIVE CHARGE-PUMP REGULATOR
LOAD-TRANSIENT RESPONSE
0.01
0
MAX17126 toc16
I
= 25mA
GON
V
GON
0V
0A
-0.01
-0.02
-0.03
-0.04
(AC-COUPLED)
200mV/div
I
= 0mA
GON
60mA
I
LOAD
20mA/div
10mA
8
9
10 11 12 13 14 15 16
SUPN VOLTAGE (V)
40Fs/div
NEGATIVE CHARGE-PUMP REGULATOR
NORMALIZED LOAD REGULATION
NEGATIVE CHARGE-PUMP REGULATOR
LOAD TRANSIENT RESPONSE
MAX17126 toc19
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
V
GOFF
0V
0A
(AC-COUPLED)
200mV/div
60mA
I
LOAD
20mA/div
10mA
0
50
100
150
200
250
300
20Fs/div
LOAD CURRENT (mA)
______________________________________________________________________________________ 13
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
OP AMP SUPPLY CURRENT
vs. SUPPLY VOLTAGE
POWER-UP SEQUENCE OF ALL
SUPPLY OUTPUTS
MAX17126 toc19
2.65
2.60
2.55
2.50
2.45
2.40
2.35
2.30
V
V
IN
0V
OUT
0V
0V
V
V
V
GOFF
AVDD
GON
0V
0V
0V
0V
0V
V
V
COM
DLY1
V
GHM
0V
8
9
10 11 12 13 14 15 16 17 18 19 20
VOP VOLTAGE (V)
10ms/div
V
V
V
V
= 10V/div
V
GON
V
COM
V
DLY1
V
GHM
= 20V/div
= 10V/div
= 5V/div
IN
= 5V/div
OUT
GOFF
AVDD
= 10V/div
=10V/div
= 50V/div
OPERATIONAL AMPLIFIER RAIL-TO-RAIL
OPERATIONAL AMPLIFIER LOAD
TRANSIENT RESPONSE
INPUT/OUTPUT WAVEFORMS
MAX17126 toc21
MAX17126 toc22
V
OPP
5V/div
V
COM
0V
0A
(AC-COUPLED)
500mV/div
0V
0V
V
COM
5V/div
I
VCOM
100mA/div
4Fs/div
1Fs/div
14 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
OPERATIONAL AMPLIFIER
SMALL-SIGNAL STEP RESPONSE
V
SUPPLY CURRENT vs. V VOLTAGE
IN
IN
MAX17126 toc25
7
6
5
4
3
2
1
0
ALL OUTPUT SWITCHING
BUCK OUTPUT SWITCHING
NO OUTPUT SWITCHING
V
OPP
0V
0V
(AC-COUPLED)
200mV/div
V
COM
(AC-COUPLED)
200mV/div
100ns/div
8
10
12
14
16
INPUT VOLTAGE (V)
OPERATIONAL AMPLIFIER
HIGH-VOLTAGE SWITCH CONTROL
LARGE-SIGNAL STEP RESPONSE
FUNCTION (VGHM WITH 470pF LOAD)
MAX17126 toc23
MAX17126 toc27
V
GVOFF
5V/div
0V
0V
V
GHM
V
OPP
10V/div
0V
0V
5V/div
V
COM
5V/div
1Fs/div
4Fs/div
______________________________________________________________________________________ 15
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Pin Description
PIN
1
NAME
VREF_I
VOP
FUNCTION
Gamma Reference Input
2
Operational Amplifier Power Supply
Operational Amplifier Power Ground
Operational Amplifier Noninverting Input
Operational Amplifier Inverting Input
Operational Amplifier Output
3
OGND
OPP
4
5
OPN
6
OPO
7
PGOOD Input voltage power-good open-drain output pulled high to VL or 3.3V through 10kI resistor.
High-Voltage Switch-Control Block Timing Control Input. See the High-Voltage Switch Control
section for details.
8
9
GVOFF
EN
Enable Input. Enable is high, turns on step-up converter and positive charge pump.
Step-Down Regulator Feedback Input. Connect FB2 to GND to select the step-down converter’s 3.3V
fixed mode. For adjustable mode, connect FB2 to the center of a resistive voltage-divider between the
step-down regulator output (OUT) and GND to set the step-down regulator output voltage. Place the
resistive voltage-divider within 5mm of FB2.
10
FB2
11
12
OUT
N.C.
Step-Down Regulator Output Voltage Sense. Connect OUT to step-down regulator output.
Not Connected
Step-Down Regulator Switching Node. LX2 is the source of the internal n-channel MOSFET connected
between IN2 and LX2. Connect the inductor and Schottky catch diode to both LX2 pins and minimize
the trace area for lowest EMI.
13, 14
15
LX2
BST
Step-Down Regulator Bootstrap Capacitor Connection. Power supply for high-side gate driver. Connect
a 0.1FF ceramic capacitor from BST to LX2.
Step-Down Regulator Power Input. Drain of the internal n-channel MOSFET connected between IN2
and LX2.
16, 17
18, 44
19
IN2
GND
VDET
Analog Ground
Voltage-Detector Input. Connects VDET to the center of a resistor voltage-divider between input voltage
and GND to set the trigger point of PGOOD.
Internal 5V Linear Regulator and the Startup Circuitry Power Supply. Bypass V
close to the IC.
to GND with 0.22FF
INVL
20
21
INVL
VL
5V Internal Linear Regulator Output. Bypass VL to GND with 1FF minimum. Provides power for the
internal MOSFET driving circuit, the PWM controllers, charge-pump regulators, logic, and reference
and other analog circuitry. Provides 25mA load current when all switching regulators are enabled. VL is
active whenever input voltage is high enough.
Frequency Select Pin. Connect FSEL to VL or INVL or float FSEL pin for 750kHz operation. Connect to
GND for 500kHz operation.
22
23
FSEL
CLIM
Boost Current-Limit Setting Input. Connects a resistor from CLIM to GND to set current limit for boost
converter.
Soft-Start Input. Connects a capacitor from SS to GND to set the soft-start time for the step-up convert-
er. A 5FA current source starts to charge C when GD is done. See the Step-Up Regulator External
pMOS Pass Switch section for description. SS is internally pulled to GND through 1kI resistance when
SS
24
SS
EN is low OR when VL is below its UVLO threshold.
Step-Up Regulator Power-MOSFET n-Channel Drain and Switching Node. Connects the inductor and
Schottky catch diode to both LX1 pins and minimizes the trace area for lowest EMI.
25, 26
27, 28
29
LX1
PGND
GD_I
Step-Up Regulator Power Ground
Step-Up Regulator External pMOS Pass Switch Source Input. Connects to the cathode of the step-up
regulator Schottky catch diode.
16 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Pin Description (continued)
PIN
NAME
FUNCTION
Step-Up Regulator External pMOS Pass Switch Gate Input. A 10FA P 20% current source pulls down
on the gate of the external pFET when EN is high.
30
GD
Boost Regulator Feedback Input. Connects FB1 to the center of a resistive voltage-divider between the
boost regulator output and GND to set the boost regulator output voltage. Place the resistive voltage-
divider within 5mm of FB1.
31
32
33
FB1
COMP
THR
Compensation Pin for the Step-Up Regulator Error Amplifier. Connects a series resistor and capacitor
from COMP to ground.
VGHM Low-Level Regulation Set-Point Input. Connects THR to the center of a resistive voltage-divider
between AVDD and GND to set the V
falling regulation level. The actual level is 10 x V . See the
THR
GHM
Switch Control section for details.
Positive Charge-Pump Drivers Power Supply. Connects to the output of the boost regulator (AVDD) and
bypasses to CPGND with a 0.1FF capacitor. SUPP is internally connected to GD_I.
34
35
36
SUPP
CPGND Charge Pump and Buck Power Ground
DRVP
Positive Charge-Pump Driver Output. Connects DRVP to the positive charge-pump flying capacitor(s).
High-Voltage Switch Array Delay Input. Connects a capacitor from DLY1 to GND to set the delay time
between when the positive charge pump finishes its soft-start and the startup of this high-voltage switch
37
DLY1
array. A 10FA current source charges C . DLY1 is internally pulled to GND through 50I resistance
DLY1
when EN is low or when VL is below its UVLO threshold.
Positive Charge-Pump Regulator Feedback Input. Connects FBP to the center of a resistive voltage-
divider between the positive charge-pump regulator output and GND to set the positive charge-pump
regulator output voltage. Place the resistive voltage-divider within 5mm of FBP.
38
FBP
39
40
41
42
VGH
VGHM
DRN
Switch Input. Source of the internal high-voltage p-channel MOSFET between VGH and VGHM.
Internal High-Voltage MOSFET Switch Common Terminal. VGHM is the output of the high-voltage
switch-control block.
Switch Output. Drain of the internal high-voltage p-channel MOSFET connected to VGHM.
Negative Charge-Pump Drivers Power Supply. Bypass to CPGND with a 0.1FF capacitor. SUPN is inter-
nally connected to IN2.
SUPN
Negative Charge-Pump Driver Output. Connects DRVN to the negative charge-pump flying
capacitor(s).
43
45
46
47
DRVN
FBN
Negative Charge-Pump Regulator Feedback Input. Connect FBN to the center of a resistive voltage-
divider between the negative output and REF to set the negative charge-pump regulator output voltage.
Place the resistive voltage-divider within 5mm of FBN.
Reference Output. Connects a 0.22FF capacitor from REF to GND. All power outputs are disabled until
REF exceeds its UVLO threshold.
REF
Gamma Reference Feedback Input. Connect VREF_FB to the center of a resistive voltage-divider
VREF_FB between VREF_O and GND to set the gamma reference output voltage. Place the resistive voltage-
divider within 5mm of VREF_FB.
48
—
VREF_O Gamma Reference Output
Exposed Pad. Connects EP to GND, and ties EP to a copper plane or island. Maximizes the area of this
EP
copper plane or island to improve thermal performance.
______________________________________________________________________________________ 17
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
VIN
12V
C1
L1
10µH
D1
C2
0.1µF
BST
LX1
LX1
IN2
IN2
C4
PGND
PGND
FB1
COMP
R2
L2
C
1nF
COMP
R
COMP
OUT
3.3V, 1.5A
FSEL
CLIM
LX2
LX2
25kI
D2
C5
R1
OUT
FB2
GD_I
GD
Q1
VL (OR 3.3V)
VIN
10kI
MAX17126
MAX17126A
R7
68.1kI
AVDD
16V, 1A
PGOOD
VDET
VIN
0.1µF
INVL
C3
R8
422kI
VL
VL
VOP
1µF
13.3kI
2.2kI
OPP
OPN
0.1µF
REF
0.22µF
REF
GND
OPO
OGND
1kI
ON/OFF
EN
DRN
THR
13.3kI
2.2kI
VCOM
DLY1
SS
0.1uF
3Ω
UNCONNECTED OR 150nF
AVDD
FROM
TCON
GVOFF
VGHM
150µF
VREF_I
VGHM
GREF
VREF_O
VGH
1.61kI
1.3nF
SUPP
R9
0.1µF
VREF_FB
SUPN
VGH
35V, 50mA
D3
R10
0.1µF
DRVP
1µF
C12
D4
DRVN
VGOFF
-6V, 50mA
C14
R3
R4
0.1µF
C11
1µF
FBN
FBP
CPGND
AVDD
R5
C10
0.1µF
C13
D5
C15
33pF
R6
REF
Figure 1. Typical Operating Circuit
18 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Typical Operating Circuit
Detailed Description
The typical operating circuit (Figure 1) of the MAX17126/
MAX17126A comprise a complete power-supply system
for TFT LCD TV panels. The circuit generates a +3.3V
logic supply, a +16V source driver supply, a +35V posi-
tive gate-driver supply, a -6V negative gate-driver supply,
and a P 0.5% high-accuracy, high-voltage gamma refer-
ence. Table 1 lists some selected components and Table
2 lists the contact information for component suppliers.
The MAX17126/MAX17126A are multiple-output power
supplies designed primarily for TFT LCD TV panels. It
contains a step-down switching regulator to generate the
supply for system logic, a step-up switching regulator to
generate the supply for source driver, and two charge-
pump regulators to generate the supplies for TFT gate
drivers, a high-accuracy, high-voltage reference supply
for gamma correction. Each regulator features adjust-
able output voltage, digital soft-start, and timer-delayed
fault protection. Both the step-down and step-up regula-
tors use fixed-frequency current-mode control architec-
ture. The two switching regulators are 180N out of phase
to minimize the input ripple. The internal oscillator offers
two pin-selectable frequency options (500kHz/750kHz),
allowing users to optimize their designs based on the
specific application requirements. The step-up regu-
lator also features adjustable current limit that can
be adjusted through a resistor at the CLIM pin. The
MAX17126/MAX17126A include one high-performance
operational amplifier designed to drive the LCD back-
plane (VCOM). The amplifier features high-output cur-
rent (P 200mA), fast slew rate (45V/Fs), wide bandwidth
(20MHz), and rail-to-rail outputs. The high-accuracy,
high-voltage gamma reference has its error controlled to
within P 0.5% and can deliver more than 60mA current.
In addition, the MAX17126/MAX17126A feature a high-
voltage switch-control block, an internal 5V linear regula-
tor, a 1.25V reference output, well-defined power-up and
power-down sequences, and fault and thermal-overload
protection. Figure 2 shows the MAX17126/MAX17126A
functional diagram.
Table 1. Component List
DESIGNATION
DESCRIPTION
10FF P Q10%, 25V X5R ceramic
capacitors (1206)
Murata GRM31CR61E106K
TDK C3216X5R1E106M
C1–C4
22FF Q10%, 6.3V X5R ceramic capacitor
(0805)
Murata GRM21BR60J226K
TDK C2012X5R0J226K
C5
Schottky diodes 30V, 3A (M-flat)
Toshiba CMS02
D1, D2
Dual diodes 30V, 200mA (3 SOT23)
Zetex BAT54S
Fairchild BAT54S
D3, D4, D5
Inductor, 10FH, 3A, 45mI inductor
(8.3mm x 9.5mm x 3mm)
Coiltronics SD8328-100-R
Sumida CDRH8D38NP-100N (8.3mm x
8.3mm x 4mm)
L1
L2
Inductor, 4.7FH, 3A, 24.7mI inductor
(8.3mm x 9.5mm x 3mm)
Coiltronics SD8328-4R7-R
Sumida CDRH8D38NP-4R7N (8.3mm x
8.3mm x 4mm)
Table 2. Operating Mode
SUPPLIER
Fairchild Semiconductor
Sumida Corp.
PHONE
FAX
WEBSITE
www.fairchildsemi.com
www.sumida.com
408-822-2000
847-545-6700
847-803-6100
949-455-2000
408-822-2102
847-545-6720
847-390-4405
949-859-3963
TDK Corp.
www.component.tdk.com
www.toshiba.com/taec
Toshiba America Electronic Components, Inc.
______________________________________________________________________________________ 19
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
VIN
L1
BST
IN2
LX1
VL
OUT
LX2
STEP-UP
REG
STEP-DOWN
REG
PGND
FB1
OSC
COMP
OUT
FSEL
CLIM
GD_I
GD
VL (OR 3.3V)
VIN
AVDD
FB2
150mV
VIN
INVL
REF
PGOOD
VDET
VL
VL
VL
REF
REF
REF
VOP
OPP
GND
EN
VCOM
AMP
ON/OFF
DLY1
SS
OPN
OPO
VCOM
OGND
AVDD
VREF_I
DRN
GREF
VREF_O
GAMMA
REF
THR
HIGH-
VOLTAGE
SWITCH
BLOCK
GVOFF
FROM
TCON
VREF_FB
SUPN
VGHM
VGHM
VGH
IN2
SUPP
50%
OSC
GD_I
VGH
DRVP
VGOFF
NEGATIVE
CHARGE
PUMP
POSITIVE
CHARGE
PUMP
DRVN
CPGND
CPGND
FBN
FBP
AVDD
REF
Figure 2. Functional Diagram
20 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Dual-Mode Feedback
The step-down regulator of the MAX17126/MAX17126A
support both fixed output and adjustable output. Connect
FB2 to GND to enable the 3.3V fixed-output voltage.
Connect a resistive voltage-divider between OUT and
GND with the center tap connected to FB2 to adjust the
output voltage. Choose RB (resistance from FB2 to GND)
to be between 5kI and 50kI, and solve for RA (resis-
tance from OUT to FB2) using the equation:
Step-Down Regulator
The step-down regulator consists of an internal n-chan-
nel MOSFET with gate driver, a lossless current-sense
network, a current-limit comparator, and a PWM con-
troller block. The external power stage consists of a
Schottky diode rectifier, an inductor, and output capaci-
tors. The output voltage is regulated by changing the
duty cycle of the high-side MOSFET. A bootstrap circuit
that uses a 0.1FF flying capacitor between LX2 and BST
provides the supply voltage for the high-side gate driver.
Although the MAX17126/MAX17126A also include a 10I
(typ) low-side MOSFET, this switch is used to charge the
bootstrap capacitor during startup and maintains fixed-
frequency operation at light load and cannot be used as
a synchronous rectifier. An external Schottky diode (D2
in Figure 1) is always required.
V
OUT
RA = RB×
-1
V
FB2
where V
= 1.25V, and V
may vary from 1.5V to 5V.
FB2
OUT
Because FB2 is a very sensitive pin, a noise filter is gen-
erally required for FB2 in adjustable-mode operation.
Place an 82pF capacitor from FB2 to GND to prevent
unstable operation. No filter is required for 3.3V fixed-
mode operation.
PWM Controller Block
The heart of the PWM control block is a multi-input, open-
loop comparator that sums three signals: the output-
voltage signal with respect to the reference voltage, the
current-sense signal, and the slope-compensation signal.
The PWM controller is a direct-summing type, lacking a
traditional error amplifier and the phase shift associated
with it. This direct-summing configuration approaches
ideal cycle-by-cycle control over the output voltage.
Soft-Start
The step-down regulator includes a 7-bit soft-start DAC
that steps its internal reference voltage from zero to
1.25V in 128 steps. The soft-start period is 3ms (typ)
and FB2 fault detection is disabled during this period.
The soft-start feature effectively limits the inrush current
during startup (see the Step-Down Regulator Soft-Start
Waveforms in the Typical Operating Characteristics).
The step-down controller always operates in fixed-fre-
quency PWM mode. Each pulse from the oscillator sets
the main PWM latch that turns on the high-side switch
until the PWM comparator changes state. As the high-
side switch turns off, the low-side switch turns on. The
low-side switch stays on until the beginning of the next
clock cycle.
Step-Up Regulator
The step-up regulator employs a current-mode, fixed-fre-
quency PWM architecture to maximize loop bandwidth
and provide fast-transient response to pulsed loads
typical of TFT LCD panel source drivers. The integrated
MOSFET and the built-in digital soft-start function reduce
the number of external components required while
controlling inrush currents. The output voltage can be
Current Limiting and Lossless Current Sensing
The current-limit circuit turns off the high-side MOSFET
switch whenever the voltage across the high-side
MOSFET exceeds an internal threshold. The actual cur-
rent limit is typically 3.2A for MAX17126 and 3.5A for
MAX17126A.
set from V to 16.5V with an external resistive voltage-
IN
divider. The regulator controls the output voltage and the
power delivered to the output by modulating duty cycle
D of the internal power MOSFET in each switching cycle.
The duty cycle of the MOSFET is approximated by:
For current-mode control, an internal lossless sense
network derives a current-sense signal from the inductor
DCR. The time constant of the current-sense network is
not required to match the time constant of the inductor
and has been chosen to provide sufficient current ramp
signal for stable operation at both operating frequencies.
The current-sense signal is AC-coupled into the PWM
comparator, eliminating most DC output-voltage varia-
tion with load current.
V
+ V
+ V
- V
IN
AVDD
DIODE
- V
DIODE LX1
D ≈
V
AVDD
where V
is the output voltage of the step-up regu-
is the voltage drop across the diode, and
AVDD
lator, V
V
DIODE
is the voltage drop across the internal MOSFET.
LX1
______________________________________________________________________________________ 21
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
PWM Controller Block
An error amplifier compares the signal at FB1 to 1.25V
and changes the COMP output. The voltage at COMP
sets the peak inductor current. As the load varies, the
error amplifier sources or sinks current to the COMP
output accordingly to produce the inductor peak cur-
rent necessary to service the load. To maintain stabil-
ity at high duty cycles, a slope compensation signal is
summed with the current-sense signal.
during the output capacitor initial charge, and to provide
true shutdown when the step-up regulator is disabled.
When EN is low, GD is internally pulled up to the GD_I
through a 25Iresistor. Once EN is high and the negative
charge-pump regulator is in regulation, the GD starts pull-
ing down with a 10FA (typ) internal current source. The
external p-channel MOSFET turns on and connects the
cathode of the step-up regulator Schottky catch diode
to the step-up regulator load capacitors when GD falls
below the turn-on threshold of the MOSFET. When V
GD
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The
current through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the current-
feedback signal and the slope compensation exceed
the COMP voltage, the controller resets the flip-flop
and turns off the MOSFET. Since the inductor current is
continuous, a transverse potential develops across the
inductor that turns on diode D1. The voltage across the
inductor then becomes the difference between the out-
put voltage and the input voltage. This discharge condi-
tion forces the current through the inductor to ramp back
down, transferring the energy stored in the magnetic
field to the output capacitor and the load. The MOSFET
remains off for the rest of the clock cycle.
reaches V
- 6V(GD done), the step-up regulator is
GD_I
enabled and initiates a soft-start routine.
When not using this feature, leave GD high impedance,
and connect GD_I to the output of the step-up converter.
Soft-Start
The step-up regulator achieves soft-start by linearly
ramping up its internal current limit. The soft-start is
either done internally when the capacitance on pin SS is
< 200pF or externally when capacitance on pin SS is >
200pF. The internal soft-start ramps up the current limit
in 128 steps in 12ms. The external soft-start terminates
when the SS pin voltage reaches 1.25V. The soft-start
feature effectively limits the inrush current during startup
(see the Step-Up Regulator Soft-Start Waveforms in the
Typical Operating Characteristics).
Step-Up Regulator External pMOS Pass Switch
As shown in Figure 1, a series external p-channel
MOSFET can be installed between the cathode of the
Positive Charge-Pump Regulator
The positive charge-pump regulator (Figure 3) is typically
used to generate the positive supply rail for the TFT LCD
gate driver ICs. The output voltage is set with an external
resistive voltage-divider from its output to GND with the
midpoint connected to FBP. The number of charge-pump
stages and the setting of the feedback divider determine
step-up regulator Schottky catch diode and the V
AVDD
filter capacitors. This feature is used to sequence power
to AVDD after the MAX17126/MAX17126A have pro-
ceeded through normal startup to limit input surge current
GD_I
SUPP
OSC
C12
ERROR
AMPLIFIER
D5
D3
P1
C14
REF
1.25V
DRVP
C13
N1
VGH
MAX17126
MAX17126A
C15
CPGND
FBP
POSITIVE CHARGE-PUMP REGULATOR
Figure 3. Positive Charge-Pump Regulator Block Diagram
22 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
the output voltage of the positive charge-pump regula-
tor. The charge pump includes a high-side p-channel
MOSFET (P1) and a low-side n-channel MOSFET (N1) to
control the power transfer as shown in Figure 3.
Negative Charge-Pump Regulator
The negative charge-pump regulator is typically used to
generate the negative supply rail for the TFT LCD gate
driver ICs. The output voltage is set with an external
resistive voltage-divider from its output to REF with the
midpoint connected to FBN. The number of charge-pump
stages and the setting of the feedback divider determine
the output of the negative charge-pump regulator. The
charge-pump controller includes a high-side p-channel
MOSFET (P2) and a low-side n-channel MOSFET (N2) to
control the power transfer as shown in Figure 4.
During the first half cycle, N1 turns on and charges flying
capacitors C12 and C13 (Figure 3). During the second
half cycle, N1 turns off and P1 turns on, level shifting C12
and C13 by V
volts. If the voltage across C15 (V
)
SUPP
GH
plus a diode drop (VD) is smaller than the level-shifted
flying-capacitor voltage (VC13) plus V , charge
SUPP
flows from C13 to C15 until the diode (D3) turns off. The
amount of charge transferred to the output is determined
by the error amplifier that controls N1’s on-resistance.
During the first half cycle, P2 turns on, and flying capacitor
C10 charges to V
minus a diode drop (Figure 4).
SUPN
During the second half cycle, P2 turns off, and N2 turns
on, level shifting C10. This connects C10 in parallel with
reservoir capacitor C11. If the voltage across C11 minus
a diode drop is greater than the voltage across C10,
charge flows from C11 to C10 until the diode (D4) turns
off. The amount of charge transferred from the output is
determined by the error amplifier that controls N2’s on-
resistance.
Each time it is enabled, the positive charge-pump regu-
lator goes through a soft-start routine by ramping up its
internal reference voltage from 0 to 1.25V in 128 steps.
The soft-start period is 2ms (typ) and FBP fault detec-
tion is disabled during this period. The soft-start feature
effectively limits the inrush current during startup.
SUPN
MAX17126
MAX17126A
IN2
OSC
ERROR
AMPLIFIER
P2
C10
REF
0.25V
DRVN
D4
N2
VGOFF
C11
CPGND
FBN
NEGATIVE CHARGE-PUMP REGULATOR
R5
REF
R6
Figure 4. Negative Charge-Pump Regulator Block Diagram
______________________________________________________________________________________ 23
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
REF
MAX17126
MAX17126A
10µA
DLY1
FAULT
SHDN
EN
Q4
GD DONE
VGH
V
REF
Q1
VGHM
9R
R
1kI
Q2
DRN
THR
GVOFF
Figure 5. Switch Control
The negative charge-pump regulator is enabled after
the step-down regulator finishes soft-start. Each time it
is enabled, the negative charge-pump regulator goes
through a soft-start routine by ramping down its internal
reference voltage from 1.25V to 250mV in 128 steps. The
soft-start period is 1.8ms (typ) and FBN fault detection
is disabled during this period. The soft-start feature
effectively limits the inrush current during startup.
The switch control block is disabled and DLY1 is held low
when the LCD is shut down or in a fault state.
Operational Amplifier
The operational amplifier is typically used to drive the
LCD backplane (VCOM). It features Q200mA output
short-circuit current, 45V/Fs slew rate, and 20MHz/3dB
bandwidth. The rail-to-rail input and output capability
maximizes system flexibility.
High-Voltage Switch Control
The MAX17126/MAX17126As’ high-voltage switch control
block (Figure 5) consists of two high-voltage p-channel
MOSFETs: Q1, between VGH, and VGHM and Q2, between
VGHM and DRN. The switch control block is enabled when
Short-Circuit Current Limit and Input Clamp
The operational amplifier limits short-circuit current to
approximately Q200mA if the output is directly shorted
to VOP or to OGND. If the short-circuit condition persists,
the junction temperature of the IC rises until it reaches
the thermal-shutdown threshold (+160NC typ). Once
the junction temperature reaches the thermal-shutdown
threshold, an internal thermal sensor immediately sets
the thermal fault latch, shutting off all the IC’s outputs.
The device remains inactive until the input voltage is
cycled. The operational amplifiers have 4V input clamp
structures in series with a 500I resistance and a diode
(Figure 6).
V
DLY1
exceeds V . Q1 and Q2 are controlled by GVOFF.
REF
When GVOFF is logic-high, Q1 turns on and Q2 turns
off, connecting VGHM to VGH. When GVOFF is logic-
low, Q1 turns off and Q2 turns on, connecting VGHM to
DRN. VGHM can then be discharged through a resistor
connected between DRN and GND or AVDD. Q2 turns
off and stops discharging VGHM when VGHM reaches
10 times the voltage on THR.
24 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Reference Voltage (REF)
The reference output is nominally 1.25V, and can source
at least 50FA (see Typical Operating Characteristics). VL
is the input of the internal reference block. Bypass REF
MAX17126
MAX17126A
4OP
with a 0.22FF ceramic capacitor connected between
REF and GND.
OPP
High-Accuracy,
High-Voltage Gamma Reference
The LDO is typically used to drive gamma-correction
divider string. Its output voltage is adjustable through a
resistor-divider. This LDO features high output accuracy
OPN
(Q0.5%) and low-dropout voltage (0.25V typ) and can
supply at least 60mA.
OPO
OGND
PGOOD Function
PGOOD is an open-drain output that connects to GND
when VDET is below its detection threshold (1.25V typ).
PGOOD is active after VL rises above UVLO threshold.
Frequency Selection and
Figure 6. Op Amp Input Clamp Structure
Out-of-Phase Operation (FSEL)
The step-down regulator and step-up regulator use
the same internal oscillator. The FSEL input selects
Driving Pure Capacitive Load
The LCD backplane consists of a distributed series
the switching frequency. Table 3 shows the switching
capacitance and resistance, a load that can be easily
frequency based on the FSEL connection. High-frequency
driven by the operational amplifier. However, if the
(750kHz) operation optimizes the application for the
operational amplifier is used in an application with a pure
smallest component size, trading off efficiency due
capacitive load, steps must be taken to ensure stable
to higher switching losses. Low-frequency (500kHz)
operation. As the operational amplifier’s capacitive load
operation offers the best overall efficiency at the expense
increases, the amplifier’s bandwidth decreases and gain
of component size and board space.
peaking increases. A 5I to 50I small resistor placed
between OPO and the capacitive load reduces peaking,
but also reduces the gain. An alternative method of
reducing peaking is to place a series RC network
(snubber) in parallel with the capacitive load. The RC
network does not continuously load the output or reduce
the gain. Typical values of the resistor are between 100I
and 200I, and the typical value of the capacitor is 10nF.
To reduce the input RMS current, the step-down regulator
and the step-up regulator operate 180N out of phase
from each other. The feature allows the use of less input
capacitance.
Table 3. Frequency Selection
SWITCHING FREQUENCY
FSEL
Linear Regulator (VL)
The MAX17126/MAX17126A include an internal linear
regulator. INVL is the input of the linear regulator. The
input voltage range is between 8V and 16.5V. The output
voltage is set to 5V. The regulator powers the internal
MOSFET drivers, PWM controllers, charge-pump
regulators, and logic circuitry. The total external load
capability is 25mA. Bypass VL to GND with a minimum
1FF ceramic capacitor.
(kHz)
VL, INVL, OR FLOAT
GND
750
500
______________________________________________________________________________________ 25
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
The MAX17126/MAX17126A simplify system design
by including an internal 12ms soft-start for the step-up
regulator. When the capacitor on the SS pin is less than
200pF, the internal 12ms soft-start is in place. This saves
one capacitor from system design. If an external capaci-
tor greater than 200pF is used, a 5µA current source
charges the SS capacitor pin and when the SS voltage
reaches 1.25V, soft-start is done. The FB1 fault-detection
circuit is enabled after this soft-start is done.
Power-Up Sequence
The step-down regulator starts up when the MAX17126/
MAX17126As’ internal reference voltage (REF) is above
its undervoltage lockout (UVLO) threshold. Once the
step-down regulator soft-start is done, the FB2 fault-
detection circuit and the negative charge pump are
enabled. Negative charge-pump fault protection is
enabled after its own soft-start is done.
When EN goes to logic-high, a 10µA current source
starts to pull down on GD, turning on the external GD_I-
The positive charge pump is also enabled after the
step-up regulator finishes its soft-start. After the positive
charge pump’s soft-start is done, the FBP fault-detection
circuit is enabled, as well as the high-voltage switch
AVDD PMOS switch. When V
reaches GD-done
GD
threshold (V
- 6V), the step-up regulator is enabled.
GD_I
Gamma reference is enabled at the same time.
delay block. C
is charged with an internal 10µA
DLY1
current source and V
rises linearly. When V
DLY1
DLY1
reaches REF, the high-voltage switch block is enabled.
IN/INVL
INVL UVLO
VL
VL
REF
EN
BUCK
OUTPUT
UVLO
REF
UVLO
t
SS
TIME
NEGATIVE
t
SS
CHARGE-PUMP
REGULATOR
OUTPUT
BUCK FAULT BLANK
NEGATIVE CHARGE-PUMP FAULT BLANK
PGOOD
POSITIVE
TIME
CHARGE-PUMP
REGULATOR
OUTPUT
POSITIVE CHARGE -PUMP FAULT BLANK
BOOST FAULT BLANK
AVDD
GREF
GD
SS
GD
DONE
REF
TIME
t
SS
t
SS
DLY1
REF
TIME
VGHM UNCONNECTED
VGHM
VGHM DEPENDS
ON GVOFF
TIME
Figure 7. Power-Up Sequence
26 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Power-Down Sequence
The step-down regulator, step-up regulator, positive
charge pump, negative charge pump, and high-voltage
switching block all start to shut down when INVL drops
below its UVLO threshold. VL stays flat until INVL does
not have enough headroom. Reference REF starts to fall
after VL drops below its UVLO threshold.
Fault Protection
During steady-state operation, if any output of the four
regulators’ output (step-down regulator, step-up regulator,
positivecharge-pumpregulator,andnegativecharge-pump
regulator) goes lower than its respective fault-detection
threshold, the MAX17126 activates an internal fault timer. If
any condition or the combination of conditions indicates a
continuous fault for the fault timer duration (50ms typ), the
MAX17126A latches off all its outputs while the MAX17126
latches off all the outputs except the buck regulator (latched
off only when the fault happens on its output).
Gamma reference GREF stays flat until AVDD does not
have enough headroom. A pMOS switch turns on after
VL drops below its UVLO threshold to guarantee GREF
does not go over AVDD.
If a short has happened to any of the four regulator
outputs, no fault timer is applied; the part latches off
immediately. Pay special attention to shorts on the step-
up regulator and positive charge pump. Make sure when
a short happens, negative ringing on VREF_I (connected
to step-up regulator output) and VGH (connected to
positive charge-pump output) does not exceed Absolute
Maximum Ratings. Otherwise, physical damage of the
part may occur. Cycle the input voltage to clear the fault
latch and restart the supplies.
PGOOD is pulled low after its input voltage (buck output
in this case) drops below the designed threshold. After
VL drops below its UVLO threshold, PGOOD gives up
control and is resistively pulled up to its input voltage.
The high-voltage switching block output VGHM falls until
VL drops below its UVLO threshold, after which it is in
high impedance.
Thermal-Overload Protection
The thermal-overload protection prevents excessive
power dissipation from overheating the MAX17126/
MAX17126A. When the junction temperature exceeds
INVL UVLO
INVL
T
= +160NC, a thermal sensor immediately activates
J
VL UVLO
VL
the fault protection that shuts down all the outputs. Cycle
the input voltage to clear the fault latch and restart the
MAX17126/MAX17126A.
REF
TIME
The thermal-overload protection protects the controller in
the event of fault conditions. For continuous operation, do
not exceed the absolute maximum junction temperature
NEGATIVE
CHARGE-PUMP
REGULATOR
OUTPUT
rating of T = +150NC.
J
TIME
POSITIVE
CHARGE-PUMP
REGULATOR
OUTPUT
Design Procedure
AVDD
Step-Down Regulator
GREF
Inductor Selection
Three key inductor parameters must be specified:
inductance value (L), peak current (I ), and DC
PEAK
TIME
resistance (R ). The following equation includes a
DC
BUCK
constant, LIR, which is the ratio of peak-to-peak inductor
ripple current to DC load current. A higher LIR value
allows smaller inductance, but results in higher losses
and higher ripple. A good compromise between size
and losses is typically found at a 30% ripple current-to-
load current ratio (LIR = 0.3) that corresponds to a peak
inductor current 1.15 times the DC load current:
OUTPUT
PGOOD
TIME
VGHM DEPENDS
ON GVOFF
VGHM
VGHM UNCONNECTED
TIME
V
× V
- V
(
)
OUT
IN2 OUT
L
=
2
V
× f
×I
×LIR
IN2 SW OUT(MAX)
Figure 8. Power-Down Sequence
______________________________________________________________________________________ 27
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
where I
the switching frequency f
is the maximum DC load current, and
OUT(MAX)
V
× V
- V
(
)
OUT
IN2 OUT
is 750kHz when FSEL is
SW
I
= I
×
RMS
OUT
tied to VL, 500kHz when FSEL is tied to GND. The exact
inductor value is not critical and can be adjusted to
make trade-offs among size, cost, and efficiency. Lower
inductor values minimize size and cost, but they also
increase the output ripple and reduce the efficiency
due to higher peak currents. On the other hand, higher
inductor values increase efficiency, but at some point
resistive losses due to extra turns of wire exceed the
benefit gained from lower AC current levels.
V
IN2
The worst case is I
= 0.5 x I
that occurs at V
OUT IN2
RMS
= 2 x V
.
OUT
For most applications, ceramic capacitors are used
because of their high ripple current and surge current
capabilities. For optimal circuit long-term reliability,
choose an input capacitor that exhibits less than +10NC
temperature rise at the RMS input current corresponding
to the maximum load current.
The inductor’s saturation current must exceed the peak
inductor current. The peak current can be calculated by:
Output Capacitor Selection
Since the MAX17126/MAX17126As’ step-down regulator
is internally compensated, it is stable with any reasonable
amount of output capacitance. However, the actual
capacitance and equivalent series resistance (ESR)
affect the regulator’s output ripple voltage and transient
response. The rest of this section deals with how to
determine the output capacitance and ESR needs
according to the ripple voltage and load-transient
requirements.
V
× V
- V
(
)
OUT
f
IN2 OUT
I
=
OUT_RIPPLE
×L × V
IN2
SW
2
I
OUT_RIPPLE
2
I
= I
+
OUT(MAX)
OUT_PEAK
The inductor’s DC resistance should be low for good
efficiency. Find a low-loss inductor having the lowest
possible DC resistance that fits in the allotted dimensions.
Ferrite cores are often the best choice. Shielded-
core geometries help keep noise, EMI, and switching
waveform jitter low.
The output voltage ripple has two components: variations
in the charge stored in the output capacitor, and the
voltage drop across the capacitor’s ESR caused by the
current into and out of the capacitor:
Considering the typical operation circuit in Figure 1, the
maximum load current I
output and a typical 12V input voltage. Choosing an LIR
is 1.5A with a 3.3V
OUT(MAX)
V
= V
+ V
OUT_RIPPLE
OUT_RIPPLE(ESR) OUT_RIPPLE(C)
of 0.4 at this operation point:
V
= I
×R
OUT_RIPPLE ESR_OUT
OUT_RIPPLE(ESR)
3.3V ×(12V - 3.3V)
12V ×750kHz ×1.5A × 0.4
L
=
≈ 5.3FH
2
I
OUT_RIPPLE
Pick L = 4.7FH. At that operation point, the ripple current
and the peak current are:
V
=
2
OUT_RIPPLE(C)
8× C
× f
OUT SW
3.3V × 12V - 3.3V
(
)
where I
_
is defined in the Step-Down Regulator
OUT RIPPLE
I
=
= 0.68A
OUT_RIPPLE
750kHz × 4.7FH×12V
Inductor Selection section, C
(C5 in Figure 1) is the
OUT
output capacitance, and R
_
is the ESR of the
ESR OUT
0.68A
output capacitor C . In Figure 1’s circuit, the inductor
OUT
I
= 1.5A +
= 1.84A
OUT_PEAK
ripple current is 0.68A. If the voltage-ripple requirement of
Figure 1’s circuit is P 1% of the 3.3V output, then the total
peak-to-peak ripple voltage should be less than 66mV.
Assuming that the ESR ripple and the capacitive ripple
each should be less than 50% of the total peak-to-peak
ripple, then the ESR should be less than 48.5mIand the
output capacitance should be more than 3.4FF to meet
the total ripple requirement. A 22FF capacitor with ESR
(including PCB trace resistance) of 10mI is selected
for the typical operating circuit in Figure 1, which easily
meets the voltage ripple requirement.
2
Input Capacitors
The input filter capacitors reduce peak currents drawn
from the power source and reduce noise and voltage
ripple on the input caused by the regulator’s switching.
They are usually selected according to input ripple
current requirements and voltage rating, rather than
capacitance value. The input voltage and load current
determine the RMS input ripple current (I
):
RMS
28 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
The step-down regulator’s output capacitor and ESR
also affect the voltage undershoot and overshoot when
the load steps up and down abruptly. The undershoot
and overshoot also have two components: the voltage
steps caused by ESR, and voltage sag and soar due to
the finite capacitance and inductor slew rate. Use the
following formulas to check if the ESR is low enough
and the output capacitance is large enough to prevent
excessive soar and sag.
The maximum output current, input voltage, output
voltage, and switching frequency determine the inductor
value. Very high inductance values minimize the current
ripple, and therefore, reduce the peak current, which
decreases core losses in the inductor and I2R losses in
the entire power path. However, large inductor values
also require more energy storage and more turns of wire
that increase physical size and can increase I2R losses
in the inductor. Low inductance values decrease the
physical size, but increase the current ripple and peak
current. Finding the best inductor involves choosing the
best compromise between circuit efficiency, inductor
size, and cost.
The amplitude of the ESR step is a function of the load
step and the ESR of the output capacitor:
V
= DI
×R
OUT ESR_OUT
OUT_ESR_STEP
The equations used here include a constant LIR, which
is the ratio of the inductor peak-to-peak ripple current to
the average DC inductor current at the full-load current.
The best trade-off between inductor size and circuit
efficiency for step-up regulators generally has an LIR
between 0.3 and 0.5. However, depending on the AC
characteristics of the inductor core material and ratio of
inductor resistance to other power-path resistances, the
best LIR can shift up or down. If the inductor resistance
is relatively high, more ripple can be accepted to
reduce the number of turns required and increase the
wire diameter. If the inductor resistance is relatively low,
increasing inductance to lower the peak current can
decrease losses throughout the power path. If extremely
thin high-resistance inductors are used, as is common
for LCD panel applications, the best LIR can increase to
between 0.5 and 1.0.
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
the input-to-output voltage differential, and the maximum
duty cycle:
2
L
×(DI
)
OUT
2
V
=
OUT_SAG
2× C
× V
(
×D
- V
MAX OUT
)
OUT
IN2(MIN)
The amplitude of the capacitive soar is a function of the
load step, the output capacitor value, the inductor value,
and the output voltage:
2
L
×(DI
)
2
OUT
V
=
OUT_SOAR
2× C
× V
OUT
OUT
Keeping the full-load overshoot and undershoot less than
3% ensures that the step-down regulator’s natural integrator
response dominates. Given the component values in the
circuit of Figure 1, during a full 1.5A step load transient, the
voltage step due to capacitor ESR is negligible. The voltage
sag and soar are 76mV and 73mV, respectively.
Once a physical inductor is chosen, higher and lower
values of the inductor should be evaluated for efficiency
improvements in typical operating regions.
Calculate the approximate inductor value using the
typical input voltage (V ), the maximum output current
IN
(I
), the expected efficiency (E
) taken
AVDD(MAX)
TYP
Rectifier Diode
The MAX17126/MAX17126As’ high switching frequency
demands a high-speed rectifier. Schottky diodes are
recommended for most applications because of their fast
recovery time and low forward voltage. In general, a 2A
Schottky diode works well in the MAX17126/MAX17126A’s
step-up regulator.
from an appropriate curve in the Typical Operating
Characteristics, and an estimate of LIR based on the
above discussion:
2
V
V
- V
η
TYP
LIR
IN
AVDD
IN
L =
1
V
I
× f
AVDD
AVDD(MAX) SW
Choose an available inductor value from an appropriate
inductor family. Calculate the maximum DC input current
Step-Up Regulator
Inductor Selection
The inductance value, peak current rating, and series
resistance are factors to consider when selecting the
inductor. These factors influence the converter’s efficiency,
maximum output load capability, transient response time,
and output voltage ripple. Physical size and cost are also
important factors to be considered.
at the minimum input voltage V
using conservation
IN(MIN)
of energy and the expected efficiency at that operating
point (E ) taken from an appropriate curve in the
MIN
Typical Operating Characteristics:
I
× V
AVDD
AVDD(MAX)
I
=
IN(DC,MAX)
V
× η
MIN
IN(MIN)
______________________________________________________________________________________ 29
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Calculate the ripple current at that operating point and
the peak current required for the inductor:
the output voltage ripple is typically dominated by
. The voltage rating and temperature
characteristics of the output capacitor must also be
considered. Note that all ceramic capacitors typically
have large temperature coefficient and bias voltage
coefficients. The actual capacitor value in circuit is
typically significantly less than the stated value.
V
_
AVDD RIPPLE(C)
V
× V
- V
AVDD IN(MIN)
(
)
IN(MIN)
I
=
AVDD_RIPPLE
L
× V
× f
AVDD
AVDD SW
I
AVDD_RIPPLE
2
I
= I
+
AVDD_PEAK
IN(DC,MAX)
Input Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input supply and reduces noise injection
into the IC. A 22FF ceramic capacitor is used in the
typical operating circuit (Figure 1) because of the high
source impedance seen in typical lab setups. Actual
applications usually have much lower source impedance
since the step-up regulator often runs directly from the
output of another regulated supply. Typically, the input
capacitance can be reduced below the values used in
the typical operating circuit.
The inductor’s saturation current rating and the MAX17126/
MAX17126As’ LX1 current limit should exceed I
_
AVDD
and the inductor’s DC current rating should exceed
PEAK
I
. For good efficiency, choose an inductor with
IN(DC,MAX)
less than 0.1Iseries resistance.
Considering the typical operating circuit (Figure 1), the
maximum load current (I ) is 1A with a 16V
AVDD(MAX)
output and a typical input voltage of 12V. Choosing
an LIR of 0.3 and estimating efficiency of 90% at this
operating point:
Rectifier Diode
The MAX17126/MAX17126As’ high switching frequency
demands a high-speed rectifier. Schottky diodes are
recommended for most applications because of their fast
recovery time and low forward voltage. In general, a 2A
Schottky diode complements the internal MOSFET well.
2
12V
16V
16V -12V
1A ×750kHz 0.3
90%
L =
= 9FH
1
Using the circuit’s minimum input voltage (8V) and
estimating efficiency of 85% at that operating point:
1A ×16V
8V × 85%
Output Voltage Selection
The output voltage of the step-up regulator can be
adjusted by connecting a resistive voltage-divider from
I
=
≈ 2.35A
IN(DC,MAX)
The ripple current and the peak current are:
the output (V ) to GND with the center tap connected
AVDD
to FB1 (see Figure 1). Select R2 in the 10kI to 50kI
range. Calculate R1 with the following equation:
8V × 16V - 8V
(
)
I
=
≈ 0.53A
AVDD_RIPPLE
10FH×16V ×750kHz
V
V
AVDD
R1= R2×
-1
0.53A
I
= 2.35A +
≈ 2.62A
FB1
AVDD_PEAK
2
where V
, the step-up regulator’s feedback set point,
FB1
Output Capacitor Selection
is 1.25V. Place R1 and R2 close to the IC.
The total output voltage ripple has two components: the
capacitive ripple caused by the charging and discharging
of the output capacitance, and the ohmic ripple due to
the capacitor’s equivalent series resistance (ESR):
Loop Compensation
to set the high-frequency integrator gain
Choose R
COMP
for fast-transient response. Choose C
to set the
COMP
integrator zero to maintain loop stability.
V
= V
+ V
AVDD_RIPPLE(C) AVDD_RIPPLE(ESR)
AVDD_RIPPLE
V
For low-ESR output capacitors, use the following
equations to obtain stable performance and good
transient response:
I
V
- V
AVDD IN
AVDD
≈
AVDD_RIPPLE(C)
C
V
f
AVDD
AVDD SW
100× V × V
× C
IN
AVDD
AVDD
R
≈
COMP
L
×I
and:
AVDD AVDD(MAX)
V
≈ I
R
AVDD_PEAK ESR_AVDD
AVDD_RIPPLE(ESR)
V
× C
AVDD
AVDD
C
≈
COMP
10×I
×R
AVDD(MAX)
COMP
where I
_
is the peak inductor current (see
AVDD PEAK
the Inductor Selection section). For ceramic capacitors,
30 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
To further optimize transient response, vary R
in
on the source impedance. A 0.1FF ceramic capacitor
works well in most low-current applications. The flying
capacitor’s voltage rating must exceed the following:
COMP
20% steps and C
in 50% steps while observing
COMP
transient response waveforms.
Charge-Pump Regulators
V
> n
× V
POS(NEG) SUPP(SUPN)
CX
Selecting the Number of Charge-Pump Stages
For highest efficiency, always choose the lowest number
of charge-pump stages that meet the output requirement.
where n
POS(NEG)
flying capacitor appears. It is the same as the number of
charge-pump stages.
is the number of stages in which the
The number of positive charge-pump stages is given by:
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the ESR
reduces the output ripple voltage and the peak-to-peak
transient voltage. With ceramic capacitors, the output
voltage ripple is dominated by the capacitance value.
Use the following equation to approximate the required
capacitor value:
V
+ V
- V
GH
DROPOUT AVDD
n
=
POS
V
- 2 × V
D
SUPP
where n
stages, V
is the number of positive charge-pump
is the output of the positive charge-pump
POS
GH
regulator, V
is the supply voltage of the charge-
SUPP
pump regulators, V is the forward voltage drop of the
D
charge-pump diode, and V
margin for the regulator. Use V
is the dropout
= 300mV.
DROPOUT
DROPOUT
I
LOAD_CP
× V
RIPPLE_CP
C
R
OUT_CP
2× f
SW
The number of negative charge-pump stages is given by:
-V + V
where C
pump, I
and V
_
is the output capacitor of the charge
is the load current of the charge pump,
is the peak-to-peak value of the output
OUT CP
GOFF
DROPOUT
- 2× V
D
n
=
NEG
_
LOAD CP
RIPPLE_CP
V
SUPN
ripple.
where n
is the number of negative charge-pump
NEG
stages and V
pump regulator.
is the output of the negative charge-
GOFF
Output Voltage Selection
Adjust the positive charge-pump regulator’s output
voltage by connecting a resistive voltage-divider from
VGH output to GND with the center tap connected to FBP
(Figure 1). Select the lower resistor of divider R4 in the
10kIto 30kIrange. Calculate upper resistor R3 with the
following equation:
The above equations are derived based on the
assumption that the first stage of the positive charge
pump is connected to V
the negative charge pump is connected to ground.
Sometimes fractional stages are more desirable for
better efficiency. This can be done by connecting the
first stage to V
first charge-pump stage is powered from V
above equations become:
and the first stage of
AVDD
V
or another available supply. If the
OUT
VGH
R3 = R4×
-1
, then the
OUT
V
FBP
where V
= 1.25V (typ).
FBP
V
+ V
- V
D
GH
DROPOUT
OUT
n
=
POS
Adjust the negative charge-pump regulator’s output
voltage by connecting a resistive voltage-divider from
V
- 2 × V
SUPP
V
to REF with the center tap connected to FBN
GOFF
(Figure 1). Select R6 in the 20kIto 68kIrange. Calculate
-V
+ V
+ V
- 2 × V
D
GOFF
DROPOUT OUT
n
=
R5 with the following equation:
NEG
V
SUPN
V
- V
GOFF
FBN
R5 = R6 ×
Flying Capacitors
V
- V
REF
= 1.25V. Note that REF
REF
FBN
Increasing the flying capacitor CX (connected to DRVP
and DRVN) value lowers the effective source impedance
and increases the output current capability. Increasing
the capacitance indefinitely has a negligible effect on
output current capability because the internal switch
resistance and the diode impedance place a lower limit
where V
= 250mV, V
FBN
can only source up to 50FA, using a resistor less than
20kI, for R6 results in a higher bias current than REF
can supply.
______________________________________________________________________________________ 31
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
input loop goes from the positive terminal of the input
capacitor to the inductor, to the IC’s LX1 pin, out of
PGND, and to the input capacitor’s negative terminal.
The high-current output loop is from the positive ter-
minal of the input capacitor to the inductor, to the out-
put diode (D1), to the positive terminal of the output
capacitors, reconnecting between the output capaci-
tor and input capacitor ground terminals. Connect
these loop components with short, wide connections.
Avoid using vias in the high-current paths. If vias
are unavoidable, use many vias in parallel to reduce
resistance and inductance.
High-Accuracy, High-Voltage
Gamma Reference
Output-Voltage Selection
The output voltage of the high-accuracy LDO is set by
connecting a resistive voltage-divider from the output
) to AGND with the center tap connected to
(see Figure 1). Select R10 in the 10kI to 50kI
range. Calculate R9 with the following equation:
(V
REF_O
V
REF_FB
V
REF_O
R9 = R10 ×
-1
V
REF_FB
U Create a power ground island for the step-down
regulator, consisting of the input and output capaci-
tor grounds and the diode ground. Connect all
these together with short, wide traces or a small
ground plane. Similarly, create a power ground island
(PGND) for the step-up regulator, consisting of the
input and output capacitor grounds and the PGND
pin. Create a power ground island (CPGND) for the
positive and negative charge pumps, consisting of
where V
, the LDO’s feedback set point, is 1.25V.
REF_FB
Place R9 and R10 close to the IC.
Input and Output Capacitor Selection
To ensure stability of the LDO, use a minimum of 1FF
on the regulator’s input (V ) and a minimum of 2.2FF
on the regulator’s output (V
near the pins and connect their ground connections
directly together.
REF_I
). Place the capacitors
REF_O
SUPP and output (V , V
) capacitor grounds,
GH GOFF
Set the PGOOD Threshold Voltage
and negative charge-pump diode ground. Connect
the step-down regulator ground plane, PGND ground
plane, and CPGND ground plane together with wide
traces. Maximizing the width of the power ground
traces improves efficiency and reduces output volt-
age ripple and noise spikes.
PGOOD threshold voltage can be adjusted by connecting
a resistive voltage-divider from input V to GND with the
IN
center tap connected to V
(see Figure 1). Select R8 in
DET
the 10kI to 50kI range. Calculate R7 with the following
equation:
V
IN_PGOOD
R7 = R8 ×
-1
V
DET
U Create an analog ground plane (GND) consisting of
the GND pin, all the feedback divider ground con-
nections, the COMP, SS, and DLY1 capacitor ground
connections, and the device’s exposed backside
pad. Connect the PGND and GND islands by con-
necting the two ground pins directly to the exposed
backside pad. Make no other connections between
these separate ground planes.
where V
1.25V is the V
threshold set point.
DET
DET =
V
is the desired PGOOD threshold voltage.
Place R7 and R8 close to the IC.
IN_PGOOD
PCB Layout and Grounding
Careful PCB layout is important for proper operation. Use
the following guidelines for good PCB layout:
U Place all feedback voltage-divider resistors as close
as possible to their respective feedback pins. The
divider’s center trace should be kept short. Placing
the resistors far away causes their FB traces to
become antennas that can pick up switching noise.
Care should be taken to avoid running any feedback
trace near LX1, LX2, DRVP, or DRVN.
U Minimize the area of respective high-current loops
by placing each DC/DC converter’s inductor, diode,
and output capacitors near its input capacitors and
its LX_ and PGND pins. For the step-down regulator,
the high-current input loop goes from the positive
terminal of the input capacitor to the IC’s IN2 pin, out
of LX2, to the inductor, to the positive terminals of the
output capacitors, reconnecting the output capaci-
tor and input capacitor ground terminals. The high-
current output loop is from the inductor to the positive
terminals of the output capacitors, to the negative
terminals of the output capacitors, and to the Schottky
diode (D2). For the step-up regulator, the high-current
U Place IN2 pin, VL pin, REF pin, and V
pin
REF_O
bypass capacitors as close as possible to the device.
The ground connection of the VL bypass capacitor
should be connected directly to the GND pin with a
wide trace.
32 _____________________________________________________________________________________
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
U Minimize the length and maximize the width of the
Pin Configuration
traces between the output capacitors and the load for
best transient responses.
U Minimize the size of the LX1 and LX2 nodes while
keeping them wide and short. Keep the LX1 and LX2
nodes away from feedback nodes (FB1, FB2, FBP,
FBN, and VREF_FB) and analog ground. Use DC
traces as shield if necessary.
TOP VIEW
35
34 33 32 31 30 29 28 27 26 25
36
SS
DLY1
FBP
24
23
22
37
38
39
CLIM
FSEL
Refer to the MAX17126 evaluation kit for an example of
proper board layout.
VGH
21 VL
VGHM 40
DRN 41
20 INVL
19 VDET
SUPN
DRVN
42
43
MAX17126
MAX17126A
18
GND
17 IN2
16 IN2
GND 44
FBN 45
Chip Information
BST
14 LX2
13
REF
VREF_FB
VREF_O
15
46
47
48
PROCESS: BiCMOS
LX2
2
3
4
5
6
7
8
9
10
1
11
12
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE LAND PATTERN
THIN QFN
NO.
NO.
48 TQFN
T4877-3
21-0144
90-0129
______________________________________________________________________________________ 33
Multi-Output Power Supplies with VCOM Amplifier
and High-Voltage Gamma Reference for LCD TVs
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
6/09
Initial release
—
3/10
MAX17126A added to data sheet
1-33
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
34
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
©
相关型号：
MAX17126AETM+
Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVs
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