MAX17079GTL+W [MAXIM]
Interface Circuit, BICMOS, 6 X 6 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, TQFN-40;
| 型号： | MAX17079GTL+W |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Interface Circuit, BICMOS, 6 X 6 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, TQFN-40 信息通信管理 接口集成电路 |
| 文件： | 总12页 (文件大小：359K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2812; Rev 1; 3/10
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
MAX1079
General Description
Features
♦ 7-Channel Logic-Level Input to High-Voltage
The MAX17079 is a 7-channel logic-level input to high-
voltage output level shifter. Each channel has two
inputs plus a shared enable input. Each channel has
two outputs, which can be set to five output levels. Two
outputs are complementary to each other. The five out-
put levels are set by five supply rails that are common
to all 14 outputs.
Output Level Shifter
♦ Complementary Outputs in Each Channel
♦ VLS Input Range from 10V to 18V
♦ VCC Input Range from 2.3V to 3.6V
♦ 2-Level or 4-Level Operation
♦ Sequential or Combinational Logic
♦ 3Ω Output Switches
The five supply rails include a typical TFT VCOM rail.
Two upper rails are always greater than VCOM, with
VH1 always greater than VH2. The two lower rails are
always less than VCOM, with VL1 always less than VL2.
Other supply rails are VLS (the typical TFT AVDD sup-
ply) and VCC (the logic supply). The MAX17079 can
also be configured as a two-level voltage shifter.
♦ 5-Level Output
♦ Short Propagation Delay (80ns typ)
♦ Fast Rise Time (30ns typ)
♦ Built-In Dead Time to Prevent Shoot-Through
♦ Thermal Shutdown
When EN is low, all 14 outputs connect to VCOM, and
when EN is high, the outputs are determined by their
inputs. The logic inputs are driven by the timing con-
troller. The output switches are typically 3Ω with low
propagation delays and fast rise times. The MAX17079
has a minimum dead time to prevent shoot-through cur-
rents between supplies. The MAX17079 has thermal
shutdown to protect against overheating, VCC under-
voltage lockout (UVLO), and VLS UVLO.
♦ VLS and VCC Undervoltage Lockout
Ordering Information
PIN-
PKG
PART
TEMP RANGE
PACKAGE
CODE
40 TQFN-EP*
(6mm x 6mm)
MAX17079GTL+ -40°C to +105°C
T4066+5
*EP = Exposed paddle.
The MAX17079 is in a 40-pin, 6mm x 6mm, thin QFN
package, with exposed pad and a maximum height of
0.8mm.
Simplified Operating Circuit
3.3V
10V
7V
6V
5V
2V
15V
Applications
VCC VH1
VH2 VCOM VL2
VL1
VLS
TFT LCD TV Panels
OA1
Pin Configuration
OB1
OA2
OB2
OA3
A1
TOP VIEW
B1
A2
30 29 28 27 26 25 24 23 22 21
20
31
32
33
OA7
OB1
OA1
ST
B2
A3
19 OB7
18 VCOM
17 VL1
OB3
EP
B3
A4
OA4
OB4
PANEL
SYSTEM
VH1 34
16
VL2
15 DGND
14
35
36
37
38
39
40
VH2
VLS
AGND
VCC
EN
MAX17079
B4
A5
MAX17079
OA5
OB5
B7
13 A7
12
B5
A6
B6
OA6
OB6
OA7
B6
11 A6
CH
A7
B7
1
2
3
4
5
6
7
8
9
10
OB7
AGND
EN
DGND
CH ST
THIN QFN
(6mm x 6mm)
EP = EXPOSED PAD
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
ABSOLUTE MAXIMUM RATINGS
VCC to AGND...........................................................-0.3V to +7V
Ax, Bx, CH, ST, EN to AGND....................................-0.3V to +7V
DGND to AGND.....................................................-0.3V to +0.3V
VLS to DGND..........................................................-0.3V to +20V
Continuous Power Dissipation (T = +70°C)
A
40-Pin, 6mm x 6mm TQFN
(derate 35.7mW/°C above +70°C) .........................2857.1mW
Operating Temperature Range .........................-40°C to +105°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Soldering Temperature (soldering, 10s)..........................+300°C
Soldering Temperature (reflow) .......................................+260°C
VH1, VH2, VL1, VL2, VCOM to DGND ........-0.3V to (V + 0.3V)
LS
H1
OAx, OBx to DGND ..........................(V - 0.3V) to (V + 0.3V)
L1
OBx, OAx RMS Current.......................................................50mA
VH1, VH2, VL1, VL2 RMS Current.....................................300mA
VH2, VL2, VCOM, to DGND.............(VL1 - 0.3V) to (VH1 + 0.3V)
MAX1079
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V
= 3.3V, V
= 15V, V
= 10V, V
= 7V, V
= 6V, V
= 5V, V
= 2V, T = -40°C to +105°C.
VL1 A
VCC
VLS
VH1
VH2
VCOM
VL2
Typical values are at T = +25°C, unless otherwise noted.) (Note 1)
A
PARAMETER
GENERAL
VCC Input Voltage Range
CONDITIONS
MIN
TYP
MAX
UNITS
2.3
1.8
10
8.0
4
3.6
2.2
18
V
V
VCC Input Undervoltage Lockout Rising edge, 200mV typical hysteresis
VLS Input Voltage Range
2.0
8.5
V
VLS Input Undervoltage Lockout Rising edge, 500mV typical hysteresis
VH1 Input Voltage Range
9.0
V
V
V
VLS
VH2 Input Voltage Range
0
V
V
V
V
- 4
- 4
- 4
- 4
V
VLS
VLS
VLS
VLS
VL2 Input Voltage Range
0
V
VL1 Input Voltage Range
0
V
VCOM Input Voltage Range
4
V
VCC Quiescent Current
50
μA
μA
μA
μA
μA
μA
VLS Quiescent Current
VH1 Quiescent Current
VH2 Quiescent Current
VL1 Quiescent Current
VL2 Quiescent Current
INPUTS AND OUTPUTS
All channels in STATE 2
300
150
-125
-90
All channels in STATE 1 or STATE 3
All channels in STATE 2 or STATE 4
All channels in STATE 1 or STATE 3
All channels in STATE 2 or STATE 4
-130
0.3 x
Logic-Input Low Voltage
Logic-Input High Voltage
EN, CH, ST, Ax, Bx
EN, CH, ST, Ax, Bx
V
V
V
VCC
0.7 x
V
VCC
Logic-Low Input Current
Logic-High Input Current
EN, CH, ST, Ax, Bx to AGND
VCC to EN, CH, ST, Ax, Bx
-1
+1
μA
μA
10.0
16.5
3
30.0
VH1 - OAx, VH1 - OBx
On-Resistance
V
= 10V, V
= 5V,
VH1
VLS
ꢀ
I
= 20mA
(OAx, OBx)
VH2 - OAx, VH2 - OBx
On-Resistance
V
= 10V, V
= 5V,
VH2
VLS
3
ꢀ
I
= 20mA
(OAx, OBx)
2
_______________________________________________________________________________________
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
MAX1079
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= 3.3V, V
= 15V, V
= 10V, V
= 7V, V
= 6V, V
= 5V, V
= 2V, T = -40°C to +105°C.
VL1 A
VCC
VLS
VH1
VH2
VCOM
VL2
Typical values are at T = +25°C, unless otherwise noted.) (Note 1)
A
PARAMETER
CONDITIONS
= 5V,
MIN
TYP
MAX
UNITS
VL1 - OAx, VL1 - OBx
On-Resistance
V
= 10V, V
VLS VL1
3
ꢀ
I
= 20mA
(OAx, OBx)
VL2 - OAx, VL2 - OBx
On-Resistance
V
= 10V, V
= 5V,
VL2
VLS
3
0
ꢀ
ꢀ
I
= 20mA
(OAx, OBx)
V
= 10V, V
= 6V, V
= 4V, I
= 20mA
VLS
VH2
VL2
(OAx, OBx)
-0.5
-1.5
+0.5
+1.5
(VH2 to OAx) - (VL2 to OAx), (VH2 to OBx) - (VL2 to OBx)
On-Resistance Difference
V
= 10V, V = 6V, V = 4V, I = 20mA
VLS
VH1
VL1
(OAx, OBx)
0
(VH1 to OAx) - (VL1 to OAx), (VH1 to OBx) - (VL1 to OBx)
VCOM - OAx, VCOM - OBx
On-Resistance
V
= 10V, V
= 5V,
VCOM
VLS
15
ꢀ
I
= 20mA
(OAx, OBx)
TIMING
t
, t , t , t , refers to the minimum duration of input
HH HL LH LL
Input Pulse Width
500
-50
ns
for a given state
EN Setup Time
t
t
+100
200
200
100
100
ns
ns
ns
ns
ns
ES
ER
EN Falling Delay
Output Delay Time
Output Rise Time
Output Fall Time
70
80
30
30
t , no load, input to 10% output
D
t , no load, rails of 0V and 18V, measured from 2V to 16V
R
t , no load, rails of 0V and 18V, measured from 16V to 2V
F
t
, no load, refers to the minimum high or low time of
PW
Input Pulse Width
500
ns
Ax or Bx
Note 1: T = -40°C specifications are guaranteed by design, not production tested. Production test is done at T = +25°C and
A
A
A
T
= +85°C.
Timing Diagram
t
ES
EN
Ax
Ax
Bx
t
PW
t
t
LL
LH
t
HH
t
t
D
D
t
HL
Bx
OAx
OBx
t
F
t
ER
OAx
t
R
_______________________________________________________________________________________
3
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
Typical Operating Characteristics
(Circuit of Figure 1. V = 12V T = +25°C, unless otherwise noted.)
IN
, A
PROPAGATION DELAY
(STATE 1 - STATE 2)
PROPAGATION DELAY
(STATE 2 - STATE 3)
ENABLE PROPAGATION DELAY
MAX17079 toc01
MAX17079 toc02
MAX17079 toc03
OB2
OA2
EN
OB2
OA2
OA2
MAX1079
B2
A2
OB2
B2
A2
40ns/div
20ns/div
20ns/div
EN: 2V/div
OA2: 5V/div
OB2: 5V/div
OB2: 5V/div
OA2: 5V/div
B2: 5V/div
A2: 5V/div
OB2: 5V/div
OA2: 5V/div
B2: 5V/div
A2: 5V/div
PROPAGATION DELAY
(STATE 3 - STATE 4)
PROPAGATION DELAY
(STATE 4 - STATE 1)
VCOM SWITCH OUTPUT RESISTANCE
MAX17079 toc04
MAX17079 toc05
1.0
0.8
STATE 0
OB2
OB2
OA2
V
= 6V
VCOM
0.6
0.4
OA2
B2
B2
A2
0.2
0
A2
20ns/div
20ns/div
0
10
20
30
40
50
60
70
OB2: 5V/div
OA2: 5V/div
B2: 5V/div
A2: 5V/div
OB2: 5V/div
OA2: 5V/div
B2: 5V/div
A2: 5V/div
I
(mA)
OA2
VH2 SWITCH OUTPUT RESISTANCE
VH1 SWITCH OUTPUT RESISTANCE
VL1 SWITCH OUTPUT RESISTANCE
150
120
150
120
150
120
STATE 2
STATE 1
STATE 3
V
= 7V
V
VH1
= 10V
V
= 2V
VH2
VL1
90
60
90
60
90
60
30
0
30
0
30
0
0
10
20
30
(mA)
40
50
0
10
20
30
(mA)
40
50
0
10
20
30
(mA)
40
50
I
I
I
OA2
OA2
OA2
4
_______________________________________________________________________________________
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
MAX1079
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = 12V T = +25°C, unless otherwise noted.)
IN
, A
VL2 SWITCH OUTPUT RESISTANCE
4-LEVEL SEQUENTIAL STARTUP
4-LEVEL COMBINATIONAL STARTUP
MAX17079 toc11
MAX17079 toc12
150
120
STATE 4
V
= 5V
VL2
OA2
OA2
90
60
EN
A2
EN
A2
B2
30
0
B2
0
10
20
30
(mA)
40
50
40μs/div
40μs/div
OA2: 5V/div
A2: 5V/div
B2: 5V/div
EN: 2V/div
OA2: 5V/div
A2: 5V/div
B2: 5V/div
EN: 2V/div
I
OA2
4-LEVEL SEQUENTIAL OPERATION
2-LEVEL SEQUENTIAL STARTUP
2-LEVEL COMBINATIONAL STARTUP
MAX17079 toc13
MAX17079 toc14
MAX17079 toc15
OB2
OA2
EN
EN
OA2
OA2
OB2
A2
OB2
A2
B2
A2
40μs/div
40μs/div
40μs/div
OB2: 5V/div
OA2: 5V/div
B2: 5V/div
A2: 5V/div
OA2: 5V/div
OB2: 5V/div
A2: 5V/div
EN: 5V/div
OA2: 5V/div
OB2: 5V/div
A2: 5V/div
EN: 5V/div
VCC QUIESCENT CURRENT
vs. TEMPERATURE
VLS QUIESCENT CURRENT
vs. TEMPERATURE
50
48
0.40
0.35
0.30
0.25
0.20
0.15
0.10
STATE 1
STATE 2
46
44
STATE 1
42
40
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
Pin Description
PIN
1
NAME
A1
FUNCTION
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Level Shifter Logic Input
Output Supply Ground Connection
2
B1
3
A2
4
B2
5
A3
6
B3
MAX1079
7
A4
8
B4
9
A5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
B5
A6
B6
A7
B7
DGND
VL2
VL1
VCOM
OB7
OA7
OB6
OA6
OB5
OA5
OB4
OA4
OB3
OA3
OB2
OA2
OB1
OA1
Output Supply Rail. Bypass VL2 to DGND with a 0.1μF capacitor.
Output Supply Rail. Bypass VL1 to DGND with a 0.1μF capacitor.
Output Supply Rail. Bypass VCOM to DGND with a 0.1μF capacitor.
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
Level Shifter Output
State/Combinational Logic Select. Connect ST to VCC for state logic and to DGND for combinational
logic operation.
33
ST
34
35
36
37
38
VH1
VH2
Output Supply Rail. Bypass VH1 to DGND with a 0.1μF capacitor.
Output Supply Rail. Bypass VH2 to DGND with a 0.1μF capacitor.
Upper Supply Rail. Bypass VLS to DGND with a 0.1μF capacitor.
Input Logic Ground Connection
VLS
AGND
VCC
Input Logic Supply Connection. Bypass to AGND with a minimum 0.1μF capacitor.
6
_______________________________________________________________________________________
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
MAX1079
Pin Description (continued)
PIN
NAME
FUNCTION
39
EN
CH
EP
Enable Input. All outputs connect to VCOM when EN is low.
Select Input for Two Level/Four Level. Connect CH to VCC for two-level operation and tie CH to
DGND or leave it unconnected for four-level operation. For two-level operation, power VH2 and VL2
and control the outputs with Ax inputs. Bx inputs can be left unconnected or be connected to AGND.
40
—
Exposed Pad. Connect the exposed backside pad to AGND and DGND.
Four-Level Combinational Logic
Detailed Description
Connect CH and ST to AGND for four-level combina-
The MAX17079 is a 7-channel level shifter that converts
a 2-bit logic-level input to a five-level high-voltage out-
put. The outputs are connected to the four output rails
(VH1, VH2, VL1, VL2) through 3Ω switches and to the
fifth rail (VCOM) through a 15Ω switch. The output rails
lie between DGND and the upper supply rail (VLS).
tional operation. If EN is LOW or VCC is less than UVLO
or VLS is less than its UVLO, the outputs are in STAND-
BY and the outputs connect to VCOM. After EN is HIGH
or VCC is greater than UVLO and VLS is greater than
its UVLO, the outputs are ready to respond to logic
inputs at Ax, Bx. If EN goes HIGH after a rising or
falling edge of Ax or Bx, the device remains in STAND-
BY state until the next edge comes. All state transitions
can be level triggered. The output is determined by the
following truth table (Table 1).
The MAX17079 has two modes of operation. When
ST = VCC, it operates in sequential mode and when ST
= AGND, it operates in combinational mode. The
MAX17079 can operate in either two-level output or
four-level output configuration. In four-level output
mode, the output can connect to VH1, VH2, VL2, or VL1,
and in two-level output mode, the output can connect to
VH2 or VL2. Connect CH to AGND for four-level opera-
tion and connect CH to VCC for two-level operation.
Table 1. Truth Table Four-Level
Combinational Operation
The output supply rail voltages should satisfy the fol-
lowing condition at all times:
HIGH (Ax)
LOW (Ax)
VLS ≥ VH1 ≥ (VH2, VL2, VCOM) ≥ VL1
OAx = VH1
OBx = VL1
OAx = VL1
OBx = VH1
The MAX17079 has built-in dead time to avoid shoot-
through current. The propagation delay between input
and output is 80ns and the rise time is 30ns.
HIGH (Bx)
LOW (Bx)
OAx = VH2
OBx = VL2
OAx = VL2
OBx = VH2
Figure 1 is the MAX17079 typical operating circuit and
Figure 2 shows the functional diagram.
_______________________________________________________________________________________
7
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
3.3V 10V
7V
6V
5V
2V
15V
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
VCC VH1
VH2
VCOM
VL2
VL1
VLS
OA1
MAX1079
OB1
OA2
A1
B1
OB2
OA3
OB3
OA4
OB4
A2
B2
A3
B3
MAX17079
A4
B4
PANEL
SYSTEM
OA5
OB5
A5
B5
A6
B6
OA6
OB6
OA7
A7
B7
OB7
AGND
EN
DGND
CH
ST
VCC
Figure 1. Typical Operating Circuit
_______________________________________________________________________________________
8
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
MAX1079
VCC
EN
VH1 VH2 VCOM VL2
VL1
VLS
LOGIC
A1
B1
OA1
OB1
LEVEL SHIFTER
LEVEL SHIFTER
LEVEL SHIFTER
LEVEL SHIFTER
LEVEL SHIFTER
LEVEL SHIFTER
LEVEL SHIFTER
A2
B2
OA2
OB2
A3
B3
OA3
OB3
A4
B4
OA4
OB4
A5
B5
OA5
OB5
A6
B6
OA6
OB6
A7
B7
OA7
OB7
ST
CH
AGND
DGND
Figure 2. Functional Diagram
_______________________________________________________________________________________
9
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
Sequential Operation
Connect CH to AGND and ST to VCC for four-level
sequential operation. If EN is LOW or VCC is less than its
Two-Level Operation
The MAX17079 also has a two-level output voltage
operation. Connect CH to VCC for two-level operation.
In two-level operation, the device transitions between
two states and the outputs can be connected only to
VH2 or VL2 or VCOM in STANDBY. Other than the start-
up condition, there is no way to distinguish between
sequential operation and combinational operation. If EN
is LOW or VCC is less than its UVLO or VLS is less than
its UVLO, the outputs are in STANDBY and the outputs
connect to VCOM. After EN is HIGH, VCC is greater
than its UVLO and VLS is greater than its UVLO, the
outputs are ready to respond to logic inputs at Ax.
Connect Bx to AGND, as the outputs respond only to
the rising and falling edge of Ax. The outputs transition
from VCOM to the specific output only on the rising
edge of Ax in sequential mode. In combinational mode,
the outputs transition from VCOM to the specific output
on either rising or falling edge of Ax. The following truth
table (Table 3) shows the output states.
UVLO or V
is less than its UVLO, the outputs are in
VLS
STANDBY and the outputs connect to VCOM. After EN is
HIGH, VCC exceeds its UVLO and VLS exceeds its
UVLO, the outputs are ready to respond to logic inputs at
Ax and Bx. In sequential operation, the logic inputs and
corresponding output states sequence only in a prede-
fined order. In four-level operation, it is only possible to
progress from STATE 1 to STATE 2 or to STANDBY. The
same applies to the other transitions, including from
STATE 4 to STATE 1. Table 2 shows the logic states of
the level shifter in a sequential mode of operation.
MAX1079
Figure 3 shows the sequence of operation. Outputs
OAx and OBx always change in the same sequence.
Table 2. Truth Table Four-Level
Sequential Mode of Operation
STATE
Ax
H
H
L
Bx
H
L
OAx
VH1
VH2
VL1
VL2
OBx
VL1
VL2
VH1
VH2
Table 3. Truth Table Two-Level Operation
STATE 1
OAx = VH2,
STATE 2
HIGH (Ax)
OBx = VL2
STATE 3
H
L
STATE 4
L
OAx = VL2,
OBx = VH2
LOW (Ax)
x = Don’t care.
EN
Ax
Bx
OAx
OBx
Figure 3. Sequential Mode Operation
10 ______________________________________________________________________________________
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
MAX1079
Startup
The MAX17079 supply rail voltages should satisfy the
startup sequence shown in Figure 4. The supply rail
voltages should also satisfy the following conditions:
Load Characteristics
The load has a typical characteristic of large TFT LCD
panels. During state transitions, a built-in dead time
prevents shoot-through current. During dead time as
the output is not connected, the output can be affected
by the panel load. To avoid voltage spikes during the
deadline, 1nF to 4.7nF capacitors can be added at
each output.
VLS ≥ VH1 ≥ (VH2, VL2, VCOM) ≥ VL1
For proper operation, EN should be HIGH only after all
the supply rails are ON.
PCB Layout Guidelines
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
•
•
•
The MAX17079 has a backside pad to dissipate
heat. Do not route any trace around or under the
backside pad.
VLS
VH1
VH2
Ensure good decoupling of supply rails and put the
bypass capacitor for each power supply very close
to the pin.
VCOM
VL2
VCC
VL1
Create an analog ground island (AGND) that
includes the AGND pin and the VCC bypass capaci-
tor to ground. Connect AGND to the backside pad
directly under the IC. Create a power ground plane
(DGND) that includes the DGND pin, the remaining
supply rails bypass capacitor grounds, and output
bypass capacitors, if used in the system. Connect
DGND to the backside pad directly under the IC.
Other than the backside connection, avoid connect-
ing AGND and DGND.
EN
TIME
Figure 4. Startup Sequence
Chip Information
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
40 TQFN
T4066+5
21-0141
______________________________________________________________________________________ 11
4-Level or 2-Level Logic to High-Voltage
Level Shifter for TFT LCD TV Display
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
2/08
3/10
Initial release
Absolute Maximum Ratings updated
—
2, 11, 12, 13
MAX1079
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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