MAX1479ATE+T [MAXIM]

Telecom Circuit, 1-Func, CMOS, 3 X 3 MM, ROHS COMPLIANT, TQFN-16;
MAX1479ATE+T
型号: MAX1479ATE+T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Telecom Circuit, 1-Func, CMOS, 3 X 3 MM, ROHS COMPLIANT, TQFN-16

晶体
文件: 总11页 (文件大小:635K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-3353; Rev 0; 8/04  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
General Description  
Features  
The MAX1479 crystal-referenced phase-locked-loop  
(PLL) VHF/UHF transmitter is designed to transmit ASK,  
OOK, and FSK data in the 300MHz to 450MHz frequency  
range. The MAX1479 supports data rates up to 100kbps  
in ASK mode and 20kbps in FSK mode (both  
Manchester coded). The device provides an adjustable  
output power of more than +10dBm into a 50load. The  
crystal-based architecture of the MAX1479 eliminates  
many of the common problems of SAW-based transmit-  
ters by providing greater modulation depth, faster fre-  
quency settling, higher tolerance of the transmit  
frequency, and reduced temperature dependence.  
These improvements enable better overall receiver per-  
formance when using the MAX1479 together with a  
superheterodyne receiver such as the MAX1470,  
MAX1471, MAX1473, or MAX7033.  
ETSI-Compliant EN300 220  
+2.1V to +3.6V Single-Supply Operation  
Supports ASK, OOK, and FSK Modulations  
Adjustable FSK Shift  
+10dBm Output Power into 50Load  
Low Supply Current (6.7mA in ASK Mode,  
and 10.5mA in FSK Mode)  
Uses Small Low-Cost Crystal  
Small 16-Pin Thin QFN Package  
Fast-On Oscillator—200µs Startup Time  
Programmable Clock Output  
The MAX1479 is available in a 16-pin thin QFN pack-  
age (3mm x 3mm) and is specified for the automotive  
temperature range from -40°C to +125°C.  
Ordering Information  
Applications  
Remote Keyless Entry  
Tire Pressure Monitoring  
Security Systems  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX1479ATE  
-40°C to +125°C  
16 Thin QFN-EP*  
*EP = Exposed paddle.  
Radio-Controlled Toys  
Wireless Game Consoles  
Wireless Computer Peripherals  
Wireless Sensors  
Typical Application Circuit appears at end of data sheet.  
RF Remote Controls  
Garage Door Openers  
Functional Diagram  
Pin Configuration  
TOP VIEW  
16  
15  
14  
13  
16 15 14 13  
CRYSTAL  
DRIVER  
V
1
2
3
4
DEVIATION  
12  
11  
DEV1  
DEV0  
DD  
V
1
2
3
4
12 DEV1  
11 DEV0  
10 CLK1  
DD  
LOOP  
FILTER  
PD/CP  
MODE  
DIN  
MODE  
MAX1479  
EP  
ASK  
FSK  
DIVIDE  
BY 32  
VCO  
PA  
ENABLE  
9
CLK0  
10 CLK1  
DIN  
MAX1479  
5
6
7
8
CLOCK  
DIVIDER  
ENVELOPE  
SHAPING  
9
ENABLE  
CLK0  
5
6
7
8
THIN QFN  
(3mm x 3mm)  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
ABSOLUTE MAXIMUM RATINGS  
DD  
All Other Pins to GND ................................-0.3V to (V  
V
to GND .............................................................-0.3V to +4V  
Operating Temperature Range .........................-40°C to +125°C  
Junction Temperature......................................................+150°C  
Storage Temperature Range.............................-60°C to +150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
+ 0.3V)  
DD  
Continuous Power Dissipation (T = +70°C)  
A
16-Pin Thin QFN (derate 14.7mW/°C above +70°C)...1176.5mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
DC ELECTRICAL CHARACTERISTICS  
(Typical Application Circuit, all RF inputs and outputs are referenced to 50, V  
= +2.1V to +3.6V, V  
= +2.7V, T = +25°C, unless otherwise noted.) (Note 1)  
= V , T = -40°C to  
DD  
ENABLE DD A  
+125°C, unless otherwise noted. Typical values are at V  
DD  
A
PARAMETER  
Supply Voltage  
SYMBOL  
V
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
2.1  
3.6  
V
DD  
PA off, V  
at  
DIN  
f
RF  
f
RF  
f
RF  
f
RF  
= 315MHz  
= 433MHz  
= 315MHz  
= 433MHz  
2.9  
3.3  
6.7  
7.3  
4.3  
4.8  
0% duty cycle  
(ASK or FSK)  
(Note 2)  
10.7  
11.4  
Supply Current  
I
mA  
DD  
V
at 50% duty  
DIN  
cycle (ASK)  
(Notes 3, 4)  
f
f
= 315MHz (Note 2)  
= 433MHz (Note 4)  
= +25°C  
10.5  
11.4  
0.2  
17.1  
18.1  
RF  
V
at 100%  
DIN  
duty cycle (FSK)  
RF  
T
T
T
A
A
A
Standby Current  
I
V
< V  
IL  
nA  
V
< +85°C (Note 4)  
< +125°C (Note 2)  
120  
700  
300  
STDBY  
ENABLE  
1600  
DIGITAL INPUTS AND OUTPUTS  
V
0.25  
-
DD  
Data Input High  
V
(Note 2)  
(Note 2)  
IH  
Data Input Low  
V
0.25  
0.25  
V
IL  
Maximum Input Current  
I
20  
µA  
IN  
V
0.25  
-
DD  
Output Voltage High  
Output Voltage Low  
V
CLKOUT, load = 10k|| 10pF (Note 4)  
CLKOUT, load = 10k|| 10pF (Note 4)  
V
V
OH  
V
OL  
2
_______________________________________________________________________________________  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
AC ELECTRICAL CHARACTERISTICS  
(Typical Application Circuit, all RF inputs and outputs are referenced to 50, V  
= +2.1V to +3.6V, V  
= +2.7V, T = +25°C, unless otherwise noted.) (Note 1)  
= V , T = -40°C to  
DD  
ENABLE DD A  
+125°C, unless otherwise noted. Typical values are at V  
DD  
A
PARAMETER  
SYSTEM PERFORMANCE  
Frequency Range  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
f
(Note 2)  
300  
450  
MHz  
µs  
RF  
Settle to within 50kHz  
200  
350  
100  
20  
Turn-On Time (Note 5)  
t
ON  
Settle to within 5kHz  
ASK mode (Manchester coded)  
FSK mode (Manchester coded)  
Maximum Data Rate (Note 4)  
kbps  
kHz  
f
RF  
f
RF  
= 315MHz  
= 433MHz  
55  
Maximum FSK Frequency  
Deviation  
DEV[2:0] = 111  
(Note 6)  
80  
T
T
T
= +25°C, V  
= +2.7V  
DD  
6.8  
2.7  
10  
12.0  
16.1  
A
Output Power (Note 2)  
P
= +125°C, V  
= +2.1V  
DD  
5.3  
12.2  
35  
dBm  
OUT  
A
= -40°C, V  
= +3.6V  
A
DD  
f
RF  
f
RF  
f
RF  
f
RF  
= 315MHz  
= 433MHz  
= 315MHz  
= 433MHz  
Transmit Efficiency with CW Tone  
(Note 7)  
%
%
34  
27  
Transmit Efficiency at 50% Duty  
Cycle  
25  
PHASE-LOCKED-LOOP PERFORMANCE  
VCO Gain  
K
280  
-75  
-98  
-74  
-98  
-50  
-45  
-40  
300  
MHz/V  
VCO  
f
f
f
f
= 100kHz  
= 1MHz  
OFFSET  
OFFSET  
OFFSET  
OFFSET  
f
f
= 315MHz  
= 433MHz  
RF  
Phase Noise  
dBc/Hz  
= 100kHz  
= 1MHz  
RF  
f
f
= 315MHz  
= 433MHz  
RF  
Maximum Carrier Harmonics  
dBc  
RF  
Reference Spur  
dBc  
kHz  
MHz  
ppm  
pF  
Loop Bandwidth  
BW  
Crystal Frequency Range  
Crystal Tolerance  
f
f
/32  
XTAL  
RF  
50  
4.5  
/ N  
Crystal Load Capacitance  
Clock Output Frequency  
C
(Note 8)  
Determined by CLK0 and CLK1; see Table 1  
LOAD  
F
MHz  
XTAL  
Note 1: Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match.  
Note 2: 100% tested at T = +125°C. Guaranteed by design and characterization over temperature.  
A
Note 3: 50% duty cycle at 10kHz ASK data (Manchester coded).  
Note 4: Guaranteed by design and characterization, not production tested.  
Note 5: V  
= V to V  
= V . f  
is defined as the frequency deviation from the desired carrier frequency.  
ENABLE  
IL  
ENABLE  
IH OFFSET  
Note 6: Dependent on crystal and PC board trace capacitance.  
Note 7: V > V , V > V , Efficiency = P / (V x I ).  
ENABLE  
IH DATA  
IH  
OUT  
DD  
DD  
Note 8: Dependent on PC board trace capacitance.  
_______________________________________________________________________________________  
3
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Typical Operating Characteristics  
(Typical Application Circuit, V  
= +2.7V, T = +25°C, unless otherwise noted.)  
A
DD  
SUPPLY CURRENT vs. SUPPLY VOLTAGE  
SUPPLY CURRENT vs. SUPPLY VOLTAGE  
SUPPLY CURRENT vs. SUPPLY VOLTAGE  
15  
14  
13  
12  
11  
10  
9
10.0  
9.5  
9.0  
8.5  
8.0  
7.5  
7.0  
6.5  
6.0  
5.5  
5.0  
15  
14  
13  
12  
11  
10  
9
f
= 315MHz  
f
= 315MHz  
f
= 433MHz  
RF  
RF  
RF  
PA ON  
PA 50% DUTY CYCLE AT 10kHz  
PA ON  
TA = -40°C  
TA = -40°C  
TA = +85°C  
TA = +25°C  
TA = +25°C  
TA = +125°C  
TA = +85°C  
TA = +125°C  
TA = +85°C  
TA = +125°C  
TA = +25°C  
TA = -40°C  
8
8
7
7
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
SUPPLY CURRENT vs. SUPPLY VOLTAGE  
SUPPLY CURRENT vs. OUTPUT POWER  
SUPPLY CURRENT vs. OUTPUT POWER  
10.0  
9.5  
9.0  
8.5  
8.0  
7.5  
7.0  
6.5  
6.0  
5.5  
5.0  
12  
11  
10  
9
12  
11  
10  
9
f
= 433MHz  
RF  
f
= 315MHz  
f
= 433MHz  
RF  
RF  
PA 50% DUTY CYCLE AT 10kHz  
TA = +85°C  
PA ON  
PA ON  
8
8
TA = +125°C  
7
7
TA = +25°C  
6
6
5
5
TA = -40°C  
50% DUTY CYCLE  
4
50% DUTY CYCLE  
4
3
3
2
2
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
-14  
-10  
-6  
-2  
2
6
10  
-14  
-10  
-6  
-2  
2
6
10  
SUPPLY VOLTAGE (V)  
AVERAGE OUTPUT POWER (dBm)  
AVERAGE OUTPUT POWER (dBm)  
SUPPLY CURRENT AND OUTPUT POWER  
SUPPLY CURRENT AND OUTPUT POWER  
vs. EXTERNAL RESISTOR  
vs. EXTERNAL RESISTOR  
MAX1479 toc07  
MAX1479 toc08  
18  
16  
14  
12  
10  
8
16  
18  
16  
14  
12  
10  
8
16  
12  
8
f
= 315MHz  
f
= 433MHz  
RF  
RF  
12  
8
PA ON  
PA ON  
POWER  
POWER  
4
4
0
0
CURRENT  
-4  
-8  
-12  
-16  
-4  
-8  
-12  
-16  
CURRENT  
6
6
4
4
2
2
0.1  
1
10  
100  
1k  
10k  
0.1  
1
10  
100  
1k  
10k  
EXTERNAL RESISTOR ()  
EXTERNAL RESISTOR ()  
4
_______________________________________________________________________________________  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Typical Operating Characteristics (continued)  
(Typical Application Circuit, V  
= +2.7V, T = +25°C, unless otherwise noted.)  
A
DD  
OUTPUT POWER vs. SUPPLY VOLTAGE  
OUTPUT POWER vs. SUPPLY VOLTAGE  
OUTPUT POWER vs. SUPPLY VOLTAGE  
16  
14  
12  
10  
8
16  
14  
12  
10  
8
16  
14  
12  
10  
8
f
= 315MHz  
f
= 433MHz  
f
= 315MHz  
RF  
RF  
RF  
PA ON  
PA ON  
PA ON  
ENVELOPE SHAPING  
DISABLED  
T
= -40°C  
A
T
= -40°C  
T = -40°C  
A
A
T
A
= +25°C  
T
A
= +25°C  
T
= +25°C  
A
T = +85°C  
A
T
= +85°C  
T
= +85°C  
A
A
T
= +125°C  
T
= +125°C  
T = +125°C  
A
A
A
6
6
6
4
4
4
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
OUTPUT POWER vs. SUPPLY VOLTAGE  
PHASE NOISE vs. OFFSET FREQUENCY  
16  
14  
12  
10  
8
-40  
f
= 433MHz  
RF  
-50  
-60  
-70  
-80  
-90  
PA ON  
ENVELOPE SHAPING  
DISABLED  
T
= -40°C  
A
f
= 315MHz  
= 433MHz  
RF  
T
= +25°C  
A
T
= +85°C  
A
f
RF  
-100  
-110  
-120  
-130  
-140  
T
= +125°C  
A
6
4
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
100  
1k  
10k  
100k  
1M  
10M  
SUPPLY VOLTAGE (V)  
OFFSET FREQUENCY (Hz)  
CLOCK SPUR MAGNITUDE  
vs. SUPPLY VOLTAGE  
FREQUENCY STABILITY  
vs. SUPPLY VOLTAGE  
-40  
-45  
-50  
-55  
-60  
-65  
-70  
10  
8
f
= 315MHz  
RF  
CLKOUT SPUR = f  
f
RF CLKOUT  
10pF LOAD CAPACITANCE  
6
f
= 315MHz  
RF  
4
f
= f /16  
CLKOUT XTAL  
2
0
-2  
-4  
-6  
-8  
-10  
f
= 433MHz  
RF  
f
= f  
/8  
CLKOUT XTAL  
f
= f  
/4  
CLKOUT XTAL  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
_______________________________________________________________________________________  
5
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Pin Description  
PIN  
NAME  
DESCRIPTION  
1
V
Supply Voltage. Bypass to GND with a 10nF and 220pF capacitor as close to the pin as possible.  
DD  
Mode Select. A logic low on MODE enables the device in ASK mode. A logic high on MODE enables the  
device in FSK mode.  
2
3
MODE  
DIN  
Data Input. Power amplifier is on when DIN is high in ASK mode. Frequency is high when DIN is high in  
FSK mode.  
4
5
ENABLE Standby/Power-Up Input. A logic low on ENABLE sets the device in standby mode.  
CLKOUT Buffered Clock Output. Programmable through CLK0 and CLK1. See Table 1.  
Power-Amplifier Supply Voltage. Bypass to GND with a 10nF and 220pF capacitor as close to the pin as  
6
7
8
V
PA  
DD_  
possible.  
Envelope-Shaping Output. ROUT controls the power-amplifier envelope rise and fall. Bypass to GND with a  
680pF and 220pF capacitor as close to the pin as possible.  
ROUT  
Power-Amplifier Output. Requires a pullup inductor to the supply voltage, which can be part of the output-  
matching network to an antenna.  
PAOUT  
9
CLK0  
CLK1  
DEV0  
DEV1  
DEV2  
XTAL1  
XTAL2  
GND  
1st Clock Divider Setting. See Table 1.  
10  
11  
12  
13  
14  
15  
16  
2nd Clock Divider Setting. See Table 1.  
1st FSK Frequency-Deviation Setting. See Table 2.  
2nd FSK Frequency-Deviation Setting. See Table 2.  
3rd FSK Frequency-Deviation Setting. See Table 2.  
1st Crystal Input. f = 32 x f  
.
RF  
XTAL  
2nd Crystal Input. f = 32 x f  
.
RF  
XTAL  
Ground. Connect to system ground.  
Exposed Ground Paddle. EP is the power amplifier’s ground. It must be connected to PC board through a  
low-inductance path.  
EP  
oscillator is running, the 300kHz PLL bandwidth allows  
fast frequency recovery during power-amplifier toggling.  
Detailed Description  
The MAX1479 is a highly integrated ASK/FSK transmit-  
ter operating over the 300MHz to 450MHz frequency  
band. The device requires only a few external compo-  
nents to complete a transmitter solution. The MAX1479  
includes a complete PLL and a highly efficient power  
amplifier. The device can be set into a 0.2nA low-power  
shutdown mode.  
Mode Selection  
MODE (pin 2) sets the MAX1479 in either ASK or FSK  
mode. When MODE is set low, the device operates as  
an ASK transmitter. If MODE is set high, the device  
operates as an FSK transmitter. In the ASK mode, the  
DIN pin controls the output of the power amplifier. A  
logic low on DIN turns off the PA, and a logic high turns  
on the PA. In the FSK mode, a logic low on the DIN pin  
is represented by the low FSK frequency, and a logic-  
high input is represented by the high FSK frequency.  
(The ASK carrier frequency and the lower FSK frequen-  
cy are the same.) The deviation is proportional to the  
crystal load impedance and pulling capacitance. The  
Shutdown Mode  
ENABLE (pin 4) is internally pulled down with a 20µA  
current source. If it is left unconnected or pulled low,  
the MAX1479 goes into a low-power shutdown mode.  
In this mode, the supply current drops to 0.2nA. When  
ENABLE is high, the device is enabled and is ready for  
transmission after 200µs (frequency settles to within  
50kHz).  
maximum frequency deviation is 55kHz for f  
=
RF  
315MHz and 80kHz for f = 433MHz.  
RF  
The 200µs turn-on time of the MAX1479 is mostly domi-  
nated by the crystal oscillator startup time. Once the  
6
_______________________________________________________________________________________  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Clock Output  
The MAX1479 has a dedicated digital output pin for the  
frequency-divided crystal clock signal. This is to be  
used as the time base for a microprocessor. The fre-  
quency-division ratio is programmable through two dig-  
ital input pins (CLK0, CLK1), and is defined in Table 1.  
The clock output is designed to drive a 3.5MHz CMOS  
rail-to-rail signal into a 10pF capacitive load.  
Table 1. Clock Divider Settings  
CLK1  
CLK0  
CLKOUT  
0
0
1
1
0
1
0
1
Logic 0  
f
f
/ 4  
/ 8  
XTAL  
XTAL  
f
/ 16  
XTAL  
Envelope-Shaping Resistor  
The envelope-shaping resistor allows for a gentle turn-  
on/turn-off of the PA in ASK mode. This results in a small-  
er spectral width of the modulated PA output signal.  
Table 2. Frequency-Deviation Settings  
DEV2  
DEV1  
DEV0  
DEVIATION  
1/8 x max  
1/4 x max  
3/8 x max  
1/2 x max  
5/8 x max  
3/4 x max  
7/8 x max  
Max  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Phase-Locked Loop  
The PLL block contains a phase detector, charge  
pump, integrated loop filter, VCO, asynchronous 32x  
clock divider, and crystal oscillator. The PLL requires  
no external components. The relationship between the  
carrier and crystal frequency is given by:  
f
= f / 32  
RF  
XTAL  
Crystal Oscillator  
The crystal oscillator in the MAX1479 is designed to  
present a capacitance of approximately 3pF to ground  
from the XTAL1 and XTAL2 pins in ASK mode. In most  
cases, this corresponds to a 4.5pF load capacitance  
applied to the external crystal when typical PC board  
parasitics are added. In FSK mode, a percentage  
(defined by bits DEV0 to DEV2) of the 3pF internal crys-  
tal oscillator capacitance is removed for a logic 1 on  
the DIN pin to pull the transmit frequency. The frequen-  
cy deviation is shown in Table 2. It is very important  
to use a crystal with a load capacitance that is equal  
to the capacitance of the MAX1479 crystal oscillator  
plus PC board parasitics. If very large FSK frequency  
deviations are desired, use a crystal with a larger  
motional capacitance and/or reduce PC board parasitic  
capacitances.  
Application Circuit delivers +10dBm at a supply volt-  
age of +2.7V, and draws a supply current of 6.7mA for  
ASK/OOK operation (V  
at 50% duty cycle) and  
DIN  
10.5mA for FSK operation. Thus, the overall efficiency  
at 100% duty cycle is 35%. The efficiency of the power  
amplifier itself is about 50%. An external resistor at  
ROUT sets the output power.  
Applications Information  
Output Matching to 50  
When matched to a 50system, the MAX1479 PA is  
capable of delivering more than +10dBm of output  
power at V  
= 2.7V. The output of the PA is an open-  
DD  
drain transistor that requires external impedance  
matching and pullup inductance for proper biasing.  
Power Amplifier  
The PA of the MAX1479 is a high-efficiency, open-drain,  
class-C amplifier. With a proper output-matching net-  
work, the PA can drive a wide range of impedances,  
including small-loop PC board trace antennas and any  
50antennas. The output-matching network for a 50Ω  
antenna is shown in the Typical Application Circuit. The  
output-matching network suppresses the carrier harmon-  
ics and transforms the antenna impedance to an optimal  
impedance at PAOUT (pin 8), which is about 250.  
The pullup inductance from PAOUT to V  
serves three  
DD  
main purposes: It forms a resonant tank circuit with the  
capacitance of the PA output, provides biasing for the  
PA, and becomes a high-frequency choke to reduce  
the RF energy coupling into V . Maximum efficiency is  
DD  
achieved when the PA drives a load of 250. The rec-  
ommended output-matching network topology is shown  
in the Typical Application Circuit.  
When the output-matching network is properly tuned,  
the power amplifier is highly efficient. The Typical  
_______________________________________________________________________________________  
7
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Output Matching to  
PC Board Loop Antenna  
Layout Considerations  
A properly designed PC board is an essential part of  
any RF/microwave circuit. On the power-amplifier out-  
put, use controlled-impedance lines and keep them as  
short as possible to minimize losses and radiation.  
In most applications, the MAX1479 power-amplifier out-  
put has to be impedance matched to a small-loop  
antenna. The antenna is usually fabricated out of a cop-  
per trace on a PC board in a rectangular, circular, or  
square pattern. The antenna has an impedance that  
consists of a lossy component and a radiative compo-  
nent. To achieve high radiating efficiency, the radiative  
component should be as high as possible, while mini-  
mizing the lossy component. In addition, the loop  
antenna has an inherent loop inductance associated  
with it (assuming the antenna is terminated to ground).  
For example, in a typical application, the radiative  
impedance is less than 0.5, the lossy impedance is  
less than 0.7, and the inductance is approximately  
50nH to 100nH.  
Keeping the traces short reduces parasitic inductance.  
Generally, 1in of PC board trace adds about 20nH of  
parasitic inductance. Parasitic inductance can have a  
dramatic effect on the effective inductance. For exam-  
ple, a 0.5in trace connecting a 100nH inductor adds an  
extra 10nH of inductance, or 10%.  
To reduce the parasitic inductance, use wider traces  
and a solid ground or power plane below the signal  
traces. Using a solid ground plane can reduce the par-  
asitic inductance from approximately 20nH/in to 7nH/in.  
Also, use low-inductance connections to ground on all  
GND pins and place decoupling capacitors close to all  
The objective of the matching network is to match the  
power-amplifier output to the impedance of the small-  
loop antenna. The matching components thus tune out  
the loop inductance and transform the low radiative  
and resistive parts of the antenna into the much higher  
value of the PA output. This gives higher efficiency. The  
low radiative and lossy components of the small-loop  
antenna result in a higher Q matching network than the  
50network; thus, the harmonics are lower.  
V
connections.  
DD  
Chip Information  
TRANSISTOR COUNT: 2369  
PROCESS: CMOS  
Table 3. Component Values for Typical  
Application Circuit  
VALUE FOR  
VALUE FOR  
COMPONENT  
f
= 433MHz  
f
= 315MHz  
RF  
RF  
L1  
L3  
22nH  
18nH  
6.8pF  
10pF  
27nH  
22nH  
15pF  
C1  
C2  
22pF  
C3  
10nF  
10nF  
C4  
680pF  
6.8pF  
220pF  
10nF  
680pF  
15pF  
C6  
C8  
220pF  
10nF  
C10  
C11  
C12  
C14  
C15  
220pF  
220pF  
100pF  
100pF  
220pF  
220pF  
100pF  
100pF  
8
_______________________________________________________________________________________  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Typical Application Circuit  
C15  
C14  
16  
15  
14  
13  
V
CC  
FREQUENCY-  
DEVIATION  
INPUTS  
V
DEV1  
DEV0  
CLK1  
CLK0  
DD  
CRYSTAL  
DRIVER  
1
2
3
4
DEVIATION  
12  
11  
10  
9
C10  
C11  
LOOP  
FILTER  
PD/CP  
MODE  
MODE-SELECT  
INPUT  
ASK  
FSK  
DIVIDE  
BY 32  
VCO  
PA  
DIN  
DATA INPUT  
CLOCK-  
DIVIDER  
INPUTS  
MAX1479  
CLOCK  
DIVIDER  
ENVELOPE  
SHAPING  
ENABLE  
ENABLE INPUT  
5
6
7
8
L1  
V
CC  
C12  
C8  
C4  
C1  
L3  
CLOCK  
OUTPUT  
RF  
OUTPUT  
C3  
C2  
C6  
_______________________________________________________________________________________  
9
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Package Information  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,  
go to www.maxim-ic.com/packages.)  
D2  
b
0.10 M  
C
A
B
D
D2/2  
D/2  
E/2  
E2/2  
(NE - 1)  
X e  
C
E
E2  
L
L
k
e
C
L
(ND - 1)  
X e  
C
L
C
L
0.10  
C
0.08 C  
A
A2  
A1  
L
L
e
e
PACKAGE OUTLINE  
12, 16L, THIN QFN, 3x3x0.8mm  
1
E
21-0136  
2
10 ______________________________________________________________________________________  
300MHz to 450MHz Low-Power,  
Crystal-Based +10dBm ASK/FSK Transmitter  
Package Information (continued)  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,  
go to www.maxim-ic.com/packages.)  
EXPOSED PAD VARIATIONS  
DOWN  
BONDS  
ALLOWED  
NOTES:  
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.  
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.  
3. N IS THE TOTAL NUMBER OF TERMINALS.  
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO  
JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED  
WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR  
MARKED FEATURE.  
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm  
FROM TERMINAL TIP.  
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.  
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.  
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.  
9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.  
PACKAGE OUTLINE  
12, 16L, THIN QFN, 3x3x0.8mm  
2
E
21-0136  
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11  
© 2004 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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