MAX1460 [MAXIM]
Low-Power, 16-Bit Smart ADC; 低功耗， 16位智能ADC
| 型号： | MAX1460 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Power, 16-Bit Smart ADC |
| 文件： | 总20页 (文件大小：204K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4784; Rev 0; 10/99
Low-Power, 16-Bit Smart ADC
General Description
Features
The MAX1460 implements a revolutionary concept in
signal conditioning, where the output of its 16-bit ana-
log-to-digital converter (ADC) is digitally corrected over
the specified temperature range. This feature can be
readily exploited by automotive, industrial, and medical
market segments, in applications such as sensors and
smart batteries. Digital correction is provided by an
internal digital signal processor (DSP) and on-chip 128-
bit EEPROM containing user-programmed calibration
coefficients. The conditioned output is available as a
12-bit digital word and as a ratiometric (proportional to
the supply voltage) analog voltage using an on-board
12-bit digital-to-analog converter (DAC). The uncommit-
ted op amp can be used to filter the analog output, or
implement a 2-wire, 4–20mA transmitter.
ꢀ Low-Noise, 400µA Single-Chip Sensor Signal
Conditioning
ꢀ High-Precision Front End Resolves Less than 1µV
of Differential Input Signal
ꢀ On-Chip DSP and EEPROM Provide Digital
Correction of Sensor Errors
ꢀ 16-Bit Signal Path Compensates Sensor Offset
and Sensitivity and Associated Temperature
Coefficients
ꢀ 12-Bit Parallel Digital Output
ꢀ Analog Output
ꢀ Compensates a Wide Range of Sensor Sensitivity
and Offset
The analog front end includes a 2-bit programmable-
gain amplifier (PGA) and a 3-bit coarse-offset (CO)
DAC, which condition the sensor’s output. This coarsely
corrected signal is digitized by a 16-bit ADC. The DSP
uses the digitized sensor signal, the temperature sen-
sor, and correction coefficients stored in the internal
EEPROM to produce the conditioned output.
ꢀ Single-Shot Automated Compensation
Algorithm—No Iteration Required
ꢀ Built-In Temperature Sensor
ꢀ Three-State, 5-Wire Serial Interface Supports
High-Volume Manufacturing
Multiple or batch manufacturing of sensors is support-
ed with a completely digital test interface. Built-in testa-
bility features on the MAX1460 result in the integration
of three traditional sensor-manufacturing operations
into one automated process:
________________________Applications
Hand-Held Instruments
Piezoresistive Pressure and Acceleration
Transducers and Transmitters
• Pretest: Data acquisition of sensor performance
under the control of a host test computer.
Industrial Pressure Sensors and 4–20mA
Transmitters
• Calibration and Compensation: Computation and
storage of calibration and compensation coefficients
determined from transducer pretest data.
• Final Test Operation: Verification of transducer cali-
bration and compensation, without removal from the
pretest socket.
Smart Battery Charge Systems
Weigh Scales and Strain-Gauge Measurement
Flow Meters
Dive Computers and Liquid-Level Sensing
Hydraulic Systems
The MAX1460 evaluation kit (EV kit) allows fast evalua-
tion and prototyping, using a piezoresistive transducer
(PRT) and a Windows®-based PC. The user-friendly EV
kit simplifies small-volume prototyping; it is not necessary
to fully understand the test-system interface, the calibra-
tion algorithm, or many other details to evaluate the
MAX1460 with a particular sensor. Simply plug the PRT
into the EV kit, plug the EV kit into a PC parallel port, con-
nect the sensor to an excitation source (such as a pres-
sure controller), and run the MAX1460 EV kit software.
An oven is required for thermal compensation.
Automotive Systems
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
MAX1460CCM
0°C to +70°C
48 TQFP
Customization
Maxim can customize the MAX1460 for unique require-
ments. With a dedicated cell library of more than 90 sen-
sor-specific functional blocks, Maxim can quickly provide
customized MAX1460 solutions, including customized
microcode for unusual sensor characteristics. Contact
Maxim for further information.
Functional Diagram appears at end of data sheet.
Pin Configuration appears at end of data sheet.
Windows is a registered trademark of Microsoft Corp.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
Low-Power, 16-Bit Smart ADC
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
to V ......................................-0.3V to +6V
Operating Temperature Range...............................0°C to +70°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
DD
SS
All Other Pins ...................................(V - 0.3V) to (V
+ 0.3V)
SS
DD
Short-Circuit Duration, All Outputs.............................Continuous
Continuous Power Dissipation (T = +70°C)
A
48-Pin TQFP (derate 12.5mW/°C above +70°C ).....1000mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +5V, V = 0, f
= 2MHz, T = T
to T , unless otherwise noted.)
MAX
DD
SS
XIN
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL CHARACTERISTICS
Supply Voltage (Note 1)
Supply Current (Note 2)
Throughput Rate
V
During operation
4.75
5.0
400
15
5.25
700
V
DD
I
Continuous conversion
µA
Hz
DD
ANALOG INPUT
Input Impedance
R
1.0
40
MΩ
ppm/°C
nV/°C
dB
IN
Gain Temperature Coefficient (TC)
Input-Referred Offset TC
Common-Mode Rejection Ratio
1200
90
CMRR
From V to V
SS DD
PGA AND COARSE-OFFSET DAC (Notes 3, 4)
PGA gain code = 00
PGA gain code = 01
PGA gain code = 10
PGA gain code = 11
CO-DAC code = 111
CO-DAC code = 110
CO-DAC code = 101
CO-DAC code = 100
CO-DAC code = 000
CO-DAC code = 001
CO-DAC code = 010
CO-DAC code = 011
43
59
46
61
49
64
PGA Gain
V/V
74
77
80
90
93
96
-164
-111
-62
-10
-20
32
-149
-96
-47
5
-134
-81
-32
20
Coarse Offset
% V
DD
-5
10
47
62
81
96
111
164
134
149
ADC (Notes 3, 4)
Resolution
16
0.006
1700
2
Bits
Integral Nonlinearity (Note 5)
Input-Referred Noise
Output-Referred Noise
TEMPERATURE SENSOR (Note 6)
Resolution
INL
PGA gain code = 00, CO-DAC code = 000
%
nV
RMS
5kΩ input impedance
LSB
RMS
260
1.3
LSB/°C
°C
Linearity
T = 0°C to +70°C
A
2
_______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
= +5V, V = 0, f
= 2MHz, T = T
to T , unless otherwise noted.)
MAX
DD
SS
XIN
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT DAC (Note 7)
DAC Resolution
12
1
bits
LSB
LSB
Integral Nonlinearity
INL
Differential Nonlinearity
UNCOMMITTED OP AMP
Op Amp Supply Current
Input Common-Mode Range
Open-Loop Gain
DNL
0.5
100
60
µA
V
CMR
V
SS
+ 1.3
V
- 1.0
DD
A
dB
V
Offset Voltage (as unity-gain
follower)
V
V
= 2.5V (no load)
-30
+ 0.05
+30
mV
OS
IN
Output Voltage Swing
Output Current Range
No load
= (V + 0.2V) to (V - 0.2V)
DD
V
SS
V
- 0.05
DD
V
V
OUT
500
1.0
µA
SS
DIGITAL INPUTS: START, CS1, CS2, SDIO (Note 8), RESET, XIN (Note 9), TEST
Input High Voltage
V
4.0
V
V
IH
Input Low Voltage
V
1.0
IL
Input Hysteresis
V
HYST
V
Input Leakage
I
V
= 0 or V
DD
10
µA
pF
IN
IN
Input Capacitance
C
(Note 10)
50.0
IN
DIGITAL OUTPUTS: D[11...0]
Output Voltage Low
V
I
I
= 500µA
0.5
V
V
OL
SINK
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
V
OH
= 500µA
4.5
SOURCE
I
CS = 0
CS = 0 (Note 10)
10
µA
pF
L
C
OUT
50.0
DIGITAL OUTPUTS: SDIO (Note 8), SDO, EOC, OUT
Output Voltage Low
V
I
I
= 500µA
0.3
4.7
10
V
V
OL
SINK
= 500µA
SOURCE
Output Voltage High
V
OH
Three-State Leakage Current
Three-State Output Capacitance
I
CS = 0
CS = 0 (Note 10)
= 4.75V. I
µA
pF
L
C
OUT
50.0
Note 1: EEPROM programming requires a minimum V
may exceed its limits during this time.
DD
DD
Note 2: This value does not include the sensor or load current. This value does include the uncommitted op amp current. Note that
the MAX1460 will convert continuously if REPEAT MODE is set in the EEPROM.
Note 3: See the Analog Front-End, including PGA, Coarse Offset DAC, ADC, and Temperature Sensor sections.
Note 4: The signal input to the ADC is the output of the PGA plus the output of the CO-DAC. The reference to the ADC is V . The
DD
plus full-scale input to the ADC is +V
and the minus full-scale input to the ADC is -V . This specification shows the con-
DD
DD
tribution of the CO-DAC to the ADC input.
Note 5: See Figure 2 for ADC outputs between +0.8500 to -0.8500.
Note 6: The sensor and the MAX1460 must always be at the same temperature during calibration and use.
Note 7: The Output DAC is specified using the external lowpass filter (Figure 8).
Note 8: SDIO is an input/output digital pin. It is only enabled as a digital output pin when the MAX1460 receives from the test sys-
tem the commands 8 hex or A hex (Table 4).
Note 9: XIN is a digital input pin only when the TEST pin is high.
Note 10: Guaranteed by design. Not subject to production testing.
_______________________________________________________________________________________
3
Low-Power, 16-Bit Smart ADC
Pin Description
PIN
NAME
FUNCTION
1, 2, 12,
13, 18, 19,
31, 32, 36,
41–45
N.C.
No Connection. Not internally connected.
3
AGND
START
Analog Ground. Connect to V
and V using 10kΩ resistors (see Functional Diagram).
DD SS
Optional conversion start input signal, used for extending sensor warm-up time. Internally pulled to
with a 1MΩ (typical) resistor.
4
V
DD
5
6
I.C.
D6
Internally Connected. Leave unconnected.
Parallel Digital Output - bit 6
7
D7
Parallel Digital Output - bit 7
8
D8
Parallel Digital Output - bit 8
9
D9
Parallel Digital Output - bit 9
10
11
D10
D11
Parallel Digital Output - bit 10
Parallel Digital Output - bit 11 (MSB)
Positive Supply Voltage Input. Connect a 0.1µF bypass capacitor from V
must all be connected to the positive power supply on the PCB.
to V . Pins 14, 37, and 38
SS
DD
14, 37, 38
15
V
DD
V
SS
Negative Supply Input
Chip-Select Input. The MAX1460 is selected when CS1 and CS2 are both high. When either CS1 or
CS2 is low, all digital outputs are high impedance and all digital inputs are ignored. CS1 and CS2 are
CS1,
CS2
16, 17
internally pulled high to V
with a 1MΩ (typical) resistor.
DD
Serial Data Input/Output. Used only during programming/testing, when the TEST pin is high. The test
system sends commands to the MAX1460 through SDIO. The MAX1460 returns the current instruction
20
SDIO
SDO
ROM address and data being executed by the DSP to the test system. SDIO is internally pulled to V
with a 1MΩ (typical) resistor. SDIO goes high impedance when either CS1 or CS2 is low and remains
in this state until the test system initiates conversion.
SS
Serial Data Output. Used only during programming/testing. SDO allows the test system to monitor the
DSP registers. The MAX1460 returns to the test system results of the DSP current instruction. SDO is
high impedance when TEST is low.
21
Reset Input. When TEST is high, a low-to-high transition on RESET enables the MAX1460 to accept
22
23
RESET
commands from the test system. This input is ignored when TEST is low. Internally pulled high to V
DD
with a 1MΩ (typical) resistor.
End of Conversion Output. A high-to-low transition of the EOC pulse can be used to latch the Parallel
Digital Output (pins D[11...0]).
EOC
24
25
26
D0
D1
D2
Parallel Digital Output - bit 0 (LSB)
Parallel Digital Output - bit 1
Parallel Digital Output - bit 2
4
_______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
Pin Description (continued)
PIN
27
NAME
D3
FUNCTION
Parallel Digital Output - bit 3
28
D4
Parallel Digital Output - bit 4
Parallel Digital Output - bit 5
29
D5
Output DAC. The bitstream on OUT, when externally filtered, creates a ratiometric analog output volt-
age. OUT is proportional to the 12-bit parallel digital output.
30
OUT
33
34
35
AMPOUT
AMP+
General-Purpose Operational Amplifier Output
Noninverting Input of General-Purpose Operational Amplifier
Inverting Input of General-Purpose Operational Amplifier
AMP-
Internal Oscillator Output. Connect a 2MHz ceramic resonator (Murata CST200) or crystal from XOUT
to XIN.
39
XOUT
Internal Oscillator Input. When TEST is high, this pin must be driven by the test system with a 2MHz,
50% duty cycle clock signal. The resonator does not need to be disconnected in test mode.
40
46
47
XIN
INP
®
Positive Sensor Input. Input impedance is typically > 1MΩ. Rail-to-Rail input range.
Test/Program Mode Enable Input. When high, enables the MAX1460 programming/testing operations.
TEST
Internally pulled to V with a 1MΩ (typical) resistor.
SS
48
INM
Negative Sensor Input. Input impedance is typically > 1MΩ. Rail-to-rail input range.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
_______________________________________________________________________________________
5
Low-Power, 16-Bit Smart ADC
sor excitation. The three-state digital outputs on the
Detailed Description
MAX1460 allow parallel connection of transducers, so
that all five serial interface lines (XIN, TEST, RESET,
SDIO, and SDO) can be shared. The test system
selects an individual transducer using CS1 and CS2.
The test system must vary the sensor’s input and tem-
perature, calculate the correction coefficients for each
unit, load the coefficients into the MAX1460 nonvolatile
EEPROM, and test the resulting compensation.
The main functions of the MAX1460 include:
• Analog Front End: Includes PGA, coarse-offset DAC,
ADC, and temperature sensor
• Test System Interface: Writes calibration coefficients
to the DSP registers and EEPROM
• Test System Interface: observes the DSP operation.
The sensor signal enters the MAX1460 and is adjusted
for coarse gain and offset by the analog front end. Five
bits in the configuration register set the coarse-offset
DAC and the coarse gain of the PGA (Tables 1 and 2).
These bits must be properly configured for the optimum
dynamic range of the ADC. The digitized sensor signal
is stored in a read-only DSP register.
The MAX1460 DSP implements the following character-
istic equation:
2
D = Gain 1 + G T + G T
(
)
1
2
2
Signal+ Of + Of T + Of T + D
0
1
2
OFF
where Gain corrects the sensor’s sensitivity, G and G
1
2
The on-chip temperature sensor also has a 3-bit
coarse-offset DAC that places the temperature signal in
the ADC operating range. Digitized temperature is also
stored in a read-only DSP register. The DSP uses the
digitized sensor, the temperature signals, and the cor-
rection coefficients to calculate the compensated and
corrected output.
correct for Gain-TC, T and Signal are the digitized out-
puts of the analog front end, Of corrects the sensor’s
0
offset, Of and Of correct the Offset-TC, and D is
OFF
1
2
the output offset pedestal.
The test system can write the calibration coefficients
into the MAX1460 EEPROM or write to the DSP regis-
ters directly. The MAX1460 can begin a conversion
using either the EEPROM contents or the register con-
tents. When the test system issues commands, the
MAX1460 is a serially controlled slave device.
The MAX1460 supports an automated production envi-
ronment, where a test system communicates with a
batch of MAX1460s and controls temperature and sen-
The test system observes the MAX1460 DSP operation
in order to acquire the temperature and signal ADC
results, to verify the calibration coefficients, and to get
the output D. The MAX1460 places the contents of sev-
eral important DSP registers on the serial interface after
the tester issues a Start Conversion command.
Table 1. Nominal PGA Gain Settings
PGA
SETTING
NOMINAL GAIN
(V/V)
PGA-1
PGA-0
0
1
2
3
0
0
1
1
0
1
0
1
46
61
77
93
After calibration, compensation, and final test, the
MAX1460 is adapted to its sensor and the pair can be
removed from the test system. Use the resulting trans-
Table 2. Typical Coarse Offset DAC Settings
PGA SETTING
PGA SETTING
PGA SETTING
PGA SETTING
% V
(at ADC
input)
DD
CO
SETTING
0
1
2
3
CO-S
CO-1
CO-0
(mV RTI)
(V = 5V)
DD
(mV RTI)
(V = 5V)
DD
(mV RTI)
(V = 5V)
DD
(mV RTI)
(V = 5V)
DD
-3
-2
1
1
1
1
0
0
0
0
1
1
0
0
0
0
1
1
1
0
1
0
0
1
0
1
-149
-96
-47
5
-162
-104
-51
5
-122
-79
-39
4
-97
-62
-31
3
-80
-52
-25
3
-1
-0
+0
+1
+2
+3
-5
-5
-4
-3
-3
47
51
39
31
62
97
25
52
80
96
104
162
79
149
122
6
_______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
ducer by applying power and the START signal. Latch
Analog Front End, Including PGA, Coarse
Offset DAC, ADC, and Temperature Sensor
Before the sensor signal is digitized, it must be gained
and coarse-offset corrected to maximize the ADC
dynamic range. There are 2 bits (four possible settings)
in the configuration register for the PGA gain, and 3 bits
(eight possible settings) for the CO DAC. The flowchart
(Figure 1) shows a procedure for finding the optimum
the 12-bit parallel digital output using the EOC pulse.
The maximum conversion rate of the MAX1460 is 15Hz,
using a 2MHz resonator. If an analog output is desired,
build a simple lowpass filter using the OUT pin, the
uncommitted op amp, and a few discrete components
(Figure 8).
–MAKE A TEST SYSTEM VARIABLE CALLED “NoMoreGain.”
–SET THE TEMPERATURE TO WHERE THE SENSOR’S SENSITIVITY IS HIGHEST. THIS IS NORMALLY COLD FOR SILICON PRTs.
–SET THE PGA GAIN SETTINGS TO MINIMUM.
–CLEAR THE VARIABLE “NoMoreGain.”
–APPLY MIDSCALE EXCITATION TO THE SENSOR.
–FIND THE COARSE OFFSET DAC SETTING WHERE THE DIGITIZED SIGNAL REGISTER IS CLOSEST TO ZERO (MIDSCALE).
–APPLY MINIMUM SENSOR EXCITATION.
–TEST FOR CLIPPING (DIGITIZED SIGNAL < -0.85).
–APPLY MAXIMUM SENSOR EXCITATION.
–TEST FOR CLIPPING (DIGITIZED SIGNAL > 0.85).
THE SENSOR SENSITIVITY
V
DD
IS TOO LARGE. ADD A
RESISTOR BETWEEN THE
TOP OF THE BRIDGE
SERIES
RESISTOR
AND V , THEN
DD
START OVER.
YES
YES
IS THE PGA AT
MINIMUM GAIN?
DID ADC CLIP?
SENSOR
NO
NO
–REDUCE THE PGA GAIN ONE STEP.
–SET THE VARIABLE “NoMoreGain.”
NO
NO
IS THE PGA AT
MAXIMUM GAIN?
IS “NoMoreGain” SET?
INCREASE THE PGA GAIN ONE STEP.
YES
YES
RECORD THE PGA AND COARSE OFFSET SETTINGS.
CAUTION: CLIPPING IS STILL POSSIBLE FOR LARGE SENSOR’S OFFSET TC AND LARGE TEMPERATURE RANGES.
IF NECESSARY, GUARDBAND AGAINST CLIPPING BY REDUCING THE 0.85 CLIPPING CONSTANTS ABOVE.
Figure 1. Flowchart for Determining PGA and CO Settings
_______________________________________________________________________________________
7
Low-Power, 16-Bit Smart ADC
0.010
4
0.008
0.006
0.004
0.002
0
3
2
1
0
-0.002
0.004
-0.006
-0.008
-0.010
-1
-2
-3
-4
-100 -80 -60 -40 -20
0
20 40 60 80 100
-100 -80 -60 -40 -20
0
20 40 60 80 100
SENSOR SIGNAL INPUT OR ADC INPUT/OUTPUT RANGE (%)
SENSOR SIGNAL INPUT OR ADC INPUT RANGE (%)
Figure 2a. Analog Front-End INL (typical)
Figure 2b. Analog Front-End Differential Nonlinearity (DNL)
(typical)
age be +5V. The full scale (-FS) output of the sensor is
then +5V(-12mV/V) = -60mV; +FS is then +5V (-12mV/V
+ 10mV/V) = -10mV. Following through the flowchart,
the PGA gain setting is +3 (gain = 93V/V) and the CO
correction setting is +1 (+25mV RTI) - (Referred-to
Input). The coarsely corrected -FS input to the ADC is
(-60mV + 25mV)93 = -3.255V. The +FS input to the
ADC is (-10mV + 25mV)93 = +1.395V. The input range
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
of the ADC is
V
. Thus the maximum and minimum
DD
digitized sensor signals become -3.255 / 5 = -0.651
and +1.395 / 5 = +0.279.
Notice that the bridge multiplies the signal by V
and
DD
the ADC divides the signal by V . Thus, the system is
DD
ratiometric and not dependent on the DC value of V
.
DD
-100 -80 -60 -40 -20
0
20 40 60 80 100
The ADC output clips to 1.0 when input values exceed
. The best signal-to-noise ratio (SNR) is achieved
SENSOR SIGNAL INPUT OR ADC INPUT/OUTPUT RANGE (%)
V
DD
when the ADC input is within 85% of V
(Figure 2).
DD
Figure 2c. Analog Front-End Noise Standard Deviation of the
Samples (typical)
The MAX1460 includes an internal temperature-sensing
bridge allowing the MAX1460 temperature to be used
as a proxy for the sensor temperature. For this reason,
the MAX1460 must be mounted in thermal proximity to
the sensor. The output of the temperature-sensing
bridge is also corrected by a 3-bit coarse-offset DAC
and processed by the ADC. The selection of the
Temperature Sensor Offset (TSO) bits in the configura-
tion register should be made so that the digitized tem-
perature signal is as close to 0.0 as possible at
midscale temperature. This is done to maximize the
dynamic range of the thermal-calibration coefficients
(Table 3).
analog front-end settings when the sensor’s character-
istics are unknown. Use the tabulated values (Tables 1
and 2) if the peak sensor excursions are known. See
the Test System Interface section for details on writing
these analog front-end bits.
The PGA gain and the CO are very stable, but are not
accurate. Manufacturing variances on the gain and off-
set of the MAX1460 analog front-end superposition the
residual sensor errors, and are later removed during
final calibration.
For example, suppose the sensor’s sensitivity is
+10mV/V with an offset of -12mV/V. Let the supply volt-
8
_______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
MIN
16 CLK
CYCLES
00 01 02 03 29 30 31 00 01 02 03 29 30 31 00 01 02 03 29 30 31 00 01 02 03 29 30 31
XIN
TEST
RESET
D0 D1 D2 D3 C3 NU NU D0 D1 D2 D3 C3 NU NU D0 D1 D2 D3 C3 NU NU D0 D1 D2 D3 C3 NU NU
SDIO
COMMAND 1
COMMAND 2
COMMAND 3
COMMAND n
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 E0 E1 E2 E3 E4 E5 E6 R0 R1 R2 C0 C1 C2 C3 NU NU
LSB
MSB LSB
MSB LSB
MSB LSB
MSB
COMMAND
EEPROM ADDRESS
FIELD
REG.
REGISTER DATA FIELD
ADD
NOTE: ALL TRANSITIONS MUST OCCUR WITHIN 100ns OF THE XIN CLOCK EDGE.
Figure 3. Test-System Command Timing Diagram
tion on RESET begins a 32-bit serial transfer of the test-
system command word through SDIO. The test system
transitions SDIO on falling edges of the XIN clock; the
MAX1460 latches data is on the rising edge (Figure 3).
Table 3. Temperature Sensor Offset
(TSO) Settings
TEMPERATURE
TSO
SETTING
TSO-2 TSO-1 TSO-0
BRIDGE
OFFSET
The 32-bit command word generated by the test-sys-
tem is divided into four fields (Figure 3). The 4-bit com-
mand field is interpreted in Table 4. The other fields are
usually ignored, except that command 1 hex uses the
two register fields, and command 2 hex requires an
EEPROM address. The command word fields are:
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Maximum
–
–
–
• Register Data Field: Holds the calibration coeffi-
cients to be written into the MAX1460 16-bit registers
–
–
–
• EEPROM Address Field: Holds the hexadecimal
address of the EEPROM bit to be set (from 00 hex to
7F hex)
Minimum
• Register Address Field: Contains the address of the
register (0 to 7) where the calibration coefficient is to
be written
Test-System Interface: Writing Calibration
Coefficients to the DSP Registers
and EEPROM
• Command Field: Instructs the MAX1460 to take a
particular action (Table 4)
To make the MAX1460 respond to commands from the
test system, raise the TEST pin and drive XIN with a
2MHz clock signal. It is not necessary to remove the
resonator. RESET must be low for at least 16 clock
cycles to initialize the MAX1460. Then, a rising transi-
_______________________________________________________________________________________
9
Low-Power, 16-Bit Smart ADC
Table 4. Test System Commands
COMMAND
Write a calibration coefficient into a DSP register.
Block-Erase the entire EEPROM (writes “0” to all 128 bits).
Write “1” to a single EEPROM bit.
HEX CODE
1 hex
C3 C2 C1 C0
0
0
0
0
0
1
0
0
0
0
1
0
1
0
0
0
4 hex
2 hex
NOOP (NO-OPeration)
0 hex
Start Conversion command. The registers are not updated with EEPROM values.
SDIO and SDO are enabled as DSP outputs.
8 hex
A hex
C hex
1
1
1
0
0
1
0
1
0
0
0
0
Start Conversion command. The registers are updated with EEPROM values. SDIO
and SDO are enabled as DSP outputs.
Start Conversion command. The registers are not updated with EEPROM values.
SDIO and SDO are disabled.
Start Conversion command. The registers are updated with EEPROM values. SDIO
and SDO are disabled.
E hex
1
-
1
-
1
-
0
-
Reserved
3, 5, 6, 7, 9, B, D, F hex
Table 5. DSP Calibration Coefficient Registers
REGISTER
ADDRESS
COEFFICIENT
FUNCTION
RANGE
FORMAT
Gain
1
2
3
4
5
6
7
Gain correction
Linear TC gain
-32768 to +32767
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-32768 to +32767
Integer
Fraction
Fraction
Fraction
Fraction
Fraction
Integer
G
1
G
2
Quadratic TC gain
Offset correction
Of
Of
Of
0
1
2
Linear TC offset
Quadratic TC offset
Output midscale pedestal
D
OFF
Writing to the DSP Registers
hex). Fractional coefficient values range from -1.0
(8000 hex) to +0.99997 (7FFF hex).
Command 1 hex writes calibration coefficients from the
test system directly into the DSP registers. Tester com-
mands 8 hex and C hex cause the MAX1460 to start a
conversion using the calibration coefficients in the reg-
isters. This direct use of the registers speeds calibra-
tion and compensation because it does not require
EEPROM write-access time. Bringing RESET low clears
the DSP registers, so the test system should always
write to the registers and start a conversion in a single
command timing sequence.
The register at address 0 is called the Configuration
Register. It holds the coarse offset, PGA gain, Op Amp
Power-Down, temperature-sensor offset, repeat mode,
and reserved bits, as shown in Table 6. The functionali-
ty of the coarse offset, PGA gain, and temperature-sen-
sor bits are described in the Analog Front End section.
The Op Amp Power-Down bit enables the uncommitted
op amp when set. The repeat-mode bit is tested by the
last instruction of the DSP microcode, and, if set, imme-
diately initiates another conversion cycle. The Maxim
reserved bits should not be altered.
As shown in Table 5, seven registers hold the calibra-
tion coefficients of the characteristic equation [D
=
OUT
2
2
Gain (1+G T + G T ) (Signal + Of + Of T + Of T ) +
1
2
0
1
2
D
] implemented by the MAX1460 DSP. All of the
OFF
registers are 16-bit, two’s complement coding format.
When a register is interpreted as an integer, the deci-
mal range is from -32768 (8000 hex) to +32767 (7FFF
10 ______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
sarily long because the internal charge pump must cre-
ate and maintain voltages above 20V long enough to
cause a reliably permanent change in the memory.
Table 6. Configuration Register Bitmap
EEPROM
ADDRESS
(HEX)
BIT
POSITION
DESCRIPTION
Writing an EEPROM bit requires 6ms, so writing the
EEPROM typically requires less than 400ms. Do not
decrease the EEPROM write times.
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
0 (LSB)
CO-0 (LSB)
To write an EEPROM bit, the test system must be compli-
ant with the Command Timing Diagram shown in Figure
3, performing the following operations:
1
CO-1 (MSB)
2
CO-S (Sign)
3
PGA-1 (MSB)
PGA-0 (LSB)
1) Issue command 0 hex, including the EEPROM
address field of the bit to be written.
4
5
Maxim Reserved
Maxim Reserved
Op Amp Power-Down
Maxim Reserved
TSO-0 (LSB)
2) Issue command 2 hex, with the address field used in
step 1. Continuously repeat this command 375 times
(6ms).
6
7
8
3) Issue command 0 hex, including the EEPROM
address field used in steps 1 and 2.
9
10
TSO-1
The procedure for using command 4 hex (Block-Erase
the EEPROM) is similar. Record the Maxim Reserved
bits in the configuration register prior to using this com-
mand, and restore them afterwards. The number of
Block-Erase operations should not exceed 100.
11
TSO-2 (MSB)
12
Maxim Reserved
Maxim Reserved
Maxim Reserved
Repeat Mode
13
14
1) Issue command 0 hex.
15 (MSB)
2) Issue command 4 hex. Continuously repeat this
command 375 times (6ms).
Writing to the Internal EEPROM
3) Issue command 0 hex.
The test system writes to the EEPROM with commands
4 hex (Block-Erase the entire EEPROM), 2 hex (Write
“1” to a single EEPROM bit) and 0 hex (NOOP). During
normal operation (when the TEST pin is low) or when
the test system issues instructions A hex or E hex (Start
conversion from EEPROM values), the DSP reads the
Calibration Coefficients from the EEPROM.
Test System Interface:
Observing the DSP Operation
Test system commands 8 hex and A hex initiate a con-
version while allowing the test system to observe the
operation of the DSP. To calibrate a unit, the test sys-
tem must know the digitized temperature and sensor
signals, stored in DSP registers 8 and 9, and the cali-
brated and compensated output stored in DSP register
10. The test system should also verify the EEPROM con-
tents, registers 0–7. All these signals pass through DSP
register S during the execution of the instruction ROM
microcode. The SDO pin outputs the S register values,
and the SDIO pin tells the tester which signal is currently
on S.
In the normal production flow, determine the calibration
coefficients using direct register access. Then load the
calibration coefficients into the EEPROM with tester
instruction 2 hex. Instruction 4 hex block-erases the
EEPROM and is necessary only for a rework or reclaim
operation. For each part, the Maxim reserved bits in the
Configuration Register should be read before instruc-
tion 4 hex is issued, and restored afterwards. The
MAX1460 is shipped with its internal EEPROM uninitial-
ized, except for the reserved bits.
The internal 128-bit EEPROM is arranged as eight 16-
bit words. These eight words are the configuration
register and the seven calibration-coefficient values
(Table 7).
The MAX1460 EEPROM is bit addressable. The final cal-
ibration coefficients must be mapped into the
EEPROM locations that are to be set. There is no bit-
clear instruction. Any EEPROM write operation is neces-
______________________________________________________________________________________ 11
Low-Power, 16-Bit Smart ADC
Table 7. EEPROM Memory Map
0A
1A
2A
3A
4A
5A
6A
7A
09
08
07
17
27
37
47
57
67
77
06
16
26
36
46
56
66
76
05
15
25
35
45
55
65
75
04
14
24
34
44
54
64
74
03
13
23
33
43
53
63
73
02
12
22
32
42
52
62
72
01
LSB
EE Address (hex)
Contents
10
0F
1F
2F
3F
4F
5F
6F
7F
0E
1E
2E
3E
4E
5E
6E
7E
0D
1D
2D
3D
4D
5D
6D
7D
0C
1C
2C
3C
4C
5C
6C
7C
0B
1B
2B
3B
4B
5B
6B
7B
MSB
Configuration
EE Address (hex)
Contents
20
19
18
28
38
48
58
68
78
11
LSB
MSB
Gain
EE Address (hex)
Contents
30
29
39
49
59
69
79
21
LSB
MSB
G
G
1
EE Address (hex)
Contents
40
31
LSB
MSB
2
EE Address (hex)
Contents
50
41
LSB
MSB
Of
Of
Of
0
1
2
EE Address (hex)
Contents
60
51
LSB
MSB
EE Address (hex)
Contents
70
61
LSB
MSB
EE Address (hex)
Contents
00
71
LSB
MSB
D
OFF
There are three internal DSP registers that are directly
observable on the SDIO and SDO pins:
Table 8. Subset of DSP Instruction
PROGRAM
COUNTER
INSTRUCTION
CODE (PS)
(HEX)
• S: 16-bit DSP Scratch or Accumulator register, con-
taining the result of the execution of the current
microcode instruction.
S REGISTER VALUE
(P)
(HEX)
• P: 8-bit DSP Program Pointer register, which holds
the address of the instruction ROM microcode.
D0
D1
D2
D3
D4
D5
D6
D7
66 or 6C
47
Register 0—Configuration
Register 1—Gain
• PS: 8-bit DSP Program Store register. PS is the
instruction that the DSP is currently executing. PS is
the instruction ROM data at address P.
11
Register 2—G
Register 3—G
1
2
2E
38
Register 4—Of
Register 5—Of
Register 6—Of
0
1
The DSP instructions relevant to the test system are list-
ed in Table 8.
03
22
2
After the test system sends the Start Conversion com-
mands 8 hex or A hex, SDIO and SDO are both
enabled as MAX1460 serial outputs. The test system
should disable (high impedance) its SDIO driver to
avoid a bus conflict at this time so that the MAX1460
can drive the pin. After the DSP executes each one of
the microcode instructions, the contents of the registers
S, P, and PS are output in a serial format (Figure 4).
56
Register 7—D
OFF
Register 8—Temperature
Signal
D8
D9
EA
01
3B
Register 9—Sensor Signal
Register 10—Compensated
Output D
65 or 6B
A new DSP instruction and a new state of the S, P, and
PS registers are delivered every 16n + 9 clock cycles,
where n = 0, 1, 2... after the Start Conversion command
completes. The tester should latch the SDIO and SDO
12 ______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
th
th
(16 n + 9) CLOCK CYCLE
(16 (n + 1) + 9) CLOCK CYCLE
XIN
LSB
MSB
SDO S12 S13 S14 S15 S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11
LSB
MSB LSB
MSB
SDIO
PS4 PS5 PS6 PS7 P0 P1 P2 P3 P4 P5 P6 P7 PS0 PS
1
PS2 PS3 PS4 PS5 PS6 PS7 P0 P1 P2 P3 P4 P5 P6 P7 PS0 PS1 PS2 PS3
DSP CYCLE n-1
DSP CYCLE n
DSP CYCLE n+1
NOTE: ALL TRANSITIONS MUST OCCUR WITHIN 100ns OF THE XIN CLOCK EDGE.
Figure 4. DSP Serial Output Timing Diagram
t
CONV
V
DD
t
WARM
START
(OPTIONAL)
t
ADC
SDIO & SDO
(TEST MODE)
t
DSP
D [11...0]
EOC
t
EOC
Figure 5. MAX1460 Conversion Timing
bits on the falling edge of the XIN clock signal. When
the P and PS registers in Table 8 appear on SDIO, the
tester should save the corresponding SDO data.
instruction ROM microcode during t
. In TEST mode,
DSP
and during t
, SDIO and SDO outputs carry useful
DSP
information. At 130,586 clock cycles after the Start
Conversion command is received, the LSB of the S and
P DSP registers is available on SDO and SDIO. The last
DSP instruction is D0 hex. The tester can now start a
new communication sequence by lowering the RESET
pin for at least 16 clock cycles, and then resume dri-
ving SDIO. SDIO becomes high impedance when
RESET is low.
The conversion timing of the MAX1460 is shown in
Figure 5 and Table 9. In the figure, the conversion is
initiated by a rising transition on the START pin.
Equivalently, conversion can be initiated in TEST mode
after completion of tester commands 8 hex or A hex, or
reinitiated by the state of the Repeat Mode bit in the
configuration register. After a conversion is initiated,
the 16-bit ADC digitizes the temperature and sensor
signals during t
. Then, the DSP executes the
ADC
______________________________________________________________________________________ 13
Low-Power, 16-Bit Smart ADC
Table 9. MAX1460 Conversion Timing
PARAMETER
Sensor Warm-Up Time
ADC Time
SYMBOL
MIN
35
MAX
—
130,585
3,364
8
UNITS
t
ms
WARM
t
t
130,585
3,220
8
XIN clk cycles
XIN clk cycles
XIN clk cycles
XIN clk cycles
ADC
DSP Time
t
DSP
EOC
EOC Pulse Width
Conversion Time
t
133,805
133,949
CONV
The A and A versions of equation 1 may be ratioed to
L
S
Applications Information
obtain:
Calibration and Compensation Procedure
Perform fine calibration by characterizing the sensor/
MAX1460 pair using the test system and then finding
Equation (2a)
2
Signal − x ⋅ Signal
AL
AS
the calibration coefficients Gain, G , G , Of , Of , and
1
2
0
1
+ Of + Of T + Of T = 0
2 A
0
1 A
Of using the equations below. This simple fine-calibra-
1− x
2
tion procedure requires three temperatures, denoted A,
B, and C, and two sensor excitations, named S and L
for small and large. Thus, there are six data points (AS,
AL, BS, BL, CS, and CL); six unknown calibration coeffi-
cients; and six versions of the characteristic equation, in
the form:
Similarly,
Equation (2b)
2
Signal − x ⋅ Signal
BL
BS
+ Of + Of T + Of T = 0
0
1 B
2 B
1− x
Equation (2c)
Equation (1)
2
Signal − x ⋅ Signal
CL
CS
2
+ Of + Of T + Of T
= 0
0
1 C
2 C
D − D
= Gain 1+ G T + G T
1 C 2 C
L
OFF
1− x
where
2
Signal + Of + Of T + Of T
CL
0
1 C
2 C
Equation (3)
where D , D , and D
are determined by the end
L
S
OFF
L
D − D
L
OFF
OFF
x =
product specification. D is the desired MAX1460 out-
D
− D
S
put corresponding to the L sensor excitation; D is the
desired MAX1460 output corresponding to the S sen-
S
Equations 2a, 2b, and 2c form a system of three linear
equations, with three unknowns, Of , Of , and Of .
sor excitation; D
is the desired midscale output;
OFF
Signal is the digitized sensor reading at temperature
0
1
2
CL
Solve for Of , Of , and Of .
C with the L sensor excitation applied; and T is the
C
digitized temperature reading at temperature C.
0
1
2
The small sensor excitation versions of Equation 1 can
be ratioed to obtain:
Unstable digitized temperature readings indicate that
thermal equilibrium has not been achieved, necessitat-
ing increased soak times or a better thermal control.
Averaging many readings from the MAX1460 will help
filter out AC variations in the sensor excitation and oven
temperature.
Equation (4a)
Y
− Y
+ G T Y − T Y
+
(
)
(
)
)
CS
AS
1
A
CS
C AS
2
2
G
T
Y
− T
Y
= 0
2
A
CS
C
AS
Begin calibration by soaking the sensor and the
MAX1460 pair at the first temperature, A, and apply the
L excitation to the sensor. Start a conversion and
Equation (4b)
Y
− Y
+ G T Y − T Y
+
(
)
(
record the digitized temperature T and the digitized
CS
BS
1
B CS
C BS
A
signal Signal . Apply the S sensor excitation, and
AL
2
2
G
T
Y
− T
Y
= 0
2
B
CS
C
BS
record the digitized signal Signal . Repeat this proce-
AS
dure for temperatures B and C, recording T , Signal
,
B
BL
Signal , T , Signal , and Signal .
CS
BS
C
CL
14 ______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
C
F
1µF
UNCOMPENSATED SENSOR ERROR
10
8
6
4
R
F
R1
500k
V
DD
500k
2
OUT
UNFILTERED
BITSTREAM
0
AMP-
AMP+
R
FSO
D1
10k
MAX1460
OP AMP
-2
-4
-6
-8
-10
AMPOUT
FILTERED
ANALOG
OUTPUT
AGND
OFFSET
R
D2
10k
0
10
20
30
40
50
60
70
TEMPERATURE (°C)
Figure 6. Sensor Characteristics Before Compensation
Figure 8. Filtering the Output DAC
Equation (5c)
COMPENSATED TRANSDUCER ERROR
0.20
D
− D
OFF
S
Y
=
CS
2
0.15
0.10
Signal + Of + Of T + Of T
2 C
CS
0
1 C
Equations 4a and 4b form a system of two linear equa-
0.05
tions and two unknowns, G and G . Solve for G and
1
2
1
FSO
G . Equation 1 can now be readily solved for the last
2
0
unknown, Gain.
OFFSET
-0.05
-0.10
-0.15
-0.20
Arithmetic manipulation can magnify measurement
errors and noise. Quantization of the calibration coeffi-
cients is another reason to consider adjusting the Gain
and D
coefficients. To do this, load the MAX1460
OFF
registers with the calculated coefficients Gain, G , G ,
1
2
0
10
20
30
40
50
60
70
Of , Of , Of , and D . Assuming the oven is still at
0
1
2
OFF
TEMPERATURE (°C)
temperature C and the S sensor excitation is still
applied, measure the output D . Change to the L sen-
CS
CL
Figure 7. Compensated Sensor/MAX1460 Pair
sor excitation, and measure D . Compute the new
Gain coefficient using equation 6. Remeasure D , and
CL
where:
compute the new D
7.
coefficient, given by equation
OFF
Equation (5a)
D
− D
OFF
Equation (6)
S
Y
=
=
AS
2
Signal + Of + Of T + Of T
2 A
AS
0
1 A
D − D
L
S
GAIN
= Gain
new
D
− D
CS
Equation(5b)
CL
D
− D
OFF
Equation (7)
S
Y
BS
2
Signal + Of + Of T + Of T
2 B
BS
0
1 B
D
= D
+ D − D
OFF L CL
OFF
new
The final calibration coefficients may now be written
into the MAX1460 EEPROM. The unit is now ready for
final test.
______________________________________________________________________________________ 15
Low-Power, 16-Bit Smart ADC
This algorithm minimizes the error directly at the six test
conditions, AS, AL, BS, BL, CS, and CL. Space the
temperatures A, B, and C widely to minimize the signal-
to-noise ratio of the measurement. If there is a large
error remaining in the finished product, move the cali-
bration temperatures closer to the peak error tempera-
tures. Similarly, full-scale sensor excitation may not be
the best calibration condition if the sensor has non-
linearities. Move S and L away from full scale.
MAX1460 Evaluation/
Development Kit
The MAX1460 evaluation kit (EV kit) speeds the devel-
opment of MAX1460-based transducer prototypes and
test systems. First-time users of the MAX1460 are
strongly encouraged to use this kit, which includes:
1) Evaluation board, with a MAX1460 sample and a sili-
con pressure sensor, ready for customer evaluation.
2) Interface board that must be connected to a PC par-
allel port.
Figure 6 shows the characteristics of an individual
Lucas-NovaSensor model NPH8-100-EH, 0 to 15psig,
silicon pressure sensor. Figure 7 shows the result of the
compensated sensor/MAX1460 pair.
3) MAX1460 communication/compensation software
(Windows compatible), which enables programming
of the MAX1460 one module at a time.
Using the Compensated
Sensor/MAX1460 Pair
4) Detailed Design/Applications manual, developed for
sensor-test engineers.
After calibration and removal from the test system, the
MAX1460 and the sensor form a mated pair. The START
The evaluation kit order number is MAX1460EVKIT.
pin can be connected to V
or left unconnected if the
DD
sensor does not require a significant warm-up time. Now
operation is simple: just apply power and latch the paral-
lel output D when EOC falls. Temperature is digitized dur-
Pin Configuration
ing the first half of t
, so the MAX1460 provides a
ADC
minimum sensor warm-up time of 35ms. Using a 2MHz
resonator, the conversion time t is nominally 67ms. If
CONV
the Repeat Mode bit is set, conversions repeat at a rate of
15Hz.
N.C.
N.C.
AGND
START
I.C.
1
2
3
4
5
6
7
8
9
36 N.C.
35 AMP-
34 AMP+
33 AMPOUT
32 N.C.
31 N.C.
30 OUT
29 D5
If the sensor requires more than 35ms of warm-up time,
the START pin may be used to initiate conversion (Figure
5). If the Repeat Mode bit is set, START should remain
high. If the Repeat Mode bit is reset, START may be used
to externally control the conversion rate of the MAX1460.
After the 12-bit parallel output D is latched, end the con-
version by taking START low for at least one clock cycle.
D6
MAX1460
D7
D8
D9
28 D4
The output DAC converts the parallel digital output into
a serial bitstream on OUT. A simple external lowpass
filter, using the MAX1460 op amp, converts the OUT
bitstream into a ratiometric analog voltage (Figure 8).
The filter shown is an inverting configuration, but the
D10 10
D11 11
N.C. 12
27 D3
26 D2
25 D1
Gain and D
coefficients of the characteristic equa-
OFF
tion can be adjusted to obtain either polarity. If the op
amp is not used, it can be powered down using the Op
Amp Power-Down bit in the configuration register.
The MAX1460 requires a minimum of external compo-
nents:
• One power-supply bypass capacitor (C1) from V
DD
to V
.
SS
• One 2MHz ceramic resonator (X ).
1
• Two 10kΩ resistors for the AGND pin.
• If an analog output is desired, two 500kΩ resistors
and a 1µF capacitor are needed for filtering.
16 ______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
Functional Diagram
CS1
CS2
START TEST
RESET SDIO
SDO
EOC AMP- AMP+
+5V
10k
16-BIT INTERFACE TO ALL SIGNALS
AGND
MAX1460
10k
AMPOUT
2MHz RESONATOR
OP
AMP
XIN
X
1
OSCILLATOR
CONTROL
LOGIC
EEPROM
INSTRUCTION
ROM
XOUT
+5V
V
DD
REF = V
DD
OUT
CONFIGURATION
REGISTER
DAC
C1
0.1µF
16-BIT
TEMPERATURE
SENSOR
CORRECTION
COEFFICIENTS
REGISTERS
DIGITAL SIGNAL
PROCESSOR
(DSP)
D [11...0]
12-BIT DIGITAL OUTPUT
REF = V
DD
INP
PGA &
COARSE
TEMPERATURE &
SENSOR SIGNAL
REGISTERS
16-BIT ADC
OFFSET
MUX
CORRECTION
INM
V
SS
SENSOR
Chip Information
TRANSISTOR COUNT: 59,855
SUBSTRATE CONNECTED TO V
SS
______________________________________________________________________________________ 17
Low-Power, 16-Bit Smart ADC
NOTES
18 ______________________________________________________________________________________
Low-Power, 16-Bit Smart ADC
NOTES
______________________________________________________________________________________ 19
Low-Power, 16-Bit Smart ADC
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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