MAX1452AAE+C8H [MAXIM]
Analog Circuit, PDSO16;
| 型号： | MAX1452AAE+C8H |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Analog Circuit, PDSO16 光电二极管 |
| 文件： | 总25页 (文件大小：935K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
General Description
Benefits and Features
● Single-Chip, Integrated Analog Signal Path Reduces
Design Time and Saves Space in a Complete
Precision Sensor Solution
The MAX1452 is a highly integrated analog-sensor sig-
nal processor optimized for industrial and process con-
trol applications utilizing resistive element sensors. The
MAX1452 provides amplification, calibration, and temper-
ature compensation that enables an overall performance
approaching the inherent repeatability of the sensor. The
fully analog signal path introduces no quantization noise
in the output signal while enabling digitally controlled trim-
ming with the integrated 16-bit DACs. Offset and span are
calibrated using 16-bit DACs, allowing sensor products to
be truly interchangeable.
• Provides Amplification, Calibration, and
Temperature Compensation
• Fully Analog Signal Path
• Accommodates Sensor Output Sensitivities from
4mV/V to 60mV/V
• Single-Pin Digital Programming
• No External Trim Components Required
• 16-Bit Offset and Span Calibration Resolution
• Supports Both Current and Voltage Bridge Excitation
• Fast 150μs Step Response
The MAX1452 architecture includes a programmable
sensor excitation, a 16-step programmable-gain ampli-
fier (PGA), a 768-byte (6144 bits) internal EEPROM, four
16-bit DACs, an uncommitted op amp, and an on-chip
temperature sensor. In addition to offset and span com-
pensation, the MAX1452 provides a unique temperature
compensation strategy for offset TC and FSOTC that was
developed to provide a remarkable degree of flexibility
while minimizing testing costs.
• On-Chip Uncommitted Op Amp
● On-Chip Lookup Table Supports Multipoint
Calibration Temperature Correction Improving
System Performance
● Secure-Lock™ Prevents Data Corruption
● Low 2mA Current Consumption Simplifies Power-
Supply Design in 4–20mA Applications
The MAX1452 is packaged for the commercial, industrial,
and automotive temperature ranges in 16-pin SSOP/
TSSOP and 24-pin TQFN packages.
Ordering Information
PART
TEMP RANGE
0°C to +70°C
PIN-PACKAGE
16 SSOP
Customization
MAX1452CAE+
MAX1452EAE+
MAX1452AAE+
MAX1452AUE+
MAX1452ATG+
MAX1452C/D
Maxim can customize the MAX1452 for high-volume
dedicated applications. Using our dedicated cell library
of more than 2000 sensor-specific functional blocks,
Maxim can quickly provide a modified MAX1452 solution.
Contact Maxim for further information.
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
0°C to +70°C
16 SSOP
16 SSOP
16 TSSOP
24 TQFN-EP*
Dice**
Applications
● Pressure Sensors
● Transducers and Transmitters
● Strain Gauges
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
**Dice are tested at T = +25°C, DC parameters only.
A
● Pressure Calibrators and Controllers
● Resistive Elements Sensors
● Accelerometers
Detailed Block Diagram and Pin Configurations appear at
the end of data sheet.
● Humidity Sensors
Outputs Supported
● 4–20mA
● 0 to +5V (Rail-to-Rail)
● +0.5V to +4.5V Ratiometric
● +2.5V to ±2.5V
Secure-Lock is a trademark of Maxim Integrated Products, Inc.
19-1829; Rev 5; 4/15
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Absolute Maximum Ratings
Supply Voltage, V
to V .........................................-0.3V, +6V
Operating Temperature:
DD
SS
Supply Voltage, V
All Other Pins...................................(V - 0.3V) to (V
Short-Circuit Duration, FSOTC, OUT, BDR,
AMPOUT................................................................Continuous
Continuous Power Dissipation (T = +70°C)
16-Pin SSOP/TSSOP (derate 8.00mW/°C above +70°C)..640mW
24-Pin TQFN (derate 20.8mW/°C above +70°C).................1.67W
to V
................................-0.5V to +0.5V
MAX1452CAE+/MAX1452C/D.............................0°C to +70°C
MAX1452EAE+.................................................-40°C to +85°C
MAX1452AAE+...............................................-40°C to +125°C
MAX1452AUE+..............................................-40°C to +125°C
MAX1452ATG+...............................................-40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................ +300°C
DD
DDF
+ 0.3V)
SS
DD
A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
= V
= +5V, V = 0V, T = +25°C, unless otherwise noted.)
DD
DDF SS A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL CHARACTERISTICS
Supply Voltage
V
4.5
4.5
5.0
5.0
2.0
5.5
5.5
2.5
V
V
DD
EEPROM Supply Voltage
Supply Current
V
DDF
I
(Note 1)
mA
DD
Maximum EEPROM Erase/
Write Current
I
30
mA
DDFW
Maximum EEPROM Read
Current
I
12
1
mA
DDFR
Oscillator Frequency
ANALOG INPUT
f
0.85
1.15
MHz
OSC
Input Impedance
R
1
MI
IN
Input-Referred Offset Tempco
(Notes 2, 3)
P1
µV/°C
Input-Referred Adjustable
Offset Range
Offset TC = 0 at minimum gain (Note 4)
P150
0.01
90
mV
%
Percent of +4V span, V
4.5V
= +0.5V to
OUT
Amplifier Gain Nonlinearity
Specified for common-mode voltages
Common-Mode Rejection Ratio
CMRR
dB
between V and V
SS
(Note 2)
DD
Input Referred Adjustable
FSO Range
4 to
60
(Note 5)
mV/V
ANALOG OUTPUT
Differential Signal-Gain Range
Selectable in 16 steps
39 to 234
39
V/V
V/V
V
Configuration [5:2] 0000bin
Configuration [5:2] 0001bin
Configuration [5:2] 0010bin
Configuration [5:2] 0100bin
Configuration [5:2] 1000bin
No load from each supply
34
47
46
59
52
Differential Signal Gain
58
65
74
82
91
102
157
133
143
0.02
Maximum Output-Voltage Swing
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Electrical Characteristics (continued)
(V
= V
= +5V, V = 0V, T = +25°C, unless otherwise noted.)
DD
DDF SS A
PARAMETER
SYMBOL
CONDITIONS
= 1mA sinking, T = T
MIN
TYP
0.100
4.87
0.1
MAX
UNITS
Output-Voltage Low
Output-Voltage High
Output Impedance at DC
I
I
to T
MAX
0.20
V
V
Ω
OUT
A
MIN
= 1mA sourcing, T = T
to T
MAX
4.75
OUT
A
MIN
ΔV
ΔOffset
/
OUT
Output Offset Ratio
0.90
0.9
1.05
1
1.20
1.2
V/V
V/V
ΔV
ΔOffset TC
/
OUT
Output Offset TC Ratio
Step Response and IC
(63% Final Value)
150
1
µs
Maximum Capacitive Load
µF
DC to 1kHz (gain = minimum, source
Output Noise
0.5
mV
RMS
impedance = 5kΩ V
filter)
DDF
BRIDGE DRIVE
Bridge Current
I
R = 1.7kΩ
0.1
10
0.5
12
2
14
mA
BDR
AA
L
Current Mirror Ratio
R
= internal
A/A
hex
ISOURCE
V
Range (Span Code)
T
= T
to T
MAX
4000
C000
SPAN
A
MIN
DIGITAL-TO-ANALOG CONVERTERS
DAC Resolution
16
76
Bits
ΔV
ΔCode
/
OUT
ODAC Bit Weight
DAC reference = V
DAC reference = V
DAC reference = V
DAC reference = V
= +5.0V
µV/bit
DD
ΔV
/
OUT
OTCDAC Bit Weight
FSODAC Bit Weight
FSOTCDAC Bit Weight
= +2.5V
38
76
38
µV/bit
µV/bit
µV/bit
BDR
ΔCode
ΔV
/
OUT
= +5.0V
DD
ΔCode
ΔV
/
OUT
= +2.5V
BDR
ΔCode
COARSE OFFSET DAC
IRODAC Resolution
Including sign
4
9
Bits
ΔV
ΔCode
/
Input referred, DAC reference =
V = +5.0V (Note 6)
DD
OUT
IRODAC Bit Weight
mV/bit
FSOTC BUFFER
V
+ 0.1
SS
Minimum Output-Voltage Swing
No load
No load
V
Maximum Output-Voltage
Swing
V
- 1.0
V
DD
Current Drive
V
= +2.5V
-40
+40
µA
FSOTC
INTERNAL RESISTORS
Current-Source Reference
Resistor
R
75
kΩ
ISRC
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Electrical Characteristics (continued)
(V
= V
= +5V, V = 0V, T = +25°C, unless otherwise noted.)
DD
DDF SS A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
1300
75
MAX
UNITS
ppm/°C
kΩ
Current-Source Reference
Resistor Temperature Coefficient
ΔR
ISRC
FSOTC Resistor
R
FTC
FSOTC Resistor Temperature
Coefficient
ΔR
1300
ppm/°C
FTC
TEMPERATURE-TO-DIGITAL CONVERTER
Temperature ADC Resolution
Offset
8
Bits
LSB
°C/bit
LSB
hex
P3
Gain
1.45
P0.5
00
Nonlinearity
Lowest Digital Output
Highest Digital Output
UNCOMMITTED OP AMP
Open-Loop Gain
AF
hex
R = 100kΩ
90
dB
V
L
Input Common-Mode Range
V
V
DD
SS
V
0.02
+
V
0.02
-
DD
SS
Output Swing
No load, T = T
to T
MIN
V
A
MIN
MAX
to T
Output-Voltage High
Output-Voltage Low
Offset
1mA source, T = T
4.85
4.90
0.05
V
V
A
MAX
1mA sink, T = T
to T
MAX
0.15
+20
A
MIN
V
= +2.5V, unity-gain buffer
-20
mV
MHz
IN+
Unity-Gain Bandwidth
EEPROM
2
Maximum Erase/Write Cycles
Minimum Erase Time
Minimum Write Time
(Note 7)
(Note 8)
10k
6
Cycles
ms
100
µs
Note 1: Excludes sensor or load current.
Note 2: All electronics temperature errors are compensated together with sensors errors.
Note 3: The sensor and the MAX1452 must be at the same temperature during calibration and use.
Note 4: This is the maximum allowable sensor offset.
Note 5: This is the sensor’s sensitivity normalized to its drive voltage, assuming a desired full span output of +4V and a bridge volt-
age range of +1.7V to +4.25V.
Note 6: Bit weight is ratiometric to V
.
DD
Note 7: Programming of the EEPROM at room temperature is recommended.
Note 8: Allow a minimum of 6ms elapsed time before sending any command.
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Typical Operating Characteristics
(V
= +5V, T = +25°C, unless otherwise noted.)
A
DD
OFFSET DAC DNL
AMPLIFIER GAIN NONLINEARITY
5.0
2.5
0
5.0
ODAC = 6250hex
OTCDAC = 0
FSODAC = 4000hex
FSOTCDAC = 8000hex
PGA INDEX = 0
IRO = 2
2.5
0
-2.5
-5.0
-2.5
-5.0
-50 -40 -30 -20 -10
0
10 20 30 40 50
0
10k 20k 30k 40k 50k 60k 70k
DAC CODE
INPUT VOLTAGE [INP - INM] (mV)
OUTPUT NOISE
OUT
10mV/div
400µs/div
C = 4.7µF, R
= 1kΩ
LOAD
Pin Description
PIN
NAME
FUNCTION
SSOP/TSSOP
TQFN-EP
1
1
ISRC
OUT
Bridge Drive Current Mode Setting
High ESD and Scan Path Output Signal. May need a 0.1µF capacitor, in
noisy environments. OUT may be parallel connected to DIO.
2
2
3
4
5
6
7
3
4
5
6
7
V
Negative Supply Voltage
SS
INM
BDR
INP
Bridge Negative Input. Can be swapped to INP by configuration register.
Bridge Drive
Bridge Positive Input. Can be swapped to INM by configuration register.
V
Positive Supply Voltage. Connect a 0.1µF capacitor from V
to V
.
DD
DD
SS
8, 9, 13, 16, 20, 22,
23, 24
No Connection. Not internally connected; leave unconnected (TQFN
package only).
—
8
N.C.
10
TEST
Internally Connected. Connect to V
.
SS
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Pin Description (continued)
PIN
NAME
FUNCTION
SSOP/TSSOP
TQFN-EP
Positive Supply Voltage for EEPROM. Connect a 1µF capacitor from
9
11
V
V
to V . Connect V
to V
or for improved noise performance
DDF
DDF
SS
DDF
DD
connect a 30Ω resistor to V
.
DD
10
11
12
13
14
15
16
—
12
14
15
17
18
19
21
—
UNLOCK Secure-Lock Disable. Allows communication to the device.
DIO
Digital Input Output. DIO allows communication with the device.
CLK1M
1MHz Clock Output. The output can be controlled by a configuration bit.
AMPOUT Uncommitted Amplifier Output
AMP-
AMP+
FSOTC
EP
Uncommitted Amplifier Negative Input
Uncommitted Amplifier Positive Input
Full Span TC Buffered Output
Exposed Pad (TQFN Only). Internally connected; connect to V
.
SS
The single pin, serial Digital Input-Output (DIO) communi-
cation architecture and the ability to timeshare its activity
with the sensor’s output signal enables output sensing
and calibration programming on a single line by paral-
lel connecting OUT and DIO. The MAX1452 provides a
Secure-Lock feature that allows the customer to prevent
modification of sensor coefficients and the 52-byte user
definable EEPROM data after the sensor has been
calibrated. The Secure-Lock feature also provides a hard-
ware override to enable factory rework and recalibration
by assertion of logic high on the UNLOCK pin.
Detailed Description
The MAX1452 provides amplification, calibration, and
temperature compensation to enable an overall perfor-
mance approaching the inherent repeatability of the sen-
sor. The fully analog signal-path introduces no quantiza-
tion noise in the output signal while enabling digitally con-
trolled trimming with the integrated 16-bit DACs. Offset
and span can be calibrated to within ±0.02% of span.
The MAX1452 architecture includes a programmable
sensor excitation, a 16-step programmable-gain ampli-
fier (PGA), a 768-byte (6144 bits) internal EEPROM,
four 16-bit DACs, an uncommitted op amp, and an on-
chip temperature sensor. The MAX1452 also provides a
unique temperature compensation strategy for offset TC
and FSOTC that was developed to provide a remarkable
degree of flexibility while minimizing testing costs.
The MAX1452 allows complete calibration and sensor
verification to be performed at a single test station. Once
calibration coefficients have been stored in the MAX1452,
the customer can choose to retest in order to verify per-
formance as part of a regular QA audit or to generate final
test data on individual sensors.
The customer can select from one to 114 temperature
points to compensate their sensor. This allows the
latitude to compensate a sensor with a simple first order
linear correction or match an unusual temperature curve.
Programming up to 114 independent 16-bit EEPROM
locations corrects performance in 1.5°C temperature
increments over a range of -40°C to +125°C. For sensors
that exhibit a characteristic temperature performance,
a select number of calibration points can be used with
a number of preset values that define the temperature
curve. In cases where the sensor is at a different tempera-
ture than the MAX1452, the MAX1452 uses the sensor
bridge itself to provide additional temperature correction.
The MAX1452’s low current consumption and the integrat-
ed uncommitted op amp enables a 4–20mA output signal
format in a sensor that is completely powered from a 2-wire
current loop. Frequency response can be user-adjusted
to values lower than the 3.2kHz bandwidth by using the
uncommitted op amp and simple passive components.
The MAX1452 (Figure 1) provides an analog amplification
path for the sensor signal. It also uses an analog architec-
ture for first-order temperature correction. A digitally con-
trolled analog path is then used for nonlinear temperature
correction. Calibration and correction is achieved by vary-
ing the offset and gain of a programmable-gain-amplifier
(PGA) and by varying the sensor bridge excitation current
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Offset Correction
V
DD
Initial offset correction is accomplished at the input stage
of the signal gain amplifiers by a coarse offset setting.
Final offset correction occurs through the use of a tem-
perature indexed lookup table with 176 16-bit entries.
The on-chip temperature sensor provides a unique 16-bit
offset trim value from the table with an indexing resolu-
tion of approximately 1.5°C from -40°C to +125°C. Every
millisecond, the on-chip temperature sensor provides
indexing into the offset lookup table in EEPROM and
the resulting value transferred to the offset DAC register.
The resulting voltage is fed into a summing junction at
the PGA output, compensating the sensor offset with a
resolution of ±76μV (±0.0019% FSO). If the offset TC
DAC is set to zero then the maximum temperature error
is equivalent to one degree of temperature drift of the
sensor, given the Offset DAC has corrected the sensor
at every 1.5°C. The temperature indexing boundaries
are outside of the specified Absolute Maximum Ratings.
The minimum indexing value is 00hex corresponding to
approximately -69°C. All temperatures below this value
output the coefficient value at index 00hex. The maximum
indexing value is AFhex, which is the highest lookup table
entry. All temperatures higher than approximately 184°C
output the highest lookup table index value. No indexing
wraparound errors are produced.
V
DD
BIAS
GENERATOR
IRO
DAC
MAX1452
CLK1M
TEST
OSCILLATOR
INP
INM
PGA
∑
OUT
CURRENT
SOURCE
ANAMUX
ISRC
BDR
A = 1
FSOTC
TEMP
SENSOR
176
8-BIT ADC
TEMPERATURE
LOOK UP
POINTS FOR
OFFSET AND
SPAN.
V
DDF
INTERNAL
EEPROM
6144 BITS
DIO
UNLOCK
416 BITS
FOR USER
V
DD
BDR
OP-AMP
AMP+
AMP-
AMPOUT
V
SS
FSO Correction
Figure 1. Functional Diagram
Two functional blocks control the FSO gain calibration.
First, a coarse gain is set by digitally selecting the gain
of the PGA. Second, FSO DAC sets the sensor bridge
current or voltage with the digital input obtained from a
temperature-indexed reference to the FSO lookup table
in EEPROM. FSO correction occurs through the use of a
temperature indexed lookup table with 176 16-bit entries.
The on-chip temperature sensor provides a unique FSO
trim from the table with an indexing resolution approach-
ing one 16-bit value at every 1.5°C from -40°C to +125°C.
The temperature indexing boundaries are outside of the
specified Absolute Maximum Ratings. The minimum
indexing value is 00hex corresponding to approximately
-69°C. All temperatures below this value output the coef-
ficient value at index 00hex. The maximum indexing
value is AFhex, which is the highest lookup table entry.
All temperatures higher than approximately 184°C output
the highest lookup table index value. No indexing wrap-
around errors are produced.
or voltage. The PGA utilizes a switched capacitor CMOS
technology, with an input-referred offset trimming range of
more than ±150mV with an approximate 3μV resolution
(16 bits). The PGA provides gain values from 39V/V to
234V/V in 16 steps.
The MAX1452 uses four 16-bit DACs with calibration
coefficients stored by the user in an internal 768 x 8
EEPROM (6144 bits). This memory contains the following
information, as 16-bit wide words:
● Configuration Register
● Offset Calibration Coefficient Table
● Offset Temperature Coefficient Register
● FSO (Full-Span Output) Calibration Table
● FSO Temperature Error Correction Coefficient Register
● 52 bytes (416 bits) uncommitted for customer pro-
gramming of manufacturing data (e.g., serial number
and date)
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
For high-accuracy applications (errors less than 0.25%),
the first-order offset and FSO TC error should be com-
pensated with the offset TC and FSOTC DACs, and the
residual higher order terms with the lookup table. The
offset and FSO compensation DACs provide unique
compensation values for approximately 1.5°C of tem-
perature change as the temperature indexes the address
pointer through the coefficient lookup table. Changing the
offset does not effect the FSO, however changing the
FSO affects the offset due to nature of the bridge. The
temperature is measured on both the MAX1452 die and
at the bridge sensor. It is recommended to compensate
the first-order temperature errors using the bridge sensor
temperature.
Linear and Nonlinear
Temperature Compensation
Writing 16-bit calibration coefficients into the offset TC
and FSOTC registers compensates first-order tempera-
ture errors. The piezoresistive sensor is powered by a
current source resulting in a temperature-dependent
bridge voltage due to the sensor’s temperature resistance
coefficient (TCR). The reference inputs of the offset TC
DAC and FSOTC DAC are connected to the bridge volt-
age. The DAC output voltages track the bridge voltage as
it varies with temperature, and by varying the offset TC
and FSOTC digital code a portion of the bridge voltage,
which is temperature dependent, is used to compensate
the first-order temperature errors.
The internal feedback resistors (R
and R
) for
STC
ISRC
Typical Ratiometric Operating Circuit
FSO temperature compensation are optimized to 75kΩ
for silicon piezoresistive sensors. However, since the
required feedback resistor values are sensor dependent,
external resistors may also be used. The internal resistors
selection bit in the configuration register selects between
internal and external feedback resistors.
Ratiometric output configuration provides an output that is
proportional to the power supply voltage. This output can
then be applied to a ratiometric ADC to produce a digital
value independent of supply voltage. Ratiometricity is an
important consideration for battery-operated instruments
and some industrial applications.
To calculate the required offset TC and FSOTC compen-
sation coefficients, two test-temperatures are needed.
After taking at least two measurements at each tempera-
ture, calibration software (in a host computer) calculates
the correction coefficients and writes them to the internal
EEPROM.
The MAX1452 provides a high-performance ratiometric
output with a minimum number of external components
(Figure 2). These external components include the fol-
lowing:
● One supply bypass capacitor.
● One optional output EMI suppression capacitor.
With coefficients ranging from 0000hex to FFFFhex and a
+5V reference, each DAC has a resolution of 76μV. Two
of the DACs (offset TC and FSOTC) utilize the sensor
bridge voltage as a reference. Since the sensor bridge
voltage is approximately set to +2.5V the FSOTC and
offset TC exhibit a step size of less than 38μV.
● Two optional resistors, R
and R
, for special
STC
ISRC
sensor bridge types.
+5V V
OUT
DD
7
V
DD
5
6
9
2
BDR
INP
V
DDF
OUT
MAX1452
16
FSOTC
4
SENSOR
INM
R
R
STC
1
ISRC
0.1µF
0.1µF
TEST V
ISRC
SS
8
3
GND
Figure 2. Basic Ratiometric Output Configuration
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
2N4392
G
1
VPWR
+12V TO +40V
IN
MAX15006B
D
S
8
OUT
GND
5
7
30Ω
V
DD
5
6
9
2
BDR
INP
V
DDF
OUT
MAX1452
OUT
16
FSOTC
4
SENSOR
INM
R
R
STC
1
ISRC
2.2µF
0.1µF 0.1µF
1.0µF
TEST V
ISRC
SS
8
3
GND
Figure 3. Basic Nonratiometric Output Configuration
Internal Calibration Registers (ICRs)
Typical Nonratiometric
Operating Circuit
The MAX1452 has five 16-bit internal calibration registers
that are loaded from EEPROM, or loaded from the serial
digital interface.
(12VDC < V
< 40VDC)
PWR
Nonratiometric output configuration enables the sensor
power to vary over a wide range. A high-performance volt-
age reference, such as the MAX15006B, is incorporated
in the circuit to provide a stable supply and reference for
MAX1452 operation. A typical example is shown in Figure
3. Nonratiometric operation is valuable when wide ranges
of input voltage are to be expected and the system A/D
or readout device does not enable ratiometric operation.
Data can be loaded into the internal calibration registers
under three different circumstances.
Normal Operation, Power-On Initialization Sequence
● The MAX1452 has been calibrated, the Secure-Lock
byte is set (CL[7:0] = FFhex) and UNLOCK is low.
● Power is applied to the device.
● The power-on-reset functions have completed.
Typical 2-Wire, Loop-Powered,
4–20mA Operating Circuit
● Registers CONFIG, OTCDAC, and FSOTCDAC are
refreshed from EEPROM.
Process Control systems benefit from a 4–20mA current
loop output format for noise immunity, long cable runs,
and 2-wire sensor operation. The loop voltages can range
from 12VDC to 40VDC and are inherently nonratiometric.
The low current consumption of the MAX1452 allows it
to operate from loop power with a simple 4–20mA drive
circuit efficiently generated using the integrated uncom-
mitted op amp (Figure 4).
● Registers ODAC, and FSODAC are refreshed from the
temperature indexed EEPROM locations.
Normal Operation, Continuous Refresh
● The MAX1452 has been calibrated, the Secure-Lock
byte has been set (CL[7:0] = FFhex) and UNLOCK is
low.
● Power is applied to the device.
● The power-on-reset functions have completed.
● The temperature index timer reaches a 1ms time
period.
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
V
IN+
2N4392
G
+12V TO +40V
D
S
100Ω
1
IN
Z1
MAX15006B
8
OUT
GND
5
7
30Ω
V
DD
5
6
9
BDR
INP
V
DDF
16
FSOTC
1.0µF
MAX1452
ISRC
R
STC
1
0.1µF
2.2µF
4
SENSOR
INM
4.99MΩ
499kΩ
R
ISRC
2
OUT
AMPOUT
AMP-
0.1µF
13
2N2222A
14
15
4.99kΩ
0.1µF
AMP+
TEST V
100kΩ
SS
8
3
47Ω
100kΩ
V
IN-
Figure 4. Basic 4–20mA Output, Loop-Powered Configuration
● Registers CONFIG, OTCDAC, and FSOTCDAC are
page. Each page can be individually erased. The memory
structure is arranged as shown in Table 1. The lookup
tables for ODAC and FSODAC are also shown, with the
respective temp-index pointer. Note that the ODAC table
occupies a continuous segment, from address 000hex to
address 15Fhex, whereas the FSODAC table is divided
in two parts, from 200hex to 2FFhex, and from 1A0hex to
1FFhex. With the exception of the general-purpose user
bytes, all values are 16-bit wide words formed by two
adjacent byte locations (high byte and low byte).
refreshed from EEPROM.
● Registers ODAC and FSODAC are refreshed from the
temperature indexed EEPROM locations.
Calibration Operation, Registers Updated by Serial
Communications
● The MAX1452 has not had the Secure-Lock byte set
(CL[7:0] = 00hex) or UNLOCK is high.
● Power is applied to the device.
The MAX1452 compensates for sensor offset, FSO, and
temperature errors by loading the internal calibration
registers with the compensation values. These compen-
sation values can be loaded to registers directly through
the serial digital interface during calibration or loaded
automatically from EEPROM at power-on. In this way the
device can be tested and configured during calibration
and test and the appropriate compensation values stored
● The power-on-reset functions have completed.
● The registers can then be loaded from the serial digital
interface by use of serial commands. See the section
on Serial Interface Command Format.
Internal EEPROM
The internal EEPROM is organized as a 768 by 8-bit
memory. It is divided into 12 pages, with 64 bytes per
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Table 1. EEPROM Memory Address Map
LOW-BYTE
ADDRESS (hex)
HIGH-BYTE ADDRESS
TEMP-INDEX[7:0]
CONTENTS
(hex)
PAGE
(hex)
001
03F
041
07F
081
0BF
0C1
0FF
101
13F
141
15F
161
163
165
167
169
16B
16D
17F
181
19F
1A1
1BF
1C1
1FF
201
23F
241
27F
281
2BF
2C1
2FF
000
03E
040
07E
080
0BE
0C0
0FE
100
13E
140
15E
160
162
164
166
168
16A
16C
17E
180
19E
1A0
1BE
1C0
1FE
200
23E
240
27E
280
2BE
2C0
2FE
00
1F
20
3F
40
0
1
2
3
4
5F
ODAC
Lookup Table
60
7F
80
9F
A0
AF to FF
Configuration
Reserved
OTCDAC
Reserved
FSOTCDAC
Control Location
5
52 General-Purpose
User Bytes
6
80
8F
90
7
8
9
A
B
AF to FF
00
1F
20
3F
40
5F
60
7F
FSODAC
Lookup Table
in internal EEPROM. The device auto-loads the registers
from EEPROM and be ready for use without further con-
figuration after each power-up. The EEPROM is config-
ured as an 8-bit wide array so each of the 16-bit registers
is stored as two 8-bit quantities. The configuration register,
FSOTCDAC and OTCDAC registers are loaded from the
pre-assigned locations in the EEPROM.
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
The ODAC and FSODAC are loaded from the EEPROM
lookup tables using an index pointer that is a function of
temperature. An ADC converts the integrated temperature
sensor output to an 8-bit value every 1ms. This digitized
value is then transferred into the temp-index register.
and the DIO pin to be configured by Secure-Lock or the
UNLOCK pin.
Reinitialization Sequence
The MAX1452 allows for relearning the baud rate. The
reinitialization sequence is one byte transmission of
FFhex, as follows:
The typical transfer function for the temp-index is as fol-
lows:
11111111011111111111111111
temp-index = 0.6879 Temperature (°C) + 44.0
When a serial reinitialization sequence is received, the
receive logic resets itself to its power-up state and waits
for the initialization sequence. The initialization sequence
must follow the reinitialization sequence in order to re-
establish the baud rate.
where temp-index is truncated to an 8-bit integer value.
Typical values for the temp-index register are given in
Table 6.
Note that the EEPROM is byte wide and the registers that
are loaded from EEPROM are 16 bits wide. Thus each
index value points to two bytes in the EEPROM.
Serial Interface Command Format
All communication commands into the MAX1452 follow a
defined format utilizing an interface register set (IRS). The
IRS is an 8-bit command that contains both an interface
register set data (IRSD) nibble (4-bit) and an interface
register set address (IRSA) nibble (4-bit). All internal cali-
bration registers and EEPROM locations are accessed for
read and write through this interface register set. The IRS
byte command is structured as follows:
Maxim programs all EEPROM locations to FFhex with the
exception of the oscillator frequency setting and Secure-
Lock byte. OSC[2:0] is in the Configuration Register (Table
3). These bits should be maintained at the factory preset
values. Programming 00hex in the Secure-Lock byte
(CL[7:0] = 00hex), configures the DIO as an asynchronous
serial input for calibration and test purposes.
Communication Protocol
IRS[7:0] = IRSD[3:0], IRSA[3:0]
The DIO serial interface is used for asynchronous serial
data communications between the MAX1452 and a host
calibration test system or computer. The MAX1452 auto-
matically detects the baud rate of the host computer when
the host transmits the initialization sequence. Baud rates
between 4800bps and 38,400bps can be detected and
used regardless of the internal oscillator frequency setting.
Data format is always 1 start bit, 8 data bits, 1 stop bit and
no parity. Communications are only allowed when Secure-
Lock is disabled (i.e., CL[7:0] = 00hex) or the UNLOCK
pin is held high.
Where:
● IRSA[3:0] is the 4-bit interface register set address
and indicates which register receives the data nibble
IRSD[3:0].
● IRSA[0] is the first bit on the serial interface after the
start bit.
● IRSD[3:0] is the 4-bit interface register set data.
● IRSD[0] is the fifth bit received on the serial interface
after the start bit.
The IRS address decoding is shown in Table 10.
Initialization Sequence
Special Command Sequences
Sending the initialization sequence shown below enables
the MAX1452 to establish the baud rate that initializes the
serial port. The initialization sequence is one byte trans-
mission of 01hex, as follows:
A special command register to internal logic (CRIL[3:0])
causes execution of special command sequences within
the MAX1452. These command sequences are listed as
CRIL command codes as shown in Table 11.
1111111101000000011111111
The first start bit 0 initiates the baud rate synchronization
sequence. The 8 data bits 01hex (LSB first) follow this
and then the stop bit, which is indicated above as a 1,
terminates the baud rate synchronization sequence. This
initialization sequence on DIO should occur after a period
of 1ms after stable power is applied to the device. This
allows time for the power-on-reset function to complete
Write Examples
A 16-bit write to any of the internal calibration registers is
performed as follows:
1) Write the 16 data bits to DHR[15:0] using four byte
accesses into the interface register set.
2) Write the address of the target internal calibration reg-
ister to ICRA[3:0].
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Low-Cost Precision Sensor
Signal Conditioner
THREE-STATE
NEED WEAK
PULLUP
THREE-STATE
NEED WEAK
PULLUP
DRIVEN BY TESTER
DRIVEN BY MAX1452
DIO
0
1 1 1 1 1 0 1 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1
Figure 5. DIO Output Data Format
3) Write the load internal calibration register (LdICR) com-
Serial Digital Output
mand to CRIL[3:0].
When a RdIRS command is written to CRIL[3:0], DIO
is configured as a digital output and the contents of the
register designated by IRSP[3:0] are sent out as a byte
framed by a start bit and a stop bit.
When a LdICR command is issued to the CRIL register,
the calibration register loaded depends on the address in
the internal calibration register address (ICRA). Table 12
specifies which calibration register is decoded.
Once the tester finishes sending the RdIRS command,
it must three-state its connection to DIO to allow the
MAX1452 to drive the DIO line. The MAX1452 three-
states DIO high for 1 byte time and then drive with the
start bit in the next bit period followed by the data byte and
stop bit. The sequence is shown in Figure 5.
Erasing and Writing the EEPROM
The internal EEPROM needs to be erased (bytes set
to FFhex) prior to programming the desired contents.
Remember to save the 3 MSBs of byte 161 hex (high byte
of the configuration register) and restore it when program-
ming its contents to prevent modification of the trimmed
oscillator frequency.
The data returned on a RdIRS command depends on the
address in IRSP. Table 13 defines what is returned for the
various addresses.
The internal EEPROM can be entirely erased with the
ERASE command, or partially erased with the PageErase
command (see Table 11, CRIL command). It is necessary
to wait 6ms after issuing the ERASE or PageErase com-
mand.
Multiplexed Analog Output
When a RdAlg command is written to CRIL[3:0] the ana-
log signal designated by ALOC[3:0] is asserted on the
OUT pin. The duration of the analog signal is determined
by ATIM[3:0] after which the pin reverts to three-state.
While the analog signal is asserted in the OUT pin, DIO
is simultaneously three-stated, enabling a parallel wiring
of DIO and OUT. When DIO and OUT are connected in
parallel, the host computer or calibration system must
three-state its connection to DIO after asserting the stop
bit. Do not load the OUT line when reading internal
signals, such as BDR, FSOTC...etc.
After the EEPROM bytes have been erased (value of
every byte = FFhex), the user can program its contents,
following the procedure below:
1) Write the 8 data bits to DHR[7:0] using two byte
accesses into the interface register set.
2) Write the address of the target internal EEPROM loca-
tion to IEEA[9:0] using three byte accesses into the
interface register set.
The analog output sequence with DIO and OUT is shown
in Figure 6.
3) Write the EEPROM write command (EEPW) to
CRIL[3:0].
The duration of the analog signal is controlled byATIM[3:0]
as given in Table 14.
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Low-Cost Precision Sensor
Signal Conditioner
THREE-STATE
NEED WEAK
PULLUP
THREE-STATE
THREE-STATE
NEED WEAK
PULLUP
ATIM
2
+1 BYTE
TIMES
DRIVEN BY TESTER
DIO
0
1 1 1 1 1 0 1 0 0 1 1 0 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
HIGH IMPEDANCE
OUT
VALID OUT
Figure 6. Analog Output Timing
The analog signal driven onto the OUT pin is determined
by the value in the ALOC register. The signals are speci-
fied in Table 15.
● Calibrate the output offset and FSO of the transducer
using the ODAC and FSODAC, respectively.
● Store calibration data in the test computer or MAX1452
EEPROM user memory.
Test System Configuration
Set next test temperature:
The MAX1452 is designed to support an automated
production test system with integrated calibration and
temperature compensation. Figure 7 shows the imple-
mentation concept for a low-cost test system capable of
testing many transducer modules connected in parallel.
The MAX1452 allows for a high degree of flexibility in
system calibration design. This is achieved by use of
single-wire digital communication and three-state output
nodes. Depending upon specific calibration requirements
one may connect all the OUTs in parallel or connect DIO
and OUT on each individual module.
● Calibrate offset and FSO using the ODAC and
FSODAC, respectively.
● Store calibration data in the test computer or MAX1452
EEPROM user memory.
● Calculate the correction coefficients.
● Download correction coefficients to EEPROM.
● Perform a final test.
Sensor Calibration and
Compensation Example
The MAX1452 temperature compensation design corrects
both sensor and IC temperature errors. This enables the
MAX1452 to provide temperature compensation approach-
ing the inherent repeatability of the sensor. An example of
the MAX1452’s capabilities is shown in Figure 8.
Sensor Compensation Overview
Compensation requires an examination of the sensor per-
formance over the operating pressure and temperature
range. Use a minimum of two test pressures (e.g., zero
and full-span) and two temperatures. More test pressures
and temperatures result in greater accuracy. A typical
compensation procedure can be summarized as follows:
A repeatable piezoresistive sensor with an initial offset of
16.4mV and a span of 55.8mV was converted into a com-
pensated transducer (utilizing the piezoresistive sensor
with the MAX1452) with an offset of 0.5000V and a span
of 4.0000V. Nonlinear sensor offset and FSO temperature
errors, which were on the order of 20% to 30% FSO, were
reduced to under ±0.1% FSO. The following graphs show
the output of the uncompensated sensor and the output of
the compensated transducer. Six temperature points were
used to obtain this result.
Set reference temperature (e.g., +25°C):
● Initialize each transducer by loading their respective
registers with default coefficients (e.g., based on mean
values of offset, FSO and bridge resistance) to prevent
overload of the MAX1452.
●
Set the initial bridge voltage (with the FSODAC) to
half of the supply voltage. Measure the bridge voltage
using the BDR or OUT pins, or calculate based on
measurements.
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
DIO[1:N]
DIGITAL
DION
DIO2
DIO1
MULTIPLEXER
MODULE 1
MODULE 2
MODULE N
DATA
DATA
V
V
OUT
V
OUT
OUT
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
+5V
V
OUT
DVM
TEST OVEN
Figure 7. Automated Test System Concept
2) Design/Applications Manual, which describes
in detail the architecture and functionality of the
MAX1452. This manual was developed for test engi-
neers familiar with data acquisition of sensor data and
provides sensor compensation algorithms and test
procedures.
MAX1452 Evaluation Kit
To expedite the development of MAX1452-based trans-
ducers and test systems, Maxim has produced the
MAX1452 evaluation kit (EV kit). First-time users of the
MAX1452 are strongly encouraged to use this kit.
The EV kit is designed to facilitate manual programming
of the MAX1452 with a sensor. It includes the following:
3) MAX1452 Communication Software, which enables
programming of the MAX1452 from a computer key-
board (IBM compatible), one module at a time.
1) Evaluation Board with or without a silicon pressure
sensor, ready for customer evaluation.
4) Interface Adapter, which allows the connection of the
evaluation board to a PC serial port.
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
UNCOMPENSATED SENSOR
TEMPERATURE ERROR
RAW SENSOR OUTPUT
T = +25ºC
A
30.0
20.0
80
FSO
OFFSET
60
40
10.0
0.0
6
0
-10.0
-20.0
0
20
40
60
80
100
-50
0
50
TEMPERATURE (ºC)
100
150
PRESSURE (kPs)
COMPENSATED TRANSDUCER
T = +25ºC
COMPENSATED TRANSDUCER ERROR
A
5.0
4.0
3.0
2.0
1.0
0
0.15
0.1
FSO
OFFSET
0.05
0
-0.05
-0.1
-0.15
-50
0
50
TEMPERATURE (ºC)
150
0
20
40
60
80
100
100
PRESSURE (kPs)
Figure 8. Comparison of an Uncalibrated Sensor and a Calibrated Transducer
Table 2. Registers
REGISTER
CONFIG
DESCRIPTION
Configuration Register
ODAC
Offset DAC Register
OTCDAC
FSODAC
FSOTCDAC
Offset Temperature Coefficient DAC Register
Full Span Output DAC Register
Full Span Output Temperature Coefficient DAC Register
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Table 3. Configuration Register (CONFIG[15:0])
FIELD
15:13
12
NAME
DESCRIPTION
Oscillator frequency setting. Factory preset, do not change.
Logic ‘1’ selects external R and R
OSC[2:0]
R
.
STC
EXT
ISRC
11
CLK1M EN
PGA Sign
IRO Sign
IRO[2:0]
Logic ‘1’ enables CLK1M output driver.
Logic ‘1’ inverts INM and INP polarity.
10
9
Logic ‘1’ for positive input-referred offset (IRO). Logic ‘0’ for negative input-referred offset (IRO).
Input-referred coarse offset adjustment.
8:6
5:2
1
PGA[3:0]
ODAC Sign
Programmable gain amplifier setting.
Logic ‘1’ for positive offset DAC output. Logic ‘0’ for negative offset DAC output.
0
OTCDAC Sign Logic ‘1’ for positive offset TC DAC output. Logic ‘0’ for negative offset TC DAC output.
Table 4. Input Referred Offset (IRO[2:0])
INPUT-REFERRED OFFSET
INPUT-REFERRED OFFSET, CORRECTION
IRO SIGN, IRO[2:0]
CORRECTION AS % OF V
AT V
= 5VDC IN mV
DD
DD
1,111
1,110
1,101
1,100
1,011
1,010
1,001
1,000
0,000
0,001
0,010
0,011
0,100
0,101
0,110
0,111
+1.25
+1.08
+0.90
+0.72
+0.54
+0.36
+0.18
0
+63
+54
+45
+36
+27
+18
+9
0
0
0
-0.18
-0.36
-0.54
-0.72
-0.90
-1.08
-1.25
-9
-18
-27
-36
-45
-54
-63
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Low-Cost Precision Sensor
Signal Conditioner
Table 5. PGA Gain Setting (PGA[3:0])
Table 6. Temp-Index Typical Values
PGA[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
PGA GAIN (V/V)
TEMP-INDEX[7:0]
TEMPERATURE
(°C)
39
52
DECIMAL
HEXADECIMAL
-40
25
20
65
14
41
6A
86
65
78
85
106
134
91
125
104
117
130
143
156
169
182
195
208
221
234
Table 7. Oscillator Frequency Setting
OSC[2:0]
100
OSCILLATOR FREQUENCY
-37.5%
-28.1%
1000
1001
1010
1011
1100
1101
1110
101
110
-18.8%
111
-9.4%
000
1MHz (nominal)
+9.4%
001
010
+18.8%
011
+28.1%
1111
Table 8. EEPROM ODAC and FSODAC Lookup Table Memory Map
EEPROM ADDRESS ODAC
LOW BYTE AND HIGH BYTE
EEPROM ADDRESS FSODAC
LOW BYTE AND HIGH BYTE
TEMP-INDEX[7:0]
00hex
to
000hex and 001hex
to
200hex and 201hex
to
7Fhex
0FEhex and 0FFhex
2FEhex and 2FFhex
80hex
to
100hex and 101hex
to
1A0hex and 1A1hex
to
AFhex
15Ehex and 15Fhex
1FEhex and 1FFhex
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Signal Conditioner
Table 9. Control Location (CL[15:0])
FIELD
NAME
DESCRIPTION
15:8
CL[15:8]
Reserved
Control Location. Secure-Lock is activated by setting this to FFhex which disables DIO serial
communications and connects OUT to PGA output.
7:0
CL[7:0]
Table 10. IRSA Decoding
IRSA[3:0]
DESCRIPTION
Write IRSD[3:0] to DHR[3:0] (data hold register)
Write IRSD[3:0] to DHR[7:4] (data hold register)
0000
0001
0010
0011
0100
0101
Write IRSD[3:0] to DHR[11:8] (data hold register)
Write IRSD[3:0] to DHR[15:12] (data hold register)
Reserved
Reserved
Write IRSD[3:0] to ICRA[3:0] or IEEA[3:0], (internal calibration register address or internal EEPROM address
nibble 0)
0110
0111
1000
Write IRSD[3:0] to IEEA[7:4] (internal EEPROM address, nibble 1)
Write IRSD[3:0] to IRSP[3:0] or IEEA[9:8], (interface register set pointer where IRSP[1:0] is IEEA[9:8])
Write IRSD[3:0] to CRIL[3:0] (command register to internal logic)
Write IRSD[3:0] to ATIM[3:0] (analog timeout value on read)
Write IRSD[3:0] to ALOC[3:0] (analog location)
1001
1010
1011
1100 to 1110
1111
Reserved
Write IRSD[3:0] = 1111bin to relearn the baud rate
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Low-Cost Precision Sensor
Signal Conditioner
Table 11. CRIL Command Codes
CRIL[3:0]
0000
NAME
LdICR
EEPW
ERASE
RdICR
RdEEP
RdIRS
DESCRIPTION
Load internal calibration register at address given in ICRA with data from DHR[15:0].
EEPROM write of 8 data bits from DHR[7:0] to address location pointed by IEEA[9:0].
Erase all of EEPROM (all bytes equal FFhex).
0001
0010
0011
Read internal calibration register as pointed to by ICRA and load data into DHR[15:0].
Read internal EEPROM location and load data into DHR[7:0] pointed by IEEA[9:0].
Read interface register set pointer IRSP[3:0]. See Table 13.
0100
0101
Output the multiplexed analog signal onto OUT. The analog location is specified in ALOC[3:0] (Table
15) and the duration (in byte times) that the signal is asserted onto the pin is specified in ATIM[3:0]
(Table 14).
0110
RdAlg
Erases the page of the EEPROM as pointed by IEEA[9:6]. There are 64 bytes per page and thus 12
pages in the EEPROM.
0111
PageErase
Reserved
1000 to
1111
Reserved.
Table 12. ICRA[3:0] Decode
ICRA[3:0]
0000
NAME
CONFIG
ODAC
DESCRIPTION
Configuration Register
0001
Offset DAC Register
0010
OTCDAC
FSODAC
Offset Temperature Coefficient DAC Register
0011
Full Scale Output DAC Register
0100
FSOTCDAC Full Scale Output Temperature Coefficient DAC Register
0101
Reserved. Do not write to this location (EEPROM test).
0110 to
1111
Reserved. Do not write to this location.
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Low-Cost Precision Sensor
Signal Conditioner
Table 13. IRSP Decode
IRSP[3:0]
RETURNED VALUE
0000
0001
DHR[7:0]
DHR[15:8]
0010
IEEA[7:4], ICRA[3:0] concatenated
CRIL[3:0], IRSP[3:0] concatenated
ALOC[3:0], ATIM[3:0] concatenated
IEEA[7:0] EEPROM address byte
IEED[7:0] EEPROM data byte
TEMP-Index[7:0]
0011
0100
0101
0110
0111
1000
BitClock[7:0]
1001
Reserved. Internal flash test data.
1010-1111
11001010 (CAhex). This can be used to test communication.
Table 14. ATIM Definition
ATIM[3:0]
DURATION OF ANALOG SIGNAL SPECIFIED IN BYTE TIMES (8-BIT TIME)
20 + 1 = 2 byte times i.e. (2 x 8)/baud rate
21 + 1 = 3 byte times
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
22 + 1 = 5 byte times
23 + 1 = 9 byte times
24 + 1 = 17 byte times
25 + 1 = 33 byte times
26 + 1 = 65 byte times
27 + 1 = 129 byte times
28 + 1 = 257 byte times
29 + 1 = 513 byte times
210 + 1 = 1025 byte times
211 + 1 = 2049 byte times
212 + 1 = 4097 byte times
213 + 1 = 8193 byte times
214 + 1 = 16,385 byte times
In this mode OUT is continuous, however DIO accepts commands after 32,769 byte times. Do not parallel
connect DIO to OUT.
1111
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Table 15. ALOC Definition
ALOC[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
ANALOG SIGNAL
DESCRIPTION
OUT
BDR
PGA Output
Bridge Drive
ISRC
Bridge Drive Current Setting
Internal Positive Supply
Internal Ground
VDD
VSS
BIAS5U
AGND
FSODAC
FSOTCDAC
ODAC
OTCDAC
VREF
Internal Test Node
Internal Analog Ground. Approximately half of VDD.
Full Scale Output DAC
1000
1001
1010
1011
1100
1101
1110
Full Scale Output TC DAC
Offset DAC
Offset TC DAC
Bandgap Reference Voltage (nominally 1.25V)
Internal Test Node
VPTATP
VPTATM
INP
Internal Test Node
Sensor’s Positive Input
1111
INM
Sensor’s Negative Input
Table 16. Effects of Compensation
TYPICAL UNCOMPENSATED INPUT (SENSOR)
TYPICAL COMPENSATED TRANSDUCER OUTPUT
at 5.0V
Offset....................................................................... ±100% FSO OUT..................................................Ratiometric to V
DD
FSO ................................................................ 4mV/V to 60mV/V Offset at +25°C...................................................0.500V ±200μV
Offset TC ..................................................................... 20% FSO FSO at +25°C.....................................................4.000V ±200μV
Offset TC Nonlinearity................................................... 4% FSO Offset accuracy over temp. range................±4mV (±0.1% FSO)
FSOTC ....................................................................... -20% FSO FSO accuracy over temp. range..................±4mV (±0.1% FSO)
FSOTC Nonlinearity ...................................................... 5% FSO
Temperature Range.......................................... -40°C to +125°C
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Detailed Block Diagram
EEPROM
(LOOKUP PLUS CONFIGURATION DATA)
V
DD
EEPROM ADDRESS USAGE
000H + 001H
OFFSET DAC LOOKUP TABLE
(176 x 16-BITS)
V
DD
:
16-BIT
15EH + 15FH
160H + 161H
162H + 163H
164H + 165H
166H + 167H
168H + 169H
16AH + 16BH
16CH + 16DH
FSO
DAC
V
V
DD
CONFIGURATION REGISTER SHADOW
RESERVED
ISRC
V
SS
OFFSET TC REGISTER SHADOW
RESERVED
SS
FSOTC REGISTER SHADOW
CONTROL LOCATION REGISTER
USER STORAGE (52 BYTES)
TEST
V
DD
SS
16-BIT
OFFSET
DAC
CLK1M
:
R
R
STC
ISRC
75kΩ
75kΩ
19EH + 19FH
V
V
DDF
1A0H + 1A1H
FSO DAC LOOKUP TABLE
(176 x 16-BITS)
:
V
SS
2FEH + 2FFH
V
DD
8-BIT
BANDGAP
TEMP
LOOKUP
ADDRESS
±1
SENSOR
∑
∆
16-BIT
FSOTC
INP
BDR
FSOTC
DAC
UNLOCK
DIO
DIGITAL
INTERFACE
V
SS
PHASE
REVERSAL
MUX
V
SS
FSOTC REGISTER
PGA BANDWIDTH
3kHz 10%
MUX
x 26
PGA
MUX
OUT
∑
∑
INM
INPUT REFERRED OFFSET
(COARSE OFFSET)
AMP-
PROGRAMMABLE GAIN STAGE
V
SS
±1
PGA (3:0) PGA GAIN TOTAL GAIN
IRO (3, 2:0) OFFSET mV
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
39
52
1,111
1,110
1,101
1,100
1,011
1,010
1,001
1,000
0,000
0,001
0,010
0,011
0,100
0,101
0,110
0,111
63
54
45
36
27
18
9
AMPOUT
65
16-BIT
78
OFFSET
TC DAC
AMP+
91
104
117
130
143
156
169
182
195
208
221
234
V
SS
OTC REGISTER
0
UNCOMMITTED OP AMP
0
*INPUT REFERRED
OFFSET VALUE IS
-9
PARAMETER
I/P RANGE
VALUE
TO V
-18
-27
-36
-45
-54
-63
V
SS
DD
PROPORTIONAL TO V
.
DD
VALUES GIVEN ARE FOR
= 5V.
I/P OFFSET
±20mV
V
DD
O/P RANGE
NO LOAD
1mA LOAD
V
V
, V ±0.01V
SS DD
, V ±0.25V
SS DD
UNITY GBW
10MHz TYPICAL
PGA BANDWIDTH 3kHz ± 10%
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Pin Configurations
TOP VIEW
+
24
23
22
21
20
19
ISRC
OUT
1
2
3
4
5
6
7
8
16 FSOTC
15 AMP+
14 AMP-
1
2
3
4
5
6
18
17
16
15
14
13
ISRC
OUT
AMP-
+
AMPOUT
N.C.
V
SS
INM
BDR
INP
13 AMPOUT
12 CLK1M
11 DIO
V
SS
MAX1452
MAX1452
INM
CLK1M
DIO
BDR
V
10 UNLOCK
DD
N.C.
INP
TEST
9
V
DDF
7
8
9
10
11
12
SSOP/TSSOP
TQFN
Chip Information
SUBSTRATE CONNECTED TO: V
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
SS
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 SSOP
16 TSSOP
24 TQFN-EP
A16+2
U16+2
21-0056
21-0066
21-0139
90-0106
90-0117
90-0022
T2444+4
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MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
Added TQFN and TSSOP package information, changed packages to lead free,
changed all occurrences of ASIC to MAX1452, changed VDDF RC filter values,
1–7, 9, 10, 12,
18, 22, 24
2
4/09
recommended a more suitable voltage reference for non-ratiometric application
circuits, corrected MAX1452 input range, and added typical EEPROM current
requirements to EC table, and added gain nonlinearity graph.
3
4
5
11/13
10/14
4/15
Updated Package Information section
Deleted automotive reference
24
8
Updated Benefits and Features section
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
│ 25
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