MAX1189AEUI [MAXIM]
16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range; 16位， 135ksps ，单电源ADC，双极性模拟输入范围
| 型号： | MAX1189AEUI |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range |
| 文件： | 总15页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2675; Rev 1; 1/03
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
General Description
Features
o Analog Input Voltage Range: 1ꢀVꢁ ꢂVꢁ oꢃ ꢀ to 1ꢀV
o 16-Bit Wide Paꢃallel Inteꢃface
The MAX1179/MAX1187/MAX1189 16-bit, low-power,
successive-approximation analog-to-digital converters
(ADCs) feature automatic power-down, a factory-
trimmed internal clock, and a 16-bit wide parallel inter-
face. The devices operate from a single +4.75V to
+5.25V analog supply and feature a separate digital
supply input for direct interface with +2.7V to +5.25V
digital logic.
o Single +4.7ꢂV to +ꢂ.2ꢂV Analog Supply Voltage
o Inteꢃfaces with +2.7V to +ꢂ.2ꢂV Digital Logic
o
o
2LSB IꢄL ꢅ(aꢆx
1LSB DꢄL ꢅ(aꢆx
The MAX1179 accepts a bipolar input voltage range of
5V. The MAX1187 accepts an analog input voltage
range from 0 to +10V, while the MAX1189 accepts a
bipolar analog input voltage range of 10V. All devices
consume only 23mW at a sampling rate of 135ksps
when using an external reference and 29mW when
using the internal +4.096V reference. AutoShutdown™
reduces supply current to 0.4mA at 10ksps. The
MAX1179/MAX1187/MAX1189 are ideal for high-perfor-
mance, battery-powered data-acquisition applications.
Excellent AC performance (THD = -100dB) and DC
accuracy ( 2ꢀSB ꢁIꢀ) make the MAX1179/MAX1187/
MAX1189 ideal for industrial process control, instrumen-
tation, and medical applications.
o Low Supply Cuꢃꢃent ꢅMAX1189x
ꢂ.3(A ꢅEꢆteꢃnal Refeꢃencex
6.2(A ꢅInteꢃnal Refeꢃencex
ꢂµA AutoShutdown Mode
o S(all Footpꢃint
28-Pin TSSOP Package
Pin Configuration
TOP VIEW
D8
D9
1
2
3
4
5
6
7
8
9
28
27
26
D7
D6
D5
The MAX1179/MAX1187/MAX1189 are available in a
28-pin TSSOP package and are fully specified over the
-40°C to +85°C extended temperature range and the
0°C to +70°C commercial temperature range.
D10
D11
D12
D13
D14
D15
R/C
25 D4
D3
D2
D1
24
23
22
MAX1179
MAX1187
MAX1189
Applications
21 D0
20 DV
Temperature Sensing and Monitoring
ꢁndustrial Process Control
ꢁ/O Modules
DD
EOC 10
AV 11
19 DGND
18 CS
DD
Data-Acquisition Systems
Precision ꢁnstrumentation
AGND 12
AIN 13
17 RESET
16 REF
AGND 14
15 REFADJ
TSSOP
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
Ordering Information
IꢄPUT VOLTAGE
RAꢄGE
PART
TEMP RAꢄGE
PIꢄ-PACKAGE
IꢄL ꢅLSBx
MAX1179ACUI
0°C to +70°C
0°C to +70°C
28 TSSOP
28 TSSOP
±±5
±±5
±2
±2
MAX1179BCUI
Ordering Information continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Continuous Power Dissipation (T = +70°C)
28-Pin TSSOP (derate 12.8mW/°C above +70°C) .....1026mW
A
AGND to DGND.....................................................-0.35 to +0.35
AIN to AGND .....................................................-16.±5 to +16.±5
Operating Temperature Range
MAX11_ _ _CUI...................................................0°C to +70°C
MAX11_ _ _EUI................................................-40°C to +8±°C
Storage Temperature Range.............................-6±°C to +1±0°C
Junction Temperature......................................................+1±0°C
Lead Temperature (soldering, 10s) .................................+300°C
REF, REFADJ to AGND............................-0.35 to (A5
+ 0.35)
DD
CS, R/C, RESET to DGND ........................................-0.35 to +65
D_, EOC to DGND ...................................-0.35 to (D5 + 0.35)
DD
Maximum Continuous Current Into Any Pin ........................±0mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(A5
= D5
= +±5 ±±ꢀ, external reꢁerence = +4.0965, C
= 10µF, C
= 0.1µF, 5
= A5 , T = T
to T
,
MAX
DD
DD
REF
REFADJ
REFADJ
DD
A
MIN
unless otherwise noted. Typical values are at T = +2±°C.)
A
PARAMETER
DC ACCURACY
SYMBOL
RES
COꢄDITIOꢄS
MIꢄ
TYP
MAX
UꢄITS
Bits
Resolution
16
-1
MAX11_ _A
+1
+1.±
+2
No missing codes
over temperature
Diꢁꢁerential Nonlinearity
DNL
MAX11_ _B
MAX11_ _C
-1.0
-1
LSB
MAX11_ _A
MAX11_ _B
MAX11_ _C
-2
+2
Integral Nonlinearity
Transition Noise
INL
LSB
-2
+2
-4
+4
RMS noise, external reꢁerence
Internal reꢁerence
0.6
0.7±
0
LSB
RMS
Oꢁꢁset Error
Gain Error
Oꢁꢁset Driꢁt
Gain Driꢁt
-10
+10
m5
0
±0.2
ꢀFSR
µ5/°C
16
±1
ppm/°C
AC ACCURACY ꢅf = 1kHzꢁ V
Iꢄ
= full ꢃangeꢁ 13ꢂkspsx
AIꢄ
Signal-to-Noise Plus Distortion
Signal-to-Noise Ratio
SINAD
SNR
86
87
90
91
dB
dB
dB
dB
Total Harmonic Distortion
Spurious-Free Dynamic Range
AꢄALOG IꢄPUT
THD
-100
103
-92
SFDR
92
MAX1179
-±
0
+±
+10
+10
9.2
Input Range
5
5
MAX1187
AIN
AIN
MAX1189
-10
±.3
3
MAX1179/MAX1187
MAX1179
Normal operation
6.9
10
Shutdown mode
Shutdown mode
Normal operation
Shutdown mode
Input Resistance
R
MAX1177
±.3
7.8
6
kΩ
13.0
MAX1189
2
_______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
ELECTRICAL CHARACTERISTICS ꢅcontinuedx
(A5
= D5
= +±5 ±±ꢀ, external reꢁerence = +4.0965, C
= 10µF, C
= 0.1µF, 5
= A5 , T = T
to T
,
MAX
DD
DD
REF
REFADJ
REFADJ
DD
A
MIN
unless otherwise noted. Typical values are at T = +2±°C.)
A
PARAMETER
SYMBOL
COꢄDITIOꢄS
Normal operation
MIꢄ
-1.8
-1.8
TYP
MAX
UꢄITS
+0.4
+1.8
MAX1179,
-±5 ≤ 5
≤ +±5
AIN
Shutdown mode
MAX1187,
0 ≤ 5 ≤ +105
Normal/shutdown
mode
Input Current
I
-0.1
+2.0
mA
AIN
AIN
Normal operation
Shutdown mode
-1.8
-1.8
+1.2
+1.8
MAX1189,
-105 ≤ 5
≤ +105
AIN
MAX1179, 5
operating mode
= +±5, shutdown mode to
AIN
1
1.4
0.7
Input Current Step at Power-Up
I
mA
pF
PU
MAX1189, 5
= +105, shutdown mode to
AIN
0.±
10
operating mode
Input Capacitance
C
IN
IꢄTERꢄAL REFEREꢄCE
REF Output 5oltage
5
4.0±6
3.8
4.096
±3±
4.136
5
REF
REF Output Tempco
ppm/°C
mA
REF Short-Circuit Current
EXTERꢄAL REFEREꢄCE
I
±10
REF-(SC)
REF and REFADJ Input 5oltage
Range
4.2
5
5
A5
-
A5
-
DD
DD
REFADJ Buꢁꢁer Disable Threshold
REF Input Current
0.4
0.1
Normal mode, ꢁ
= 13±ksps
60
±0.1
16
100
±10
SAMPLE
I
µA
µA
REF
Shutdown mode (Note 1)
REFADJ = A5
REFADJ Input Current
I
REFADJ
DD
DIGITAL IꢄPUTS/OUTPUTS
I
= 0.±mA, D5
= +±.2±5
= +2.75 to +±.2±5, D5
-
DD
SOURCE
DD
Output High 5oltage
Output Low 5oltage
Input High 5oltage
Input Low 5oltage
5
5
5
5
5
OH
A5
0.4
DD
I
= 1.6mA, D5
= +±.2±5
= +2.75 to +±.2±5,
DD
SINK
5
0.4
OL
A5
DD
0.7 ×
D5
5
IH
DD
0.3 ×
5
IL
D5
DD
Input Leakage Current
Input Hysteresis
Digital input = D5
or 05
-1
+1
µA
5
DD
5
0.2
1±
HYST
Input Capacitance
C
pF
µA
pF
IN
Three-State Output Leakage
Three-State Output Capacitance
I
±10
OZ
C
1±
OZ
_______________________________________________________________________________________
3
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
ELECTRICAL CHARACTERISTICS ꢅcontinuedx
(A5
= D5
= +±5 ±±ꢀ, external reꢁerence = +4.0965, C
= 10µF, C
= 0.1µF, 5
= A5 , T = T
to T
,
DD
DD
REF
REFADJ
REFADJ
DD
A
MIN
MAX
unless otherwise noted. Typical values are at T = +2±°C.)
A
PARAMETER
POWER SUPPLIES
SYMBOL
COꢄDITIOꢄS
MIꢄ
TYP
MAX
UꢄITS
Analog Supply 5oltage
Digital Supply 5oltage
A5
D5
4.7±
2.70
±.2±
±.2±
2.9
5
5
DD
DD
MAX1187
External reꢁerence,
13±ksps
MAX1179/MAX1189
MAX1187
4.0
±.3
Analog Supply Current
I
mA
A5DD
3.8
Internal reꢁerence,
13±ksps
MAX1179/MAX1189
±.2
0.±
3.7
6.2
Shutdown mode, I
digital input = D5
+ I
D5DD
(Note 1),
A5DD
±
µA
or 05
Shutdown Supply Current
I
DD
SHDN
D5DD
Standby mode
mA
mA
Digital Supply Current
Power-Supply Rejection
I
0.7±
A5
= D5
= +4.7±5 to +±.2±5
DD
3.±
LSB
DD
TIMIꢄG CHARACTERISTICS ꢅFiguꢃes 1 and 2x
(A5
= +±5 ±±5, D5
= +2.75 to A5 , external reꢁerence = +4.0965, C
= 10µF, C
= 0.1µF, 5
= A5 , C
REFADJ LOAD
DD
DD
REF
REFADJ
DD
DD
= 20pF, T = T
to T
.)
MAX
A
MIN
PARAMETER
Maximum Sampling Rate
Acquisition Time
SYMBOL
COꢄDITIOꢄS
MIꢄ
TYP
MAX
UꢄITS
ksps
ꢁ
13±
SAMPLE(MAX)
t
2
µs
µs
ns
ACQ
Conversion Time
t
CON5
4.7
CS Pulse Width High
t
(Note 2)
(Note 2)
40
40
60
0
CSH
D5
D5
= +4.7±5 to +±.2±5
= +2.75 to +±.2±5
DD
DD
CS Pulse Width Low
t
ns
ns
ns
CSL
R/C to CS Fall Setup Time
R/C to CS Fall Hold Time
t
DS
DH
D5
D5
D5
D5
= +4.7±5 to +±.2±5
= +2.75 to +±.2±5
= +4.7±5 to +±.2±5
= +2.75 to +±.2±5
40
60
DD
DD
DD
DD
t
40
80
CS to Output Data 5alid
EOC Fall to CS Fall
t
ns
ns
ns
DO
t
0
D5
D5
D5
D5
D5
= +4.7±5 to +±.2±5
= +2.75 to +±.2±5
= +4.7±5 to +±.2±5
= +2.75 to +±.2±5
40
80
40
80
DD
DD
DD
DD
CS Rise to EOC Rise
t
EOC
Bus Relinquish Time
t
ns
BR
ꢄote 1: Maximum speciꢁication is limited by automated test equipment.
ꢄote 2: To ensure best perꢁormance, ꢁinish reading the data and wait t beꢁore starting a new acquisition.
BR
4
_______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Typical Operating Characteristics
(A5
= D5
= +±5, external reꢁerence = +4.0965, C
= 10µF, C
= 0.1µF, 5
= A5 , C
= 20pF, T = T
MIN
to
DD
DD
REF
REFADJ
REFADJ
DD
LOAD
A
T
MAX
, unless otherwise noted. Typical values are at T = +2±°C.) (Typical Application Circuit)
A
SUPPLY CURRENT (AV + DV
DD
)
DD
INL vs. CODE
DNL vs. CODE
vs. TEMPERATURE
4.80
4.75
4.70
4.65
4.60
4.55
4.50
4.45
4.40
2.5
2.5
2.0
2.0
1.5
5.25V
5.0V
1.5
1.0
1.0
4.75V
0.5
0.5
0
0
-0.5
-1.0
-1.5
-2.0
-2.5
-0.5
-1.0
-1.5
-2.0
-2.5
f
= 135ksps
SAMPLE
SHUTDOWN MODE BETWEEN
CONVERSIONS
-40
-20
0
20
40
60
80
0
10000 20000 30000 40000 50000 60000
CODE
0
10000 20000 30000 40000 50000 60000
CODE
TEMPERATURE (°C)
SHUTDOWN CURRENT (AV + DV
DD
)
SUPPLY CURRENT (AV + DV
DD
)
DD
DD
vs. TEMPERATURE
OFFSET ERROR vs. TEMPERATURE
vs. SAMPLE RATE
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
10
8
10
1
NO CONVERSIONS
MAX1189
STANDBY MODE
6
4
2
0.1
0
SHUTDOWN MODE
-2
-4
-6
-8
-10
0.01
0.001
0.0001
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
0.01
0.1
1
10
100
1000
TEMPERATURE (°C)
TEMPERATURE (°C)
SAMPLE RATE (ksps)
GAIN ERROR
vs. TEMPERATURE
INTERNAL REFERENCE
vs. TEMPERATURE
FFT AT 1kHz
0.20
0.15
0.10
0.05
0
4.136
4.126
4.116
4.106
4.096
4.086
4.076
4.066
4.056
0
-20
f
= 135ksps
SAMPLE
-40
-60
-80
-100
-120
-140
-160
-180
-0.05
-0.10
-0.15
-0.20
-40 -20
0
20
40
60
80
-40
-20
0
20
40
60
80
0
20
40
60
TEMPERATURE (°C)
TEMPERATURE (°C)
FREQUENCY (kHz)
_______________________________________________________________________________________
ꢂ
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Typical Operating Characteristics (continued)
(A5
= D5
= +±5, external reꢁerence = +4.0965, C
= 10µF, C
= 0.1µF, 5
= A5 , C
= 20pF, T = T
to
MIN
DD
DD
REF
REFADJ
REFADJ
DD
LOAD
A
T
MAX
, unless otherwise noted. Typical values are at T = +2±°C.) (Typical Application Circuit)
A
SPURIOUS-FREE DYNAMIC RANGE
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
SINAD vs. FREQUENCY
vs. FREQUENCY
100
120
100
80
60
40
20
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
90
80
70
60
50
40
30
20
10
0
f
= 131ksps
SAMPLE
1
10
100
1
10
100
1
10
100
FREQUENCY (kHz)
FREQUENCY (kHz)
FREQUENCY (kHz)
Pin Description
PIꢄ
1
ꢄAME
FUꢄCTIOꢄ
D8
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
2
D9
3
D10
D11
D12
D13
D14
D1±
4
±
6
7
8
Three-State Digital Data Output (MSB)
Read/Convert Input. Power up and place the MAX1179/MAX1187/MAX1189 in acquisition mode by
holding R/C low during the ꢁirst ꢁalling edge oꢁ CS. During the second ꢁalling edge oꢁ CS, the level
on R/C determines whether the reꢁerence and reꢁerence buꢁꢁer power down or remain on aꢁter
conversion. Set R/C high during the second ꢁalling edge oꢁ CS to power down the reꢁerence and
buꢁꢁer, or set R/C low to leave the reꢁerence and buꢁꢁer powered up. Set R/C high during the third
ꢁalling edge oꢁ CS to put valid data on the bus.
9
R/C
10
11
12
13
14
EOC
End oꢁ Conversion. EOC drives low when conversion is complete.
Analog Supply Input. Bypass with a 0.1µF capacitor to AGND.
Analog Ground. Primary analog ground (star ground).
Analog Input
A5
DD
AGND
AIN
AGND
Analog Ground. Connect pin 14 to pin 12.
6
_______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Pin Description (continued)
PIꢄ
ꢄAME
FUꢄCTIOꢄ
Reꢁerence Buꢁꢁer Output. Bypass REFADJ with a 0.1µF capacitor to AGND ꢁor internal reꢁerence
1±
REFADJ
mode. Connect REFADJ to A5
to select external reꢁerence mode.
DD
Reꢁerence Input/Output. Bypass REF with a 10µF capacitor to AGND. REF is the external reꢁerence
input when in external reꢁerence mode.
16
17
REF
RESET
Reset Input. Logic high resets the device.
Convert Start. The ꢁirst ꢁalling edge oꢁ CS powers up the device and enables acquisition when R/C
is low. The second ꢁalling edge oꢁ CS starts conversion. The third ꢁalling edge oꢁ CS loads the result
onto the bus when R/C is high.
18
CS
19
20
21
22
23
24
2±
26
27
28
DGND
Digital Ground
D5
Digital Supply 5oltage. Bypass with a 0.1µF capacitor to DGND.
Three-State Digital Data Output (LSB)
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
DD
D0
D1
D2
D3
D4
D±
D6
D7
Detailed Description
DV
DD
Converter Operation
The MAX1179/MAX1187/MAX1189 use a successive-
approximation (SAR) conversion technique with an
inherent track-and-hold (T/H) stage to convert an ana-
log input into a 16-bit digital output. Parallel outputs
provide a high-speed interꢁace to microprocessors
(µPs). The Functional Diagram at the end oꢁ the data
sheet shows a simpliꢁied internal architecture oꢁ the
MAX1179/MAX1187/MAX1189. Figure 3 shows a typical
application circuit ꢁor the MAX1179/MAX1187/MAX1189.
1mA
D0–D15
1mA
D0–D15
C
= 20pF
C
= 20pF
LOAD
LOAD
DGND
DGND
A)
B)
HIGH-Z TO V
HIGH-Z TO V
,
,
OL
OH
V
V
TO V , AND
V
OH
V
OL
TO V , AND
OL
OH
OH
OL
TO HIGH-Z
TO HIGH-Z
Analog Input
Input Scaler
The MAX1179/MAX1187/MAX1189 have an input scaler
which allows conversion oꢁ true bipolar input voltages
and input voltages greater than the power supply, while
operating ꢁrom a single +±5 analog supply. The input
scaler attenuates and shiꢁts the analog input to match
the input range oꢁ the internal DAC. The MAX1179 input
voltage range is ±±5, while the MAX1189 input voltage
Figure 1. Load Circuits
range is ±105. The MAX1187 has a unipolar input volt-
age range oꢁ 0 to +105. Figure 4 shows the equivalent
input circuit oꢁ the MAX1179/MAX1187/MAX1189. This
circuit limits the current going into or out oꢁ AIN to less
than 1.8mA.
_______________________________________________________________________________________
7
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
t
t
CSH
CSL
CS
t
ACQ
REF POWER-
DOWN CONTROL
R/C
tEOC
t
t
t
DV
DH
DS
EOC
t
DO
t
BR
t
HIGH-Z
CONV
HIGH-Z
D0–D15
DATA VALID
Figure 2. MAX1179/MAX1187/MAX1189 Timing Diagram
Power-Down Modes
Select standby mode or shutdown mode with R/C during
the second ꢁalling edge oꢁ CS (see Selecting Standby or
Shutdown Mode section). The MAX1179/MAX1187/
MAX1189 automatically enter either standby mode (reꢁ-
erence and buꢁꢁer on) or shutdown (reꢁerence and buꢁꢁer
oꢁꢁ) aꢁter each conversion depending on the status oꢁ
R/C during the second ꢁalling edge oꢁ CS.
+5V ANALOG
+5V DIGITAL
0.1µF
0.1µF
µP DATA
BUS
AV
DD
DV
DD
16-BIT
WIDE
ANALOG
INPUT
D0–D15
AIN
Internal Clock
The MAX1179/MAX1187/MAX1189 generate an internal
conversion clock to ꢁree the microprocessor ꢁrom the bur-
den oꢁ running the SAR conversion clock. Total conver-
sion time aꢁter entering hold mode (second ꢁalling edge oꢁ
CS) to end-oꢁ-conversion (EOC) ꢁalling is 4.7µs (max).
MAX1179
MAX1187
MAX1189
R/C
CS
EOC
REF
RESET
REFADJ
AGND DGND
0.1µF
10µF
Applications Information
Starting a Conversion
CS and R/C control acquisition and conversion in the
MAX1179/MAX1187/MAX1189 (see Figure 2). The ꢁirst
ꢁalling edge oꢁ CS powers up the device and puts it in
acquire mode iꢁ R/C is low. The convert start (CS) is
ignored iꢁ R/C is high. The MAX1179/MAX1187/
Figure 3. Typical Application Circuit for the MAX1179/MAX1187/
MAX1189
Track and Hold (T/H)
In track mode, the internal hold capacitor acquires the
analog signal (see Figure 4). In hold mode, the T/H
switches open and the capacitive DAC samples the
analog input. During the acquisition, the analog input
MAX1189 need at least 12ms (C
= 0.1µF, C
REF
REFADJ
= 10µF) ꢁor the internal reꢁerence to wake up and settle
beꢁore starting the conversion, iꢁ powering up ꢁrom
shutdown. Reset the MAX1179/MAX1187/ MAX1189 by
toggling RESET with CS high. The next ꢁalling edge oꢁ
CS begins acquisition.
(AIN) charges capacitor C
. The acquisition ends
HOLD
on the second ꢁalling edge oꢁ CS. At this instant, the
T/H switches open. The retained charge on C rep-
Selecting Standby or Shutdown Mode
The MAX1179/MAX1187/MAX1189 have a selectable
standby or low-power shutdown mode. In standby
mode, the ADC’s internal reꢁerence and reꢁerence
buꢁꢁer do not power down between conversions, elimi-
nating the need to wait ꢁor the reꢁerence to power up
beꢁore perꢁorming the next conversion. Shutdown mode
powers down the reꢁerence and reꢁerence buꢁꢁer aꢁter
HOLD
resents a sample oꢁ the input. In hold mode, the capac-
itive DAC adjusts during the remainder oꢁ the
conversion time to restore node T/H OUT to zero within
the limits oꢁ a 16-bit resolution. Force CS low to put
valid data on the bus aꢁter conversion is complete.
8
_______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
REF
MAX1187
MAX1179/MAX1189
3.4kΩ
3.4kΩ
TRACK
C
C
HOLD
30pF
R2
R2
HOLD
30pF
161Ω
161Ω
TRACK
AIN
AIN
S1
S1
T/H OUT
HOLD
S2
T/H OUT
HOLD
S2
HOLD
HOLD
S3
TRACK
TRACK
R3
R3
POWER-
DOWN
S1, S2 = T/H SWITCH
S3 = POWER-DOWN
(MAX1179/MAX1189
ONLY)
R2 = 7.85kΩ (MAX1189)
OR 3.92kΩ (MAX1179/MAX1187)
R3 = 5.45kΩ (MAX1189)
OR 17.79kΩ (MAX1179/MAX1187)
Figure 4. Equivalent Input Circuit
DATA
OUT
ACQUISITION
CONVERSION
CS
R/C
EOC
REF AND
BUFFER
POWER
Figure 5. Selecting Standby Mode
completing a conversion. The reꢁerence and reꢁerence
buꢁꢁer require a minimum oꢁ 12ms (C = 0.1µF,
REF
buꢁꢁer aꢁter conversion (see Figures ± and 6). Set the
voltage at REF high during the second ꢁalling edge oꢁ
CS to realize the lowest current operation.
REFADJ
C
= 10µF) to power up and settle ꢁrom shutdown.
The state oꢁ R/C during the second ꢁalling edge oꢁ CS
selects which power-down mode the MAX1179/
MAX1187/MAX1189 enters upon conversion comple-
tion. Holding R/C low causes the MAX1179/MAX1187/
MAX1189 to enter standby mode. The reꢁerence and
buꢁꢁer are leꢁt on aꢁter the conversion completes. R/C
high causes the MAX1179/MAX1187/MAX1189 to enter
shutdown mode and power down the reꢁerence and
Standby Mode
While in standby mode, the supply current is less than
3.7mA (typ). The next ꢁalling edge oꢁ CS with R/C low
causes the MAX1179/MAX1187/MAX1189 to exit stand-
by mode and begin acquisition. The reꢁerence and reꢁ-
erence buꢁꢁer remain active to allow quick turn-on time.
_______________________________________________________________________________________
9
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
DATA
OUT
ACQUISITION
CONVERSION
CS
R/C
EOC
REF &
BUFFER
POWER
Figure 6. Selecting Shutdown Mode
External Reference
An external reꢁerence can be placed at either the input
(REFADJ) or the output (REF) oꢁ the MAX1179/
MAX1187/MAX1189’s internal buꢁꢁer ampliꢁier. Using
the buꢁꢁered REFADJ input makes buꢁꢁering the external
reꢁerence unnecessary. The input impedance oꢁ
REFADJ is typically ±kΩ. The internal buꢁꢁer output
must be bypassed at REF with a 10µF capacitor.
MAX1179
MAX1187
MAX1189
+5V
68kΩ
0.1µF
100kΩ
150kΩ
REFADJ
Connect REFADJ to A5
to disable the internal buꢁꢁer.
DD
Directly drive REF using an external 3.85 to 4.25 reꢁer-
ence. During conversion, the external reꢁerence must
be able to drive 100µA oꢁ DC load current and have an
output impedance oꢁ 10Ω or less.
Figure 7. MAX1179/MAX1187/MAX1189 Reference Adjust
Circuit
For optimal perꢁormance, buꢁꢁer the reꢁerence through
an op amp and bypass REF with a 10µF capacitor.
Consider the MAX1179/MAX1187/MAX1189’s equivalent
input noise (0.6LSB) when choosing a reꢁerence.
Shutdown Mode
In shutdown mode, the reꢁerence and reꢁerence buꢁꢁer
shut down between conversions. Shutdown mode
reduces supply current to 0.±µA (typ) immediately aꢁter
the conversion. The next ꢁalling edge oꢁ CS with R/C
low causes the reꢁerence and buꢁꢁer to wake up and
enter acquisition mode. To achieve 16-bit accuracy,
Reading the Conversion Result
EOC ꢁlags the microprocessor when a conversion is
complete. The ꢁalling edge oꢁ EOC signals that the data
is valid and ready to be output to the bus. D0–D1± are
the parallel outputs oꢁ the MAX1179/MAX1187/
MAX1189. These three-state outputs allow ꢁor direct
connection to a microcontroller I/O bus. The outputs
remain high-impedance during acquisition and conver-
sion. Data is loaded onto the bus with the third ꢁalling
allow 12ms (C
= 0.1µF, C
= 10µF) ꢁor the
REF
REFADJ
internal reꢁerence to wake up.
Internal and External Reference
Internal Reference
The internal reꢁerence oꢁ the MAX1179/MAX1187/
MAX1189 is internally buꢁꢁered to provide +4.0965 out-
put at REF. Bypass REF to AGND and REFADJ to
AGND with 10µF and 0.1µF, respectively.
edge oꢁ CS with R/C high (aꢁter t ). Bringing CS high
DO
ꢁorces the output bus back to high impedance. The
MAX1179/MAX1187/MAX1189 then wait ꢁor the next
ꢁalling edge oꢁ CS to start the next conversion cycle
(see Figure 2).
Sink or source current at REFADJ to make ꢁine adjust-
ments to the internal reꢁerence. The input impedance oꢁ
REFADJ is nominally ±kΩ. Use the circuit oꢁ Figure 7 to
adjust the internal reꢁerence to ±1.±ꢀ.
1ꢀ ______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
INPUT RANGE = -5V TO +5V
OUTPUT CODE
INPUT RANGE = 0 TO +10V
OUTPUT CODE
FULL-SCALE
TRANSITION
FULL-SCALE
TRANSITION
11 . . . 1111
11 . . . 111
11 . . . 1110
11 . . . 1101
11 . . . 110
11 . . . 101
10 . . . 0001
10 . . . 0000
01 . . . 1111
FULL-SCALE RANGE
(FSR) = +10V
FULL-SCALE RANGE
(FSR) = +10V
FSR x V
65536 x 4.096
FSR x V
65536 x 4.096
REF
REF
1LSB =
1LSB =
00 . . . 0011
00 . . . 0010
00 . . . 0001
00 . . . 0000
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
-32768 -32766
0
+32766 +32768
+32767
0
1
2
3
65534 65536
65535
-32767 -32765 -1
+1
INPUT VOLTAGE (LSB)
INPUT VOLTAGE (LSB)
Figure 8. MAX1179 Transfer Function
Figure 9. MAX1187 Transfer Function
step-change in input signal. The input ampliꢁier must
have a high enough slew rate to complete the required
output voltage change beꢁore the beginning oꢁ the
acquisition time. Figure 11 shows an example oꢁ this
circuit using the MAX427.
INPUT RANGE = -10V TO +10V
OUTPUT CODE
FULL-SCALE
TRANSITION
11 . . . 1111
11 . . . 1110
11 . . . 1101
Figures 12a and 12b show how the MAX1179 and
MAX1189 analog input current varies depending on
whether the chip is operating or powered down. The
part is ꢁully powered down between conversions iꢁ the
voltage at R/C is set high during the second ꢁalling
edge oꢁ CS. The input current abruptly steps to the
powered up value at the start oꢁ acquisition. This step
in the input current can disrupt the ADC input, depend-
ing on the driving circuit’s output impedance at high
ꢁrequencies. Iꢁ the driving circuit cannot ꢁully settle by
the end oꢁ acquisition time, the accuracy oꢁ the system
can be compromised. To avoid this situation, increase
the acquisition time, use a driving circuit that can settle
10 . . . 0001
10 . . . 0000
01 . . . 1111
FULL-SCALE RANGE
(FSR) = +20V
FSR x V
65536 x 4.096
REF
1LSB =
00 . . . 0011
00 . . . 0010
00 . . . 0001
00 . . . 0000
-32768 -32766
0
+32766 +32768
+32767
-32767 -32765 -1
+1
INPUT VOLTAGE (LSB)
Figure 10. MAX1189 Transfer Function
within t
, or leave the MAX1179/MAX1189 powered
ACQ
up by setting the voltage at R/C low during the second
ꢁalling edge oꢁ CS.
Transfer Function
Figures 8, 9, and 10 show the MAX1179/MAX1187/
MAX1189’s output transꢁer ꢁunctions. The MAX1179
and MAX1189 outputs are coded in oꢁꢁset binary, while
the MAX1187 is coded in standard binary.
Layout, Grounding, and Bypassing
For best perꢁormance, use printed circuit (PC) boards.
Do not run analog and digital lines parallel to each
other, and do not lay out digital signal paths under-
neath the ADC package. Use separate analog and dig-
ital ground planes with only one point connecting the
two ground systems (analog and digital) as close to the
device as possible.
Input Buffer
Most applications require an input buꢁꢁer ampliꢁier to
achieve 16-bit accuracy and prevent loading the
source. Switch the channels immediately aꢁter acquisi-
tion, rather than near the end oꢁ or aꢁter a conversion
when the input signal is multiplexed. This allows more
time ꢁor the input buꢁꢁer ampliꢁier to respond to a large
Route digital signals ꢁar away ꢁrom sensitive analog and
reꢁerence inputs. Iꢁ digital lines must cross analog lines,
do so at right angles to minimize coupling digital noise
______________________________________________________________________________________ 11
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation oꢁ the values
on an actual transꢁer ꢁunction ꢁrom a straight line. This
straight line can be either a best-straight-line ꢁit or a line
drawn between the end points oꢁ the transꢁer ꢁunction,
once oꢁꢁset and gain errors have been nulliꢁied. The
static linearity parameters ꢁor the MAX1179/MAX1187/
MAX1189 are measured using the endpoint method.
REF
MAX1179
MAX1187
MAX1189
**
MAX427
AIN
ANALOG
INPUT
*
Differential Nonlinearity
Diꢁꢁerential nonlinearity (DNL) is the diꢁꢁerence between
an actual step-width and the ideal value oꢁ 1LSB. A
DNL error speciꢁication oꢁ 1LSB guarantees no missing
codes and a monotonic transꢁer ꢁunction.
*MAX1187 ONLY.
**MAX1179/MAX1189 ONLY.
Figure 11. MAX1179/MAX1187/MAX1189 Fast-Settling Input
Buffer
Signal-to-Noise Ratio
For a waveꢁorm perꢁectly reconstructed ꢁrom digital
samples, signal-to-noise ratio (SNR) is the ratio oꢁ the
ꢁull-scale analog input (RMS value) to the RMS quanti-
zation error (residual error). The ideal, theoretical mini-
mum analog-to-digital noise is caused by quantization
noise error only and results directly ꢁrom the ADC’s res-
olution (N bits):
onto the analog lines. Iꢁ the analog and digital sections
share the same supply, isolate the digital and analog
supply by connecting them with a low value (10Ω)
resistor or ꢁerrite bead.
The ADC is sensitive to high-ꢁrequency noise on the
A5
supply. Bypass A5
to AGND with a 0.1µF
DD
DD
SNR = ((6.02 ✕ N) + 1.76)dB
capacitor in parallel with a 1µF to 10µF low-ESR capaci-
tor with the smallest capacitor closest to the device.
Keep capacitor leads short to minimize stray inductance.
where N = 16 bits.
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reꢁerence noise, clock jitter,
MAX1179
ANALOG INPUT CURRENT
vs. ANALOG INPUT VOLTAGE
2.0
MAX1189
ANALOG INPUT CURRENT
vs. ANALOG INPUT VOLTAGE
1.5
1.5
1.0
1.0
0.5
0.5
SHUTDOWN MODE
0
SHUTDOWN MODE
0
STANDBY MODE
-0.5
-0.5
STANDBY MODE
-1.0
-1.0
-1.5
-1.5
-2.0
-5.0
-2.5
0
2.5
5.0
-10
-5
0
5
10
ANALOG INPUT VOLTAGE (V)
ANALOG INPUT VOLTAGE (V)
Figure 12a. MAX1179 Analog Input Current
Figure 12b. MAX1189 Analog Input Current
12 ______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
etc. SNR is computed by taking the ratio oꢁ the RMS
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio oꢁ the RMS
sum oꢁ the ꢁirst ꢁive harmonics oꢁ the input signal to the
ꢁundamental itselꢁ. This is expressed as:
signal to the RMS noise, which includes all spectral
components minus the ꢁundamental, the ꢁirst ꢁive har-
monics, and the DC oꢁꢁset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio oꢁ the
ꢁundamental input ꢁrequency’s RMS amplitude to the
RMS equivalent oꢁ all the other ADC output signals.
2
522 + 532 + 542 + 5±
=
THD 20 × log
5
1
SignalRMS
SINAD(db) = 20 × log
(Noise + Distortion)
RMS
where 51 is the ꢁundamental amplitude and 52 through
5± are the 2nd- through ±th-order harmonics.
Effective Number of Bits
Spurious-Free Dynamic Range
Spurious-ꢁree dynamic range (SFDR) is the ratio oꢁ the
RMS amplitude oꢁ the ꢁundamental (maximum signal
component) to the RMS value oꢁ the next largest ꢁre-
quency component.
Eꢁꢁective number oꢁ bits (ENOB) indicates the global
accuracy oꢁ an ADC at a speciꢁic input ꢁrequency and
sampling rate. An ideal ADC’s error consists oꢁ quanti-
zation noise only. With an input range equal to the ꢁull-
scale range oꢁ the ADC, calculate the eꢁꢁective number
oꢁ bits as ꢁollows:
Chip Information
TRANSISTOR COUNT: 1±,383
SINAD - 1.76
6.02
PROCESS: BiCMOS
=
ENOB
Ordering Information (continued)
IꢄPUT VOLTAGE
PART
TEMP RAꢄGE
PIꢄ-PACKAGE
IꢄL ꢅLSBx
RAꢄGE
MAX1179CCUI
MAX1179AEUI
MAX1179BEUI
MAX1179CEUI
MAX1187ACUI
MAX1187BCUI
MAX1187CCUI
MAX1187AEUI
MAX1187BEUI
MAX1187CEUI
MAX1189ACUI
MAX1189BCUI
MAX1189CCUI
0°C to +70°C
-40°C to +8±°C
-40°C to +8±°C
-40°C to +8±°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +8±°C
-40°C to +8±°C
-40°C to +8±°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +8±°C
-40°C to +8±°C
-40°C to +8±°C
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
28 TSSOP
±±5
±±5
±4
±2
±2
±4
±2
±2
±4
±2
±2
±4
±2
±2
±4
±2
±2
±4
±±5
±±5
0 to +105
0 to +105
0 to +105
0 to +105
0 to +105
0 to +105
±105
±105
±105
MAX1189AEUI*
MAX1189BEUI*
MAX1189CEUI*
±105
±105
±105
*Future product—contact factory for availability.
______________________________________________________________________________________ 13
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Functional Diagram
REFADJ
AV
AGND DV
DGND
DD
DD
5kΩ
REFERENCE
16 BITS
16 BITS
OUTPUT
REGISTERS
D0–D15
REF
MAX1179
MAX1187
MAX1189
CAPACITIVE
DAC
INPUT
SCALER
AIN
AGND
RESET
SUCCESSIVE-
APPROXIMATION
REGISTER AND
CONTROL LOGIC
CLOCK
CS
EOC
R/C
14 ______________________________________________________________________________________
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Package Information
(The package drawing(s) in this data sheet may not reꢁlect the most current speciꢁications. For the latest package outline inꢁormation,
go to www.(aꢆi(-ic.co(/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 1ꢂ
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark oꢁ Maxim Integrated Products.
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