MAX11205PMB1 [MAXIM]

MAX11205PMB1 Peripheral Module; MAX11205PMB1外设模块
MAX11205PMB1
型号: MAX11205PMB1
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

MAX11205PMB1 Peripheral Module
MAX11205PMB1外设模块

文件: 总7页 (文件大小:1566K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-6330; Rev 0; 5/12  
Ordering Information appears at end of data sheet.  
MAX11205PMB1 Peripheral Module  
Pmod is a trademark of Digilent Inc.  
_________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
MAX11205PMB1 Peripheral Module  
Component List  
DESIGNATION QTY  
DESCRIPTION  
DESIGNATION QTY  
DESCRIPTION  
6-pin right-angle male header  
3-pin straight male header  
150I Q5% resistors (0603)  
33I Q5% resistors (0603)  
J1  
JP1  
1
1
2
3
0.1FF Q10%, 16V X7R ceramic  
capacitors (0603)  
Murata GRM188R71C104KA01D  
C1–C5  
C6  
5
1
2
2
1
R1, R2  
R3, R4, R5  
10FF Q10%, 10V X5R ceramic  
capacitor (0603)  
TDK C2012X5R1A106K/1.25  
Ultra-low-noise, high-PSRR linear  
regulator (5 SC70)  
Maxim MAX8510EXK29+  
U1  
U2  
U3  
1
1
1
0.01FF Q10%, 16V X7R ceramic  
capacitors (0603)  
Murata GRM188R71C103KA01D  
C7, C8  
C9, C10  
F1  
16-bit delta-sigma ADC  
(10 FMAXM)  
Maxim MAX11205AEUB+  
2.2FF Q10%, 10V X5R ceramic  
capacitors (0603)  
TDK C1608X5R1A225K/0.80  
Low-power fixed reference  
(5 SOT23)  
Maxim MAX6037AAUK25+  
4.7FF EMI filter (3-terminal  
capacitor)  
Murata NFM21PC475B1A3D  
1
1
Shorting jumper  
PCB: EPCB11205PM1  
Component Suppliers  
SUPPLIER  
PHONE  
WEBSITE  
Murata Electronics North America, Inc.  
TDK Corp.  
770-436-1300  
847-803-6100  
www.murata-northamerica.com  
www.component.tdk.com  
Note: Indicate that you are using the MAX11205PMB1 when contacting these component suppliers.  
Table 1. Connector J1 (2-Wire Communication)  
Detailed Description  
PIN  
1
SIGNAL  
N.C.  
DESCRIPTION  
Not connected  
2-Wire Interface  
The MAX11205PMB1 peripheral module interfaces with  
a host using a 2-wire serial interface. When an ADC  
conversion is complete, the IC pulls the data line low.  
The host must then supply a clock signal to shift out the  
conversion data. More information on the 2-wire interface  
can be found the MAX11205 IC data sheet.  
2
N.C.  
Not connected  
Data-ready output/serial-data output.  
This output serves a dual function.  
In addition to the serial-data output  
function, the MISO pin also indicates  
that the data is ready when it is pulled  
logic-low by the IC. Output data  
3
MISO  
Connector J1 provides connection of the module to the  
Pmod host. See Table 1.  
changes on the falling edge of SCLK.  
Jumper JP1 allows the user to select between two volt-  
ages for IC analog supply voltage (AVDD). This allows  
the option of applying additional power-supply filtering  
based on the noise content of the incoming voltage  
source (connector J1) and the performance require-  
ments for the application. See Table 2.  
2-wire serial clock. The host must apply  
an external clock signal to shift data  
out from the IC.  
4
SCK  
5
6
GND  
VCC  
Ground  
Power supply  
µMAX is a registered trademark of Maxim Integrated Products,  
Inc.  
_________________________________________________________________ Maxim Integrated Products  
2
MAX11205PMB1 Peripheral Module  
forms can be added over time. Maxim provides complete  
Xilinx ISE projects containing HDL, Platform Studio, and  
SDK projects. In addition, a synthesized bitstream, ready  
for FPGA download, is provided for the demonstration  
Table 2. Jumper JP1  
(Analog VDD Selection)  
PINS  
SELECTION  
application.  
AVDD supplied by output from MAX8510EXK29  
(2.85V)  
2-1  
The software project (for the SDK) contains several  
source files intended to accelerate customer evalu-  
ation and design. These include a base application  
(maximModules.c) that demonstrates module function-  
ality and uses an API interface (maximDeviceSpecific  
Utilities.c) to set and access Maxim device functions  
within a specific module.  
2-3  
AVDD supplied by host, pin 6 of connector J1  
Reference Voltage  
The peripheral module contains a MAX6037 precision  
voltage reference for the REFP input of the ADC IC. The  
MAX6037 outputs a 2.5V reference.  
The source code is written in standard ANSI C format, and  
all API documentation including theory/operation, register  
description, and function prototypes are documented in  
the API interface file (maximDeviceSpecificUtilities.h & .c).  
Software and FPGA Code  
Example software and drivers are available that execute  
directly without modification on several FPGA develop-  
ment boards that support an integrated or synthesized  
microprocessor. These boards include the Digilent Nexys  
3, Avnet LX9, and Avnet ZEDBoard, although other plat-  
The complete software kit is available for download at  
www.maxim-ic.com. Quick start instructions are also  
available as a separate document.  
JP1  
3
2
1
J1  
1
2
3
4
5
6
R1  
R2  
150  
150  
MISO  
SCK  
GND  
VCC  
U1  
IN  
GND  
AVDD  
1
3
1
2
3
5
4
OUT  
C1  
0. 1uF  
C6  
F1  
EMIFILT  
GND  
10uF  
SHDN BYP  
GND  
GND  
C7 0. 01uF  
MAX8510EXK29  
GND  
R3  
33  
REF  
U2  
MISO  
SCK  
8
9
5
4
AINP  
RDY/DOUT  
SCLK  
AINP  
AINN  
VIN+  
C8  
0. 01uF  
VIN-  
10  
GND  
CLK  
GND  
2
3
REFP  
REFP  
REFN  
R4 33  
6
7
1
AVDD  
AVDD  
DVDD  
GND  
U3  
4
DVDD  
R5 33  
AVDD  
IN  
C2  
0. 1uF  
C3  
0.1uF  
C9  
2. 2uF  
C10  
2. 2uF  
C4  
0. 1uF  
3
2
5
1
SHDN OUT  
C5  
0.1uF  
MAX11205AEUB  
GND IC(nc)  
GND  
MAX6037AAUK25  
GND  
GND  
Figure 1. MAX11205PMB1 Peripheral Module Schematic  
_________________________________________________________________ Maxim Integrated Products  
3
MAX11205PMB1 Peripheral Module  
Figure 2. MAX11205PMB1 Peripheral Module Component Placement Guide—Component Side  
Figure 3. MAX11205PMB1 Peripheral Module PCB Layout—Component Side  
Figure 4. MAX11205PMB1 Peripheral Module PCB Layout—Inner Layer 1 (Ground)  
_________________________________________________________________ Maxim Integrated Products  
4
MAX11205PMB1 Peripheral Module  
Figure 5. MAX11205PMB1 Peripheral Module PCB Layout—Inner Layer 2 (Power)  
Figure 6. MAX11205PMB1 Peripheral Module PCB Layout—Solder Side  
Figure 7. MAX11205PMB1 Peripheral Module Component Placement Guide—Solder Side  
_________________________________________________________________ Maxim Integrated Products  
5
MAX11205PMB1 Peripheral Module  
Ordering Information  
PART  
TYPE  
MAX11205PMB1#  
Peripheral Module  
#Denotes RoHS compliant.  
_________________________________________________________________ Maxim Integrated Products  
6
MAX11205PMB1 Peripheral Module  
Revision History  
REVISION  
NUMBER  
REVISION  
DATE  
PAGES  
DESCRIPTION  
CHANGED  
0
5/12  
Initial release  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.  
Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
7
©
2012 Maxim Integrated Products  
Maxim is a registered trademark of Maxim Integrated Products, Inc.  

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