DS75U

更新时间:2024-09-18 12:54:29
品牌:MAXIM
描述:Digital Thermometer and Thermostat

DS75U 概述

Digital Thermometer and Thermostat 数字温度计和温度监控器 温度传感器

DS75U 数据手册

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DS75  
Digital Thermometer and Thermostat  
www.maxim-ic.com  
FEATURES  
PIN ASSIGNMENT  
ƒ Temperature Measurements Require No  
External Components  
8
VDD  
A0  
SDA  
1
2
3
4
ƒ Measures Temperatures from -55°C to  
+125°C (-67°F to +257°F)  
ƒ ±2°C Accuracy Over a -25°C to +100°C  
Range  
7
6
5
SCL  
O.S.  
GND  
A1  
A2  
ƒ Thermometer Resolution is User-  
Configurable from Nine (Default) to 12 Bits  
(0.5°C to 0.0625°C Resolution)  
ƒ 9-Bit Conversion Time is 150ms (Max)  
ƒ Thermostatic Settings are User-Definable  
ƒ Data is Read/Written Via 2-Wire Serial  
(Interface (SDA and SCL Pins)  
DS75S+ (8-Pin SO — 150mil)  
8
1
2
3
VDD  
A0  
SDA  
SCL  
O.S.  
GND  
7
6
5
A1  
4
A2  
ƒ Multidrop Capability Simplifies Distributed  
Temperature-Sensing Applications  
ƒ Wide Power-Supply Range (+2.7V to  
+5.5V).  
ƒ Pin/software Compatible with the LM75  
ƒ Available in 8-Pin μMAX® and SO  
Packages. See Table 1 for Ordering  
Information  
DS75U+ (μMAX)  
PIN DESCRIPTION  
SDA – Open-Drain Data I/O  
SCL – Clock Input  
GND – Ground  
O.S. – Open-Drain Thermostat Output  
ƒ Applications Include Personal Computers,  
Cellular Base Stations, Office Equipment, or  
Any Thermally Sensitive System  
A0  
A1  
A2  
– Address Input  
– Address Input  
– Address Input  
V DD – Power Supply  
DESCRIPTION  
The DS75 digital thermometer and thermostat provides 9, 10, 11, or 12-bit digital temperature readings  
over a -55°C to +125°C range with ±2°C accuracy over a -25°C to +100°C range. At power-up, the  
DS75 defaults to 9-bit resolution for software compatibility with the LM75. Communication with the  
DS75 is achieved via a simple 2–wire serial interface. Three address pins allow up to eight DS75 devices  
to operate on the same 2–wire bus, which greatly simplifies distributed temperature sensing applications.  
The DS75 thermostat has a dedicated open–drain output (O.S.) and programmable fault tolerance, which  
allows the user to define the number of consecutive error conditions that must occur before O.S is  
activated. There are two thermostatic operating modes that control thermostat operation based on user-  
defined trip-points (TOS and THYST).  
A block diagram of the DS75 is shown in Figure 1 and detailed pin descriptions are given in Table 2.  
µMAX is a registered trademark of Maxim Integrated Products, Inc.  
1 of 14  
022108  
DS75  
Table 1. ORDERING INFORMATION  
ORDERING  
NUMBER  
DS75S+  
PACKAGE  
MARKING  
DESCRIPTION  
DS75 (see note) DS75 in Lead-Free 150mil 8-Pin SO  
DS75S+T&R DS75 (see note) DS75 in Lead-Free 150mil 8-Pin SO, 2500-Piece Tape-and-Reel  
DS75U+  
DS75 (see note)  
DS75 in Lead-Free 8-Pin μMAX  
DS75U+T&R DS75 (see note)  
DS75 in Lead-Free 8-Pin μMAX, 3000-Piece Tape-and-Reel  
DS75 in 150mil 8-Pin SO  
DS75 in 150mil 8-Pin SO, 2500-Piece Tape-and-Reel  
DS75S  
DS75  
DS75  
DS75  
DS75S/T&R  
DS75U  
DS75 in 8-Pin μMAX  
DS75U/T&R DS75  
DS75 in 8-Pin μMAX, 3000-Piece Tape-and-Reel  
Note: A "+" symbol will also be marked on the package near the Pin 1 indicator  
Table 2. DETAILED PIN DESCRIPTION  
PIN  
1
2
3
4
SYMBOL DESCRIPTION  
SDA  
SCL  
O.S.  
GND  
A2  
Data input/output pin for 2-wire serial communication port. Open drain.  
Clock input pin for 2-wire serial communication port.  
Thermostat output. Open drain.  
Ground pin.  
5
Address input pin.  
6
A1  
Address input pin.  
7
A0  
Address input pin.  
8
VDD  
Supply Voltage. +2.7V to +5.5V supply pin.  
2 of 14  
DS75  
Figure 1. DS75 FUNCTIONAL BLOCK DIAGRAM  
PRECISION  
REFERENCE  
OVERSAMPLING  
MODULATOR  
DIGITAL  
DECIMATOR  
VDD  
CONFIGURATION  
REGISTER  
SCL  
SDA  
ADDRESS  
AND  
I/O CONTROL  
TEMPERATURE  
REGISTER  
A0  
A1  
A2  
RP  
O.S.  
TOS AND THYST  
REGISTERS  
THERMOSTAT  
COMPARATOR  
GND  
3 of 14  
DS75  
ABSOLUTE MAXIMUM RATINGS*  
Voltage on VDD, Relative to Ground  
Voltage on any other pin, Relative to Ground  
Operating Temperature  
–0.3V to +7.0V  
–0.3V to (V DD + 0.3V)  
–55°C to +125°C  
Storage Temperature  
–55°C to +125°C  
Soldering Temperature  
+260°C for 10 seconds  
* These are stress ratings only and functional operation of the device at these or any other conditions  
above those indicated in the operation sections of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods of time may affect reliability.  
DC ELECTRICAL CHARACTERISTICS  
(-55°C to +125°C; 2.7V VDD 5.5V)  
PARAMETER  
SYMBOL CONDITION  
MIN  
MAX  
5.5  
UNITS NOTES  
Supply Voltage  
VDD  
2.7  
V
-25 to +100  
-55 to +125  
± 2.0  
± 3.0  
Thermometer Error  
TERR  
2
°C  
Input Logic High  
Input Logic Low  
SDA Output Logic Low  
Voltage  
VIH  
VIL  
VOL1  
0.7VDD  
-0.5  
VDD+0.5  
0.3VDD  
V
V
V
1
1
1
3 mA sink  
current  
6 mA sink  
current  
4 mA sink  
current  
0.4 < VI/O<  
0.9 VDD  
0
0
0.4  
0.6  
0.8  
+10  
VOL2  
O.S. Saturation Voltage  
VOL  
V
1, 2  
Input current each I/O  
pin  
-10  
μA  
I/O Capacitance  
Standby Current  
CI/O  
IDD1  
10  
1
pF  
µA  
3, 4  
3, 4  
Active Temp.  
Conversions  
Communica-  
tion only  
1000  
100  
Active Current  
IDD  
µA  
4 of 14  
DS75  
AC ELECTRICAL CHARACTERISTICS  
(-55°C to +125°C; 2.7V VDD 5.5V)  
PARAMETER  
SYMBOL CONDITION  
MIN  
TYP MAX UNITS NOTES  
Resolution  
9
12  
bits  
Temperature  
tCONVT  
9-bit  
150  
ms  
Conversion Time  
conversions  
10-bit  
300  
600  
conversions  
11-bit  
conversions  
12-bit  
conversions  
1200  
400  
SCL Frequency  
Bus Free Time  
fSCL  
tBUF  
KHz  
μs  
1.3  
0.6  
5
Between a STOP and  
START Condition  
START and Repeated  
START Hold Time  
from Falling SCL  
Low Period of SCL  
High Period of SCL  
Repeated START  
Condition Setup Time  
to Rising SCL  
tHD:STA  
5, 6  
μs  
tLOW  
tHIGH  
tSU:STA  
1.3  
0.6  
0.6  
5
5
5
μs  
μs  
μs  
Data-Out Hold Time  
from Falling SCL  
Data-In Setup Time to  
Rising SCL  
Rise Time of SDA and  
SCL  
Fall Time of SDA and  
SCL  
STOP Setup Time to  
Rising SCL  
tHD:DAT  
tSU:DAT  
tR  
0
0.9  
5
5
μs  
ns  
ns  
ns  
100  
20 + 0.1CB  
20 + 0.1CB  
0.6  
5, 7  
5, 7  
5
1000  
300  
tF  
tSU:STO  
CB  
μs  
pF  
pF  
Capacitive Load for  
Each Bus Line  
Input Capacitance  
400  
CI  
5
NOTES:  
1. All voltages are referenced to ground.  
2. Internal heating caused by O.S. loading will cause the DS75 to read approximately 0.5°C higher if  
O.S. is sinking the max rated current.  
3. IDD specified with O.S. pin open.  
4. IDD specified with VDD at 5.0V and SDA, SCL = 5.0V, 0°C to 70°C.  
5. See Timing Diagram in Figure 2. All timing is referenced to 0.9 x VDD and 0.1 x VDD.  
6. After this period, the first clock pulse is generated.  
7. For example, if CB = 300pF, then tR[min] = tF[min] = 50ns.  
5 of 14  
DS75  
Figure 2. TIMING DIAGRAM  
Note: The DS75 does not delay the SDA line internally with respect to SCL for any length of time.  
OPERATION–MEASURING TEMPERATURE  
The DS75 measures temperature using a bandgap temperature sensing architecture. An on-board delta-  
sigma analog-to-digital converter (ADC) converts the measured temperature to a digital value that is  
calibrated in degrees centigrade; for Fahrenheit applications a lookup table or conversion routine must be  
used. The DS75 is factory-calibrated and requires no external components to measure temperature.  
At power-up the DS75 immediately begins measuring the temperature and converting the temperature to  
a digital value. The resolution of the digital output data is user-configurable to 9, 10, 11, or 12 bits,  
corresponding to temperature increments of 0.5°C, 0.25°C, 0.125°C, and 0.0625°C, respectively, with 9-  
bit default resolution at power-up. The resolution is controlled via the R0 and R1 bits in the configuration  
register as explained in the CONFIGURATION REGISTER section of this data sheet. Note that the  
conversion time doubles for each additional bit of resolution.  
After each temperature measurement and analog-to-digital conversion, the DS75 stores the temperature as  
a 16-bit two’s complement number in the 2-byte temperature register (see Figure 3). The sign bit (S)  
indicates if the temperature is positive or negative: for positive numbers S = 0 and for negative numbers S  
= 1. The most recently converted digital measurement can be read from the temperature register at any  
time. Since temperature conversions are performed in the background, reading the temperature register  
does not affect the operation in progress.  
Bits 3 through 0 of the temperature register are hardwired to 0. When the DS75 is configured for 12-bit  
resolution, the 12 MSbs (bits 15 through 4) of the temperature register will contain temperature data. For  
11-bit resolution, the 11 MSbs (bits 15 through 5) of the temperature register will contain data, and bit 4  
will read out as 0. Likewise, for 10-bit resolution, the 10 MSbs (bits 15 through 6) will contain data, and  
for 9-bit the 9 MSbs (bits 15 through 7) will contain data, and all unused LSbs will contain 0s. Table 3  
gives examples of 12-bit resolution digital output data and the corresponding temperatures.  
6 of 14  
DS75  
Figure 3. TEMPERATURE, TH, and TL REGISTER FORMAT  
bit 15  
bit 14  
bit 13  
bit 12  
bit 11  
bit 10  
bit 9  
bit 8  
MS Byte  
LS Byte  
S
26  
25  
24  
23  
22  
21  
20  
bit 7  
2-1  
bit 6  
2-2  
bit 5  
2-3  
bit 4  
2-4  
bit 3  
bit 2  
bit 1  
bit 0  
0
0
0
0
Table 3. 12-BIT RESOLUTION TEMPERATURE/DATA RELATIONSHIP  
TEMPERATURE  
DIGITAL OUTPUT  
(BINARY)  
DIGITAL OUTPUT  
(HEX)  
(°C)  
+125  
+25.0625  
+10.125  
+0.5  
0111 1101 0000 0000  
0001 1001 0001 0000  
0000 1010 0010 0000  
0000 0000 1000 0000  
0000 0000 0000 0000  
1111 1111 1000 0000  
1111 0101 1110 0000  
1110 0110 1111 0000  
1100 1001 0000 0000  
7D00h  
1910h  
0A20h  
0080h  
0000h  
FF80h  
F5E0h  
E6F0h  
C900h  
0
-0.5  
-10.125  
-25.0625  
-55  
SHUTDOWN MODE  
For power-sensitive applications, the DS75 offers a low-power shutdown mode. The SD bit in the  
configuration register controls shutdown mode. When SD is changed to 1, the conversion in progress  
will be completed and the result stored in the temperature register after which the DS75 will go into a  
low-power standby state. The O.S. output will be cleared if the thermostat is operating in interrupt mode  
and O.S will remain unchanged in comparator mode. The 2-wire interface remains operational in  
shutdown mode, and writing a 0 to the SD bit returns the DS75 to normal operation.  
OPERATION–THERMOSTAT  
The DS75 thermostat has two operating modes, comparator mode and interrupt mode, which activate and  
deactivate the open-drain thermostat output (O.S.) based on user-programmable trip-points (TOS and  
THYST). The DS75 powers up with the thermostat in comparator mode with active-low O.S. polarity and  
with the over-temperature trip-point (TOS) register set to 80°C and the hysteresis trip-point (THYST  
)
register set to 75°C. If these power-up settings are compatible with the application, the DS75 can be used  
as a standalone thermostat (i.e., no 2–wire communication required). If interrupt mode operation, active-  
high O.S. polarity or different TOS and THYST values are desired, they must be programmed after power-  
up, so standalone operation is not possible.  
In both operating modes, the user can program the thermostat fault tolerance, which sets how many  
consecutive temperature readings (1, 2, 4, or 6) must fall outside of the thermostat limits before the  
thermostat output is triggered. The fault tolerance is set by the F1 and F0 bits in the configuration and at  
power-up the fault tolerance is 1.  
The data format of the TOS and THYST registers is identical to that of the temperature register (see Figure  
3), i.e., a two-byte two’s complement representation of the trip-point temperature in degrees centigrade  
with bits 3 through 0 hardwired to 0. After every temperature conversion, the measured temperature is  
7 of 14  
DS75  
compared to the values in the TOS and THYST registers, and then O.S. is updated based on the result of the  
comparison and the operating mode. The number of TOS and THYST bits used during the thermostat  
comparison is equal to the conversion resolution set by the R1 and R0 bits in the configuration register.  
For example, it the resolution is 9 bits, only the 9 MSbs of TOS and THYST will be used by the thermostat  
comparator.  
The active state of the O.S. output can be changed via the POL bit in the configuration register. The  
power-up default is active low.  
If the user does not wish to use the thermostat capabilities of the DS75, the O.S. output should be left  
floating. Note that if the thermostat is not used, the TOS and THYST registers can be used for general  
storage of system data.  
Comparator Mode — When the thermostat is in comparator mode, O.S. can be programmed to operate  
with any amount of hysteresis. The O.S. output becomes active when the measured temperature exceeds  
the TOS value a consecutive number of times as defined by the F1 and F0 fault tolerance (FT) bits in the  
configuration register. O.S. then stays active until the first time the temperature falls below the value  
stored in THYST. Putting the device into shutdown mode does not clear O.S. in comparator mode.  
Thermostat comparator mode operation with FT = 2 is illustrated in Figure 4.  
Interrupt Mode — In interrupt mode, the O.S. output first becomes active when the measured  
temperature exceeds the TOS value a consecutive number of times equal to the FT value in the  
configuration register. Once activated, O.S. can only be cleared by either putting the DS75 into shutdown  
mode or by reading from any register (temperature, configuration, TOS, or THYST ) on the device. Once  
O.S. has been deactivated, it will only be reactivated when the measured temperature falls below the  
THYST value a consecutive number of times equal to the FT value. Again, O.S can only be cleared by  
putting the device into shutdown mode or reading any register. Thus, this interrupt/clear process is  
cyclical between TOS and THYST events (i.e, TOS, clear, THYST, clear, TOS, clear, THYST, clear, etc.).  
Thermostat interrupt mode operation with FT = 2 is illustrated in Figure 4.  
Figure 4. O.S. OUTPUT OPERATION EXAMPLE  
In this example the DS75  
is configured to have a  
TOS  
fault tolerance of 2.  
Temperature  
THYST  
Inactive  
O.S. Output - Comparator Mode  
Active  
Inactive  
O.S. Output - Interrupt Mode  
Active  
Assumes a read  
has occurred  
Conversions  
8 of 14  
DS75  
CONFIGURATION REGISTER  
The configuration register allows the user to program various DS75 options such as conversion  
resolution, thermostat fault tolerance, thermostat polarity, thermostat operating mode, and shutdown  
mode. The configuration register is arranged as shown in Figure 5 and detailed descriptions of each bit  
are provided in Table 4. The user has read/write access to all bits in the configuration register except the  
MSb, which is a reserved read-only bit. The entire register is volatile, and thus powers–up in its default  
state.  
Figure 5. CONFIGURATION REGISTER  
MSb  
bit 6  
bit 5  
bit 4  
bit 3  
bit 2  
bit 1  
LSb  
0
R1  
R0  
F1  
F0  
POL  
TM  
SD  
Table 4. CONFIGURATION REGISTER BIT DESCRIPTIONS  
BIT NAME  
FUNCTIONAL DESCRIPTION  
Power-up state = 0  
0
Reserved  
The master can write to this bit, but it will always read out as a 0.  
R1  
Power-up state = 0  
Conversion Resolution Bit 1  
R0  
Sets conversion resolution (see Table 5)  
Power-up state = 0  
Conversion Resolution Bit 0  
F1  
Sets conversion resolution (see Table 5)  
Power-up state = 0  
Thermostat Fault Tolerance Bit 1 Sets the thermostat fault tolerance (see Table 6).  
F0  
Power-up state = 0  
Thermostat Fault Tolerance Bit 0 Sets the thermostat fault tolerance (see Table 6).  
POL  
Power-up state = 0  
Thermostat Output (O.S.) Polarity POL = 0 — O.S. is active low.  
POL = 1 — O.S. is active high.  
TM  
Power-up state = 0  
Thermostat Operating Mode  
TM = 0 — Comparator mode.  
TM = 1 — Interrupt mode.  
See the OPERATION–Thermostat section for a detailed description  
of these modes.  
SD  
Power-up state = 0  
Shutdown  
SD = 0 — Active conversion and thermostat operation.  
SD = 1 — Shutdown mode.  
See the SHUTDOWN MODE section for a detailed description of  
this mode.  
Table 5. RESOLUTION CONFIGURATION  
R1  
R0 THERMOMETER MAX CONVERSION  
RESOLUTION  
9–bit  
TIME  
150 ms  
300 ms  
600 ms  
1200 ms  
0
0
1
1
0
1
0
1
10–bit  
11–bit  
12–bit  
9 of 14  
DS75  
Table 6. Fault Tolerance Configuration  
F1  
F0  
CONSECUTIVE OUT-OF-LIMITS  
CONVERSIONS TO TRIGGER O.S.  
0
0
1
1
0
1
0
1
1
2
4
6
REGISTER POINTER  
The four DS75 registers each have a unique two-bit pointer designation, which is defined in Table 7.  
When reading from or writing to the DS75, the user must “point” the DS75 to the register that is to be  
accessed. When reading from the DS75, once the pointer is set, it will remain pointed at the same register  
until it is changed. For example, if the user desires to perform consecutive reads from the temperature  
register, then the pointer only has to be set to the temperature register one time, after which all reads will  
automatically be from the temperature register until the pointer value is changed. On the other hand,  
when writing to the DS75, the pointer value must be refreshed each time a write is performed even if the  
same register is being written to twice in a row.  
At power-up, the default pointer value is the temperature register so the temperature register can be read  
immediately without resetting the pointer.  
Changes to the pointer setting are accomplished as described in the 2-WIRE SERIAL DATA BUS section  
of this datasheet.  
Table 7. POINTER DEFINITION  
REGISTER  
Temperature  
Configuration  
THYST  
P1  
0
0
P0  
0
1
1
0
TOS  
1
1
2-WIRE SERIAL DATA BUS  
The DS75 communicates over a standard bi-directional 2-wire serial data bus that consists of a serial  
clock (SCL) signal and serial data (SDA) signal. The DS75 interfaces to the bus via the SCL input pin  
and open-drain SDA I/O pin. All communication is MSb first.  
The following terminology is used to describe 2-wire communication:  
Master Device: Microprocessor/microcontroller that controls the slave devices on the bus. The master  
device generates the SCL signal and START and STOP conditions.  
Slave: All devices on the bus other than the master. The DS75 always functions as a slave.  
Bus Idle or Not Busy: Both SDA and SCL remain high. SDA is held high by a pullup resistor when the  
bus is idle, and SCL must either be forced high by the master (if the SCL output is push-pull) or pulled  
high by a pullup resistor (if the SCL output is open-drain).  
Transmitter: A device (master or slave) that is sending data on the bus.  
Receiver: A device (master or slave) that is receiving data from the bus.  
10 of 14  
DS75  
START Condition: Signal generated by the master to indicate the beginning of a data transfer on the  
bus. The master generates a START condition by pulling SDA from high to low while SCL is high (see  
Figure 6). A “repeated” START is sometimes used at the end of a data transfer (instead of a STOP) to  
indicate that the master will perform another operation.  
STOP Condition: Signal generated by the master to indicate the end of a data transfer on the bus. The  
master generates a STOP condition by transitioning SDA from low to high while SCL is high (see Figure  
6). After the STOP is issued, the master releases the bus to its idle state.  
Acknowledge (ACK): When a device (either master or slave) is acting as a receiver, it must generate an  
acknowledge (ACK) on the SDA line after receiving every byte of data. The receiving device performs an  
ACK by pulling the SDA line low for an entire SCL period (see Figure 6). During the ACK clock cycle,  
the transmitting device must release SDA. A variation on the ACK signal is the “not acknowledge”  
(NACK). When the master device is acting as a receiver, it uses a NACK instead of an ACK after the last  
data byte to indicate that it is finished receiving data. The master indicates a NACK by leaving the SDA  
line high during the ACK clock cycle.  
Slave Address: Every slave device on the bus has a unique 7-bit address that allows the master to access  
that device. The DS75’s 7-bit bus address is 1 0 0 1 A2 A1 A0, where A2, A1 and A0 are user-selectable via  
the corresponding input pins. The three address pins allow up to eight DS75s to be multi-dropped on the  
same bus.  
Address Byte: The control byte is transmitted by the master and consists of the 7-bit slave address plus a  
read/write (R/¯W¯) bit (see Figure 7). If the master is going to read data from the slave device then R/¯W¯ =  
1, and if the master is going to write data to the slave device then R/¯W¯ = 0.  
Pointer Byte: The pointer byte is used by the master to tell the DS75 which register is going to be  
accessed during communication. The six LSbs of the pointer byte (see Figure 8) are always 0 and the two  
LSbs correspond to the desired register as shown in Table 7.  
Figure 6. START, STOP, AND ACK SIGNALS  
SDA  
SCL  
STOP  
Condition  
START  
Condition  
ACK (or NACK)  
From Receiver  
Figure 7. ADDRESS BYTE  
bit 7  
bit 6  
bit 5  
bit 4  
bit 3  
bit 2  
bit 1  
bit 0  
1
0
0
1
A2  
A1  
A0  
R/¯W¯  
Figure 8. POINTER BYTE  
bit 7  
bit 6  
bit 5  
bit 4  
bit 3  
bit 2  
bit 1  
bit 0  
11 of 14  
DS75  
0
0
0
0
0
0
P1  
P0  
GENERAL 2-WIRE INFORMATION  
ƒ All data is transmitted MSb first over the 2-wire bus.  
ƒ One bit of data is transmitted on the 2-wire bus each SCL period.  
ƒ A pullup resistor is required on the SDA line and, when the bus is idle, both SDA and SCL must remain  
in a logic-high state.  
ƒ All bus communication must be initiated with a START condition and terminated with a STOP  
condition. During a START or STOP is the only time SDA is allowed to change states while SCL is  
high. At all other times, changes on the SDA line can only occur when SCL is low: SDA must remain  
stable when SCL is high.  
ƒ After every 8-bit (1-byte) transfer, the receiving device must answer with an ACK (or NACK), which  
takes one SCL period. Therefore, nine clocks are required for every one-byte data transfer.  
Writing to the DS75To write to the DS75, the master must generate a START followed by an  
address byte containing the DS75 bus address. The value of the R/W bit must be a 0, which indicates that  
a write is about to take place. The DS75 will respond with an ACK after receiving the address byte. This  
must be followed by a pointer byte from the master, which tells the DS75 which register is being written  
to. The DS75 will again respond with an ACK after receiving the pointer byte. Following this ACK the  
master device must immediately begin transmitting data to the DS75. When writing to the configuration  
register, the master must send one byte of data (see Figure 9a), and when writing to the TOS or THYST  
registers the master must send two bytes of data (see Figure 9b). After receiving each data byte, the DS75  
will respond with an ACK, and the transaction is finished with a STOP from the master.  
Reading from the DS75When reading from the DS75, if the pointer was already pointed to the  
desired register during a previous transaction, the read can be performed immediately without changing  
the pointer setting. In this case the master sends a START followed by an address byte containing the  
DS75 bus address. The R/W bit must be a 1, which tells the DS75 that a read is being performed. After  
the DS75 sends an ACK in response to the address byte, the DS75 will begin transmitting the requested  
data on the next clock cycle. When reading from the configuration register, the DS75 will transmit one  
byte of data, after which the master must respond with a NACK followed by a STOP (see Figure 9c). For  
two-byte reads (i.e., from the Temperature, TOS or THYST register), the DS75 will transmit two bytes of  
data, and the master must respond to the first data byte with an ACK and to the second byte with a NACK  
followed by a STOP (see Figure 9d). If only the most significant byte of data is needed, the master can  
issue a NACK followed by a STOP after reading the first data byte in which case the transaction will be  
the same as for a read from the configuration register.  
If the pointer is not already pointing to the desired register, the pointer must first be updated as shown in  
Figure 9e, which shows a pointer update followed by a single-byte read. The value of the R/W bit in the  
initial address byte is a 0 (“write”) since the master is going to write a pointer byte to the DS75. After the  
DS75 to the address byte with an ACK, the master sends a pointer byte that corresponds to the desired  
register. The master must then perform a repeated start followed by a standard one or two byte read  
sequence (with R/W =1) as described in the previous paragraph.  
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DS75  
Figure 9. 2-WIRE INTERFACE TIMING  
13 of 14  
DS75  
REVISION HISTORY  
REVISION  
PAGES  
CHANGED  
DESCRIPTION  
DATE  
Deleted all references to flip-chip package.  
Added registered trademark symbol to µMAX.  
022108  
1, 2  
14 of 14  

DS75U CAD模型

  • 引脚图

  • 封装焊盘图

  • DS75U 替代型号

    型号 制造商 描述 替代类型 文档
    DS75U+ MAXIM Digital Thermometer and Thermostat 类似代替

    DS75U 相关器件

    型号 制造商 描述 价格 文档
    DS75U+ MAXIM Digital Thermometer and Thermostat 获取价格
    DS75U+T&AMP;R MAXIM Serial Switch/Digital Sensor, 12 Bit(s), 2Cel, CMOS, Square, 8 Pin, Surface Mount, LEAD FREE, MICRO MAX PACKAGE-8 获取价格
    DS75U+T&R MAXIM Digital Thermometer and Thermostat 获取价格
    DS75U-C12+T&AMP;R MAXIM Serial Switch/Digital Sensor, 12 Bit(s), 2Cel, Square, Surface Mount, LEAD FREE, MICRO MAX PACKAGE-8 获取价格
    DS75U/T&AMP;R MAXIM Serial Switch/Digital Sensor, 12 Bit(s), 2Cel, CMOS, Square, 8 Pin, Surface Mount, MICRO MAX PACKAGE-8 获取价格
    DS75X/T&AMP;R MAXIM Serial Switch/Digital Sensor, 12 Bit(s), 2Cel, CMOS, Square, Surface Mount, 1.50 X 1.30 MM, FLIP CHIP-8 获取价格
    DS760SL-3 ARTESYN 760 Watts Bulk Front End 获取价格
    DS760SL-3-001 ARTESYN 760 Watts Bulk Front End 获取价格
    DS760SL-3-002 ARTESYN 760 Watts Bulk Front End 获取价格
    DS760SL-3-003 ARTESYN 760 Watts Bulk Front End 获取价格

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