DS28E15_V01 [MAXIM]

DeepCover Secure Authenticator with 1-Wire SHA-256 and 512-Bit User EEPROM;
DS28E15_V01
型号: DS28E15_V01
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

DeepCover Secure Authenticator with 1-Wire SHA-256 and 512-Bit User EEPROM

可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器
文件: 总5页 (文件大小:339K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ABRIDGED DATA SHEET  
DS28E15  
DeepCover Secure Authenticator with  
1-Wire SHA-256 and 512-Bit User EEPROM  
General Description  
DeepCover™ embedded security solutions cloak sensi-  
tive data under multiple layers of advanced physical  
security to provide the most secure key storage possible.  
Benefits and Features  
512-Bit EEPROM with SHA-256 Authentication for  
Reads and Writes  
• Symmetric-Key-Based Bidirectional Secure  
Authentication Model Based on SHA-256  
• Strong Authentication with a High-Bit-Count User  
Programmable Secret and Input Challenge  
• 512 Bits of User EEPROM Partitioned Into Two  
Pages of 256 Bits  
• User-Programmable and Irreversible EEPROM  
Protection Modes Including Authentication, Write  
and Read Protect, and OTP/EPROM Emulation  
Unique Factory-Programmed, 64-Bit Identification  
Number  
The DeepCover Secure Authenticator (DS28E15) com-  
bines crypto-strong bidirectional secure challenge-and-  
response authentication functionality with an imple-  
mentation based on the FIPS 180-3-specified Secure  
Hash Algorithm (SHA-256). A 512-bit user-program-  
mable EEPROM array provides nonvolatile storage of  
application data. Additional protected memory holds a  
read-protected secret for SHA-256 operations and set-  
tings for memory protection control. Each device has  
its own guaranteed unique 64-bit ROM identification  
number (ROM ID) that is factory programmed into the  
chip. This unique ROM ID is used as a fundamental input  
parameter for cryptographic operations and also serves  
as an electronic serial number within the application. A  
bidirectional security model enables two-way authen-  
tication between a host system and slave-embedded  
DS28E15. Slave-to-host authentication is used by a host  
system to securely validate that an attached or embed-  
ded DS28E15 is authentic. Host-to-slave authentication is  
used to protect DS28E15 user memory from being modi-  
fied by a unauthentic host. The DS28E15 communicates  
Minimalist 1-Wire Interface Lowers Cost and  
Interface Complexity  
• Reduces Control, Address, Data, Power, and  
Programming Signals to a Single Data Pin  
• ±8kV HBM ESD Protection (typ)  
• 2-Pin SFN, 6-Pin TDFN-EP, and 6-Pin TSOC  
Packages  
• Operating Range: 3.3V ±10%, -40°C to +85°C  
Typical Application Circuit  
M
R = 1.1k  
MAXIMUM I C BUS CAPACITANCE 320pF  
P
over the single-contact 1-Wire bus at overdrive speed.  
2
The communication follows the 1-Wire protocol with the  
ROM ID acting as node address in the case of a multi-  
device 1-Wire network.  
3.3V  
R
P
V
CC  
Applications  
SDA  
SCL  
2
(I C PORT)  
Authentication of Consumables  
DS2465  
Secure Feature Control  
µC  
1-Wire LINE  
Ordering Information appears at end of data sheet.  
SLPZ  
IO  
DS28E15  
DeepCover is a trademark and 1-Wire is a registered trademark of Maxim Integrated Products, Inc.  
219-0018; Rev 3; 3/15  
ABRIDGED DATA SHEET  
DS28E15  
DeepCover Secure Authenticator with  
1-Wire SHA-256 and 512-Bit User EEPROM  
Absolute Maximum Ratings  
IO Voltage Range to GND....................................-0.5V to +4.0V  
IO Sink Current...................................................................20mA  
Operating Temperature Range.......................... -40NC to +85NC  
Junction Temperature .....................................................+150NC  
Storage Temperature Range............................ -55NC to +125NC  
Lead Temperature (TDFN, TSOC only; soldering, 10s)..+300NC  
Soldering Temperature (TDFN, TSOC only; reflow)........+260NC  
Note: The SFN package is qualified for electro-mechanical contact applications only, not for soldering. For more information, refer  
to Application Note 4132: Attachment Methods for the Electro-Mechanical SFN Package.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-  
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
Electrical Characteristics  
(T = -40NC to +85NC, unless otherwise noted.) (Note 1)  
A
PARAMETER  
IO PIN: GENERAL DATA  
1-Wire Pullup Voltage  
1-Wire Pullup Resistance  
Input Capacitance  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
R
(Note 2)  
= 3.3V Q10% (Note 3)  
2.97  
300  
3.63  
V
PUP  
V
1500  
I
PUP  
PUP  
C
(Notes 4, 5)  
IO pin at V  
1500  
5
pF  
FA  
IO  
Input Load Current  
I
19.5  
0.3  
L
PUP  
0.65 x  
High-to-Low Switching Threshold  
Input Low Voltage  
V
(Notes 6, 7)  
(Notes 2, 8)  
(Notes 6, 9)  
(Notes 6, 10)  
V
V
V
TL  
V
PUP  
V
IL  
0.75 x  
Low-to-High Switching Threshold  
V
TH  
V
PUP  
Switching Hysteresis  
Output Low Voltage  
Recovery Time  
V
V
0.3  
V
V
HY  
I
= 4mA (Note 11)  
0.4  
OL  
OL  
t
R
= 1500I (Notes 2, 12)  
5
Fs  
Fs  
REC  
PUP  
Time Slot Duration  
t
(Notes 2, 13)  
13  
SLOT  
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE  
Reset Low Time  
t
(Note 2)  
48  
48  
8
80  
10  
Fs  
Fs  
Fs  
RSTL  
Reset High Time  
t
(Note 14)  
(Notes 2, 15)  
RSTH  
Presence-Detect Sample Time  
IO PIN: 1-Wire WRITE  
Write-Zero Low Time  
Write-One Low Time  
IO PIN: 1-Wire READ  
t
MSP  
t
t
(Notes 2, 16)  
(Notes 2, 16)  
8
1
16  
2
Fs  
Fs  
W0L  
W1L  
Read Low Time  
t
(Notes 2, 17)  
(Notes 2, 17)  
1
Fs  
Fs  
2 - d  
RL  
Read Sample Time  
t
2
t
+ d  
MSR  
RL  
Maxim Integrated  
2  
www.maximintegrated.com  
ABRIDGED DATA SHEET  
DS28E15  
DeepCover Secure Authenticator with  
1-Wire SHA-256 and 512-Bit User EEPROM  
Electrical Characteristics (continued)  
(T = -40NC to +85NC, unless otherwise noted.) (Note 1)  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
EEPROM  
Programming Current  
I
V
= 3.63V (Notes 5, 18)  
1
mA  
ms  
PROG  
PUP  
Programming Time for a 32-Bit  
Segment or Page Protection  
t
PRD  
Refer to the full data sheet.  
Programming Time for the Secret  
Write/Erase Cycling Endurance  
Data Retention  
t
ms  
PRS  
N
T
T
= +85NC (Notes 21, 22)  
100k  
10  
CY  
A
A
t
= +85NC (Notes 23, 24, 25)  
Years  
DR  
SHA-256 ENGINE  
Computation Current  
Computation Time  
I
t
mA  
ms  
CSHA  
CSHA  
Refer to the full data sheet.  
Note 1: Limits are 100% production tested at T = +25°C and/or T = +85°C. Limits over the operating temperature range and  
A
A
relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.  
Note 2: System requirement.  
Note 3: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery  
times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times.  
Note 4: Typical value represents the internal parasite capacitance when V  
is first applied. Once the parasite capacitance is  
PUP  
charged, it does not affect normal communication.  
Note 5: Guaranteed by design and/or characterization only. Not production tested.  
Note 6: , V , and V are a function of the internal supply voltage, which is a function of V  
V
, R  
, 1-Wire timing, and  
TL TH  
HY  
PUP PUP  
capacitive loading on IO. Lower V  
, higher R  
, shorter t  
, and heavier capacitive loading all lead to lower values  
PUP  
PUP  
REC  
of V , V , and V  
.
TL TH  
HY  
Note 7: Voltage below which, during a falling edge on IO, a logic 0 is detected.  
Note 8: The voltage on IO must be less than or equal to V at all times the master is driving IO to a logic 0 level.  
IL(MAX)  
Note 9: Voltage above which, during a rising edge on IO, a logic 1 is detected.  
Note 10: After V is crossed during a rising edge on IO, the voltage on IO must drop by at least V to be detected as logic 0.  
TH  
HY  
Note 11: The I-V characteristic is linear for voltages less than 1V.  
Note 12: Applies to a single device attached to a 1-Wire line.  
Note 13: Defines maximum possible bit rate. Equal to 1/(t  
+ t  
).  
W0L(MIN)  
REC(MIN)  
Note 14: An additional reset or communication sequence cannot begin until the reset high time has expired.  
Note 15: Interval after t during which a bus master can read a logic 0 on IO if there is a DS28E15 present. The power-up pres-  
RSTL  
ence detect pulse could be outside this interval but will be complete within 2ms after power-up.  
Note 16:ꢀε in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V to V . The actual  
IL  
TH  
maximum duration for the master to pull the line low is t  
+ t - ε and t  
+ t - ε, respectively.  
W1L(MAX)  
F
W0L(MAX) F  
Note 17: d in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V to the input-high  
IL  
threshold of the bus master. The actual maximum duration for the master to pull the line low is t  
+ t .  
RL(MAX)  
F
Note 18: Current drawn from IO during the EEPROM programming interval or SHA-256 computation. The pullup circuit on IO during  
the programming interval and SHA-256 computation should be such that the voltage at IO is greater than or equal to 2.0V.  
Note 19: Refer to the full data sheet.  
Note 20: Refer to the full data sheet.  
Note 21: Write-cycle endurance is tested in compliance with JESD47G.  
Note 22: Not 100% production tested; guaranteed by reliability monitor sampling.  
Maxim Integrated  
3  
www.maximintegrated.com  
ABRIDGED DATA SHEET  
DS28E15  
DeepCover Secure Authenticator with  
1-Wire SHA-256 and 512-Bit User EEPROM  
Electrical Characteristics (continued)  
(T = -40NC to +85NC, unless otherwise noted.) (Note 1)  
A
Note 23: Data retention is tested in compliance with JESD47G.  
Note 24: Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the-  
data sheet limit at operating temperature range is established by reliability testing.  
Note 25: EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-term storage at elevated tem-  
peratures is not recommended.  
Note 26: Refer to the full data sheet.  
Pin Configurations  
TOP VIEW  
TOP VIEW  
BOTTOM VIEW  
DS28E15  
+
+
N.C.  
IO  
1
2
3
6
5
4
N.C.  
N.C.  
N.C.  
GND  
2
1
GND  
IO  
1
2
3
6
5
4
N.C.  
N.C.  
N.C.  
DS28E15  
DS28E15  
IO  
N.C.  
GND  
*EP  
TSOC  
SFN  
(3.5mm  
×
6.5mm  
×
0.75mm)  
TDFN-EP  
(3mm × 3mm)  
NOTE: THE SFN PACKAGE IS QUALIFIED FOR ELECTRO-  
MECHANICAL CONTACT APPLICATIONS ONLY, NOT FOR  
SOLDERING. FOR MORE INFORMATION, REFER TO  
APPLICATION NOTE 4132: ATTACHMENT METHODS FOR  
THE ELECTRO-MECHANICAL SFN PACKAGE.  
*EXPOSED PAD  
Pin Descriptions  
PIN  
NAME  
FUNCTION  
SFN  
1
TDFN-EP  
TSOC  
1, 4, 5, 6  
3– 6  
2
N.C.  
IO  
Not Connected  
2
3
1-Wire Bus Interface. Open-drain signal that requires an external pullup resistor.  
Ground Reference  
2
1
GND  
Exposed Pad (TDFN Only). Solder evenly to the board’s ground plane for proper  
operation. Refer to Application Note 3273: Exposed Pads: A Brief Introduction for  
additional information.  
EP  
Maxim Integrated  
4  
www.maximintegrated.com  
DS28E15  
DeepCover Secure Authenticator with  
1-Wire SHA-256 and 512-Bit User EEPROM  
Note to readers: This document is an abridged version of the full data sheet. Additional device infor-  
mation is available only in the full version of the data sheet. To request the full data sheet, go to  
www.maximintegrated.com/DS28E15 and click on Request Full Data Sheet.  
Ordering Information  
Package Information  
For the latest package outline information and land patterns (foot-  
prints), go to www.maximintegrated.com/packages. Note that a  
“+”, “#”, or “-” in the package code indicates RoHS status only.  
Package drawings may show a different suffix character, but the  
drawing pertains to the package regardless of RoHS status.  
PART  
DS28E15G+  
DS28E15G+T  
TEMP RANGE  
PIN-PACKAGE  
2 SFN  
-40NC to +85NC  
-40NC to +85NC  
2 SFN (2.5k pcs)  
6 TDFN-EP*  
(2.5k pcs)  
DS28E15Q+T  
-40NC to +85NC  
PACKAGE  
TYPE  
PACKAGE  
CODE  
OUTLINE  
NO.  
LAND  
PATTERN NO.  
DS28E15P+  
-40NC to +85NC  
-40NC to +85NC  
6 TSOC  
DS28E15P+T  
6 TSOC (4k pcs)  
2 SFN  
6 TDFN-EP  
6 TSOC  
T23A6N+1  
T633+2  
D6+1  
21-0575  
21-0137  
21-0382  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
T = Tape and reel.  
*EP = Exposed pad.  
90-0058  
90-0321  
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.  
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses  
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)  
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.  
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.  
2015 Maxim Integrated Products, Inc.  
42  

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