DS1225AB-70 [MAXIM]
Non-Volatile SRAM Module, 8KX8, 70ns, CMOS, PDMA28, 0.720 INCH, DIP-28;
| 型号： | DS1225AB-70 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Non-Volatile SRAM Module, 8KX8, 70ns, CMOS, PDMA28, 0.720 INCH, DIP-28 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总9页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5625; Rev 11/10
DS1225AB/AD
64k Nonvolatile SRAM
www.maxim-ic.com
FEATURES
PIN ASSIGNMENT
. 10 years minimum data retention in the
absence of external power
VCC
WE
NC
1
28
27
NC
A12
A7
A6
A5
A4
2
3
4
. Data is automatically protected during power
loss
. Directly replaces 8k x 8 volatile static RAM
or EEPROM
26
25
A8
A9
5
6
24
23
A11
OE
7
8
22
21
A3
A2
. Unlimited write cycles
A10
CE
DQ7
DQ6
. Low-power CMOS
A1
A0
9
10
20
19
. JEDEC standard 28-pin DIP package
. Read and write access times of 70 ns
. Lithium energy source is electrically
disconnected to retain freshness until power
is applied for the first time
. Full ±10% VCC operating range (DS1225AD)
. Optional ±5% VCC operating range
(DS1225AB)
DQ0
11
12
18
17
DQ1
DQ2
GND
DQ5
DQ4
DQ3
13
14
16
15
28-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
PIN DESCRIPTION
. Optional industrial temperature range of
-40°C to +85°C, designated IND
A0-A12
DQ0-DQ7
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
CE
WE
- Output Enable
- Power (+5V)
- Ground
OE
VCC
GND
NC
- No Connect
DESCRIPTION
The DS1225AB and DS1225AD are 65,536-bit, fully static, nonvolatile SRAMs organized as 8192 words
by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which
constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAMs can be used in place of existing 8k x 8 SRAMs directly conforming to
the popular bytewide 28-pin DIP standard. The devices also match the pinout of the 2764 EPROM and
the 2864 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
1 of 10
DS1225AB/AD
READ MODE
The DS1225AB and DS1225AD execute a read cycle whenever
(Write Enable) is inactive (high) and
WE
(Chip Enable) and
(Output Enable) are active (low). The unique address specified by the 13
OE
CE
address inputs (A0 -A12) defines which of the 8192 bytes of data is to be accessed. Valid data will be
available to the eight data output drivers within tACC (Access Time) after the last address input signal is
stable, providing that
and
access times are also satisfied. If
and access times are not
OE
CE
satisfied, then data access must be measured from the later-occurring signal and the limiting parameter is
either tCO for or t for rather than address access.
OE
CE
CE
OE
OE
WRITE MODE
The DS1225AB and DS1225AD execute a write cycle whenever the
and
or
signals are active
will determine the
WE
CE
CE
(low) after address inputs are stable. The later-occurring falling edge of
WE
start of the write cycle. The write cycle is terminated by the earlier rising edge of
or
. All address
WE
CE
inputs must be kept valid throughout the write cycle.
must return to the high state for a minimum
WE
recovery time (tWR ) before another cycle can be initiated. The
control signal should be kept inactive
OE
(high) during write cycles to avoid bus contention. However, if the output drivers are enabled (
and
CE
active) then
will disable the outputs in tODW from its falling edge.
WE
OE
DATA RETENTION MODE
The DS1225AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5 volts. The DS1225AD provides full-functional capability for VCC greater than 4.5 volts and write
protects by 4.25 volts. Data is maintained in the absence of VCC without any additional support circuitry.
The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high-
impedance. As VCC falls below approximately 3.0 volts, the power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 3.0 volts,
the power switching circuit connects external VCC to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1225AB and 4.5 volts for the
DS1225AD.
FRESHNESS SEAL
Each DS1225 is shipped from Maxim with the lithium energy source disconnected, guaranteeing full
energy capacity. When VCC is first applied at a level of greater than VTP , the lithium energy source is
enabled for battery backup operation.
2 of 9
DS1225AB/AD
ABSOLUTE MAXIMUM RATINGS
Voltage on Any Pin Relative to Ground
Operating Temperature
-0.3V to +6.0V
Commercial:
Industrial:
Storage Temperature
Lead Temperature (soldering, 10s)
Note: EDIP is wave or hand soldered only.
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
+260°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect
reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA: See Note 10)
PARAMETER
SYMBOL MIN
TYP
5.0
MAX
5.25
5.5
VCC
+0.8
UNITS NOTES
DS1225AB Power Supply Voltage
DS1225AD Power Supply Voltage
Logic 1
VCC
VCC
VIH
VIL
4.75
4.50
2.2
V
V
V
V
5.0
Logic 0
0.0
(TA: See Note 10)
(VCC =5V ± 5% for DS1225AB)
(VCC =5V ± 10% for DS1225AD)
DC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL MIN
TYP
MAX
UNITS NOTES
Input Leakage Current
IIL
-1.0
+1.0
µA
I/O Leakage Current
IIO
-1.0
+1.0
µA
> V < V
CE
IH
CC
Output Current @ 2.4V
Output Current @ 0.4V
IOH
IOL
-1.0
2.0
mA
mA
ICCS1
ICCS2
5.0
3.0
10.0
5.0
mA
mA
Standby Current
Standby Current
=2.2V
CE
CE
=VCC -0.5V
Operating Current
(Commercial)
Operating Current
(Industrial)
Write Protection Voltage
(DS1225AB)
Write Protection Voltage
(DS1225AD)
ICC01
ICC01
VTP
75
85
mA
mA
V
4.50
4.25
4.62
4.37
4.75
4.5
VTP
V
CAPACITANCE
PARAMETER
Input Capacitance
(TA = +25°C)
SYMBOL MIN
TYP
5
5
MAX
10
10
UNITS NOTES
CIN
CI/O
pF
pF
Input/Output Capacitance
3 of 9
DS1225AB/AD
(TA: See Note 10)
(VCC =5V ± 5% for DS1225AB)
(VCC =5V ± 10% for DS1225AD)
AC ELECTRICAL CHARACTERISTICS
DS1225AB-70
DS1225AD-70
PARAMETER
SYMBOL
UNITS
NOTES
MIN
MAX
Read Cycle Time
Access Time
tRC
tACC
tOE
70
ns
ns
ns
70
35
to Output Valid
to Output Valid
OE
CE
OE
70
tCO
tCOE
tOD
ns
ns
ns
5
5
5
5
or
to Output Active
CE
Output High Z from Deselection
Output Hold from Address
Change
25
tOH
ns
Write Cycle Time
Write Pulse Width
Address Setup Time
tWC
tWP
tAW
tWR1
tWR2
70
55
0
0
10
ns
ns
ns
ns
ns
3
12
13
Write Recovery Time
25
tODW
tOEW
tDS
tDH1
tDH2
ns
ns
ns
ns
ns
5
5
4
12
13
Output High Z from
WE
WE
5
Output Active from
Data Setup Time
30
0
10
Data Hold Time
4 of 9
DS1225AB/AD
READ CYCLE
SEE NOTE 1
WRITE CYCLE 1
SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
5 of 9
DS1225AB/AD
POWER-DOWN/POWER-UP CONDITION
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
(TA : See Note 10)
PARAMETER
SYMBOL MIN
tPD
tF
TYP
MAX
UNITS NOTES
1.5
11
µs
µs
µs
ms
ms
VCC Fail Detect to
and
Inactive
WE
CE
VCC slew from VTP to 0V
VCC slew from 0V to VTP
300
300
tR
tPU
tREC
2
VCC Valid to
and
Inactive
WE
CE
VCC Valid to End of Write Protection
125
(TA = +25°C)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
tDR 10 years
Expected Data Retention Time
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
6 of 9
DS1225AB/AD
NOTES:
1.
is high for a read cycle.
WE
2.
= V or VIL. If
= VIH during write cycle, the output buffers remain in a high-impedance
OE
OE
IH
state.
3. tWP is specified as the logical AND of
and
. t is measured from the latter of
or
CE WE
CE
WE
WP
going low to the earlier of
or
WE
going high.
CE
4. tDS are measured from the earlier of
or
going high.
WE
CE
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the
low transition occurs simultaneously with or later than the
low transition, the output
high transition, the output
CE
buffers remain in a high-impedance state during this period.
WE
WE
7. If the
high transition occurs prior to or simultaneously with the
CE
buffers remain in a high-impedance state during this period.
8. If
is low or the
low transition occurs prior to or simultaneously with the
low transition,
CE
WE
WE
the output buffers remain in a high-impedance state during this period.
9. Each DS1225AB and each DS1225AD has a built-in switch that disconnects the lithium source until
VCC is first applied by the user. The expected tDR is defined as accumulative time in the absence of
VCC starting from the time power is first applied by the user. This parameter is guaranteed by design
and is not 100% tested.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
11. In a power down condition the voltage on any pin may not exceed the voltage on VCC.
12. tWR1 , tDH1 are measured from
13. tWR2 , tDH2 are measured from
going high.
going high.
WE
CE
14. DS1225 modules are recognized by Underwriters Laboratories (UL) under file E99151.
DC TEST CONDITIONS
Outputs Open
Cycle = 200ns for Operating Current
All Voltages Are Referenced to Ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
7 of 9
DS1225AB/AD
ORDERING INFORMATION
SUPPLY
TOLERANCE
5V ± 5%
SPEED GRADE
PART
TEMP RANGE
PIN-PACKAGE
(ns)
70
70
70
70
DS1225AB-70+
0°C to +70°C
28 720 EDIP
28 720 EDIP
28 720 EDIP
28 720 EDIP
DS1225AB-70IND+ -40°C to +85°C
DS1225AD-70+ 0°C to +70°C
DS1225AD-70IND+ -40°C to +85°C
+Denotes a lead(Pb)-free/RoHS-compliant package.
5V ± 5%
5V ± 10%
5V ± 10%
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix
character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
21-0245
LAND PATTERN NO.
—
28 EDIP
MDT28+2
8 of 9
DS1225AB/AD
REVISION HISTORY
REVISION
PAGES
CHANGED
DESCRIPTION
DATE
Added package information table; removed the DIP module package
drawing and dimension table
121907
9
Updated the storage information, soldering temperature, and lead
temperature information in the Absolute Maximum Ratings section;
removed the -85, -150, and -200 MIN/MAX information from the
AC Electrical Characteristics table; updated the Ordering
Information table (removed -85, -150, and -200 parts and leaded -70
parts)
11/10
1, 3, 4, 8
9 of 9
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