DS1089L_V01 [MAXIM]
3.3V Center Spread-Spectrum EconOscillatorâ¢;
| 型号： | DS1089L_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 3.3V Center Spread-Spectrum EconOscillator⢠|
| 文件： | 总13页 (文件大小：1085K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS1089L
3.3V Center Spread-Spectrum EconOscillator™
General Description
Features
The DS1089L is a clock generator that produces a
spread-spectrum (dithered) square-wave output of fre-
quencies from 130kHz to 66.6MHz. The DS1089L is
shipped from the factory programmed at a specific
frequency. The DS1089L is pin-for-pin compatible with
the DS1087L, however, the DS1089L dithers at equal
percentages above and below the center frequency. The
user still has access to the internal frequency divider,
selectable ±1%, ±2%, ±4%, or ±8% dithered output, dith-
ering rate, and programmable output power-down/disable
● Factory-Programmed Square-Wave Generator from
33.3MHz to 66.6MHz
● Center Frequency Remains Constant Independent of
Dither Percentage
● No External Timing Components Required
● EMI Reduction
● Variable Dither Frequency
● User Programmable Down to 130kHz with Divider
(Dependent on Master Oscillator Frequency)
2
mode through an I C-compatible programming interface.
● ±1%, ±2%, ±4%, or ±8% Selectable Dithered Output
● Glitchless Output-Enable Control
All the device settings are stored in nonvolatile (NV)
EEPROM allowing it to operate in stand-alone applica-
tions. The DS1089L also has power-down and output-en-
able control pins for power-sensitive applications.
2
● I C-Compatible Serial Interface
● Nonvolatile Settings
Applications
● Power-Down Mode
● Printers
● Copiers
● Programmable Output Power-Down/Disable Mode
● Computer Peripherals
● POS Terminals
● Cable Modems
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
DS1089LU-yxx*
-40°C to +85°C
8 µSOP (118 mil)
Pin Configuration and Typical Operating Circuits appear at
end of data sheet.
*See Standard Frequency Options Table.
Standard Frequency Options
PART
DS1089LU-21G
DS1089LU-4CL
DS1089LU-22F
DS1089LU-23C
DS1089LU-450
DS1089LU-866
DS1089LU-yxx
FREQUENCY (MHz)
SPREAD (±%)
DITHER FREQUENCY
14.7456
1
f
f
f
f
f
f
/4096
MOSC
MOSC
MOSC
MOSC
MOSC
MOSC
18.432
2
/4096
/2048
/4096
/4096
/4096
24.576
1
33.3
1
50.0
2
66.6
4
Fixed up to 66.6
1, 2, 4, or 8
f
/2048 or 4096 or 8192
MOSC
Add “/T” for Tape and Reel.
Custom frequencies available, contact factory.
EconOscillator is a trademark of Maxim Integrated Products, Inc.
19-7501; Rev 3; 2/15
DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Absolute Maximum Ratings
Voltage on VCC Relative to Ground ....................-0.5V to +6.0V
Voltage on SPRD, PDN, OE, SDA,
Programming Temperature Range.........................0°C to +70°C
Storage Temperature Range............................ -55°C to +125°C
Soldering Temperature.................See IPC/JEDEC J-STD-020A
SCL Relative to Ground* ...................... -0.5V to (V
+ 0.5V)
CC
Operating Temperature Range........................... -40°C to +85°C
*This voltage must not exceed 6.0V.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Recommended Operating Conditions
(T = -40°C to +85°C.)
A
PARAMETER
Supply Voltage
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
V
(Note 1)
2.7
3.3
3.6
V
CC
High-Level Input Voltage
V
+
CC
0.3
V
0.7 x V
V
V
IH
CC
(SDA, SCL, SPRD, PDN, OE)
Low-Level Input Voltage
0.3 x
V
V
-0.3
IL
(SDA, SCL, SPRD, PDN, OE)
CC
DC Electrical Characteristics
(V
= +2.7V to +3.6V, T = -40°C to +85°C.)
CC
A
PARAMETER
SYMBOL
CONDITION
= min
CC
MIN
TYP
MAX
UNITS
High-Level Output Voltage (OUT)
Low-Level Output Voltage (OUT)
V
I
I
= -4mA, V
= 4mA
2.4
V
V
OH
OH
OL
V
0.4
0.4
0.6
1
OL
V
V
3mA sink current
6mA sink current
OL1
Low-Level Output Voltage (SDA)
V
OL2
High-Level Input Current
Low-Level Input Current
Supply Current (Active)
I
V
V
= V
CC
µA
µA
mA
µA
IH
IH
I
= 0V
-1
IL
IL
I
C = 15pF, f
= f
MOSCmax
12
10
CC
L
OUT
Standby Current (Power-Down)
I
Power-down mode
CCQ
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Master Oscillator Characteristics
(V
= +2.7V to +3.6V, T = -40°C to +85°C.)
CC
A
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Internal Master Oscillator
Frequency
f
33.3
66.6
MHz
MOSC
∆f
V
T
= 3.3V,
MOSC
Master Oscillator Frequency
Tolerance
CC
-0. 5
+0. 5
%
%
%
f
= +25°C (Notes 2, 10)
MOSC
A
∆f
Voltage Frequency
Variation
T
= +25°C (Note 3)
T
-0.75
+0.75
A
f
MOSC
= 0°C to +85°C
= -40°C to 0°C
-0.75
-2.00
+0.75
+0.75
∆f
V
f
= 3.3V,
= f
A
A
Temperature Frequency Variation
(Note 4)
CC
f
T
MOSC
OUT
MOSCmax
J3 = J2 = GND
±1
±2
±4
±8
J3 = GND, J2 = V
Dither Frequency Range
(Note 5)
CC
%
J3 = V , J2 = GND
CC
J3 = J2 = V
CC
J1 = GND, J0 = V
f
f
f
/ 2048
CC
MOSC
MOSC
MOSC
Dither Frequency
(Note 5)
f
J1 = V , J0 = GND
/ 4096
/ 8192
Hz
MOD
CC
J1 = J0 = V
CC
AC Electrical Characteristics
(V
= +2.7V to +3.6V, T = -40°C to +85°C.)
CC
A
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Frequency Stable After
PRESCALER Change
1
Period
t
t
+
POR
Power-Up Time
(Note 6)
(Note 6)
40
200
512
µs
STAB
Enable of OUT After Exiting
Power-Down Mode
clock
cycles
t
STAB
OUT Disabled After Entering
Power-Down Mode
t
7
µs
PDN
Load Capacitance
C
15
50
50
pF
%
L
Output Duty Cycle (f
)
OUT
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
2
AC Electrical Characteristics—I c Interface
(V
= +2.7V to +3.6V, T = -40°C to +85°C, unless otherwise noted. Timing referenced to V
and V
.)
CC
A
IL(MAX)
IH(MIN)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL Clock Frequency
Bus Free Time Between Stop and
Start Conditions
f
(Note 7)
0
400
kHz
SCL
t
1.3
µs
µs
BUF
Hold Time (Repeated) Start
Condition
t
0.6
HD:STA
Low Period of SCL
High Period of SCL
Data Hold Time
t
1.3
0.6
µs
µs
µs
ns
µs
ns
ns
µs
LOW
t
HIGH
t
0
0.9
HD:DAT
Data Setup Time
t
100
SU:DAT
Start Setup Time
t
0.6
SU:STA
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Setup Time
t
(Note 8)
(Note 8)
20 + 0.1C
20 + 0.1C
0.6
300
300
R
B
t
F
B
t
SU:STO
SDA and SCL Capacitive
Loading
C
(Note 8)
(Note 9)
400
20
pF
B
EEPROM Write Time
t
10
ms
WR
Nonvolatile Memory Characteristics
(V
= +2.7V to +3.6V.)
CC
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Writes
+70°C
10,000
Note 1: All voltages are referenced to ground.
Note 2: This is the absolute accuracy of the master oscillator frequency at the default settings with spread disabled.
Note 3: This is the change that is observed in master oscillator frequency with changes in voltage at T = +25°C.
A
Note 4: This is the change that is observed in master oscillator frequency with changes in temperature at V
= 3.3V.
CC
Note 5: The dither deviation of the master oscillator frequency is bidirectional and results in an output frequency centered at the
undithered frequency.
Note 6: This indicates the time elapsed between power-up and the output becoming active. An on-chip delay is intentionally intro-
duced to allow the oscillator to stabilize. t
master oscillator frequency.
Note 7: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I C standard-mode timing.
is equivalent to 512 master clock cycles and will depend on the programmed
STAB
2
Note 8: C —total capacitance of one bus line in picofarads.
B
Note 9: EEPROM write time applies to all the EEPROM memory and SRAM shadowed EEPROM memory when WC = 0.
The EEPROM write time begins after a stop condition occurs.
Note 10:Typical frequency shift due to aging is ±0.25%. Aging stressing includes Level 1 moisture reflow conditioning (24hr) +125°C
bake, 168hr +85°C/85°RH moisture soak, and three solder reflow passes +269 +0/-5°C peak) followed by 408hr max V
CC
biased 125°C HTOL, 500 temperature cycles at -55°C to +125°C, 96hr +130°C/85%RH/3,6V HAST and 168hr +121°C/2
ATM Steam/Unbiased Autoclave.
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Typical Operating Characteristics
(V
= 3.3V, T = +25°C, unless otherwise noted.)
CC
A
ACTIVE SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. PRESCALER
ACTIVE SUPPLY CURRENT
vs. TEMPERATURE
10
9
8
7
6
5
4
3
2
1
0
10
8
10
T
f
= +25ºC,
A
= 50MHz,
OUTPUT UNLOADED
T
= +25ºC,
OUTPUT
T
= +25ºC,
A
A
66MHz
OUTPUT
UNLOADED
MOSC
66MHz
UNLOADED
8
6
4
2
0
6
4
50MHz
50MHz
130kHz
130kHz
33MHz
-15
3.6V
3.3V
2.7V
33MHz
2
0
2.7
3.0
3.3
3.6
-40
10
35
60
85
1
10
100
1000
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
PRESCALE DIVIDER (DECIMAL)
FREQUENCY % CHANGE
vs. SUPPLY VOLTAGE
FREQUENCY % CHANGE
vs. TEMPERATURE
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
0.50
0.2
0
5
V
= 3.3V
V
= 3.3V,
T
= +25ºC
33MHz
CC
CC
A
PDN = GND
4
3
2
1
0
0.25
0
130kHz
66MHz
-0.2
-0.4
-0.6
-0.8
130kHz
50MHz
66MHz
-0.25
33MHz
50MHz
-0.50
2.7
3.0
3.3
3.6
-40
-15
10
35
60
85
-40
-15
10
35
60
85
SUPPLY VOLTAGE (V)
TEMPERATURE (ºC)
TEMPERATURE (ºC)
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Typical Operating Characteristics (continued)
(V
= 3.3V, T = +25°C, unless otherwise noted.)
CC
A
DUTY CYCLE
SPECTRUM COMPARISON
vs. SUPPLY VOLTAGE
(120kHz BW, SAMPLE DETECT)
DUTY CYCLE vs. TEMPERATURE
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
58
56
54
52
50
48
58
56
54
52
50
48
T
= +25ºC
66MHz
A
1%
V
= 3.3V
NO SPREAD
CC
2%
66MHz
50MHz
33MHz
50MHz
33MHz
8%
4%
f
= 50MHz,
130kHz
3.3
MOSC
DITHER RATE = f
130kHz
/ 4096
MOSC
2.7
3.0
3.6
44
46
48
50
52
54
56
-40
-15
10
35
60
85
SUPPLY VOLTAGE (V)
FREQUENCY (MHz)
TEMPERATURE (ºC)
Pin Description
PIN
NAME
FUNCTION
1
OUT
Oscillator Output
2
3
4
SPRD Dither Enable. When the pin is high, the dither is enabled. When the pin is low, the dither is disabled.
V
Power Supply
Ground
CC
GND
Output Enable. When the pin is high, the output buffer is enabled. When the pin is low, the output is disabled
but the internal master oscillator is still on.
5
6
OE
Power-Down. When the pin is high, the master oscillator is enabled. When the pin is low, the master oscillator
and the output buffer are disabled (power-down mode).
PDN
2
7
8
SDA
SCL
I C Serial Data. This pin is for serial data transfer to and from the device.
2
I C Serial Clock. This pin is used to clock data into and out of the device.
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Block Diagram
PDN
OE
H/W GATED OUTPUT
DS1089L
SDA
CONTROL REGISTERS
S/W GATED OUTPUT
OUTPUT CONTROL
2
I C
2
I C SERIAL
ADDRESS
BITS
INTERFACE
SCL
ADDR
J3 J2 OE
FACTORY-
PROGRAMMED
MASTER
PRESCALER
X
WC A2 A1 A0
f
f
SYNCED
OUTPUT
BUFFER
f
OSC
OUT
MOSC
WRITE EE
COMMAND
OUT
DIVIDE BY 1, 2, 4,
8, 16, 32, 64,
128, OR 256
OSCILLATOR
EEPROM
WRITE
CONTROL
33.3MHz TO
66.6MHz
f
MOD
EEPROM
DITHER RATE
DITHER %
TRIANGLE-
WAVE
f
MOSC
GENERATOR
V
LO/
HIZ
CC
J1 J0
X
P3 P2 P1 P0
V
CC
PRESCALER SETTING
OUTPUT CONFIGURATION
GND
PRESCALER
SPRD
Detailed Description
Table 1. Prescaler Divider Settings
Master Oscillator
The internal master oscillator is capable of generating
a square wave with a 33.3MHz to 66.6MHz frequency
range. The master oscillator frequency (f
programmed, and is specified in the Ordering Information.
BITS P3, P2,
x
2 =
f
f
OUT = OSC
P1, P0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1
2
f
MOSC
) is factory
MOSC
f
f
f
/ 2
/ 4
MOSC
MOSC
MOSC
4
Prescaler
8
/ 8
The user can program the prescaler divider to produce an
16
32
64
128
256
f
f
f
/ 16
/ 32
/ 64
/ 128
/ 256
MOSC
MOSC
MOSC
output frequency (f
) as low as 130kHz using bits P0,
OUT
P1, P2, and P3 in the PRESCALER register. The output
frequency can be calculated using Equation 1. Any value
programmed greater than 2 will be decoded as 2 . See
Table 1 for prescaler divider settings.
f
f
MOSC
MOSC
8
8
Equation 1
f
1111
256
f
/ 256
MOSC
MOSC
Output Frequency (Hz) f
=
OSC
x
2
where x = P3, P2, P1, P0
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Output Control
Dither Percentage Settings
Two user control signals control the output. The output
enable pin (OE) gates the output buffer and the pow-
er-down pin (PDN) disables the master oscillator and
turns off the output for power-sensitive applications.
(Note: the power-down command must persist for at least
two output frequency cycles plus 10µs for deglitching pur-
poses.) On power-up, the output is disabled until power is
stable and the master oscillator has generated 512 clock
cycles.
The dither amplitude (measured in percentage of the
master oscillator center frequency) is set using the J2
and J3 bits in the ADDR register. This circuit uses a sense
current from the master oscillator bias circuit to adjust the
amplitude of the triangle-wave signal to a voltage level
that modulates the master oscillator to a percentage of its
factory-programmed center frequency. This percentage is
set in the application to be ±1%, ±2%, ±4%, or ±8% (see
Table 3).
Additionally, the OE input is OR’ed with the OE bit in the
ADDR register, allowing for either hardware or software
gating of the output waveform (see the Block Diagram).
The location of bits P3, P2, P1, P0, J1, and J0 in the
PRESCALER register and bits J3 and J2 in the ADDR
register are shown in the Register Summary section.
Both controls feature a synchronous enable, which
ensures that there are no output glitches when the output
is enabled. The synchronous enable also ensures a con-
stant time interval (for a given frequency setting) from an
enable signal to the first output transition.
Table 2. Dither Frequency Settings
BITS J1, J0
DITHER FREQUENCY
00
01
10
11
No dither
f
f
f
/2048
/4096
/8192
MOSC
MOSC
MOSC
Dither Generator
The DS1089L has the ability to reduce radiated emission
peaks. The output frequency can be dithered by ±1%,
±2%, ±4%, or ±8% symmetrically around the programmed
center frequency. Although the output frequency chang-
es when the dither is enabled, the duty cycle does not
change.
Table 3. Dither Percentage Settings
BITS J3, J2
DITHER AMOUNT
00
01
10
11
±1%
±2%
±4%
±8%
The dither rate (f ) is controlled by the J0 and J1
MOD
bits in the PRESCALER register and is enabled with the
SPRD pin. The maximum spectral attenuation occurs
when the prescaler is set to 1. The spectral attenuation is
reduced by 2.7dB for every factor of 2 that is used in the
prescaler. This happens because the prescaler’s divider
function tends to average the dither in creating the lower
frequency. However, the most stringent spectral emission
limits are imposed on the higher frequencies where the
prescaler is set to a low divider ratio.
A triangle-wave generator injects an offset element into
the master oscillator to dither its output. The dither rate
can be calculated based on the master oscillator frequen-
cy (see Equation 2).
Equation 2
f
MOSC
n
f
=
MOD
where f
= dither frequency, f
= master oscillator
MOSC
MOD
frequency, and n = divider setting (see Table 2).
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
When dither is enabled (by selecting a dither frequency
setting greater than 0 with SPRD high), the master oscil-
lator frequency is dithered around the center frequency
IF DITHER AMOUNT = 0%
(+1, 2, 4,
OR 8% OF f
)
MOSC
DITHER
AMOUNT
(2, 4, 8,
PROGRAMMED
by the selected percentage from the programmed f
MOSC
f
MOSC
(-1, 2, 4,
OR 8% OF f
(see Figure 2). For example, if f
to 40MHz (factory setting) and the dither amount is
is programmed
OR 16%)
MOSC
)
MOSC
programmed to ±1%, the frequency of f will dither
MOSC
1
between 39.6MHz and 40.4MHz at a modulation fre-
quency determined by the selected dither frequency.
Continuing with the same example, if J1 = 0 and J0 = 1,
f
MOD
selecting f
/2048, then the dither frequency would
MOSC
be 19.531kHz.
TIME
Register Summary
Figure 2. Output Frequency vs. Dither Rate
The DS1089L registers are used to change the dith-
er amount, output frequency, and slave address. A bit
summary of the registers is shown in Table 4. Once
programmed into EEPROM, the settings only need to be
reprogrammed if it is desired to reconfigure the device.
ADDR Register
Bits 7 to 6: Dither Percentage. The J3 and J2 bits con-
trol the selected dither amplitude (%). When
both J3 and J2 are set to 0, the default dith-
er rate is ±1%.
PRESCALER Register
Bit 5:
Output Enable. The OE bit and the OE pin
state determine if the output is on when the
Bits 7 to 6: Dither Frequency. The J1 and J0 bits
control the dither frequency applied to the
output. See Table 2 for divider settings. If
either of bits J1 or J0 is high and SPRD is
high, dither is enabled.
device is active (PDN = V ). If (OE = 0 OR
IH
OE is high) AND the PDN pin is high, the
output will be driven.
Bit 4:
Bit 3:
Reserved.
Bit 5:
Output Low or Hi-Z. The LO/HIZ bit deter-
mines the state of the output during pow-
er-down. While the output is deactivated, if
the LO/HIZ bit is set to 0, the output will be
high impedance (high-Z). If the LO/HIZ bit is
set to 1, the output will be driven low.
Write Control. The WC bit determines if
the EEPROM is to be written after register
contents have been changed. If WC = 0
(default), EEPROM is written automatically
after a write. If WC = 1, the EEPROM is
only written when the WRITE EE command
is issued. See the WRITE EE Command
section for more information.
Bit 4:
Reserved.
Bits 3 to 0: Prescaler Divider. The prescaler bits (bits
P3 to P0) divide the master oscillator fre-
x
Bits 2 to 0: Address. The A0, A1, A2 bits determine the
quency by 2 where x can be from 0 to
2
lower nibble of the I C slave address.
8. Any prescaler bit value entered that is
greater than 8 will decode as 8. See Table 1
for prescaler settings.
Table 4. Register Summary
REGISTER
ADDR
BIT7
BINARY
BIT0
DEFAULT
ACCESS
LO/
HIZ
PRESCALER
02h
J1
J0
J2
X
P3
P2
A2
P1
A1
P0
xx00xxxxb
R/W
ADDR
0Dh
3Fh
J3
OE
X
WC
A0
xx100000b
—
R/W
—
WRITE EE
No Data
X = “don’t care”
x = values depend on custom settings
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
bit, the value of the ADDR register is always written
immediately to EEPROM. When the WRITE EE com-
mand has been received, the contents of the registers
are written into the EEPROM, thus locking in the register
settings.
WRITE EE Command
The WRITE EE command is useful in closed-loop appli-
cations where the registers are frequently written. In
applications where the register contents are frequently
written, the WC bit should be set to 1 to prevent wearing
out the EEPROM. Regardless of the value of the WC
2
I C Serial Port Operation
SDA
MSB
SLAVE ADDRESS
R/W
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
DIRECTION
BIT
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
SCL
1
2
6
7
8
9
1
2
3–7
8
9
ACK
ACK
START
CONDITION
STOP
CONDITION
OR REPEATED
START
REPEATED IF MORE BYTES
ARE TRANSFERRED
CONDITION
2
Figure 3. I C Data Transfer Protocol
LSB
R/W
MSB
1
0
1
1
A2
A0
A1
DEVICE
IDENTIFIER
READ/WRITE BIT
DEVICE
ADDRESS
Figure 4. Slave Address Byte
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
SDA
SCL
t
BUF
t
SP
t
HD:STA
t
LOW
t
t
F
R
t
SU:STA
t
HD:STA
t
HIGH
t
REPEATED
START
t
SU:STO
SU:DAT
STOP
START
t
HD:DAT
2
Figure 5. I C AC Characteristics
2
TYPICAL I C WRITE TRANSACTION
MSB
LSB
MSB
LSB
MSB
LSB
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
START
1
0
1
1
A2* A1* A0* R/W
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
STOP
READ/
WRITE
DEVICE
ADDRESS
COMMAND/REGISTER ADDRESS
DATA
DEVICE IDENTIFIER
2
EXAMPLE I C TRANSACTIONS (WHEN A0, A1, AND A2 ARE ZERO)
B0h
02h
DATA
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
A) SINGLE BYTE WRITE
-WRITE PRESCALER
REGISTER TO 128
STOP
1 0 11 0 0 0 0
0 0 0 0 0 0 1 0
1 0 0 0 0 0 0 0
START
02h
B1h
DATA
1 0 0 0 0 0 0 0
B0h
B) SINGLE BYTE READ
-READ PRESCALER
REGISTER
SLAVE REPEATED
MASTER
NACK
SLAVE
ACK
SLAVE
ACK
STOP
1 0 11 0 0 0 1
START 1 0 11 0 0 0 0
0 0 0 0 0 0 1 0
ACK
START
*THE ADDRESS DETERMINED BY A0, A1, AND A2 MUST
MATCH THE ADDRESS SET IN THE ADDR REGISTER.
2
Figure 6. I C Transactions
tend to have adequate high-frequency response for
decoupling applications. These capacitors should be
Applications Information
Power-Supply Decoupling
placed as close to the V
and GND pins as possible.
CC
To achieve the best results when using the DS1089L,
decouple the power supply with 0.01µF and 0.1µF
high-quality, ceramic, surface-mount capacitors.
Surface-mount components minimize lead inductance,
which improves performance, and ceramic capacitors
Stand-Alone Mode
SCL and SDA cannot be left floating even in stand-alone
mode. If the DS1089L will never need to be programmed
in-circuit, including during production testing, SDA and
SCL can be connected high.
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Typical Operating Circuits
STAND-ALONE MODE
PROCESSOR-CONTROLLED MODE
V
CC
DITHERED 130kHz
TO 66.6MHz OUTPUT
DITHERED 130kHz
TO 66.6MHz OUTPUT
4.7kΩ
4.7kΩ
V
CC
OUT
XTL1/OSC1
OUT
SCL
SCL*
2-WIRE
INTERFACE
V
V
CC
CC
N.C.
XTL2/OSC2
DS1089L
DS1089L
SPRD
SPRD
SDA
PDN
SDA*
PDN
V
CC
MICROPROCESSOR
V
V
CC
CC
GND
OE
GND
OE
DECOUPLING CAPACITORS
(0.1µF and 0.01µF)
DECOUPLING CAPACITORS
(0.1µF and 0.01µF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1089L NEVER
NEEDS TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.
Pin Configuration
Chip Topology
TRANSISTOR COUNT: 5985
TOP VIEW
SUBSTRATE CONNECTED TO GROUND
OUT
SCL
SDA
PDN
OE
1
2
3
4
8
7
6
5
Package Information
SPRD
DS1089L
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates
RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package
regardless of RoHS status.
V
CC
GND
µSOP (118 mils)
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DS1089L
3.3V Center Spread-Spectrum EconOscillator™
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
2
3
5/06
2/15
—
Removed automotive reference from data sheet
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2015 Maxim Integrated Products, Inc.
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