DS1040Z-250+ [MAXIM]
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8;
| 型号： | DS1040Z-250+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8 光电二极管 逻辑集成电路 延迟线 |
| 文件： | 总6页 (文件大小：147K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS1040
Programmable One-Shot
www.dalsemi.com
FEATURES
PIN ASSIGNMENT
C All-silicon pulse width generator
C Five programmable widths
C Equal and unequal increments available
C Pulse widths from 5 ns to 500 ns
C Widths are stable and precise
C Rising edge-triggered
1
8
7
VCC
P0
P1
P2
IN
2
OUT
OUT
GND
DS1040M 8-Pin DIP (300-mil)
See Mech. Drawings Section
C Inverted and non-inverted outputs
C Width tolerance M5% or M2 ns, whichever is
greater
1
7
IN
OUT
OUT
GND
VCC
P0
P1
P2
C Economical
C Auto-insertable, low profile
C Low-power CMOS
3
4
6
5
C TTL/CMOS-compatible
C Vapor phase, IR and wave solderable
C Custom widths available
C Fast turn prototypes
DS1040Z 8-Pin SOIC (150-mil)
See Mech. Drawings Section
C Extended temperature range available
PIN DESCRIPTION
IN
– Trigger Input
– Programming Pins
– Ground
P0-P2
GND
OUT
– Pulse Output
OUT
VCC
– Inverted Pulse Output
– +5V
DESCRIPTION
The DS1040 Pulse Generator is a user-programmable one-shot with a choice of five precise pulse widths.
Maximum widths range from 50 ns to 500 ns; increments range from 2.5 ns to 100 ns. For maximum
flexibility in applications such as magneto-optical read/write disk laser power control, varieties are
offered with equal and unequal increments. The DS1040 is offered in standard 8-pin DIPs and 8-pin
mini-SOICs. Low cost and superior reliability over hybrid technology are achieved by the combination
of a 100% CMOS silicon design and industry standard packaging. The DS1040 series of pulse generators
provide a nominal width accuracy of M5% or M2 ns, whichever is greater. In response to the rising edge
of the input (trigger) pulse, the DS1040 produces an output pulse with a width determined by the logic
states of the three parallel programming pins. For convenience, both inverting and non-inverting outputs
are supplied. The intrinsic delay between the trigger pulse and the output pulse is no more than 10 ns.
Each output is capable of driving up to five 74LS loads.
Dallas Semiconductor can customize standard products to meet special needs. For special request and
rapid delivery, call (972) 371–4348.
1 of 6
111799
DS1040
LOGIC DIAGRAM Figure 1
PULSE WIDTH VS. PROGRAMMED VALUE Table 1
PROGRAMMING
PINS
MAX
MIN
MAX
MAX
MAX
WIDTH WIDTH
WIDTH WIDTH WIDTH
MSB
P2
P1
P0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
LSB
PART
NUMBER
DS1040-75
DS1040-100
DS1040-150
DS1040-200
DS1040-250
DS1040-500
DS1040-B50
DS1040-D60
DS1040-A15
DS1040-A20
DS1040-A32
DS1040-B40
DS1040-D70
75
100
150
200
250
500
50
15
20
30
40
50
100
30
20
5
30
40
45
60
60
80
75
100
150
200
250
500
50
75
100
150
200
250
500
50
75
100
150
200
250
500
50
60
90
120
160
200
400
45
80
120
150
300
40
100
200
35
60
30
40
50
60
60
60
15
7.5
12.5
25
10
12.5
17.5
30
15
15
15
20
10
22.5
20
30
15
20
20
20
32.5
40
27.5
30
32.5
40
32.5
40
32.5
40
25
35
70
40
50
60
70
70
70
All times in nanoseconds.
Custom pulse widths available.
2 of 6
DS1040
ABSOLUTE MAXIMUM RATINGS*
Voltage on any Pin Relative to Ground
Operating Temperature
-1.0V to +7.0V
0LC to 70LC
Storage Temperature
-55LC to +125LC
260LC for 10 seconds
50 mA for 1 second
Soldering Temperature
Short Circuit Output Current
* This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(0°C to 70°C; VCC = 5.0V M 5%)
PARAMETER
Supply Voltage
SYMBOL
TEST
MIN TYP
MAX
UNITS NOTES
VCC
4.75
2.2
5.00
5.25
V
V
1
1
1
High Level Input
Voltage
VCC
VIH
VIL
II
+ 0.5
Low Level Input
Voltage
-0.5
-1.0
0.8
1.0
75
-1
V
Input Leakage
Current
0.0 ≤ VI ≤VCC
µA
mA
mA
mA
VCC = Max;
Period = Min
VCC = Min
VOH = 4
VCC = Min
VOL = 0.5
Active Current
ICC
IOH
IOL
35
2, 6
High Level Output
Current
Low Level Output
Current
8
AC ELECTRICAL CHARACTERISTICS
(TA = 25°C; VCC = 5.0V M 5%)
PARAMETER
Programming Setup
Programming Hold
Input Pulse Width at Logic 1
Input Pulse Width at Logic 0
Intrinsic Delay
SYMBOL
tPS
MIN
TYP
MAX
UNITS NOTES
5
0
5
5
0
ns
ns
ns
ns
ns
tPH
tWIH
tWIL
tD
5
10
Output Pulse Width
Power-up Time
Period
tWO
tPU
Period
Table 1
ns
ms
ns
3, 4, 5, 7
100
tWO + 50
CAPACITANCE
(TA = 25°C)
UNITS NOTES
PARAMETER
SYMBOL
MIN
TYP
MAX
Input Capacitance
CIN
5
10
pF
3 of 6
DS1040
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open, minimum period.
3. VCC = 5V @ 25LC. Width accurate to within M2 ns or 5%.
4. Temperature variations between 0LC and 70LC may increase or decrease width by an additional M1 ns
or M3%, whichever is greater.
5. For DS1040 pulse generators with maximum widths less than 50 ns, temperature variations between
0LC and 70LC may increase or decrease width by M1 ns or M9%, whichever is greater.
6. ICC is a function of frequency and maximum width. Only a pulse generator operating with 40 ns
period and VCC =5.25V will have an ICC =75 mA. For example, a -100 will never exceed 30 mA, etc.
7. See “Test Conditions” sections at the end of this data sheet.
TIMING DIAGRAM Figure 2
4 of 6
DS1040
POWER-UP TIMING DIAGRAM Figure 3
TEST CIRCUIT Figure 4
TERMINOLOGY
Period: The time elapsed between the leading edge of the first trigger pulse and the leading edge of the
following trigger pulse.
tWIH , WIL , WO (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge
and the 1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the
leading edge.
5 of 6
DS1040
tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of
the input pulse.
tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of
the input pulse.
tD (Intrinsic Delay): The elapsed time between the 1.5 point on the leading edge of the input trigger
pulse and the 1.5V point on the leading edge of output pulse.
tPU (Power-up Time): After VCC is valid, the time required before timing specifications is within
tolerance.
TEST SETUP DESCRIPTION
Figure 4 illustrates the hardware configuration used for measuring the timing parameters on the DS1040.
The input waveform is produced by a precision pulse generator under software control. The intrinsic
delay is measured by a time interval counter (20 ps resolution) connected between the input and each
output. Outputs are selected and connected to the counter by a VHF switch control unit. Width
measurements are made by directing both the start and stop functions of the counter to the same output.
All measurements are fully automated, with each instrument controlled by a central computer over an
IEEE 488 bus.
TEST CONDITIONS
Input:
Ambient Temperature:
Supply Voltage (VCC):
Input Pulse:
25LC + 3LC
5.0V + 0.1V
High = 3.0V + 0.1V
Low = 0.0V + 0.1
Source Impedance:
Rise and Fall Time:
50 ohm max.
3.0 ns max. (measured
between 0.6V and 2.4)
Pulse Width:
Period:
500 ns (1 ꢀs for -500)
1 ꢀs (2 ꢀs for -500)
Output:
The output is loaded with a 74F04. Delay is measured at the 1.5V level on the rising and falling edge.
Note:
Above conditions are for test only and do not restrict the operation of the device under other data sheet
conditions.
6 of 6
相关型号：
DS1040Z-75
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
MAXIM
DS1040Z-75+T&R
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
MAXIM
DS1040Z-75/T&R
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
MAXIM
DS1040Z-A15
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
MAXIM
DS1040Z-A15+
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
MAXIM
DS1040Z-A32+
Pulse Generator Delay Line, Programmable, 1-Func, 5-Tap, Complementary Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
MAXIM
©2020 ICPDF网 联系我们和版权申明