73S8010C-IMR/F1 [MAXIM]

Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32;
73S8010C-IMR/F1
元器件型号: 73S8010C-IMR/F1
生产厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述和应用:

Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32

PDF文件: 总27页 (文件大小:348K)
下载文档:  下载PDF数据表文档文件
型号参数:73S8010C-IMR/F1参数
是否Rohs认证 不符合
生命周期Obsolete
IHS 制造商MAXIM INTEGRATED PRODUCTS INC
包装说明HVQCCN,
Reach Compliance Codeunknown
HTS代码8542.39.00.01
风险等级5.65
模拟集成电路 - 其他类型ANALOG CIRCUIT
JESD-30 代码S-XQCC-N32
长度5 mm
功能数量1
端子数量32
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料UNSPECIFIED
封装代码HVQCCN
封装形状SQUARE
封装形式CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)NOT SPECIFIED
座面最大高度0.9 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2.7 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
温度等级INDUSTRIAL
端子形式NO LEAD
端子节距0.5 mm
端子位置QUAD
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度5 mm
Base Number Matches1
MAX34334CSE前5页PDF页面详情预览
73S8010C
Smart Card Interface
Simplifying System Integration™
DATA SHEET
April 2009
DESCRIPTION
The Teridian 73S8010C is a single smart card
interface IC. It provides full electrical compliance
with ISO-7816-3 and EMV 4.0 specifications.
Interfacing with the host is done through the two-wire
I2C bus. Data exchange with the card is managed
from the system controller using the I/O line (and
eventually the auxiliary I/O lines).
An on-chip oscillator using an external crystal, or
connection to a clock signal coming from the
system controller can generate the card clock
signal.
The 73S8010C IC incorporates an ISO-7816-3
activation/deactivation sequencer that controls the
card signals. Level shifters drive the card signals
with the selected card voltage (3 V or 5 V), coming
from an internal DC-DC converter.
With its high-efficiency DC-DC converter, the
Teridian 73S8010C is a cost-effective solution for
any smart card reader application to be powered
from a single 2.7 V to 3.6 V power supply.
Hardware support for auxiliary I/O lines, C4 / C8
contacts, is provided.
Emergency card deactivation is initiated upon card
extraction or upon any fault generated by the
protection circuitry. The fault can be a VDD (digital
power supply), a VCC (card power supply), a card
over-current, or an over-heating fault.
ADVANTAGES
Single smart card interface
The inductor-based DC-DC converter provides
higher current and efficiency than the usual
charge-pump capacitor-based converters
Ideal for battery-powered applications
Suitable for high current cards and
SAMs: (100 mA max)
Power down mode: 2
A
typical
Small Format (5x5mm) 32-QFN package option
FEATURES
Card Interface:
Complies with ISO-7816-3 and EMV 4.0
A DC-DC Converter provides 3V / 5V to the
card from an external power supply input
High-efficiency converter: > 80% @ V
DD
= 3.3 V,
V
CC
= 5 V and I
CC
= 65 mA
Up to 100 mA supplied to the card
ISO-7816-3 Activation / Deactivation sequencer
with emergency automated deactivation on
card removal or fault detected by the protection
circuitry
Protection include 2 voltage supervisors that
detect voltage drops on card V
CC
and V
DD
power supplies
The V
DD
voltage supervisor threshold value
can be externally adjusted
True over-current detection (150 mA max.)
1 card detection input
Auxiliary I/O lines, for C4 / C8 contact signals
Host Interface:
Fast mode, 400 kbps I
2
C slave bus
8 possible devices in parallel
One control register and one status register
Interrupt output to the host for fault
detection
Crystal oscillator or host clock, up to 27 MHz
Power Supply:
V
DD
: 2.7 V to 3.6 V
6 kV ESD Protection on the card interface
Package: SO28 or 32QFN
APPLICATIONS
Set-Top-Boxes, DVD / HDD Recorders:
Conditional Access and Pay-per-View slots
Point of Sales and Transaction Terminals
EMV slots in cell phones and PDAs
Rev. 1.5
© 2009 Teridian Semiconductor Corporation
1
73S8010C Data Sheet
FUNCTIONAL DIAGRAM
DS_8010C_024
Figure 1: 73S8010C Block Diagram
Pin number reference to SO28 Package
[Pin number]
reference to 32QFN Package
2
Rev. 1.5
DS_8010C_024
73S8010C Data Sheet
Table of Contents
1
 
Pin Description .................................................................................................................................... 5
 
1.1
 
Card Interface ............................................................................................................................... 5
 
1.2
 
Miscellaneous Inputs and Outputs................................................................................................ 5
 
1.3
 
Power Supply and Ground............................................................................................................ 5
 
1.4
 
Microcontroller Interface ............................................................................................................... 6
 
Host Interface (I
2
C Bus) ...................................................................................................................... 7
 
2.1
 
Host Interface Control ................................................................................................................... 7
 
2.2
 
Host Interface Status .................................................................................................................... 8
 
2.3
 
I
2
C-bus Timing .............................................................................................................................. 9
 
Oscillator............................................................................................................................................ 10
 
DC-DC Converter – Card Power Supply ......................................................................................... 10
 
Voltage Supervision ......................................................................................................................... 11
 
Power Down....................................................................................................................................... 11
 
Over-temperature Monitor................................................................................................................ 12
 
Activation Sequence ......................................................................................................................... 12
 
Deactivation Sequence..................................................................................................................... 13
 
2
 
3
 
4
 
5
 
6
 
7
 
8
 
9
 
10
 
Interrupt ............................................................................................................................................. 13
 
11
 
Warm Reset ....................................................................................................................................... 14
 
12
 
I/O Timing........................................................................................................................................... 14
 
13
 
Typical Application Schematic ........................................................................................................ 15
 
14
 
Electrical Specification..................................................................................................................... 16
 
14.1
 
Absolute Maximum Ratings ........................................................................................................ 16
 
14.2
 
Recommended Operating Conditions......................................................................................... 16
 
14.3
 
DC Characteristics: Card Interface ............................................................................................. 17
 
14.4
 
DC Characteristics: Digital Signals ............................................................................................. 20
 
14.5
 
DC Characteristics: Supply ......................................................................................................... 20
 
14.6
 
DC Characteristics: I
2
C Interface ................................................................................................ 21
 
14.7
 
Voltage / Temperature Fault Detection Circuits.......................................................................... 21
 
15
 
Mechanical Drawings ....................................................................................................................... 22
 
15.1
 
32-pin QFN ................................................................................................................................. 22
 
15.2
 
28-pin SO .................................................................................................................................... 23
 
16
 
Package Pin Designation ................................................................................................................. 24
 
16.1
 
32-pin QFN ................................................................................................................................. 24
 
16.2
 
28-pin SO .................................................................................................................................... 25
 
17
 
Ordering Information ........................................................................................................................ 26
 
18
 
Related Documentation .................................................................................................................... 26
 
19
 
Contact Information .......................................................................................................................... 26
 
Revision History ........................................................................................................................................ 27
 
Rev. 1.5
3
73S8010C Data Sheet
DS_8010C_024
Figures
Figure 1: 73S8010C Block Diagram ............................................................................................................. 2
 
Figure 2: I
2
C Bus Write Protocol ................................................................................................................... 8
 
Figure 3: I
2
C Bus Read Protocol ................................................................................................................... 9
 
Figure 4: I
2
C Bus Timing Diagram ................................................................................................................ 9
 
Figure 5: Power Down Mode Operation...................................................................................................... 12
 
Figure 6: Activation Sequence .................................................................................................................... 12
 
Figure 7: Deactivation Sequence ................................................................................................................ 13
 
Figure 8: FAULT Functions,
INT
operation ................................................................................................. 13
 
Figure 9: Warm Reset operation ................................................................................................................. 14
 
Figure 10: I/O Timing .................................................................................................................................. 14
 
Figure 11: 73S8010C – Typical Application Schematic .............................................................................. 15
 
Figure 12: DC – DC Converter Efficiency (V
CC
= 5 V) ................................................................................ 18
 
Figure 13: DC – DC Converter Efficiency (V
CC
= 3 V) ................................................................................ 18
 
Figure 14: 32-pin QFN Package Drawing ................................................................................................... 22
 
Figure 15: 28-pin SO Package Drawing ..................................................................................................... 23
 
Tables
Table 1: Device Address Selections ............................................................................................................. 7
 
Table 2: Host Control Register ...................................................................................................................... 7
 
Table 3: Host Status Register ....................................................................................................................... 8
 
Table 4: Choice of Vcc Capacitor ............................................................................................................... 10
 
4
Rev. 1.5
DS_8010C_024
73S8010C Data Sheet
1 Pin Description
1.1
Card Interface
Pin
(SO)
11
13
12
16
15
PIN
(QFN)
9
11
10
14
13
Description
Card I/O: Data signal to/from card. Includes a pull-up resistor to V
CC.
AUX1: Auxiliary data signal to/from card. Includes a pull-up resistor to V
CC.
AUX2: Auxiliary data signal to/from card. Includes a pull-up resistor to V
CC.
Card reset: provides reset (RST) signal to card.
Card clock: provides clock (CLK) signal to card. The rate of this clock is
determined by the crystal oscillator frequency and CLKSEL bits in the
control register.
Card Presence switch: active high indicates card is present. Includes a
pull-down resistor.
Card power supply: logically controlled by sequencer, output of DC-DC
converter. Requires an external filter capacitor to the card GND.
Card ground.
Name
I/O
AUX1
AUX2
RST
CLK
PRES
VCC
GND
10
17
14
7
15
12
1.2
Miscellaneous Inputs and Outputs
PIN
(SO)
24
25
18
PIN
(QFN)
23
24
17
Description
Crystal oscillator input: can either be connected to a crystal or driven
as a source for the card clock.
Crystal oscillator output: connected to crystal. Left open if XTALIN is
being used as an external clock input.
V
DD
threshold adjustment input: this pin can be used to overwrite a
higher V
DDF
value (that controls deactivation of the card). Must be
left open if unused.
Non-connected pin.
Name
XTALIN
XTALOUT
VDDF_ADJ
NC
7, 9
4, 6, 8,
16, 25,
32
1.3
Power Supply and Ground
PIN
(SO)
6, 21
4
14
22
5
Pin
(QFN)
3, 20
1
12
21
2
Description
System controller interface supply voltage: supply voltage for internal
circuitry and DC-DC converter power supply source.
DC-DC converter ground.
Smart Card I/O ground.
Digital ground.
External inductor: Connect external inductor from pin 5 to V
DD
. Keep the
inductor close to pin 5.
Name
VDD
GND
GND
GND
LIN
Rev. 1.5
5
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