71M6543H [MAXIM]

Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation; 可选增益1或8的一个电流电能表计量芯片的补偿
71M6543H
元器件型号: 71M6543H
生产厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述和应用:

Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation
可选增益1或8的一个电流电能表计量芯片的补偿

PDF文件: 总157页 (文件大小:2164K)
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型号参数:71M6543H参数
是否Rohs认证 符合
生命周期Active
零件包装代码QFP
包装说明LFQFP, QFP100,.63SQ,20
针数100
Reach Compliance Codecompliant
ECCN代码EAR99
HTS代码8542.39.00.01
风险等级5.6
模拟集成电路 - 其他类型ANALOG CIRCUIT
JESD-30 代码S-PQFP-G100
长度14 mm
功能数量1
端子数量100
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码LFQFP
封装等效代码QFP100,.63SQ,20
封装形状SQUARE
封装形式FLATPACK, LOW PROFILE, FINE PITCH
电源3.3 V
认证状态Not Qualified
座面最大高度1.6 mm
子类别Other Analog ICs
最大供电电流 (Isup)8.7 mA
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.5 mm
端子位置QUAD
宽度14 mm
Base Number Matches1
MAX34334CSE前5页PDF页面详情预览
19-5375; Rev 1.2; 4/11
AVAILAB
LE
71M6543F/H and 71M6543G/GH
Energy Meter ICs
DATA SHEET
April 2011
GENERAL DESCRIPTION
The 71M6543F, 71M6543H, 71M6543G, and 71M6543GH are
Teridian’s 4th-generation polyphase metering systems-on-chips
(SoCs) with a 5MHz 8051-compatible MPU core, low-power real-
time clock (RTC) with digital temperature compensation, flash
memory, and LCD driver. Our Single Converter Technology® with
a 22-bit delta-sigma ADC, seven analog inputs, digital metrology
temperature compensation, precision voltage reference, and a 32-
bit computation engine (CE) supports a wide range of metering
applications with very few external components.
The 71M6543F, 71M6543H, 71M6543G and 71M6543GH support
optional interfaces to the 71M6xx3 series of isolated sensors that
offer BOM cost reduction, immunity to magnetic tamper, and
enhanced reliability. The ICs feature ultra-low-power operation in
active and battery modes, 5KB shared RAM, and 64KB
(71M6543F, 71M6543H) or 128KB (71M6543G, 71M6543GH) of
flash memory, which can be programmed with code and/or data
during meter operation. High processing and sampling rates
combined with differential inputs offer a powerful metering platform
for commercial and industrial meters with up to class 0.2 accuracy
(71M6543H, 71M6543GH).
A complete array of code development tools, demonstration code,
and reference designs enable rapid development and certification of
meters that meet all ANSI and IEC electricity metering standards
worldwide.
C
NEUTRAL
B
A
FEATURES
0.1% Accuracy Over 2000:1 Current Range
Exceeds IEC 62053/ANSI C12.20 Standards
Seven Sensor Inputs with Neutral Current
Measurement, Differential Mode Selectable
for Current Inputs
Selectable Gain of 1 or 8 for One Current
Input to Support Shunts
High-Speed Wh/VARh Pulse Outputs with
Programmable Width
64KB Flash, 5KB RAM (71M6543F/H)
128KB Flash, 5KB RAM (71M6543G/GH)
Up to Four Pulse Outputs with Pulse Co
unt
Four-Quadrant Metering, Phase Seque
ncing
Digital Temperature Compensation:
Metrology Compensation
Accurate RTC for TOU Functions with
Automatic Temperature Compensation
for Crystal in All Power Modes
Independent 32-Bit Compute Engine
46-64Hz Line Frequency Range with the Same
Calibration
Phase Compensation (±7°)
Three Battery-Backup Modes:
Brownout Mode
LCD Mode
Sleep Mode
Wake-Up on Pin Events and Wake-on-Timer
1µA in Sleep Mode
Flash Security
In-System Program Update
8-Bit MPU (80515), Up to 5MIPS
Full-Speed MPU Clock in Brownout Mode
LCD Driver:
6 Common Segment Drivers
Up to 56 Selectable Pins
Up to 51 Multifunction DIO Pins
Hardware Watchdog Timer (WDT)
I
2
C/MICROWIRE™ EEPROM Interface
SPI Interface with Flash Program Capability
Two UARTs for IR and AMR
IR LED Driver with Modulation
Industrial Temperature Range
100-Pin Lead-Free LQFP Package
Shunt Current Sensors
LOAD
Functional Diagrams
POWER SUPPLY
NEUTRAL
Note: This system is referenced to Neutral
3x TERIDIAN
71M6xx3
MUX and ADC
IADC0
IADC1
}
IN*
VADC10 (VC)
IADC6
IADC7
}
IC
VADC9 (VB)
IADC4
IADC5
}
IB
VADC8 (VA)
IADC2
IADC3
}
IA
VREF
SERIAL PORTS
V3P3A V3P3SYS GNDA GNDD
71M6xx3
71M6xx3
Resistor Dividers
Pulse Transformers
71M6xx3
TERIDIAN
71M6543F/
71M6543H/
71M6543G/
71M6543GH
TEMPERATURE
SENSOR
PWR MODE
CONTROL
WAKE-UP
REGULATOR
VBAT
VBAT_RTC
BATTERY
MONITOR
RTC
BATTERY
BATTERY
RAM
COMPUTE
ENGINE
FLASH
MEMORY
COM0...5
SEG
SEG/DIO
LCD DRIVER
DIO, PULSES
DIO
LCD DISPLAY
AMR
TX
RX
MODUL- RX
ATOR
TX
POWER FAULT
COMPARATOR
8888.8888
PULSES,
DIO
I
2
C or µWire
EEPROM
32 kHz
IR
MPU
RTC
TIMERS
V3P3D
OSCILLATOR/
PLL
XIN
Single Converter Technology is a registered trademark of Maxim Integrated
Products, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
SPI INTERFACE
HOST
Pin Configurations appear at end of data sheet.
XOUT
ICE
Functional Diagrams continued at end of data sheet.
*IN = Neutral Current
UCSP is a trademark of Maxim Integrated Products, Inc.
9/17/2010
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
71M6543F/H and 71M6543G/GH Data Sheet
Table of Contents
1
2
Introduction ................................................................................................................................. 10
Hardware Description .................................................................................................................. 11
2.1 Hardware Overview............................................................................................................... 11
2.2 Analog Front-End (AFE) ........................................................................................................ 12
2.2.1 Signal Input Pins ....................................................................................................... 13
2.2.2 Input Multiplexer ........................................................................................................ 14
2.2.3 Delay Compensation ................................................................................................. 19
2.2.4 ADC Pre-Amplifier ..................................................................................................... 20
2.2.5 A/D Converter (ADC) ................................................................................................. 20
2.2.6 FIR Filter ................................................................................................................... 20
2.2.7 Voltage References ................................................................................................... 20
2.2.8 71M6xx3 Isolated Sensor Interface............................................................................ 22
2.3 Digital Computation Engine (CE) ........................................................................................... 25
2.3.1 CE Program Memory ................................................................................................. 25
2.3.2 CE Data Memory ....................................................................................................... 25
2.3.3 CE Communication with the MPU .............................................................................. 25
2.3.4 Meter Equations ........................................................................................................ 26
2.3.5 Real-Time Monitor (RTM) .......................................................................................... 26
2.3.6 Pulse Generators ...................................................................................................... 26
2.3.7 CE Functional Overview ............................................................................................ 28
2.4 80515 MPU Core .................................................................................................................. 30
2.4.1 Memory Organization and Addressing ....................................................................... 30
2.4.2 Special Function Registers (SFRs) ............................................................................ 32
2.4.3 Generic 80515 Special Function Registers ................................................................ 33
2.4.4 Instruction Set ........................................................................................................... 35
2.4.5 80515 Power Reduction Modes ................................................................................. 35
2.4.6 UARTs ...................................................................................................................... 36
2.4.7 Timers and Counters ................................................................................................. 38
2.4.8 WD Timer (Software Watchdog Timer) ...................................................................... 40
2.4.9 Interrupts................................................................................................................... 40
2.5 On-Chip Resources............................................................................................................... 47
2.5.1 Physical Memory ....................................................................................................... 47
2.5.2 Oscillator ................................................................................................................... 49
2.5.3 PLL and Internal Clocks............................................................................................. 50
2.5.4 Real-Time Clock (RTC) ............................................................................................. 51
2.5.5 71M6543 Temperature Sensor .................................................................................. 55
2.5.6 71M6xx3 Temperature Sensor .................................................................................. 56
2.5.7 71M6543 Battery Monitor .......................................................................................... 57
2.5.8 71M6xx3 VCC Monitor .............................................................................................. 57
2.5.9 UART and Optical Interface ....................................................................................... 57
2.5.10 Digital I/O and LCD Segment Drivers......................................................................... 58
2.5.11 EEPROM Interface .................................................................................................... 66
2.5.12 SPI Slave Port ........................................................................................................... 68
2.5.13 Hardware Watchdog Timer ........................................................................................ 72
2.5.14 Test Ports (TMUXOUT and TMUX2OUT Pins)........................................................... 73
Functional Description ................................................................................................................ 75
3
2
© 2008–2011 Teridian Semiconductor Corporation
v1.2
71M6543F/H and 71M6543G/GH Data Sheet
3.1
3.2
Theory of Operation .............................................................................................................. 75
Battery Modes....................................................................................................................... 75
3.2.1 BRN Mode ................................................................................................................ 78
3.2.2 LCD Mode ................................................................................................................. 78
3.2.3 SLP Mode ................................................................................................................. 79
3.3 Fault and Reset Behavior ...................................................................................................... 80
3.3.1 Events at Power-Down .............................................................................................. 80
3.3.2 IC Behavior at Low Battery Voltage ........................................................................... 81
3.3.3 Reset Sequence ........................................................................................................ 81
3.3.4 Watchdog Timer (WDT) Reset ................................................................................... 81
3.4 Wake-Up Behavior ................................................................................................................ 82
3.4.1 Wake on Hardware Events ........................................................................................ 82
3.4.2 Wake on Timer .......................................................................................................... 84
3.5 Data Flow and MPU/CE Communication ............................................................................... 84
Application Information ............................................................................................................... 86
4.1 Connecting 5 V Devices ........................................................................................................ 86
4.2 Directly Connected Sensors .................................................................................................. 86
4.3 Systems Using 71M6xx3 Isolated Sensors and Current Shunts ............................................. 87
4.4 System Using Current Transformers ..................................................................................... 88
4.5 Metrology Temperature Compensation.................................................................................. 89
4.5.1 Distinction Between Standard and High-Precision Parts ............................................ 89
4.5.2 Temperature Coefficients for the 71M6543F and 71M6543G ..................................... 90
4.5.3 Temperature Coefficients for the 71M6543H and 71M6543GH .................................. 90
4.5.4 Temperature Coefficients for the 71M6xx3................................................................. 90
4.5.5 Temperature Compensation for VREF and Shunt Sensors ........................................ 90
4.5.6 Temperature Compensation of VREF and Current Transformers ............................... 92
4.6 Connecting I
2
C EEPROMs .................................................................................................... 94
4.7 Connecting Three-Wire EEPROMs ....................................................................................... 94
4.8 UART0 (TX/RX) .................................................................................................................... 94
4.9 Optical Interface (UART1) ..................................................................................................... 94
4.10 Connecting the Reset Pin...................................................................................................... 95
4.11 Connecting the Emulator Port Pins ........................................................................................ 96
4.12 Flash Programming ............................................................................................................... 96
4.12.1 Flash Programming via the ICE Port .......................................................................... 96
4.12.2 Flash Programming via the SPI Port .......................................................................... 96
4.13 MPU Demonstration Code..................................................................................................... 96
4.14 Crystal Oscillator ................................................................................................................... 97
4.15 Meter Calibration................................................................................................................... 97
Firmware Interface ....................................................................................................................... 98
5.1 I/O RAM Map –Functional Order ........................................................................................... 98
5.2 I/O RAM Map – Alphabetical Order ..................................................................................... 104
5.3 Reading the Info Page (71M6543H and 71M6543GH only).................................................. 118
5.4 CE Interface Description ..................................................................................................... 120
5.4.1 CE Program ............................................................................................................ 120
5.4.2 CE Data Format ...................................................................................................... 120
5.4.3 Constants ................................................................................................................ 120
5.4.4 Environment ............................................................................................................ 121
5.4.5 CE Calculations....................................................................................................... 121
5.4.6 CE Front-End Data (Raw Data) ............................................................................... 122
5.4.7 CE Status and Control ............................................................................................. 123
© 2008–2011 Teridian Semiconductor Corporation
3
4
5
v1.2
71M6543F/H and 71M6543G/GH Data Sheet
5.4.8 CE Transfer Variables ............................................................................................. 125
5.4.9 Pulse Generation..................................................................................................... 127
5.4.10 CE Calibration Parameters ...................................................................................... 130
5.4.11 CE Flow Diagrams .................................................................................................. 131
6
71M6543 Specifications............................................................................................................. 133
6.1 Absolute Maximum Ratings ................................................................................................. 133
6.2 Recommended External Components ................................................................................. 134
6.3 Recommended Operating Conditions .................................................................................. 134
6.4 Performance Specifications ................................................................................................. 135
6.4.1 Input Logic Levels ................................................................................................... 135
6.4.2 Output Logic Levels................................................................................................. 135
6.4.3 Battery Monitor ........................................................................................................ 136
6.4.4 Temperature Monitor ............................................................................................... 137
6.4.5 Supply Current ........................................................................................................ 138
6.4.6 V3P3D Switch ......................................................................................................... 139
6.4.7 Internal Power Fault Comparators ........................................................................... 139
6.4.8 2.5 V Voltage Regulator – System Power ................................................................ 139
6.4.9 2.5 V Voltage Regulator – Battery Power ................................................................. 140
6.4.10 Crystal Oscillator ..................................................................................................... 140
6.4.11 Phase-Locked Loop (PLL) ....................................................................................... 140
6.4.12 LCD Drivers ............................................................................................................ 140
6.4.13 VLCD Generator...................................................................................................... 140
6.4.14 71M6543 VREF ....................................................................................................... 143
6.4.15 ADC Converter ........................................................................................................ 144
6.4.16 Pre-Amplifier for IADC0-IADC1 ................................................................................ 145
6.5 Timing Specifications .......................................................................................................... 146
6.5.1 Flash Memory ......................................................................................................... 146
6.5.2 SPI Slave ................................................................................................................ 146
6.5.3 EEPROM Interface .................................................................................................. 146
6.5.4 RESET Pin .............................................................................................................. 147
6.5.5 Real-Time Clock (RTC) ........................................................................................... 147
6.6 Typical Performance Data .........................................................
Error! Bookmark not defined.
6.7 100-Pin LQFP Package Outline Drawing ............................................................................. 148
6.8 71M6543 Pinout .................................................................................................................. 149
6.9 71M6543 Pin Descriptions................................................................................................... 150
6.9.1 71M6543 Power and Ground Pins ........................................................................... 150
6.9.2 71M6543 Analog Pins ............................................................................................. 151
6.9.3 71M6543 Digital Pins............................................................................................... 152
6.9.4 I/O Equivalent Circuits ............................................................................................. 154
7
Ordering Information ................................................................................................................. 155
7.1 71M6543 Ordering Guide .................................................................................................... 155
8
Related Information ................................................................................................................ 155
9
Contact Information ................................................................................................................ 155
Appendix A: Acronyms ..................................................................................................................... 156
Appendix B: Revision History ........................................................................................................... 157
4
© 2008–2011 Teridian Semiconductor Corporation
v1.2
71M6543F/H and 71M6543G/GH Data Sheet
Figures
Figure 1: IC Functional Block Diagram ..................................................................................................... 9
Figure 2: AFE Block Diagram (Shunts: One-Local, Three-Remotes) ...................................................... 12
Figure 3. AFE Block Diagram (Four CTs) ............................................................................................... 13
Figure 4: States in a Multiplexer Frame (MUX_DIV[3:0] = 6) .................................................................. 17
Figure 5: States in a Multiplexer Frame (MUX_DIV[3:0] = 7) .................................................................. 17
Figure 6: General Topology of a Chopped Amplifier ............................................................................... 21
Figure 7: CROSS Signal with
CHOP_E
= 00........................................................................................... 21
Figure 8: RTM Timing ............................................................................................................................ 26
Figure 9. Pulse Generator FIFO Timing ................................................................................................. 28
Figure 10: Samples from Multiplexer Cycle (Frame) ............................................................................... 29
Figure 11: Accumulation Interval ............................................................................................................ 29
Figure 12: Interrupt Structure ................................................................................................................. 46
Figure 13: Automatic Temperature Compensation ................................................................................. 54
Figure 14: Optical Interface.................................................................................................................... 58
Figure 15: Optical Interface (UART1) ..................................................................................................... 58
Figure 16: Connecting an External Load to DIO Pins ............................................................................. 60
Figure 17: LCD Waveforms ................................................................................................................... 65
Figure 18: 3-wire Interface. Write Command, HiZ=0. ............................................................................. 67
Figure 19: 3-wire Interface. Write Command, HiZ=1 .............................................................................. 68
Figure 20: 3-wire Interface. Read Command. ........................................................................................ 68
Figure 21: 3-Wire Interface. Write Command when CNT=0 ................................................................... 68
Figure 22: 3-wire Interface. Write Command when HiZ=1 and WFR=1. ................................................. 68
Figure 23: SPI Slave Port - Typical Multi-Byte Read and Write operations.............................................. 70
Figure 24: Voltage, Current, Momentary and Accumulated Energy......................................................... 75
Figure 25: Operation Modes State Diagram ........................................................................................... 76
Figure 26: MPU/CE Data Flow ............................................................................................................... 85
Figure 27: Resistive Voltage Divider (Voltage Sensing) .......................................................................... 86
Figure 28. CT with Single-Ended Input Connection (Current Sensing) .................................................... 86
Figure 29: CT with Differential Input Connection (Current Sensing) ........................................................ 86
Figure 30: Differential Resistive Shunt Connections (Current Sensing)................................................... 86
Figure 31: System Using Three-Remotes and One-Local (Neutral) Sensor ............................................ 87
Figure 32. System Using Current Transformers ..................................................................................... 88
Figure 33: I
2
C EEPROM Connection...................................................................................................... 94
Figure 34: Connections for UART0 ........................................................................................................ 94
Figure 35: Connection for Optical Components ...................................................................................... 95
Figure 36: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right) ....... 96
Figure 37: External Components for the Emulator Interface ................................................................... 96
Figure 38. Trim Fuse Bit Mapping ........................................................................................................ 118
Figure 39: CE Data Flow: Multiplexer and ADC .................................................................................... 131
Figure 40: CE Data Flow: Scaling, Gain Control, Intermediate Variables for one Phase........................ 131
Figure 41: CE Data Flow: Squaring and Summation Stages ................................................................. 132
Figure 42: Wh Error from 200 A to 0.1 A at 60 Hz, 240 VAC ......................
Error! Bookmark not defined.
Figure 43: VARh Error from 200 A to 0.1 A at 60 Hz, 240 VAC...................
Error! Bookmark not defined.
Figure 44: Wh Error from 200 A to 0.1 A at Various Frequencies (0° Load angle, 240 VAC) .............
Error!
Bookmark not defined.
Figure 45: 100-pin LQFP Package Outline ........................................................................................... 148
Figure 46: Pinout for the LQFP-100 Package ....................................................................................... 149
Figure 47: I/O Equivalent Circuits......................................................................................................... 154
v1.2
© 2008–2011 Teridian Semiconductor Corporation
5
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    71M6543H
    描述和应用

    Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation
    可选增益1或8的一个电流电能表计量芯片的补偿

    总157页 (2164K) MAXIM INTEGRATED PRODUCTS
    MAXIM INTEGRATED PRODUCTS
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