5962-89657013C [MAXIM]

D/A Converter, 1 Func, Parallel, Word Input Loading, CQCC28, CERAMIC, LCC-28;
5962-89657013C
型号: 5962-89657013C
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

D/A Converter, 1 Func, Parallel, Word Input Loading, CQCC28, CERAMIC, LCC-28

文件: 总5页 (文件大小:31K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SCOPE: CMOS, PARALLEL-LOADING, DUAL, MULTIPLYING 12-BIT D/A CONVERTER  
Device Type  
Generic Number  
MX7537U(x)/883B  
MX7537T(x)/883B  
MX7537S(x)/883B  
MX7547U(x)/883B  
MX7547T(x)/883B  
MX7547S(x)/883B  
01  
02  
03  
04  
05  
06  
Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:  
Outline Letter  
Mil-Std-1835  
Case Outline  
Package Code  
MAXIM SMD  
Q
E
L
3
GDIP1-T24 or CDIP2-T24  
CQCC1-N28  
24 LEAD CERDIP  
28 LEADLESS CHIP L28  
J24  
Absolute Maximum Ratings:  
VDD to DGND ........................................................................................………. -0.3V, + 17V  
VRFBA, VRFBB to AGND .......................................................................................………. ±25V  
VREFA, VREFB to AGND .......................................................................................………. ±25V  
Digital Input Voltage to DGND .....................................................……… -0.3V, (VDD+0.3V)  
IOUTA, IOUTB Voltage to DGND ...............................................…….... -0.3V, (VDD+0.3V)  
AGND to DGND ............................................................................…….... -0.3V, (VDD+0.3V)  
Lead Temperature (soldering, 10 seconds) ........................................................................ +300°C  
Storage Temperature ........................................................................................... -65°C to +150°C  
Continuous Power Dissipation ..........................................................................……... TA=+70°C  
24 pin CERDIP(derate 12.5mW/°C above +70°C) ...............................................…….. 1000mW  
28 pin LCC(derate 10.2mW/°C above +70°C) .......................................................…….. 816mW  
Junction Temperature TJ .....................................................................................…….... +150°C  
Thermal Resistance, Junction to Case, ΘJC  
24 pin CERDIP................................................................................................…….... 40°C/W  
28 pin LCC .....................................................................................................……..... 15°C/W  
Thermal Resistance, Junction to Ambient, ΘJA:  
24 pin CERDIP................................................................................................…….... 80°C/W  
28 pin LCC .....................................................................................................………. 98°C/W  
Recommended Operating Conditions  
Ambient Operating Range (TA) ............................................................……... -55°C to +125°C  
Logic Supply Voltage (VLOGIC) ................................................................……... +4.5V to +5.5V  
Positive Supply Voltage (VDD)..............................................................……... +11.4V to +16.5V  
Negative Supply Voltage (VEE)...............................................................……... -11.4V to -16.5V  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.  
These are stress ratings only, and functional operation of the device at these or any other conditions beyond  
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
----------------------- Electrical Characteristics of MX7537/47/883B for /883B  
and SMD 5962-87763 and SMD 5962-89657  
19-0057  
Page 2 of  
Rev. C  
7
TABLE 1. ELECTRICAL TESTS:  
CONDITIONS  
-55 °C <=TA<= +125°C 1/  
Unless otherwise specified  
Group A  
Subgroup type  
Device  
Limits Limits Units  
Min Max  
TEST  
ACCURACY  
Symbol  
All  
Resolution  
RES  
RA  
1,2,3  
1,2,3  
12.0  
Bits  
1,2,4,5  
3,6  
Relative Accuracy  
VDD=+10.8V and VDD=+16.5V  
LSB  
±0.5  
V
DD=10.8V (MX7547 only)  
±1.0  
±1.0  
±2.0  
±3.0  
±6.0  
All  
Differential Nonlinearity  
Gain Error  
DNL  
AE  
Guaranteed monotonic  
Measured using RFBA, RFBB; DAC  
registers loaded with all 1’s,  
1,2,3  
1,2,3  
LSB  
LSB  
1,4  
2,5  
3,6  
V
DD=10.8V  
All  
Gain Tempco  
Gain/Temperature  
NOTE 2  
Output Leakage Current  
IOUTA, IOUTB  
TCFS  
ILKG  
4
±5.0 ppm/°C  
All  
All  
VDD=+16.5V, DAC registers  
loaded with all 0s  
1,3  
2
nA  
±10  
±250  
20  
VREFA, VREFB Input  
Leakage  
VREFA, VREFB Input  
Resistance Match  
RREF  
RREF  
VIH  
VDD=+10.8V  
1,2,3  
1,2,3  
1,2,3  
1,2,3  
9
kΩ  
%
V
V
DD=+10.8V  
1,4  
2,3,5,6  
All  
±1.0  
±3.0  
Digital Input High  
Voltage  
Digital Input Low  
Voltage  
Digital Input Leakage  
Current  
VDD=+10.8V and VDD=+16.5V  
VDD=+10.8V and VDD=+16.5V  
VIN=+0V or 16.5V  
2.4  
All  
All  
VIL  
0.8  
V
IIN  
1,3  
2
±1.0 µA  
±10  
All  
All  
Digital Input Capacitance CIN  
4
1,2,3  
1,2,3  
10 pF  
Supply Voltage  
Supply Current  
Current Settling Time  
VDD  
IDD  
tSL  
Operating range, VDD=16.5V  
10.8  
16.5  
V
All  
2.0 mA  
4,5,6  
9,10,11  
4
1.5  
1.5  
To 0.5 LSB, IOUT load =100,  
CEXT=13pF, DAC output  
measured from falling edge of WR  
To 0.5 LSB, IOUT load =100,  
CEXT=13pF, DAC output  
measured from rising edge of WR  
µs  
µs  
___  
1,2,3  
4,5,6  
Current Settling Time  
tSL  
___  
VREFA  
to IOUTA  
Feedthrough  
Error  
DAC  
registers  
loaded  
VREFA=20Vp-p  
10kHz sine wave,  
VREFB=0V  
FTE  
with all 0s  
4,5,6  
(SMD)  
-70  
-70  
-65 dB  
(SMD)  
VREFB  
to IOUTB  
NOTE 2  
VREFB=20Vp-p  
10kHz sine wave,  
VREFA=0V  
VREFA  
DAC  
registers  
loaded  
VREFA=20Vp-p  
10kHz sine wave,  
VREFB=0V  
to IOUTA  
Feedthrough  
Error  
FTE  
1,2,3  
with all 0s  
4
-65 dB  
(SMD)  
VREFB  
to IOUTB  
NOTE 2  
VREFB=20Vp-p  
10kHz sine wave,  
VREFA=0V  
(SMD)  
----------------------- Electrical Characteristics of MX7537/47/883B for /883B  
and SMD 5962-87763 and SMD 5962-89657  
19-0057  
Page 3 of  
Rev. C  
7
CONDITIONS  
-55 °C <=TA<= +125°C 1/  
Unless otherwise specified  
Group A  
Subgroup  
Device  
type  
Limits  
Min  
Limits Units  
Max  
TEST  
Symbol  
01,02,03  
Power-Supply  
Rejection Ratio  
PSRR  
1
2,3  
V
DD=10.8V, VDD=12V±5%  
±0.01  
±0.02  
%/%  
1
2,3  
V
V
DD=10.8V, VDD=VDD MAX -  
DD MIN  
±0.01  
±0.02  
-70 dB  
All  
All  
Output Capacitance  
(IOUTA, IOUTB)  
COUT  
DAC A, DAC B loaded with 0s  
4
4
DAC A, DAC B loaded with 1s  
VREFA=20Vp-p, 10kHz sine  
to IOUTA wave, VREFB=0V  
140  
dB  
VREFA  
All  
Channel-to-Channel  
Isolation  
-84  
VREFB to VREFB=20Vp-p, 10kHz sine  
IOUTB  
wave, VREFA=0V  
TIMING  
01,02,03  
01,02,03  
All  
Address Valid to  
Write-setup Time  
Address Valid to  
Write-hold Time  
Data-setup Time  
t1  
t2  
t3  
t4  
t5  
9
20  
30  
15  
25  
60  
80  
25  
0
ns  
ns  
ns  
ns  
ns  
10,11  
9
10,11  
9
10,11  
9,10,11  
9,10,11  
All  
Data-hold Time  
Chip Select or Update  
to Write-setup Time  
01,02,03  
9
80  
100  
0
04,05,06  
All  
10,11  
9,10,11  
Chip Select orUpdate  
to Write Hold Time  
Write Pulse Width  
t6  
t7  
t8  
ns  
ns  
ns  
All  
All  
9
80  
100  
80  
10,11  
9
Clear Pulse Width  
10,11  
100  
NOTE 1: Conditions unless otherwise specified, 4.5VVDD5.5V. VDD=10.8V to 16.5V, AGND=DGND=0V,  
use maximum possible reference voltage.  
NOTE 2: Typical number, for design aid only.  
MODE SELECTION TABLE:  
MX7537  
___  
CLR  
___  
UPD  
___  
CS  
1
X
X
0
0
0
0
1
___  
WR  
X
1
X
0
0
0
0
0
A1  
X
X
X
0
A0  
X
X
X
0
Function  
1
1
0
1
1
1
1
1
1
1
X
1
1
1
1
0
No data transfer  
No data transfer  
All registers cleared  
DAC A LS input register loaded with D7-D0  
DAC A MS input register loaded with D3-D0  
DAC B LS input register loaded with D7-D0  
0
1
1
0
1
X
1
X
DAC B MS input register loaded with D3-D0  
DAC A, DAC B registers updated simultaneously from input  
registers. Input registers not changed.  
1
0
0
0
X
X
DAC A, DAC B registers are transparent. Input registers loaded.  
X = Don’t care  
----------------------- Electrical Characteristics of MX7537/47/883B for /883B  
and SMD 5962-87763 and SMD 5962-89657  
19-0057  
Page 4 of  
Rev. C  
7
MODE SELECTION TABLE:  
MX7547  
___  
CSA  
X
___  
CSB  
X
___  
WR  
1
Function  
No data transfer  
No data transfer  
1
1
X
___  
___  
0
A rising edge on CSA or CSB transfer data to the respective DAC.  
DAC A register loaded from data bus.  
DAC B register loaded from data bus.  
DAC A and DAC B registers loaded from data bus.  
0
1
0
1
0
0
X= don’t care  
WR input is edge-triggered.  
ORDERING INFORMATION:  
Package  
Pkg. Code  
J24  
J24  
Device ID  
SMD Number  
01  
02  
03  
01  
02  
03  
04  
05  
06  
04  
05  
06  
24 pin CERDIP  
24 pin CERDIP  
24 pin CERDIP  
28 pin LCC  
28 pin LCC  
28 pin LCC  
24 pin CERDIP  
24 pin CERDIP  
24 pin CERDIP  
28 pin LCC  
28 pin LCC  
28 pin LCC  
MX7537UQ/883B  
MX7537TQ/883B  
MX7537SQ/883B  
MX7537UE/883B  
MX7537TE/883B  
MX7537SE/883B  
MX7547UQ/883B  
MX7547TQ/883B  
MX7547SQ/883B  
MX7547UE/883B  
MX7547TE/883B  
MX7547SE/883B  
5962-8776303LA  
5962-8776302LA  
5962-8776301LA  
5962-87763033C  
5962-87763023C  
5962-87763013C  
5962-8965703LA  
5962-8965702LA  
5962-8965701LA  
5962-89657033C  
5962-89657023C  
5962-89657013C  
J24  
L28  
L28  
L28  
J24  
J24  
J24  
L28  
L28  
L28  
TERMINAL CONNECTIONS:  
MX7537  
J24  
AGNDA  
IOUTA  
MX7537  
L28  
NC  
AGNDA  
IOUTA  
MX7547  
J24  
AGNDA  
IOUTA  
RFBA  
MX7547  
L28  
NC  
AGNDA  
IOUTA  
MX7537 MX7537 MX7547 MX7547  
J24  
A0  
A1  
L28  
NC  
D6  
J24  
D8  
D9  
L28  
NC  
D6  
1
2
3
15  
16  
17  
RFBA  
____  
CLR  
___  
WR  
___  
UPD  
VDD  
D7  
D10  
D7  
4
5
6
7
VREFA  
RFBA  
VREFA  
RFBA  
18  
19  
20  
21  
A0  
A1  
D11  
(MSB)  
___  
D8  
__  
CS  
D0  
VREFA  
___  
CSA  
(LSB)D0  
VREFA  
D9  
WR  
__  
CS  
D0  
___  
CSA  
(LSB)D0  
____  
CLR  
___  
____  
CSB  
VDD  
D10  
D11  
D1  
D1  
VREFB  
WR  
8
9
D2  
D3  
NC  
D1  
D2  
D3  
NC  
D1  
22  
23  
RFBB  
IOUTB  
NC  
___  
VREFB  
RFBB  
NC  
___  
UPD  
WR  
10  
D4  
D2  
D4  
D2  
24  
AGNDB VDD  
IOUTB  
____  
CSB  
VDD  
VREFB  
RFBB  
IOUTB  
11  
12  
13  
14  
D5  
DGND  
D6  
D3  
D4  
D5  
DGND  
D5  
DGND  
D6  
D3  
D4  
D5  
DGND  
25  
26  
27  
28  
VREFB  
RFBB  
IOUTB  
D7  
D7  
AGNDB  
----------------------- Electrical Characteristics of MX7537/47/883B for /883B  
and SMD 5962-87763 and SMD 5962-89657  
19-0057  
Page 5 of  
Rev. C  
7
QUALITY ASSURANCE  
Sampling and inspection procedures shall be in accordance with MIL-Prf-38535, Appendix A as specified in Mil-Std-883.  
Screening shall be in accordance with Method 5004 of Mil-Std-883. Burn-in test Method 1015:  
1. Test Condition, A, B, C, or D.  
2. TA = +125°C minimum.  
3. Interim and final electrical test requirements shall be specified in Table 2.  
Quality conformance inspection shall be in accordance with Method 5005 of Mil-Std-883, including Groups A, B, C, and D inspection.  
Group A inspection:  
1. Tests as specified in Table 2.  
2. Selected subgroups in Table 1, Method 5005 of Mil-Std-883 shall be omitted.  
Group C and D inspections:  
a. End-point electrical parameters shall be specified in Table 1.  
b. Steady-state life test, Method 1005 of Mil-Std-883:  
1. Test condition A, B, C, D.  
2. TA = +125°C, minimum.  
3. Test duration, 1000 hours, except as permitted by Method 1005 of Mil-Std-883.  
TABLE 2.  
ELECTRICAL TEST REQUIREMENTS  
Mil-Std-883 Test Requirements  
Subgroups  
per Method 5005, Table 1  
Interim Electric Parameters  
Method 5004  
1
Final Electrical Parameters  
Method 5005  
1*, 2, 3, 9, 10, 11  
Group A Test Requirements  
Method 5005  
Group C and D End-Point Electrical Parameters  
Method 5005  
1, 2, 3, 4**, 5**, 6**, 9, 10**, 11**  
1
*
PDA applies to Subgroup 1 only.  
** If not tested shall be guaranteed to the limits specified in Table 1.  
----------------------- Electrical Characteristics of MX7537/47/883B for /883B  
and SMD 5962-87763 and SMD 5962-89657  
19-0057  
Page 6 of  
Rev. C  
7

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