LTM4644IY-1#PBF_技术文档

LTM4644/LTM4644-1

Quad DC/DC µModule

Regulator with Configurable 4A Output Array

FEATURES

DESCRIPTION

Quad Output Step-Down µModule^®Regulator with 4A

per Output

The LTM^®4644/LTM4644-1 is a quad DC/DC step-down

µModule (micromodule) regulator with 4A per output.

Outputs can be paralleled in an array for up to 16A capabil-

ity. Included in the package are the switching controllers,

powerFETs,inductorsandsupportcomponents.Operating

over an input voltage range of 4V to 14V or 2.375V to 14V

with an external bias supply, the LTM4644/LTM4644-1

supports an output voltage range of 0.6V to 5.5V. Its

high efficiency design delivers 4A continuous (5A peak)

output current per channel. Only bulk input and output

capacitors are needed.

n

Wide Input Voltage Range: 4V to 14V

n

2.375V to 14V with External Bias

n

0.6V to 5.5V Output Voltage

4A DC, 5A Peak Output Current Each Channel

Up to 5.5W Power Dissipation (T = 60°C, 200 LFM,

A

No Heat Sink)

n

1.5ꢀ Total Output Voltage Regulation

Current Mode Control, Fast Transient Response

Parallelable for Higher Output Current

Output Voltage Tracking

Internal Temperature Sensing Diode Output

External Frequency Synchronization

Overvoltage, Current and Temperature Protection

9mm × 15mm × 5.01mm BGA Package

LTM4644

LTM4644-1

Top Feedback Resistor

from V -to-V

Integrated

60.4k 0.5ꢀ

External (to be added on

PCB)

OUT

FB

(one resistor per channel) Resistor

Application

General

Applications

To Interface with

PMBus power system

management supervisory

ICs such as the LTC2975

APPLICATIONS

n

Multirail Point of Load Regulation

FPGAs, DSPs and ASICs Applications

Configurable Output Array*

n

4A

8A

All registered trademarks and trademarks are the property of their respective owners.

12A

16A

4A

* Note 4

Click to view associated TechClip Videos.

TYPICAL APPLICATION

4V to 14V Input, Quad 0.9V, 1V, 1.2V and 1.5V Output DC/DC µModule Regulator*

1.5V Output Efficiency and

Power Loss (Each Channel)

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ꢏꢀꢐ4644

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4ꢅ

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ꢀꢗꢐꢘ ꢈꢍꢇꢎ ꢍꢇꢎ

4644 ꢉꢂꢌꢘꢙ

4644 ꢀꢁꢂꢃꢄ

ꢢꢀ ꢣ 6ꢂꢤꢑꢥ ꢋꢂꢂꢏꢔꢐꢥ ꢇꢖ ꢦꢗꢁꢀ ꢈꢆꢇꢒ

ꢁ

4644fe

1

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

ꢙꢚꢃ ꢛꢜꢆꢝ

V , SV (Per Channel).............................. –0.3V to 15V

IN

ꢛ

ꢜꢠꢏ

ꢙꢢꢂꢄꢅꢣꢟꢟꢏ

ꢏ

ꢔ

ꢕ

4

ꢐ

6

ꢇ

V

(Per Channel) (Note 3) ............–0.3V to SV or 6V

OUT

IN

ꢛ

ꢁꢠꢊ

ꢖꢀꢏ

ꢚꢞꢙꢏ

RUN (Per Channel)..................................... –0.3V to 15V

ꢂ

ꢀ

ꢄ

ꢊ

ꢆ

ꢖ

ꢟꢛ

ꢜꢠꢏ

ꢁꢠꢊ

ꢡꢚꢊꢆꢏ

INTV (Per Channel) ............................... –0.3V to 3.6V

CC

ꢄꢚꢡꢃꢏ

ꢄꢉꢅꢜꢠ

ꢖꢀꢔ

ꢢꢞꢠꢏ

PGOOD, MODE, TRACK/SS,

ꢃꢁꢚꢚꢊꢔ ꢃꢁꢚꢚꢊꢏ ꢜꢠꢙꢛ

ꢄꢄꢏ

ꢛ

FB (Per Channel)...................................–0.3V to INTV

ꢚꢞꢙꢔ

ꢙꢢꢂꢄꢅꢣꢟꢟꢔ

CC

ꢟꢛ

ꢜꢠꢔ

ꢡꢚꢊꢆꢔ

CLKOUT (Note 3), CLKIN.......................–0.3V to INTV

ꢁꢠꢊ

CC

ꢄꢚꢡꢃꢔ

ꢟꢁꢠꢊ

Internal Operating Temperature Range

ꢛ

ꢢꢞꢠꢔ

ꢜꢠꢔ

(Notes 2, 5)............................................ –40°C to 125°C

Storage Temperature Range .................. –55°C to 125°C

Peak Solder Reflow Body Temperature ................. 245°C

ꢃꢁꢚꢚꢊꢕ ꢙꢆꢡꢃ ꢜꢠꢙꢛ

ꢄꢄꢔ

ꢚꢞꢙꢕ

ꢁꢠꢊ

ꢙꢢꢂꢄꢅꢣꢟꢟꢕ

ꢁ

ꢗ

ꢘ

ꢖꢀꢕ

ꢟꢛ

ꢜꢠꢕ

ꢡꢚꢊꢆꢕ

ꢄꢚꢡꢃꢕ

ꢖꢀ4

ꢛ

ꢜꢠꢕ

ꢜꢠꢙꢛ

ꢢꢞꢠꢕ

ꢄꢄꢕ

ꢃꢁꢚꢚꢊ4 ꢄꢉꢅꢚꢞꢙ

ꢚꢞꢙ4

ꢁꢠꢊ

ꢙꢢꢂꢄꢅꢣꢟꢟ4

ꢢꢞꢠ4

ꢅ

ꢉ

ꢜꢠꢙꢛ

ꢄꢄ4

ꢄꢚꢡꢃ4

ꢛ

ꢜꢠ4

ꢟꢛ

ꢡꢚꢊꢆ4

ꢜꢠ4

ꢀꢁꢂ ꢃꢂꢄꢅꢂꢁꢆ

ꢇꢇꢈꢉꢆꢂꢊ ꢋꢌꢍꢍ ꢎ ꢏꢐꢍꢍ ꢎ ꢐꢑꢒꢏꢍꢍꢓ

T

= 125°C, θ = 17°C/W, θ = 2.75°C/W,

JMAX

JCtop

JCbottom

θ

+ θ = 11°C/W, θ = 10°C/W

JB

BA JA

θ VALUES PER JESD 51-12

WEIGHT = 1.9g

http://www.linear.com/product/LTM4644#orderinfo

ORDER INFORMATION

PART MARKING*

PACKAGE

MSL

RATING

TEMPERATURE RANGE

(SEE NOTE 2)

PART NUMBER

LTM4644EY#PBF

LTM4644IY#PBF

LTM4644MPY#PBF

LTM4644IY

PAD OR BALL FINISH

SAC305 (RoHS)

SnPb (63/37)

DEVICE

FINISH CODE

TYPE

BGA

LTM4644Y

LTM4644Y-1

e1

e0

e1

e0

3

–40°C to 125°C

–55°C to 125°C

–40°C to 125°C

–55°C to 125°C

–40°C to 125°C

LTM4644MPY

SnPb (63/37)

LTM4644EY-1#PBF

LTM4644IY-1#PBF

LTM4644IY-1

SAC305 (RoHS)

SnPb (63/37)

Note: The LTM4644-1 does not include the internal top feedback resistor.

Consult Marketing for parts specified with wider operating temperature

ranges. *Device temperature grade is indicated by a label on the shipping

container. Pad or ball finish code is per IPC/JEDEC J-STD-609.

• Recommended LGA and BGA PCB Assembly and Manufacturing

Procedures:

www.linear.com/umodule/pcbassembly

• Package and Tray Drawings:

www.linear.com/packaging

• Terminal Finish Part Markings:

www.linear.com/leadfree

4644fe

2

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C (Note 2). V_IN= 12V, per the typical application.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX UNITS

Switching Regulator Section: per Channel

l

V , SV

Input DC Voltage

SV = V

IN

4

14

V

IN

V

Output Voltage Range

0.6

5.5

OUT(RANGE)

OUT(DC)

Output Voltage, Total Variation

with Line and Load

C

= 22µF, C

= 100µF Ceramic,

IN

OUT

l

MODE = INTV ,V = 4V to 14V, I

= 0A to 4A (Note 4)

1.477

1.1

1.50 1.523

V

CC IN

FB(BOT)

OUT

LTM4644: R

LTM4644-1: R

= 40.2k

= 60.4k, R

= 40.2k

FB(TOP)

FB(BOT)

V

RUN

RUN Pin On Threshold

V

Rising

RUN

1.2

1.3

V

I

Input Supply Bias Current

V

= 12V, V

= 1.5V, MODE = INTV

= 1.5V, MODE = GND

6

2

11

mA

µA

Q(SVIN)

IN

OUT

CC

Shutdown, RUN = 0, V = 12V

IN

I

Input Supply Current

V

= 12V, V

= 1.5V, I = 4A

OUT

0.62

A

S(VIN)

IN

OUT

Output Continuous Current Range

Line Regulation Accuracy

Load Regulation Accuracy

Output Ripple Voltage

= 1.5V (Note 4)

0

4

0.15

1

OUT(DC)

IN

l

ΔV

(Line)/V

= 1.5V, V = 4V to 14V, I = 0A

OUT

0.04

0.5

5

ꢀ/V

ꢀ

OUT

IN

(Load)/V

= 1.5V, I

= 0A to 4A

OUT

V

I

V

= 0A, C

= 1.5V

= 100µF Ceramic, V = 12V,

mV

OUT(AC)

OUT

IN

OUT

ΔV

Turn-On Overshoot

Turn-On Time

I

= 0A, C

= 1.5V

= 100µF Ceramic, V = 12V,

30

2.5

160

40

7

mV

ms

mV

µs

OUT(START)

OUT

IN

V

t

C

V

= 100µF Ceramic, No Load, TRACK/SS = 0.01µF,

= 1.5V

START

OUT

= 12V, V

IN

OUT

ΔV

OUTLS

Peak Deviation for Dynamic Load Load: 0ꢀ to 50ꢀ to 0ꢀ of Full Load, C

= 47µF

OUT

Ceramic, V = 12V, V

= 1.5V

IN

OUT

t

Settling Time for Dynamic Load

Step

Load: 0ꢀ to 50ꢀ to 0ꢀ of Full Load, C

Ceramic, V = 12V, V = 1.5V

= 47µF

SETTLE

OUT

IN

OUT

I

Output Current Limit

Voltage at FB Pin

V

= 12V, V

= 1.5V

6

A

OUTPK

IN

OUT

V

FB

I

= 0A, V

= 1.5V, 0°C to 125°C

= 1.5V, –40°C to 125°C

0.594

0.592

0.60 0.606

0.60 0.608

V

OUT

l

I

FB

Current at FB Pin

(Note 3)

30

nA

R

FBHI

Resistor Between V

and FB

OUT

LTM4644 Only

60.05 60.40 60.75

kΩ

Pins

I

Track Pin Soft-Start Pull-Up

Current

TRACK/SS = 0V

2.5

4

µA

TRACK/SS

V

Undervoltage Lockout

V

IN

V

IN

Falling

Hysteresis

2.4

2.6

350

2.8

V

mV

IN(UVLO)

IN

t

Minimum On-Time

Minimum Off-Time

PGOOD Trip Level

(Note 3)

40

70

ns

ON(MIN)

OFF(MIN)

V

With Respect to Set Output

Ramping Negative

Ramping Positive

PGOOD

FB

V

–13

7

–10

10

–7

13

ꢀ

FB

I

PGOOD Leakage

2

µA

V

PGOOD

V

PGOOD Voltage Low

I

= 1mA

PGOOD

0.02

3.3

0.5

1

0.1

3.4

PGL

Internal V Voltage

SV = 4V to 14V

3.2

V

INTVCC

OSC

CC

IN

Load Reg INTV Load Regulation

I

= 0mA to 20mA

ꢀ

CC

f

Oscillator Frequency

CLKIN Threshold

MHz

V

CLKIN

0.7

4644fe

3

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

and guaranteed over full –55°C to 125°C internal operating temperature

range. Note that the maximum ambient temperature consistent with

these specifications is determined by specific operating conditions in

conjunction with board layout, the rated package thermal resistance and

other environmental factors.

Note 2: The LTM4644E/LTM4644E-1 is tested under pulsed load

conditions such that T ≈ T . The LTM4644E/LTM4644-1 is guaranteed to

Note 3: 100ꢀ tested at wafer level.

J

A

meet performance specifications over the 0°C to 125°C internal operating

temperature range. Specifications over the full –40°C to 125°C internal

operating temperature range are assured by design, characterization and

correlation with statistical process controls. The LTM4644I/LTM4644I-1

is guaranteed to meet specifications over the full –40°C to 125°C internal

operating temperature range. The LTM4644MP/LTM4644MP-1 is tested

Note 4: See output current derating curves for different V , V

and T .

A

IN OUT

Note 5: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

TYPICAL PERFORMANCE CHARACTERISTICS

(Per Channel)

Efficiency vs Load Current from

5V_IN(One Channel Operating)

Efficiency vs Load Current from

12V_IN(One Channel Operating)

DCM Mode Efficiency from

1.5V_OUT

ꢕꢌꢌ

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ꢔꢌ

ꢓꢒ

ꢓꢌ

ꢍꢒ

ꢍꢌ

ꢔꢍ

ꢔꢌ

ꢓꢍ

ꢓꢌ

ꢒꢍ

ꢒꢌ

6ꢍ

ꢎꢌꢌ

ꢙꢌ

ꢘꢌ

ꢗꢌ

6ꢌ

ꢖꢌ

4ꢌ

ꢔꢌ

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ꢎꢌ

ꢌ

ꢍꢙ

ꢁꢅꢉ

ꢘꢚꢘꢙ

ꢗꢚꢍꢙ

ꢕꢚꢓꢙ

ꢕꢚꢍꢙ

ꢕꢚꢗꢙ

ꢁꢅꢉ

ꢘꢙꢘꢚ

ꢗꢙꢒꢚ

ꢕꢙꢓꢚ

ꢕꢙꢒꢚ

ꢕꢙꢗꢚ

ꢁꢅꢉ

ꢖꢚ

ꢐꢈ

ꢎꢓꢚ

ꢌ

ꢘ

4

ꢌ

ꢘ

4

ꢌꢍꢌꢌꢎ

ꢌꢍꢌꢎ

ꢌꢍꢎ

ꢎ

ꢎꢌ

ꢕ

ꢗ

ꢕ

ꢗ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

4644 ꢖꢌꢕ

4644 ꢖꢌꢗ

4644 ꢕꢌꢔ

1.0V Output Transient Response

1.5V Output Transient Response

2.5V Output Transient Response

ꢇ

ꢉꢑꢌ

ꢉꢒꢌ

ꢒꢁꢓꢇꢄꢅꢆꢇ

ꢑꢁꢓꢇꢄꢅꢆꢇ

ꢒꢁꢓꢇꢄꢅꢆꢇ

ꢊꢔꢕꢔꢉꢑꢎꢈꢍꢅ

ꢊꢔꢕꢔꢉꢒꢎꢈꢍꢅ

ꢊꢔꢕꢔꢉꢑꢎꢈꢍꢅ

ꢈꢉꢊꢅ ꢋꢌꢍꢎ

ꢏꢊꢄꢅꢆꢇ

ꢈꢉꢊꢅ ꢋꢌꢍꢎ

ꢏꢊꢄꢅꢆꢇ

ꢈꢉꢊꢅ ꢋꢌꢍꢎ

ꢏꢊꢄꢅꢆꢇ

4644 ꢐꢁ4

4644 ꢐꢁꢑ

4644 ꢐꢁ6

ꢀꢁꢂꢃꢄꢅꢆꢇ

ꢗ ꢏꢇꢘ ꢆ ꢗ ꢙꢊ ꢌꢉ 4ꢊꢘ ꢏꢊꢄꢂꢃ

ꢀꢁꢂꢃꢄꢅꢆꢇ

ꢗ ꢏꢙꢑꢇꢘ ꢆ

ꢀꢁꢂꢃꢄꢅꢆꢇ

ꢗ ꢀꢙꢒꢇꢘ ꢆ ꢗ ꢚꢊ ꢌꢉ 4ꢊꢘ ꢏꢊꢄꢂꢃ

ꢉꢑꢌ

ꢇ

ꢔ

ꢗ ꢏꢀꢇꢘ ꢇ

ꢗ ꢏꢁꢛꢚ

ꢇ

ꢔ

ꢗ ꢏꢀꢇꢘ ꢇ

ꢗ ꢏꢁꢜꢛ

ꢗ ꢚꢊ ꢌꢉ 4ꢊꢘ ꢏꢊꢄꢂꢃ

ꢇ

ꢔ

ꢗ ꢏꢀꢇꢘ ꢇ

ꢗ ꢏꢁꢜꢛ

ꢆꢖ

ꢚꢚ

ꢉꢑꢌ

ꢆꢖ

ꢛꢛ

ꢉꢒꢌ

ꢆꢖ

ꢛꢛ

ꢉꢑꢌ

OUTPUT CAPACITOR = 1 • 47µF CERAMIC

4644fe

4

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL PERFORMANCE CHARACTERISTICS

3.3V Output Transient Response

5V Output Transient Response

Start-Up with No Load

ꢇ

ꢉꢒꢌ

ꢅ

ꢅꢊ

ꢓꢁꢔꢇꢄꢅꢆꢇ

ꢈꢋꢌꢍꢃꢄꢅꢆ

ꢊꢕꢖꢕꢉꢒꢎꢈꢍꢅ

ꢈꢉꢊꢅ ꢋꢌꢍꢎ

ꢏꢊꢄꢅꢆꢇ

ꢈꢉꢊꢅ ꢋꢌꢍꢎ

ꢏꢊꢄꢅꢆꢇ

ꢆ

ꢎꢏꢐ

ꢈꢋꢀꢆꢃꢄꢅꢆ

4644 ꢐꢁꢑ

4644 ꢇꢈꢉ

ꢀꢁꢂꢃꢄꢅꢆꢇ

ꢘ ꢚꢛꢚꢇꢙ ꢆ

ꢀꢁꢂꢃꢄꢅꢆꢇ

ꢀꢁꢂꢃꢄꢅꢆ

ꢑ ꢌꢋꢀꢆ

ꢇ

ꢘ ꢏꢀꢇꢙ ꢇ

ꢘ ꢚꢊ ꢌꢉ 4ꢊꢙ ꢏꢊꢄꢂꢃ

ꢇ

ꢘ ꢏꢀꢇꢙ ꢇ

ꢘ ꢓꢇꢙ ꢆ

ꢘ ꢚꢊ ꢌꢉ 4ꢊꢙ ꢏꢊꢄꢂꢃ

ꢆ

ꢑ ꢌꢒꢆꢓ ꢆ

ꢅꢊ ꢎꢏꢐ

ꢆꢗ

ꢉꢒꢌ

ꢆꢗ

ꢉꢒꢌ

ꢉꢒꢌꢎꢒꢌ ꢕꢊꢎꢊꢕꢆꢌꢉꢜ ꢘ 4ꢑꢂꢝ ꢕꢍꢜꢊꢞꢆꢕ

ꢉꢒꢌꢎꢒꢌ ꢕꢊꢎꢊꢕꢆꢌꢉꢛ ꢘ 4ꢜꢂꢝ ꢕꢍꢛꢊꢞꢆꢕ

ꢅꢊꢔꢏꢐ ꢕꢍꢔꢍꢕꢅꢐꢎꢖ ꢑ ꢌꢀꢈꢗꢘ ꢙꢍꢊꢚꢎ ꢛꢜꢛꢕꢐꢖꢎꢜꢚꢐꢅꢕ

ꢕꢍꢔꢍꢕꢅꢐꢎꢖ ꢝꢎꢔꢐꢅꢎꢊꢍꢜꢞ ꢟ ꢒꢒꢗꢘ ꢕꢛꢖꢍꢠꢅꢕ ꢕꢍꢔꢍꢕꢅꢐꢎꢖ

ꢎꢏꢐꢔꢏꢐ ꢕꢍꢔꢍꢕꢅꢐꢎꢖ ꢑ 4ꢡꢗꢘ ꢕꢛꢖꢍꢠꢅꢕ ꢕꢍꢔꢍꢕꢅꢐꢎꢖ

ꢙꢎꢘꢐꢢꢙꢐꢍꢖꢐ ꢕꢍꢔꢍꢕꢅꢐꢎꢖ ꢑ ꢈꢋꢌꢗꢘ

Start-Up with 4A Load

Short-Circuit with No Load

Short-Circuit with 4A Load

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ꢎꢏꢐꢓꢏꢐ ꢔꢍꢓꢍꢔꢅꢐꢎꢕ ꢑ 4ꢠꢖꢗ ꢔꢚꢕꢍꢟꢅꢔ ꢔꢍꢓꢍꢔꢅꢐꢎꢕ

ꢘꢎꢗꢐꢡꢘꢐꢍꢕꢐ ꢔꢍꢓꢍꢔꢅꢐꢎꢕ ꢑ ꢉꢋꢈꢖꢗ

ꢆꢊꢓꢏꢐ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ ꢑ ꢉꢌꢁꢂꢖ ꢗꢍꢊꢘꢎ ꢙꢚꢙꢔꢐꢕꢎꢚꢘꢐꢆꢔ

ꢔꢍꢓꢍꢔꢆꢐꢎꢕ ꢛꢎꢓꢐꢆꢎꢊꢍꢚꢜ ꢝ ꢀꢀꢂꢖ ꢔꢙꢕꢍꢞꢆꢔ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ

ꢎꢏꢐꢓꢏꢐ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ ꢑ 4ꢟꢂꢖ ꢔꢙꢕꢍꢞꢆꢔ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ

ꢆꢊꢓꢏꢐ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ ꢑ ꢉꢌꢁꢂꢖ ꢗꢍꢊꢘꢎ ꢙꢚꢙꢔꢐꢕꢎꢚꢘꢐꢆꢔ

ꢔꢍꢓꢍꢔꢆꢐꢎꢕ ꢛꢎꢓꢐꢆꢎꢊꢍꢚꢜ ꢝ ꢀꢀꢂꢖ ꢔꢙꢕꢍꢞꢆꢔ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ

ꢎꢏꢐꢓꢏꢐ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ ꢑ 4ꢟꢂꢖ ꢔꢙꢕꢍꢞꢆꢔ ꢔꢍꢓꢍꢔꢆꢐꢎꢕ

Recovery to No Load from

Short-Circuit

Output Ripple

Start Into Pre-Biased Output

ꢀ

ꢁꢂ

ꢃꢀꢄꢅꢁꢀ

ꢉ

ꢀ

ꢆꢇꢈ

ꢉꢀꢄꢅꢁꢀ

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ꢄꢅꢅꢊꢉꢇꢈꢀꢉ

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ꢆꢇꢈꢇꢉꢊꢋꢌꢍꢄ

ꢀ

ꢁꢂꢃ

ꢄꢅꢆꢇꢈꢀꢉ

4644 ꢤꢐ4

4644 ꢟꢉꢋ

4644 ꢠꢍꢡ

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ꢏ ꢐꢑꢂ

ꢀꢞꢞꢕꢣꢃꢄꢅꢂ

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ꢊ ꢉꢃꢀ

ꢊ ꢋꢀ

ꢉꢐꢞꢄꢅꢁꢀ

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ꢌ ꢍꢄꢉ

ꢌ ꢍꢉ

ꢞꢑꢟꢇꢈꢀꢉ

ꢅꢎ

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ꢁꢂ

ꢆꢇꢈ

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ꢅꢎꢋꢊꢒ ꢇꢆꢋꢆꢇꢅꢒꢉꢔ ꢏ ꢑꢑꢕꢖ ꢗꢆꢎꢘꢉ ꢍꢌꢍꢇꢒꢔꢉꢌꢘꢒꢅꢇ

ꢇꢆꢋꢆꢇꢅꢒꢉꢔ ꢙꢉꢋꢒꢅꢉꢎꢆꢌꢚ ꢛ ꢑ× ꢑꢑꢕꢖ ꢇꢍꢔꢆꢜꢅꢇ ꢇꢆ ꢓ

ꢉꢊꢒꢋꢊꢒ ꢇꢆꢋꢆꢇꢅꢒꢉꢔ ꢏ ꢑ× 4ꢝꢕꢖ ꢇꢍꢔꢆꢜꢅꢇ ꢇꢆ ꢓ

ꢗꢉꢖꢒꢈꢗꢒꢆꢔꢒ ꢇꢆꢋꢆꢇꢅꢒꢉꢔ ꢏ ꢞꢓꢐꢕꢖ

ꢁꢂꢌꢇꢈ ꢍꢎꢌꢎꢍꢁꢈꢆꢏ ꢊ ꢃꢃꢐꢑ ꢒꢎꢂꢓꢆ ꢔꢕꢔꢍꢈꢏꢆꢕꢓꢈꢁꢍ

ꢍꢎꢌꢎꢍꢁꢈꢆꢏ ꢖꢆꢌꢈꢁꢆꢂꢎꢕꢗ ꢘ ꢃ× ꢃꢃꢐꢑ ꢍꢔꢏꢎꢙꢁꢍ ꢍꢎ ꢚ

ꢆꢇꢈꢌꢇꢈ ꢍꢎꢌꢎꢍꢁꢈꢆꢏ ꢊ ꢃ× 4ꢛꢐꢑ ꢍꢔꢏꢎꢙꢁꢍ ꢍꢎ ꢚ

ꢒꢆꢑꢈꢜꢒꢈꢎꢏꢈ ꢍꢎꢌꢎꢍꢁꢈꢆꢏ ꢊ ꢝꢚꢉꢐꢑ

ꢀꢋꢎꢂꢃ ꢏꢆꢎꢆꢏꢀꢃꢁꢐ ꢌ ꢄꢄꢑꢒ ꢓꢆꢋꢔꢁ ꢕꢖꢕꢏꢃꢐꢁꢖꢔꢃꢀꢏ

ꢏꢆꢎꢆꢏꢀꢃꢁꢐ ꢗꢁꢎꢃꢀꢁꢋꢆꢖꢘ ꢙ ꢄ× ꢄꢄꢑꢒ ꢏꢕꢐꢆꢚꢀꢏ ꢏꢆ ꢛ

ꢁꢂꢃꢎꢂꢃ ꢏꢆꢎꢆꢏꢀꢃꢁꢐ ꢌ ꢄ× 4ꢜꢑꢒ ꢏꢕꢐꢆꢚꢀꢏ ꢏꢆ ꢛ

ꢓꢁꢒꢃꢝꢓꢃꢆꢐꢃ ꢏꢆꢎꢆꢏꢀꢃꢁꢐ ꢌ ꢅꢛꢍꢑꢒ

ꢑꢞꢜꢟꢠ ꢜꢍꢆꢗꢊꢔꢍꢜꢍꢎꢒ ꢡꢆꢎꢄꢢꢅꢄꢒꢟ

4644fe

5

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

PIN FUNCTIONS

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

SV , SV , SV , SV (B5, E5, H5, L5): Signal V .

IN1

IN2

IN

IN4

IN

Filtered input voltage to the internal 3.3V regulator for

the control circuitry of each Switching mode Regulator

Channel. Tie this pin to the V pin respectively in most

V

(A1, A2, A3), V

(C1, D1, D2), V

(F1,

IN

OUT1

G1, G2), V

OUT2

OUT3

applications. Connect SV to an external voltage supply

(J1, K1, K2): Power Output Pins of Each

IN

OUT4

of at least 4V which must also be greater than V

.

Switching Mode Regulator Channel. Apply output load

between these pins and GND pins. Recommend placing

outputdecouplingcapacitancedirectlybetweenthesepins

and GND pins. See the Applications Information section

for paralleling outputs.

OUT

TRACK/SS1, TRACK/SS2, TRACK/SS3, TRACK/SS4 (A6,

D6, G6, K6): Output Tracking and Soft-Start Pin of Each

Switching Mode Regulator Channel. Allows the user to

control the rise time of the output voltage. Putting a volt-

age below 0.6V on this pin bypasses the internal reference

input to the error amplifier, instead it servos the FB pin

to match the TRACK voltage. Above 0.6V, the tracking

function stops and the internal reference resumes control

of the error amplifier. There’s an internal 2.5µA pull-up

GND (A4-A5, B1-B2, C5, D3-D5, E1-E2, F5, G3-G5,

H1-H2, J5, K3-K4, L1-L2): Power Ground Pins for Both

Input and Output Returns. Use large PCB copper areas to

connect all GND together.

V

IN1

(B3, B4), V (E3, E4), V (H3, H4), V (L3, L4):

IN2 IN3 IN4

current from INTV on this pin, so putting a capacitor

CC

Power input pins connect to the drain of the internal top

MOSFET for each switching mode regulator channel.

Apply input voltages between these pins and GND pins.

Recommendplacinginputdecouplingcapacitancedirectly

here provides soft-start function.

MODE1, MODE2, MODE3, MODE4 (B6, E6, H6, L6):

Operation Mode Select for Each Switching Mode Regula-

tor Channel. Tie this pin to INTV to force continuous

between each of V pins and GND pins.

CC

IN

synchronous operation at all output loads. Tying it to

SGND enables discontinuous current mode operation at

light loads. Do not leave floating.

PGOOD1, PGOOD2, PGOOD3, PGOOD4 (C3, C2, F2,

J2): Output Power Good with Open-Drain Logic of Each

Switching Mode Regulator Channel. PGOOD is pulled to

ground when the voltage on the FB pin is not within 10ꢀ

of the internal 0.6V reference.

RUN1, RUN2, RUN3, RUN4(C6, F6, J6, K7):RunControl

Input of Each Switching Mode Regulator Channel. Enable

regulator operation by tying the specific RUN pin above

1.2V. Pulling it below 1.1V shuts down the respective

regulator channel. Do not leave floating.

CLKOUT (J3): Output Clock Signal for PolyPhase^®Opera-

tion of the Module. The phase of CLKOUT with respect to

CLKIN is set to 180°. CLKOUT’s peak-to-peak amplitude

FB1, FB2, FB3, FB4 (A7, D7, G7, J7): The Negative Input

of the Error Amplifier for Each Switching Mode Regulator

Channel. Internally, in LTM4644, this pin is connected to

is INTV to GND. See the Application Information section

CC

for details. Strictly output; do not drive this pin.

INTV , INTV , INTV , INTV (C4, F4, J4, K5):

CC4

CC1

CC2

CC3

V

of each channel with a 60.4kΩ precision resistor.

OUT

Internal 3.3V Regulator Output of Each Switching Mode

Regulator Channel. The internal power drivers and con-

trol circuits are powered from this voltage. Each pin is

internally decoupled to GND with 1µF low ESR ceramic

capacitor already.

Different output voltages can be programmed with an

additional resistor between the FB and GND pins for the

LTM4644, and two resistors between the V , FB and

OUT

GNDpinsfortheLTM4644-1.InPolyPhaseoperation,tying

the FB pins together allows for parallel operation. See the

Applications Information section for details.

4644fe

6

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

PIN FUNCTIONS

COMP1, COMP2, COMP3, COMP4 (B7, E7, H7, L7): Cur-

rent Control Threshold and Error Amplifier Compensation

Point of Each Switching Mode Regulator Channel. The

internal current comparator threshold is proportional to

thisvoltage. Tie theCOMPpinstogetherforparallelopera-

tion. The device is internally compensated.

SGND(F7):SignalGroundConnection.SGNDisconnected

to GND internally through single point. Use a separated

SGND ground copper area for the ground of the feedback

resistor and other components connected to signal pins.

A second connection between the PGND plane and SGND

plane is recommended on the backside of the PCB under-

neath the module.

CLKIN (C7): External Synchronization Input to Phase

Detector of the Module. This pin is internally terminated

to SGND with 20kΩ. The phase-locked loop will force

the channel 1 turn-on signal to be synchronized with the

rising edge of the CLKIN signal. Channel 2, channel 3 and

channel 4 will also be synchronized with the rising edge of

the CLKIN signal with a pre-determined phase shift. See

the Applications Information section for details.

TEMP (F3): Onboard Temperature Diode for Monitoring

the VBE Junction Voltage Change with Temperature. See

the Applications Information section.

4644fe

7

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

BLOCK DIAGRAM

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ꢇꢊꢋꢃꢌꢉ

4644 ꢀꢁ

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4644fe

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For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

DECOUPLING REQUIREMENTS ^{(per Channel)}

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

C

External Input Capacitor Requirement

I

= 4A

4.7

10

µF

IN

OUT

(V = 4V to 14V, V

= 1.5V)

IN

OUT

C

External Output Capacitor Requirement

(V = 4V to 14V, V = 1.5V)

I

22

47

µF

OUT

IN

OUT

OPERATION

The LTM4644 is a quad output standalone non-isolated

switch mode DC/DC power supply. It has four separate

regulatorchannelswitheachofthemcapableofdelivering

upto4Acontinuousoutputcurrentwithfewexternalinput

and output capacitors. Each regulator provides precisely

regulatedoutputvoltageprogrammablefrom0.6Vto5.5V

viaasingleexternalresistor(tworesistorsforLTM4644-1)

over 4V to 14V input voltage range. With an external bias

voltage, this module can operate from an input voltage

as low as 2.375V. The typical application schematic is

shown in Figure 33.

employ a 2+2, 3+1 or 4 channels parallel operation which

is more than flexible in a multirail POL application like

FPGA. Furthermore, the LTM4644 has CLKIN and CLK-

OUT pins for frequency synchronization or polyphasing

multiple devices which allow up to 8 phases cascaded to

run simultaneously.

Current mode control also provides cycle-by-cycle fast

current monitoring. Foldback current limiting is provided

in an overcurrent condition to reduce the inductor valley

current to approximately 40ꢀ of the original value when

V

FB

drops. An internal overvoltage and undervoltage

TheLTM4644integratesfourseparateconstantfrequency

controlled on-time valley current mode regulators, power

MOSFETs, inductors, and other supporting discrete com-

ponents. The typical switching frequency is set to 1MHz.

For switching noise-sensitive applications, the µModule

regulator can be externally synchronized to a clock from

700kHz to 1.3MHz. See the Applications Information

section.

comparators pull the open-drain PGOOD output low if

the output feedback voltage exits a 10ꢀ window around

the regulation point. Continuous conduction mode (CCM)

operation is forced during OV and UV conditions except

duringstart-upwhentheTRACKpinisrampingupto0.6V.

Pulling the RUN pin below 1.1V forces the controller into

its shutdown state, turning off both power MOSFETs and

most of the internal control circuitry. At light load cur-

rents, discontinuous conduction mode (DCM) operation

can be enabled to achieve higher efficiency compared to

continuous conduction mode (CCM) by setting the MODE

pin to SGND. The TRACK/SS pin is used for power supply

trackingandsoft-startprogramming.SeetheApplications

Information section.

With current mode control and internal feedback loop

compensation, the LTM4644 module has sufficient stabil-

ity margins and good transient performance with a wide

range of output capacitors, even with all ceramic output

capacitors.

Current mode control provides the flexibility of paralleling

any of the separate regulator channels with accurate cur-

rent sharing. With a built-in clock interleaving between

each two regulator channels, the LTM4644 could easily

Atemperaturediodeisincludedinsidethemoduletomoni-

tor the temperature of the module. See the Applications

Information section for details.

4644fe

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LTM4644/LTM4644-1

APPLICATIONS INFORMATION

The typical LTM4644 application circuit is shown in

Figure 33. External component selection is primarily

determined by the input voltage, the output voltage and

the maximum load current. Refer to Table 7 for specific

externalcapacitorrequirementsforaparticularapplication.

For parallel operation of N channels, use the following

equation can be used to solve for R . Tie the V

FB(BOT)

OUT

and the FB and COMP pins together for each paralleled

output with a single resistor to GND as determined by:

⎛

⎜

⎝

⎞

⎟

⎠

60.4k

N

V to V

Step-Down Ratios

IN

OUT

R_FB(BOT)

=

⎛

⎜

⎝

⎞

V_OUT

0.6

−1

⎟

There are restrictions in the maximum V and V

step-

IN

OUT

⎠

down ratio that can be achieved for a given input voltage

due to the minimum off-time and minimum on-time limits

of each regulator. The minimum off-time limit imposes a

maximum duty cycle which can be calculated as:

OUTPUT VOLTAGE PROGRAMMING (LTM4644-1)

ThePWM controllerhasaninternal0.6Vreferencevoltage.

Adding two resistors R

FB(BOT)

from V

to FB pin and

FB(TOP)

OUT

D

MAX

= 1 – t

• f

R

from FB pin to GND programs the output voltage:

OFF(MIN) SW

where t

is the minimum off-time, 70ns typical for

SW

OFF(MIN)

R_FB(TOP)

R_FB(BOT)

=

LTM4644, and f is the switching frequency. Conversely

V_OUT

0.6

theminimumon-timelimitimposesaminimumdutycycle

of the converter which can be calculated as:

–1

For parallel operation of N Channels, only one set of

and R is needed while tying the V , FB

D

= t

• f

MIN

ON(MIN) SW

R

FB(TOP)

FB(BOT)

OUT

where t

is the minimum on-time, 40ns typical for

and COMP pins from different channels together. See

ON(MIN)

LTM4644. In the rare cases where the minimum duty

cycle is surpassed, the output voltage will still remain

in regulation, but the switching frequency will decrease

from its programmed value. Note that additional thermal

derating may be applied. See the Thermal Considerations

and Output Current Derating section in this data sheet.

Figure 1 for example.

ꢏ

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ꢇꢈꢅꢉꢂ

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ꢀꢌꢑ

Output Voltage Programming (LTM4644)

ꢇꢈꢅꢉꢑ

ꢏ

ꢈꢐꢄꢊ

ꢀꢌꢊ

ThePWM controllerhasaninternal0.6Vreferencevoltage.

As shown in the Block Diagram, a 60.4k internal feedback

ꢇꢈꢅꢉꢊ

resistor connects each regulator channel from V

4644 ꢀꢁꢂ

OUT

to FB pin. Adding a resistor R

programs the output voltage:

from FB pin to GND

FB(BOT)

Figure 1. LTM4644-1 Feedback Resistor

for Paralleling Application

60.4k

LTM4644

LTM4644-1

R_FB(BOT)

=

V_OUT

Top Feedback Resistor

from V -to-V

Integrated

60.4k 0.5ꢀ

(one resistor per channel) Resistor

External (to be added on

PCB)

−1

0.6

OUT

FB

Application

General

Applications

To Interface with

Table 1. V_FBResistor Table vs Various Output Voltages

(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3

(k) Open 90.9 60.4 40.2 30.1 19.1 13.3 8.25

PMBus power system

management supervisory

ICs such as the LTC2975

V

5.0

OUT

R

FB(BOT)

4644fe

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LTM4644/LTM4644-1

APPLICATIONS INFORMATION

Input Decoupling Capacitors

comparator may remain tripped for several cycles and

force the top MOSFET to stay off for several cycles, thus

skipping cycles. The inductor current does not reverse

in this mode.

The LTM4644 module should be connected to a low ac-

impedance DC source. For each regulator channel, a 10µF

input ceramic capacitor is recommended for RMS ripple

current decoupling. A bulk input capacitor is only needed

whentheinputsourceimpedanceiscompromisedbylong

inductive leads, traces or not enough source capacitance.

Thebulkcapacitorcanbeanelectrolyticaluminumcapaci-

tor or polymer capacitor.

Force Continuous Conduction Mode (CCM)

In applications where fixed frequency operation is more

critical than low current efficiency, and where the lowest

output ripple is desired, forced continuous conduction

modeoperationshouldbeused.Forcedcontinuousopera-

Without considering the inductor ripple current, the RMS

current of the input capacitor can be estimated as:

tion can be enabled by tying the MODE pin to INTV . In

CC

this mode, inductor current is allowed to reverse during

low output loads, the COMP voltage is in control of the

current comparator threshold throughout, and the top

MOSFETalwaysturnsonwitheachoscillatorpulse.During

start-up, forcedcontinuousmodeisdisabledandinductor

current is prevented from reversing until the LTM4644’s

output voltage is in regulation.

I_OUT(MAX)

I_CIN(RMS)

=

• D•(1−D)

η%

whereηꢀistheestimatedefficiencyofthepowermodule.

Output Decoupling Capacitors

Withanoptimizedhighfrequency,highbandwidthdesign,

only single piece of low ESR output ceramic capacitor is

required for each regulator channel to achieve low output

voltagerippleandverygoodtransientresponse.Additional

output filtering may be required by the system designer,

if further reduction of output ripples or dynamic transient

spikes is required. Table 7 shows a matrix of different

output voltages and output capacitors to minimize the

voltage droop and overshoot during a 2A load step tran-

sient. Multiphase operation will reduce effective output

ripple as a function of the number of phases. Application

Note77discussesthisnoisereductionversusoutputripple

current cancellation, but the output capacitance will be

more a function of stability and transient response. The

LTpowerCAD™DesignToolisavailabletodownloadonline

for output ripple, stability and transient response analysis

and calculating the output ripple reduction as the number

of phases implemented increases by N times.

Operating Frequency

The operating frequency of the LTM4644 is optimized to

achievethecompactpackagesizeandtheminimumoutput

ripplevoltagewhilestillkeepinghighefficiency.Thedefault

operating frequency is internally set to 1MHz. In most ap-

plications, no additional frequency adjusting is required.

If any operating frequency other than 1MHz is required

by application, the µModule regulator can be externally

synchronized to a clock from 700kHz to 1.3MHz.

Frequency Synchronization and Clock In

The power module has a phase-locked loop comprised

of an internal voltage controlled oscillator and a phase

detector. This allows all internal top MOSFET turn-on to

be locked to the rising edge of the same external clock.

The external clock frequency range must be within 30ꢀ

around the 1MHz set frequency. A pulse detection circuit

is used to detect a clock on the CLKIN pin to turn on the

phase-locked loop. The pulse width of the clock has to

be at least 400ns. The clock high level must be above 2V

and clock low level below 0.3V. During the start-up of

the regulator, the phase-locked loop function is disabled.

Discontinuous Conduction Mode (DCM)

Inapplicationswherelowoutputrippleandhighefficiency

at intermediate current are desired, discontinuous con-

duction mode (DCM) should be used by connecting the

MODE pin to SGND. At light loads the internal current

4644fe

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LTM4644/LTM4644-1

APPLICATIONS INFORMATION

Multichannel Parallel Operation

A multiphase power supply significantly reduces the

amount of ripple current in both the input and output ca-

pacitors. The RMS input ripple current is reduced by, and

the effective ripple frequency is multiplied by, the number

of phases used (assuming that the input voltage is greater

thanthenumberofphasesusedtimestheoutputvoltage).

Theoutputrippleamplitudeisalsoreducedbythenumber

of phases used when all of the outputs are tied together

to achieve a single high output current design.

For loads that demand more than 4A of output current,

the LTM4644 multiple regulator channels can be easily

paralleled to provide more output current without increas-

ing input and output voltage ripples. The LTM4644 has

preset built-in phase shift between each two of the four

regulator channels which is suitable to employ a 2+2, 3+1

or 4 channels parallel operation. Table 2 gives the phase

difference between regulator channels.

The LTM4644 device is an inherently current mode con-

trolled device, so parallel modules will have very good

current sharing. This will balance the thermals on the

design. Please tie the RUN, TRACK/SS, FB and COMP

pins of each paralleling channel together. Figure 35 and

Figure 36 shows an example of parallel operation and pin

connection.

Table 2. Phase Difference Between Regulator Channels

CHANNEL

CH1

CH2

CH3

CH4

Phase Difference

180°

90°

180°

Figure 2 shows a 2+2 and a 4-channels parallel concept

schematic for clock phasing.

Input RMS Ripple Current Cancellation

Application Note 77 provides a detailed explanation of

multiphase operation. The input RMS ripple current can-

cellation mathematical derivations are presented, and a

graph is displayed representing the RMS ripple current

reductionasafunctionofthenumberofinterleavedphases.

Figure 3 shows this graph.

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ꢈꢒꢄ

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ꢈꢒꢘ

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ꢈꢒ4

ꢓꢄꢗꢁꢔꢕ

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ꢑ

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ꢑ

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ꢌꢏꢅ4

Soft-Start and Output Voltage Tracking

ꢖꢅꢍ4644

The TRACK/SS pin provides a means to either soft-start

of each regulator channel or track it to a different power

supply. A capacitor on the TRACK/SS pin will program the

ramp rate of the output voltage. An internal 2.5µA current

source will charge up the external soft-start capacitor

ꢗꢇ

towards the INTV voltage. When the TRACK/SS voltage

CC

is below 0.6V, it will take over the internal 0.6V reference

voltage to control the output voltage. The total soft-start

time can be calculated as:

ꢄꢗꢁꢔ

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ꢄꢗꢁꢔ

ꢈꢒꢄ

ꢓꢁꢔꢕ

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ꢓꢄꢗꢁꢔꢕ

ꢈꢒꢘ

ꢓꢂꢙꢁꢔꢕ

ꢈꢒ4

ꢓꢚꢁꢔꢕ

C_SS

t

_SS= 0.6 •

2.5µA

ꢑ

ꢌꢏꢅꢄ

ꢑ

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ꢑ

ꢌꢏꢅꢘ

ꢑ

ꢌꢏꢅ4

where C is the capacitance on the TRACK/SS pin. Cur-

rent foldback and forced continuous mode are disabled

during the soft-start process.

SS

ꢖꢅꢍ4644

ꢄ6ꢇ

4644 ꢀꢁꢂ

Figure 2. 2+2 and 4 Channels Parallel Concept Schematic

4644fe

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LTM4644/LTM4644-1

APPLICATIONS INFORMATION

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ꢎꢏꢒꢎ

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ꢎꢏꢐꢎ

ꢎꢏꢎꢑ

ꢎ

ꢎꢏꢐ ꢎꢏꢐꢑ ꢎꢏꢒ ꢎꢏꢒꢑ ꢎꢏꢓ ꢎꢏꢓꢑ ꢎꢏ4 ꢎꢏ4ꢑ ꢎꢏꢑ ꢎꢏꢑꢑ ꢎꢏ6 ꢎꢏ6ꢑ ꢎꢏꢔ ꢎꢏꢔꢑ ꢎꢏꢕ ꢎꢏꢕꢑ ꢎꢏꢖ

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ꢍ

ꢉꢁꢂ ꢋꢌ

4644 ꢗꢎꢓ

Figure 3. Normalized RMS Ripple Current for Single Phase or Polyphase Applications

Outputvoltagetrackingcanalsobeprogrammedexternally

Where the 60.4k is the integrated top feedback resistor

and the R is the external bottom feedback resistor

TR(TOP) TR(BOT)

divider on the TRACK/SS pin of the slave regulator, as

shown in Figure 5.

using the TRACK/SS pin of each regulator channel. The

output can be tracked up and down with another regula-

tor. Figure 4 and Figure 5 show an example waveform

and schematic of a ratiometric tracking where the slave

FB(SL)

of the LTM4644. The R

/R

is the resistor

regulator’s (V

, V

and V

) output slew rate is

OUT2 OUT3

proportional to the master’s (V

OUT4

Following the upper equation, the master’s output slew

rate (MR) and the slave’s output slew rate (SR) in volts/

time is determined by:

).

OUT1

Since the slave regulator’s TRACK/SS is connected to

the master’s output through a R /R resistor

TR(TOP) TR(BOT)

R_FB(SL)

divider and its voltage used to regulate the slave output

voltage when TRACK/SS voltage is below 0.6V, the slave

outputvoltageandthemasteroutputvoltageshouldsatisfy

the following equation during the start-up.

R

_FB(SL)+60.4k

R_TR(BOT)

MR

SR

=

R

_TR(TOP)+R_TR(BOT)

R_FB(SL)

V_OUT(SL)

•

R

_FB(SL)+60.4k

R_TR(BOT)

= V_OUT(MA)

•

R

_TR(TOP)+R_TR(BOT)

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APPLICATIONS INFORMATION

The TRACK pins will have the 2.5µA current source on

when a resistive divider is used to implement tracking on

that specific channel. This will impose an offset on the

TRACK pin input. Smaller value resistors with the same

ratios as the resistor values calculated from the above

equation can be used. For example, where the 60.4k is

used then a 6.04k can be used to reduce the TRACK pin

offset to a negligible value.

ꢉ

ꢍ ꢑꢏꢑꢉ

ꢍ ꢐꢏꢓꢉ

ꢍ ꢎꢏꢒꢉ

ꢍ ꢎꢏꢐꢉ

ꢆꢇꢂꢎ

ꢆꢇꢂꢐ

ꢆꢇꢂꢑ

ꢆꢇꢂ4

The coincident output tracking can be recognized as a

special ratiometric output tracking which the master’s

output slew rate (MR) is the same as the slave’s output

slew rate (SR), as waveform shown in Figure 6.

4644 ꢀꢁ4

ꢂꢃꢄꢅ

Figure 4. Output Ratiometric Tracking Waveform

From the equation we could easily find out that, in the

coincident tracking, the slave regulator’s TRACK/SS pin

resistor divider is always the same as its output voltage

divider.

Forexample,V

=3.3V,MR=3.3V/24msandV

OUT(SL)

OUT(MA)

= 1.2V, SR = 1.2V/24ms as V

and V

shown in

OUT1

OUT4

Figure 5. From the equation, we could solve out that

R

= 60.4k and R

= 13.3k is a good com-

TR4(TOP)

TR4(BOT)

R_FB(SL)

R_TR(BOT)

bination. Follow the same equation, we can get the same

=

R

/R

resistor divider value for V

and

TR(TOP) TR(BOT)

OUT2

R

_FB(SL)+60.4k

R

_TR(TOP)+R_TR(BOT)

V

.

OUT3

ꢃ

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ꢋꢖꢆ

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4644 ꢀꢁꢂ

ꢋ

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Figure 5. Output Ratiometric Tracking Schematic

4644fe

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LTM4644/LTM4644-1

APPLICATIONS INFORMATION

For example, R

= 60.4k and R

= 60.4k is

reference only, while still keeping the power MOSFETs

off. Further increasing the RUN pin voltage above 1.2V

will turn on the entire regulator channel.

TR4(TOP)

TR4(BOT)

a good combination for coincident tracking for V

OUT(MA)

= 3.3V and V

= 1.2V application.

OUT(SL)

Pre-Biased Output Start-Up

ꢉ

ꢍ ꢑꢏꢑꢉ

ꢍ ꢐꢏꢓꢉ

ꢍ ꢎꢏꢒꢉ

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ꢆꢇꢂꢎ

ꢆꢇꢂꢐ

ꢆꢇꢂꢑ

ꢆꢇꢂ4

There may be situations that require the power supply to

start up with some charge on the output capacitors. The

LTM4644 can safely power up into a pre-biased output

without discharging it.

TheLTM4644accomplishesthisbyforcingdiscontinuous

mode (DCM) operation until the TRACK/SS pin voltage

reaches 0.6V reference voltage. This will prevent the BG

from turning on during the pre-biased output start-up

which would discharge the output.

4644 ꢀꢁ6

ꢂꢃꢄꢅ

Figure 6. Output Coincident Tracking Waveform

Do not pre-bias LTM4644 with an output voltage higher

than INTV (3.3V).

CC

Power Good

Overtemperature Protection

The PGOOD pins are open drain pins that can be used

to monitor each valid output voltage regulation. This pin

monitors a 10ꢀ window around the regulation point. A

resistor can be pulled up to a particular supply voltage for

monitoring. To prevent unwanted PGOOD glitches dur-

Theinternalovertemperatureprotectionmonitorsthejunc-

tiontemperatureofthemodule.Ifthejunctiontemperature

reachesapproximately160°C,bothpowerswitcheswillbe

turned off until the temperature drops about 15°C cooler.

ing transients or dynamic V

changes, the LTM4644’s

OUT

Low Input Application

PGOOD falling edge includes a blanking delay of approxi-

mately 52 switching cycles.

The LTM4644 module has a separate SV pin for each

IN

regulator channel which makes it compatible with opera-

Stability Compensation

tion from an input voltage as low as 2.375V. The SV pin

IN

The LTM4644 module internal compensation loop of each

regulator channel is designed and optimized for low ESR

ceramic output capacitors only application. Table 6 is

provided for most application requirements. In case of

bulk output capacitors is required for output ripples or

dynamic transient spike reduction, an additional 10pF to

is the signal input of the regulator control circuitry while

the V pin is the power input which directly connected

IN

to the drain of the top MOSFET. In most application with

input voltage ranges from 4V to 14V, connect the SV

IN

pin directly to the V pin of each regulator channel. An

IN

optional filter, consisting of a resistor (1Ω to 10Ω) be-

tween SV and V ground, can be placed for additional

15pF phase boost capacitor is required between the V

OUT

IN

and FB pins. The LTpowerCAD Design Tool is available to

noise immunity. This filter is not necessary in most cases

if good PCB layout practices are followed (see Figure 32).

In a low input voltage (2.375V to 4V) application, or to

reducepowerdissipationbytheinternalbiasLDO,connect

download for control loop optimization.

RUN Enable

SV to an external voltage higher than 4V with a 0.1µF

IN

Pulling the RUN pin of each regulator channel to ground

forcestheregulatorintoitsshutdownstate,turningoffboth

power MOSFETs and most of its internal control circuitry.

Bringing the RUN pin above 0.7V turns on the internal

local bypass capacitor. Figure 34 shows an example of a

low input voltage application. Please note, SV voltage

IN

cannot go below V

voltage.

OUT

4644fe

15

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APPLICATIONS INFORMATION

Temperature Monitoring

Solving for T, T = –(V – V )/(dV /dT) provides the

G0 D D

temperature.

A diode connected PNP transistor is used for the TEMP

monitor function by monitoring its voltage over tempera-

ture. The temperature dependence of this diode voltage

can be understood in the equation:

1st Example: Figure 7 for 27°C, or 300K the diode

voltage is 0.598V, thus, 300K = –(1200mV – 598mV)/

–2.0 mV/K)

⎛ ⎞

I_D

2nd Example: Figure 7 for 75°C, or 350K the diode

voltage is 0.50V, thus, 350K = –(1200mV – 500mV)/

–2.0mV/K)

V =nV ln

⎜ ⎟

D

T

I

⎝ ⎠

S

where V is the thermal voltage (kT/q), and n, the ideality

Converting the Kelvin scale to Celsius is simply taking the

Kelvin temp and subtracting 273 from it.

T

factor, is 1 for the diode connected PNP transistor be-

ing used in the LTM4644. I is expressed by the typical

S

A typical forward voltage is given in the electrical charac-

teristics section of the data sheet, and Figure 7 is the plot

of this forward voltage. Measure this forward voltage at

27°C to establish a reference point. Then using the above

expression while measuring the forward voltage over

temperature will provide a general temperature monitor.

empirical equation:

⎛

⎜

⎝

⎞

⎟

⎠

–V_G0

V_T

I =I exp

0

S

where I is a process and geometry dependent current, (I

0

Connect a resistor between TEMP and V to set the cur-

IN

is typically around 20k orders of magnitude larger than I

S

rent to 100µA. See Figure 35 for an example.

at room temperature) and V is the band gap voltage of

G0

1.2V extrapolated to absolute zero or –273°C.

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If we take the I equation and substitute into the V equa-

S

D

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tion, then we get:

⎛ ⎞

⎛

⎞

kT

q

I₀

kT

q

V = V –

ln

, V =

⎜ ⎟

⎜

⎟

D

T

G0

I

⎝

⎠

⎝ ⎠

D

The expression shows that the diode voltage decreases

(linearly if I were constant) with increasing temperature

0

and constant diode current. Figure 6 shows a plot of V

D

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vs Temperature over the operating temperature range of

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46ꢐꢘ ꢚꢍꢘ

the LTM4644.

Figure 7. Diode Voltage V_Dvs Temperature T(°C)

If we take this equation and differentiate it with respect to

temperature T, then:

Thermal Considerations and Output Current Derating

dV

^D= –

dT

V_G0– V_D

T

The thermal resistances reported in the Pin Configura-

tion section of the data sheet are consistent with those

parameters defined by JESD 51-12 and are intended for

use with finite element analysis (FEA) software modeling

tools that leverage the outcome of thermal modeling,

simulation, and correlation to hardware evaluation per-

formed on a µModule package mounted to a hardware

test board: defined by JESD 51-9 (“Test Boards for Area

This dV /dT term is the temperature coefficient equal to

about –2mV/K or –2mV/°C. The equation is simplified for

the first order derivation.

D

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is rare for an application to operate such that most of

the heat flows from the junction to the top of the part.

Array Surface Mount Package Thermal Measurements”).

The motivation for providing these thermal coefficients in

foundinJESD51-12(“GuidelinesforReportingandUsing

Electronic Package Thermal Information”).

As in the case of θ

, this value may be useful

JCbottom

for comparing packages but the test conditions don’t

generally match the user’s application.

Many designers may opt to use laboratory equipment

and a test vehicle such as the demo board to predict the

µModule regulator’s thermal performance in their appli-

cation at various electrical and environmental operating

conditions to compliment any FEA activities. Without FEA

software, the thermal resistances reported in the Pin Con-

figuration section are in-and-of themselves not relevant to

providing guidance of thermal performance; instead, the

derating curves provided in this data sheet can be used

in a manner that yields insight and guidance pertaining to

one’s application-usage, and can be adapted to correlate

thermal performance to one’s own application.

4. θ , the thermal resistance from junction to the printed

JB

circuitboard,isthejunction-to-boardthermalresistance

wherealmostalloftheheatflowsthroughthebottomof

the µModule regulator and into the board, and is really

the sum of the θ

and the thermal resistance of

JCbottom

the bottom of the part through the solder joints and

through a portion of the board. The board temperature

is measured a specified distance from the package.

A graphical representation of the aforementioned ther-

mal resistances is given in Figure 8; blue resistances are

contained within the μModule regulator, whereas green

resistances are external to the µModule package.

The Pin Configuration section typically gives four thermal

coefficients explicitly defined in JESD 51-12; these coef-

ficients are quoted or paraphrased below:

As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters defined by JESD 51-12 or provided in the

Pin Configuration section replicates or conveys normal

operatingconditionsofaμModuleregulator. Forexample,

in normal board-mounted applications, never does 100ꢀ

of the device’s total power loss (heat) thermally conduct

exclusively through the top or exclusively through bot-

tom of the µModule package—as the standard defines

1. θ , the thermal resistance from junction to ambient, is

JA

the natural convection junction-to-ambient air thermal

resistance measured in a one cubic foot sealed enclo-

sure. This environment is sometimes referred to as

“still air” although natural convection causes the air to

move.Thisvalueisdeterminedwiththepartmountedto

a JESD 51-9 defined test board, which does not reflect

an actual application or viable operating condition.

for θ

and θ , respectively. In practice, power

JCbottom

JCtop

loss is thermally dissipated in both directions away from

the package—granted, in the absence of a heat sink and

airflow, a majority of the heat flow is into the board.

2. θ

, the thermal resistance from junction to the

JCbottom

bottom of the product case, is determined with all of

the component power dissipation flowing through the

bottom of the page. In the typical µModule regulator,

the bulk of the heat flows out the bottom of the pack-

age, but there is always heat flow out into the ambient

environment. As a result, this thermal resistance value

may be useful for comparing packages but the test

conditionsdon’tgenerallymatchtheuser’sapplication.

Within the LTM4644, be aware there are multiple power

devices and components dissipating power, with a con-

sequence that the thermal resistances relative to different

junctions of components or die are not exactly linear with

respect to total package power loss. To reconcile this

complication without sacrificing modeling simplicity—

but also, not ignoring practical realities—an approach

has been taken using FEA software modeling along with

laboratory testing in a controlled-environment chamber

to reasonably define and correlate the thermal resistance

valuessuppliedinthisdatasheet:(1)Initially,FEAsoftware

3. θ

, the thermal resistance from junction to top of

JCtop

the product case, is determined with nearly all of the

componentpowerdissipationflowingthroughthetopof

the package. As the electrical connections of the typical

µModule regulator are on the bottom of the package, it

4644fe

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is used to accurately build the mechanical geometry of

the LTM4644 and the specified PCB with all of the cor-

rect material coefficients along with accurate power loss

source definitions; (2) this model simulates a software-

defined JEDEC environment consistent with JESD 51-12

to predict power loss heat flow and temperature readings

at different interfaces that enable the calculation of the

JEDEC-defined thermal resistance values; (3) the model

and FEA software is used to evaluate the LTM4644 with

heat sink and airflow; (4) having solved for and analyzed

these thermal resistance values and simulated various

operating conditions in the software model, a thorough

laboratory evaluation replicates the simulated conditions

with thermocouples within a controlled-environment

chamberwhileoperatingthedeviceatthesamepowerloss

as that which was simulated. An outcome of this process

and due diligence yields the set of derating curves shown

in this data sheet.

for correlating the thermal resistance. Thermal models

are derived from several temperature measurements in a

controlled temperature chamber along with thermal mod-

eling analysis. The junction temperatures are monitored

while ambient temperature is increased with and without

airflow.Thepowerlossincreasewithambienttemperature

change is factored into the derating curves. The junctions

are maintained at 120°C maximum while lowering output

currentorpowerwithincreasingambienttemperature.The

decreasedoutputcurrentwilldecreasetheinternalmodule

loss as ambient temperature is increased. The monitored

junction temperature of 120°C minus the ambient operat-

ing temperature specifies how much module temperature

rise can be allowed. As an example in Figure 16 the load

current is derated to 9.6A at ~90°C with 400LFM of airflow

and no heat sink and the power loss for the 12V to 1.0V

at 9.5A output is about 3.2W. The 3.2W loss is calculated

with 4 times the 0.6W room temperature loss from the

12V to 1.0V power loss curve each channel at 2.4A, and

the 1.35 multiplying factor at 120°C junction. If the 90°C

ambient temperature is subtracted from the 120°C junc-

tion temperature, then the difference of 30°C divided by

The 1V to 5V power loss curves in Figures 9 to 15 can

be used in coordination with the load current derating

curves in Figures 16 to 29 for calculating an approximate

θ thermal resistance for the LTM4644 with various heat

JA

3.2W equals ~9.4°C/W θ thermal resistance. Table 3

JA

sinking and airflow conditions. The power loss curves

are taken at room temperature, and are increased with a

multiplicativefactoraccordingtothejunctiontemperature.

This approximate factor is 1.35 for 120°C. The derating

curves are plotted with the output current starting at 16A

and the ambient temperature at 30°C. These are chosen

to include the lower and higher output voltage ranges

specifies a 10°C/W value which is very close. Tables 3 to

6 provide equivalent thermal resistances for the different

outputs with and without airflow and heat sinking. The

derived thermal resistances in Tables 3 to 6 for the various

conditions can be multiplied by the calculated power loss

asafunctionofambienttemperaturetoderivetemperature

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4644 ꢀꢁꢂ

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Figure 8. Graphical Representation of JESD 51-12 Thermal Coefficients

4644fe

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rise above ambient, thus maximum junction temperature.

Room temperature power loss can be derived from the ef-

ficiencycurvesintheTypicalPerformanceCharacteristics

section and adjusted with the above junction temperature

multiplicative factor. The printed circuit board is a 1.6mm

thick four layer board with two ounce copper for the two

outerlayersandoneouncecopperforthetwoinnerlayers.

The PCB dimensions are 95mm × 76mm.

For example, to determine the maximum ambient tem-

perature when V

= 2.5V at 0.6A, V

= 3.3V at 3A,

OUT1

OUT2

V

= 1.8V at 1A, V

= 1.2V at 3A, without a heat sink

OUT3

OUT4

and 400LFM airflow, simply add up the total power loss

for each channel read from Figure 9 to Figure 15 which in

this example equals 2.5W, then multiply by the 1.35 coef-

ficient for 120°C junction temperature and compare the

total power loss number, 3.4W with Figure 30. Figure 30

indicates with a 3.4W total power loss, the maximum am-

bient temperature for this particular application is around

86°C. For reference, the actual thermal derating test in the

chamber resulted in a maximum ambient temperature

of 86.3°C, very close to the calculated value. Also from

Figure 30, it is easy to determine with a 3.4W total power

loss, the maximum ambient temperature is around 77°C

with no airflow and 81°C with 200LFM airflow.

The 16A represents all four channels in parallel at 4A each.

The four parallel channels have their currents reduced at

the same rate to develop an equivalent θ circuit evalu-

JA

ation with thermal couples or IR camera used to validate

the thermal resistance values.

Maximum Operating Ambient Temperature

Figures 30 and 31 display the Maximum Power Loss

Allowance Curves vs ambient temperature with various

heatsinkingandairflowconditions. Thisdatawasderived

from the thermal impedance generated by various ther-

mal derating examinations with the junction temperature

measured at 120°C. This maximum power loss limitation

serves as a guideline when designing multiple output

rails with different voltages and currents by calculating

the total power loss.

Safety Considerations

The LTM4644 modules do not provide galvanic isolation

from V to V . There is no internal fuse. If required,

IN

OUT

a slow blow fuse with a rating twice the maximum input

current needs to be provided to protect each unit from

catastrophic failure. The device does support thermal

shutdown and overcurrent protection.

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ꢎꢍꢒ

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ꢎꢍꢔ

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4

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4

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Figure 9. Power Loss at 1.0V

Output, (Each Channel, 25°C)

Figure 10. Power Loss at 1.2V ^{464ꢎ ꢓꢎꢌ}

Output, (Each Channel, 25°C)

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Figure 12. Power Loss at 1.8V

Output, (Each Channel, 25°C)

Figure 11. Power Loss at 1.5V

Output, (Each Channel, 25°C)

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Figure 13. Power Loss at 2.5V

Output, (Each Channel, 25°C)

Figure 14.Power Loss at 3.3V

Output, (Each Channel, 25°C)

4644fe

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Figure 15. Power Loss at 5V

Output, (Each Channel, 25°C)

Figure 16. 5V_INto 1.0V_OUT

Derating Curve 4-Channel

Paralleled, No Heat Sink

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Figure 17. 12V_INto 1.0V_OUT

Derating Curve 4-Channel

Paralleled, No Heat Sink

Figure 18. 5V_INto 1.0V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

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ꢏ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢔꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢕꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

464ꢐ ꢓꢐꢔ

464ꢐ ꢓꢒꢏ

Figure 19. 12V_INto 1.0V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

Figure 20. 5V_INto 1.5V_OUT

Derating Curve 4-Channel

Paralleled, No Heat Sink

4644fe

21

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

APPLICATIONS INFORMATION

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

6

4

ꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢒ

ꢏ

ꢒ

ꢏ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

464ꢐ ꢓꢒꢐ

464ꢐ ꢓꢒꢒ

Figure 21. 12V_INto 1.5V_OUT

Derating Curve 4-Channel

Paralleled, No Heat Sink

Figure 22. 5V_INto 1.5V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

6

4

ꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢒ

ꢏ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

464ꢐ ꢓꢒꢎ

464ꢐ ꢓꢒ4

Figure 23. 12V_INto 1.5V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

Figure 24. 5V_INto 3.3V_OUT

Derating Curve 4-Channel

Paralleled, No Heat Sink

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

6

4

ꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢒ

ꢏ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

464ꢐ ꢓꢒꢔ

464ꢐ ꢓꢒ6

Figure 25. 12V_INto 3.3V_OUT

Derating Curve 4-Channel

Paralleled, No Heat Sink

Figure 26. 5V_INto 3.3V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

4644fe

22

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

APPLICATIONS INFORMATION

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

ꢐꢑ

ꢐ6

ꢐ4

ꢐꢒ

ꢐꢏ

ꢑ

6

4

ꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

4ꢏꢏꢗꢓꢁ

ꢏꢗꢓꢁ

ꢒꢏꢏꢗꢓꢁ

ꢒ

4ꢏꢏꢗꢓꢁ

ꢏ

ꢎꢏ

6ꢏ ꢔꢏ ꢑꢏ ꢖꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢕꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢕꢏ ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢔꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢖꢏ ꢑꢏ ꢔꢏ

ꢐꢏꢏ ꢐꢐꢏ ꢐꢒꢏ

4ꢏ ꢕꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

464ꢐ ꢓꢒꢔ

464ꢐ ꢓꢒꢑ

464ꢐ ꢓꢒꢔ

Figure 27. 12V_INto 3.3V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

ꢔꢏ

Figure 28. 12V_INto 5V_OUT

Figure 29. 12V_INto 5V_OUT

Derating Curve 4-Channel

Paralleled, BGA Heat Sink

Derating Curve 4-Channel

Paralleled, No Heat Sink

ꢔꢕ

ꢔꢔ

ꢔꢏ

ꢙ

ꢕ

ꢘ

ꢙ

6

ꢚ

4

ꢎ

ꢗ

ꢚ

6

ꢘ

4

ꢎ

ꢗ

ꢏꢒꢖꢁ

ꢕꢏꢏꢒꢖꢁ

4ꢏꢏꢒꢖꢁ

ꢕ

ꢗꢏꢏꢒꢖꢁ

ꢔ

4ꢏꢏꢒꢖꢁ

ꢏ

ꢎꢏ

6ꢏ ꢙꢏ ꢘꢏ ꢕꢏ ꢔꢏꢏ ꢔꢔꢏ ꢔꢗꢏ

4ꢏ ꢚꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

ꢎꢏ

6ꢏ ꢚꢏ ꢗꢏ ꢙꢏ ꢔꢏꢏ ꢔꢔꢏ ꢔꢕꢏ

ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ

4ꢏ ꢘꢏ

464ꢔ ꢖꢎꢏ

464ꢔ ꢖꢎꢔ

Figure 30. Power Loss Allowance

vs. Ambient Temperature No Heat

Sink

Figure 31. Power Loss Allowance

vs. Ambient Temperature BGA

Heat Sink

4644fe

23

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

APPLICATIONS INFORMATION

Table 3. 1.0V Output

DERATING CURVE

Figures 16, 17

Figures 18, 19

V

(V)

POWER LOSS CURVE

AIR FLOW (LFM)

HEAT SINK

None

Θ

(°C/W)

IN

JA

5, 12

Figure 9

0

12.5

11

10

11

9

Figure 9

200

400

0

None

Figure 9

None

Figure 9

BGA Heat Sink

Figure 9

200

400

Figure 9

8

Table 4. 1.5V Output

DERATING CURVE

Figures 20, 21

V

IN

(V)

POWER LOSS CURVE

Figure 11

AIR FLOW (LFM)

HEAT SINK

None

(°C/W)

JA

5, 12

0

12.5

11

10

11

9

Figures 20, 21

5, 12

Figure 11

200

400

0

None

Figures 20, 21

Figure 11

None

Figures 22, 23

Figure 11

BGA Heat Sink

Figures 22, 23

Figure 11

200

400

Figures 22, 23

Figure 11

8

Table 5. 3.3V Output

DERATING CURVE

Figures 24, 25

V

IN

(V)

POWER LOSS CURVE

Figure 14

AIR FLOW (LFM)

HEAT SINK

None

(°C/W)

JA

5, 12

0

12.5

11

10

11

9

Figures 24, 25

5, 12

Figure 14

200

400

0

None

Figures 24, 25

Figure 14

None

Figures 26, 27

Figure 14

BGA Heat Sink

Figures 26, 27

Figure 14

200

400

Figures 26, 27

Figure 14

8

Table 6. 5V Output

DERATING CURVE

Figures 26, 27

Figures 28, 29

V

IN

(V)

POWER LOSS CURVE

Figure 15

AIR FLOW (LFM)

HEAT SINK

None

(°C/W)

JA

12

0

12.5

11

10

11

9

12

Figure 15

200

400

0

None

Figure 15

None

Figure 15

BGA Heat Sink

Figure 15

200

400

Figure 15

8

4644fe

24

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

APPLICATIONS INFORMATION

Table 7

C

PART NUMBER

VALUE

C

PART NUMBER

VALUE

C

PART NUMBER VALUE

Sanyo 4TPE100MZB 4V 100µF

IN

OUT1

OUT2

Murata

GRM21BR61C106KE15L 10µF, 16V,

0805, X5R

Murata

GRM21BR60J476ME15 47µF, 6.3V,

0805, X5R

Taiyo Yuden EMK212BJ106KG-T

10µF, 16V,

0805, X5R

Taiyo Yuden JMK212BJ476MG-T

47µF, 6.3V,

0805, X5R

Murata

GRM31CR61C226ME15L 22µF, 16V,

1206, X5R

Taiyo Yuden EMK316BJ226ML-T

22µF, 16V,

1206, X5R

C

OUT2

P-P

DROOP DERIVATION RECOVERY

LOAD

STEP

(A)

LOAD STEP

SLEW RATE

(A/µs)

IN

OUT1

(CERAMIC)

(µF)

C

(CERAMIC) (BULK)

C

FF

V

R

FB

IN

V

(V)

(BULK)

(µF)

(pF)

10

(V)

(mv)

(mV)

TIME (µs)

(kΩ)

90.9

60.4

40.2

30.1

19.1

13.3

8.25

OUT

1

10

47

5,12

5

72

40

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

100µF

5

60

40

47

5

127

90

40

5

40

1.2

5

76

40

1.2

1.5

1.8

2.5

3.3

5

65

40

5

145

103

80

40

5

40

5

40

5

70

40

5

161

115

95

40

5

40

5

40

5

80

40

5

177

128

125

100

225

161

155

122

285

198

220

420

40

5

40

5

40

5

50

5

40

5

50

5

40

5

60

5

40

10

5

60

5

40

5

40

4644fe

25

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

APPLICATIONS INFORMATION

Layout Checklist/Example

• To minimizetheviaconductionlossandreducemodule

thermal stress, use multiple vias for interconnection

between top layer and other power layers.

The high integration of LTM4644 makes the PCB board

layout very simple and easy. However, to optimize its

electrical and thermal performance, some layout consid-

erations are still necessary.

• Do not put via directly on the pad, unless they are

capped or plated over.

• Use large PCB copper areas for high current paths,

• Use a separated SGND ground copper area for com-

ponents connected to signal pins. Connect the SGND

to GND underneath the unit.

including V to V , GND, V

to V

. It helps to

IN1

IN4

OUT1

OUT4

minimize the PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output capaci-

• For parallel modules, tie the V , V , and COMP pins

OUT FB

tors next to the V , GND and V

pins to minimize

OUT

together. Use an internal layer to closely connect these

pinstogether. TheTRACK/SSpincanbetiedacommon

capacitor for regulator soft-start.

IN

high frequency noise.

• Place a dedicated power ground layer underneath the

unit.

• Bring out test points on the signal pins for monitoring.

Figure32givesagoodexampleoftherecommendedlayout.

C_OUT

C_IN

Figure 32. Recommended PCB Layout

4644fe

26

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL APPLICATIONS

ꢉꢑꢒꢃꢄ

ꢉꢑꢒꢋꢇꢈ

ꢂ

4ꢂ ꢞꢟ ꢁ4ꢂ

ꢏꢛꢏꢂꢙ4ꢘ

ꢃꢄꢁ

ꢋꢇꢈꢁ

ꢀꢗꢁ

ꢁꢓꢔꢀ

ꢕ4

ꢁ6ꢂ

ꢁꢎꢓ6

4ꢚꢔꢀ

6ꢛꢏꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄꢁ

ꢆꢇꢄꢁ

ꢃꢄꢈꢂ

ꢑꢈꢊ4644

ꢉꢋꢊꢖꢁ

ꢈꢆꢘꢉꢒꢙꢅꢅꢁ

ꢖꢐꢋꢋꢌꢁ

ꢁꢏꢛꢏꢠ

ꢉꢉꢁ

ꢓꢛꢁꢔꢀ

ꢊꢋꢌꢍꢁ

ꢎꢛꢝꢂꢙ4ꢘ

ꢂ

ꢃꢄꢎ

ꢋꢇꢈꢎ

ꢀꢗꢎ

4ꢚꢔꢀ

4ꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄꢎ

ꢆꢇꢄꢎ

ꢃꢄꢈꢂ

ꢉꢋꢊꢖꢎ

ꢈꢆꢘꢉꢒꢙꢅꢅꢎ

ꢖꢐꢋꢋꢌꢎ

ꢁꢡꢛꢁꢠ

ꢉꢉꢎ

6ꢓꢛ4ꢠ

ꢁꢏꢛꢏꢠ

ꢊꢋꢌꢍꢎ

ꢁꢛꢝꢂꢙ4ꢘ

ꢂ

ꢃꢄꢏ

ꢋꢇꢈꢏ

4ꢚꢔꢀ

4ꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄꢏ

ꢆꢇꢄꢏ

ꢃꢄꢈꢂ

ꢀꢗꢏ

ꢉꢋꢊꢖꢏ

ꢈꢆꢘꢉꢒꢙꢅꢅꢏ

ꢖꢐꢋꢋꢌꢏ

4ꢓꢛꢎꢠ

ꢡꢓꢛꢡꢠ

ꢉꢉꢏ

6ꢓꢛ4ꢠ

ꢊꢋꢌꢍꢏ

ꢁꢂꢙ4ꢘ

ꢂ

ꢁꢏꢛꢏꢠ

ꢃꢄ4

ꢋꢇꢈ4

4ꢚꢔꢀ

4ꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄ4

ꢆꢇꢄ4

ꢃꢄꢈꢂ

ꢀꢗ4

ꢉꢋꢊꢖ4

ꢈꢆꢘꢉꢒꢙꢅꢅ4

ꢖꢐꢋꢋꢌ4

ꢉꢉ4

6ꢓꢛ4ꢠ

ꢊꢋꢌꢍ4

ꢈꢍꢊꢖ ꢅꢐꢄꢌ ꢐꢄꢌ

4644 ꢀ4ꢁ

ꢁꢏꢛꢏꢠ

Figure 33. 4V to 14V Input, Quad 1.2V, 1.5V, 2.5V and 3.3V Output with Tracking

4644fe

27

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL APPLICATIONS

ꢉꢑꢒꢃꢄ

ꢉꢑꢒꢋꢇꢈ

ꢂ

ꢎꢖꢏꢛꢝꢂ ꢞꢟ ꢝꢂ

ꢁꢓꢔꢀ

ꢁꢖꢜꢂꢚ4ꢙ

ꢁꢖꢝꢂꢚ4ꢙ

ꢃꢄꢁ

ꢋꢇꢈꢁ

ꢀꢘꢁ

4ꢛꢔꢀ

4ꢂ

ꢅꢂꢃꢄꢁ

ꢆꢇꢄꢁ

ꢃꢄꢈꢂ

ꢕ4

ꢑꢈꢊ4644

ꢉꢋꢊꢗꢁ

ꢈꢆꢙꢉꢒꢚꢅꢅꢁ

ꢗꢐꢋꢋꢌꢁ

6ꢖꢏꢂ

ꢁꢎꢓ6

ꢏꢓꢖꢁꢠ

4ꢓꢖꢎꢠ

6ꢓꢖ4ꢠ

ꢡꢓꢖꢡꢠ

ꢓꢜꢓꢝ

ꢉꢉꢁ

ꢓꢖꢁꢔꢀ

ꢊꢋꢌꢍꢁ

ꢂ

ꢃꢄꢎ

ꢋꢇꢈꢎ

ꢀꢘꢎ

4ꢛꢔꢀ

4ꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄꢎ

ꢆꢇꢄꢎ

ꢃꢄꢈꢂ

ꢉꢉꢎ

ꢝꢂ ꢘꢃꢙꢅ

ꢉꢋꢊꢗꢎ

ꢈꢆꢙꢉꢒꢚꢅꢅꢎ

ꢗꢐꢋꢋꢌꢎ

ꢁꢔꢀ

6ꢖꢏꢂ

ꢊꢋꢌꢍꢎ

ꢁꢖꢎꢂꢚ4ꢙ

ꢁꢂꢚ4ꢙ

ꢂ

ꢃꢄꢏ

ꢋꢇꢈꢏ

ꢀꢘꢏ

4ꢛꢔꢀ

4ꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄꢏ

ꢆꢇꢄꢏ

ꢃꢄꢈꢂ

ꢉꢋꢊꢗꢏ

ꢈꢆꢙꢉꢒꢚꢅꢅꢏ

ꢗꢐꢋꢋꢌꢏ

ꢉꢉꢏ

ꢊꢋꢌꢍꢏ

ꢓꢖꢁꢔꢀ

ꢂ

ꢃꢄ4

ꢋꢇꢈ4

ꢀꢘ4

4ꢛꢔꢀ

4ꢂ

ꢓꢜꢓꢝ

ꢅꢂꢃꢄ4

ꢆꢇꢄ4

ꢃꢄꢈꢂ

ꢉꢋꢊꢗ4

ꢈꢆꢙꢉꢒꢚꢅꢅ4

ꢗꢐꢋꢋꢌ4

ꢉꢉ4

ꢊꢋꢌꢍ4

ꢈꢍꢊꢗ ꢅꢐꢄꢌ ꢐꢄꢌ

4644 ꢀ4ꢁ

Figure 34. 2.375V to 5V Input, Quad 1V, 1.2V, 1.5V, 1.8V Output

4644fe

28

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL APPLICATIONS

ꢋꢒꢓꢄꢅ

ꢋꢒꢓꢍꢉꢊ

ꢃ

ꢄꢅ

ꢃ

ꢆꢝꢐꢃꢚꢆ6ꢙ

4ꢛꢔꢀ

ꢄꢅꢆ

ꢍꢉꢊꢆ

ꢀꢘꢆ

4ꢃ ꢞꢟ ꢆ4ꢃ

ꢐꢐꢔꢀ

ꢕꢐ

ꢆ6ꢃ

ꢆꢐꢖ6

ꢇꢃꢄꢅꢆ

ꢈꢉꢅꢆ

ꢄꢅꢊꢃ

ꢕꢁ

4ꢃ

ꢒꢊꢌ4644

ꢋꢍꢌꢗꢆ

ꢆꢂꢝꢆꢠ

ꢖꢜꢖꢂ

ꢊꢈꢙꢋꢓꢚꢇꢇꢆ

ꢗꢑꢍꢍꢎꢆ

ꢋꢋꢆ

ꢌꢍꢎꢏꢆ

ꢖꢝꢆꢔꢀ

ꢃ

ꢄꢅꢐ

ꢍꢉꢊꢐ

ꢀꢘꢐ

ꢇꢃꢄꢅꢐ

ꢈꢉꢅꢐ

ꢄꢅꢊꢃ

ꢋꢍꢌꢗꢐ

ꢊꢈꢙꢋꢓꢚꢇꢇꢐ

ꢗꢑꢍꢍꢎꢐ

ꢋꢋꢐ

ꢌꢍꢎꢏꢐ

ꢃ

ꢄꢅꢁ

ꢍꢉꢊꢁ

ꢀꢘꢁ

ꢇꢃꢄꢅꢁ

ꢈꢉꢅꢁ

ꢄꢅꢊꢃ

ꢋꢍꢌꢗꢁ

ꢊꢈꢙꢋꢓꢚꢇꢇꢁ

ꢗꢑꢍꢍꢎꢁ

ꢋꢋꢁ

ꢌꢍꢎꢏꢁ

ꢃ

ꢄꢅ4

ꢍꢉꢊ4

ꢀꢘ4

ꢇꢃꢄꢅ4

ꢈꢉꢅ4

ꢄꢅꢊꢃ

ꢋꢍꢌꢗ4

ꢊꢈꢙꢋꢓꢚꢇꢇ4

ꢗꢑꢍꢍꢎ4

ꢋꢋ4

ꢃ

ꢄꢅ

ꢌꢍꢎꢏ4

ꢃ

ꢢ ꢖꢝ6ꢃ

ꢆꢖꢖꢔꢙ

ꢄꢅ

ꢊꢏꢌꢗ ꢇꢑꢅꢎ ꢑꢅꢎ

ꢈ

ꢊ

ꢡ

ꢈ

ꢊ

4644 ꢀꢁꢂ

ꢙꢚꢎ

Figure 35. 4V to 14V Input, 4-Phase, 1.2V at 16A Design with Temperature Monitoring

4644fe

29

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL APPLICATIONS

ꢊꢑꢓꢃꢄ

ꢊꢑꢓꢌꢈꢉ

ꢂ

ꢅꢞꢏꢂꢚꢅ6ꢙ

ꢌꢈꢉꢅ

4ꢛꢔꢀ

ꢕꢁ

ꢂ

6ꢖꢞ4ꢡ

ꢃꢄ

ꢂ

ꢃꢄꢅ

4ꢂ ꢟꢠ ꢅ4ꢂ

4ꢂ

ꢏꢏꢔꢀ

ꢕꢏ

ꢅ6ꢂ

ꢅꢏꢖ6

ꢀꢘꢅ

ꢆꢂꢃꢄꢅ

ꢇꢈꢄꢅ

ꢃꢄꢉꢂ

ꢖꢜꢖꢝ

ꢑꢉꢋ4644ꢒꢅ

ꢊꢌꢋꢗꢅ

ꢉꢇꢙꢊꢓꢚꢆꢆꢅ

ꢗꢐꢌꢌꢍꢅ

ꢊꢊꢅ

ꢋꢌꢍꢎꢅ

ꢖꢞꢅꢔꢀ

ꢂ

ꢌꢈꢉꢏ

ꢃꢄꢏ

ꢀꢘꢏ

ꢊꢌꢋꢗꢏ

ꢆꢂꢃꢄꢏ

ꢇꢈꢄꢏ

ꢉꢇꢙꢊꢓꢚꢆꢆꢏ

ꢗꢐꢌꢌꢍꢏ

ꢃꢄꢉꢂ

ꢋꢌꢍꢎꢏ

ꢊꢊꢏ

ꢂ

ꢌꢈꢉꢁ

ꢃꢄꢁ

ꢀꢘꢁ

ꢊꢌꢋꢗꢁ

ꢆꢂꢃꢄꢁ

ꢇꢈꢄꢁ

ꢉꢇꢙꢊꢓꢚꢆꢆꢁ

ꢗꢐꢌꢌꢍꢁ

ꢃꢄꢉꢂ

ꢋꢌꢍꢎꢁ

ꢊꢊꢁ

ꢂ

ꢌꢈꢉ4

ꢃꢄ4

ꢀꢘ4

ꢊꢌꢋꢗ4

ꢆꢂꢃꢄ4

ꢇꢈꢄ4

ꢉꢇꢙꢊꢓꢚꢆꢆ4

ꢗꢐꢌꢌꢍ4

ꢃꢄꢉꢂ

ꢋꢌꢍꢎ4

ꢊꢊ4

ꢂ

ꢃꢄ

ꢂ

ꢣ ꢖꢞ6ꢂ

ꢅꢖꢖꢔꢙ

ꢃꢄ

ꢉꢎꢋꢗ ꢆꢐꢄꢍ ꢐꢄꢍ

ꢇ

ꢢ

ꢇ

ꢉ

4644 ꢀꢁ6

ꢙꢚꢍ

Figure 36. 4V to 14V Input, 4-Phase, 1.2V at 16A Design with Temperature Monitoring

4644fe

30

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL APPLICATIONS

ꢊꢑꢒꢃꢄ

ꢊꢑꢒꢌꢈꢉ

ꢂ

ꢜꢂ

ꢅꢝꢏꢂꢙꢛꢘ

4ꢚꢓꢀ

ꢃꢄꢅ

ꢌꢈꢉꢅ

ꢀꢗꢅ

ꢏꢏꢓꢀ

ꢔꢏ

ꢅ6ꢂ

ꢅꢏꢕ6

ꢆꢂꢃꢄꢅ

ꢇꢈꢄꢅ

ꢃꢄꢉꢂ

ꢔꢏ

4ꢂ

ꢑꢉꢋ4644

ꢊꢌꢋꢖꢅ

ꢉꢇꢘꢊꢒꢙꢆꢆꢅ

ꢖꢐꢌꢌꢍꢅ

ꢁꢕꢝꢏꢞ

ꢕꢛꢕꢜ

ꢊꢊꢅ

ꢋꢌꢍꢎꢅ

ꢕꢝꢅꢓꢀ

ꢂ

ꢃꢄꢏ

ꢌꢈꢉꢏ

ꢀꢗꢏ

ꢆꢂꢃꢄꢏ

ꢇꢈꢄꢏ

ꢃꢄꢉꢂ

ꢊꢌꢋꢖꢏ

ꢉꢇꢘꢊꢒꢙꢆꢆꢏ

ꢖꢐꢌꢌꢍꢏ

ꢊꢊꢏ

ꢋꢌꢍꢎꢏ

ꢅꢏꢂ

ꢏꢏꢓꢀ

ꢔꢏ

ꢂ

ꢁꢝꢁꢂꢙꢛꢘ

4ꢚꢓꢀ

ꢃꢄꢁ

ꢌꢈꢉꢁ

ꢀꢗꢁ

ꢆꢂꢃꢄꢁ

ꢇꢈꢄꢁ

ꢃꢄꢉꢂ

ꢔꢏ

ꢊꢌꢋꢖꢁ

ꢉꢇꢘꢊꢒꢙꢆꢆꢁ

ꢖꢐꢌꢌꢍꢁ

6ꢝꢁꢂ

ꢅ6ꢂ

ꢅꢏꢕ6

6ꢝ6ꢜꢞ

ꢕꢛꢕꢜ

ꢊꢊꢁ

ꢋꢌꢍꢎꢁ

ꢕꢝꢅꢓꢀ

ꢂ

ꢃꢄ4

ꢌꢈꢉ4

ꢀꢗ4

ꢆꢂꢃꢄ4

ꢇꢈꢄ4

ꢃꢄꢉꢂ

ꢊꢌꢋꢖ4

ꢉꢇꢘꢊꢒꢙꢆꢆ4

ꢖꢐꢌꢌꢍ4

ꢊꢊ4

ꢋꢌꢍꢎ4

ꢉꢎꢋꢖ ꢆꢐꢄꢍ ꢐꢄꢍ

4644 ꢀꢁ6

Figure 37. 12V and 5V Two Separate Input Rails, 1.2V at 8A and 3.3V at 8A Output

4644fe

31

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

TYPICAL APPLICATIONS

W R V P

V I N _ S N S

I I N _ S N S P

I I N _ S N S M

C H A N N E L 0

C H A N N E L 1

C H A N N E L 2

C H A N N E L 3

4644fe

32

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

PACKAGE DESCRIPTION

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

LTM4644/LTM4644-1 Component BGA Pinout

A1

A2

A3

A4

A5

A6

A7

NAME

B1

B2

B3

B4

B5

B6

B7

NAME

GND

C1

C2

C3

C4

C5

C6

C7

NAME

D1

D2

D3

D4

D5

D6

D7

NAME

E1

E2

E3

E4

E5

E6

E7

NAME

GND

F1

F2

F3

F4

F5

F6

F7

NAME

V

OUT2

V

OUT2

V

OUT2

V

OUT3

OUT1

GND

PGOOD2

PGOOD1

GND

PGOOD3

TEMP

V

GND

V

IN1

IN2

GND

INTV

CC2

CC1

SV

GND

SV

GND

IN1

IN2

TRACK/SS1

FB1

MODE1

COMP1

RUN1

CLKIN

TRACK/SS2

FB2

MODE2

COMP2

RUN2

SGND

G1

G2

G3

G4

G5

G6

G7

NAME

H1

H2

H3

H4

H5

H6

H7

NAME

GND

J1

J2

J3

J4

J5

J6

J7

NAME

K1

K2

K3

K4

K5

K6

K7

NAME

L1

L2

L3

L4

L5

L6

L7

NAME

GND

V

OUT4

V

OUT3

OUT4

GND

PGOOD4

CLKOUT

GND

V

IN3

V

IN3

GND

V

IN4

V

IN4

INTV

CC3

GND

SV

IN3

GND

INTV

SV

IN4

CC4

TRACK/SS3

FB3

MODE3

COMP3

RUN3

FB4

TRACK/SS4

RUN4

MODE4

COMP4

4644fe

33

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTM4644#packaging for the most recent package drawings.

BGA Package

77-Lead (9mm × 15mm × 5.01mm)

(Reference LTC DWG # 05-08-1900 Rev D)

ꢓ

ꢫ ꢫ ꢳ ꢳ ꢳ

ꢓ

ꢬ ꢤ ꢞ ꢍ ꢛ

ꢦ ꢤ ꢜ 4 ꢛ

ꢍ ꢤ ꢦ ꢴ ꢛ

ꢛ ꢤ ꢬ ꢍ ꢴ ꢜ

ꢍ ꢤ ꢦ ꢴ ꢛ

ꢛ ꢤ ꢛ ꢛ ꢛ

ꢦ ꢤ ꢜ 4 ꢛ

ꢬ ꢤ ꢞ ꢍ ꢛ

4644fe

34

For more information www.linear.com/LTM4644

LTM4644/LTM4644-1

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

A

01/14 Add SnPb BGA package option

1, 2

B

06/14 Add Tech Clip video link

Update Order Information

1

2

Update Run Threshold

3

Update Figure 5

13

14

2

Update Soft-Start and Output Voltage Tracking Section

05/16 Added MP-grade (–55°C to 125°C)

C

D

12/16 Added LTM4644-1

1 ,2, 4, 9, 10, 33

Added Comparison Table between LTM4644 and LTM4644-1

Added Output Voltage Programing (LTM4644-1)

Added Figure 36

1

10

30

32

3

Added Figure 38

E

01/18 Changed I

(MIN) from 5A to 6A

OUTPK

4644fe

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

35

For more information www.linear.com/LTM4644

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTM4644/LTM4644-1

PACKAGE PHOTO

DESIGN RESOURCES

SUBJECT

DESCRIPTION

Design:

• Selector Guides

µModule Design and Manufacturing Resources

Manufacturing:

• Quick Start Guide

• PCB Design, Assembly and Manufacturing Guidelines

• Package and Board Level Reliability

• Demo Boards and Gerber Files

• Free Simulation Tools

µModule Regulator Products Search

1. Sort table of products by parameters and download the result as a spread sheet.

2. Search using the Quick Power Search parametric table.

TechClip Videos

Quick videos detailing how to bench test electrical and thermal performance of µModule products.

Digital Power System Management

Linear Technology’s family of digital power supply management ICs are highly integrated solutions that

offer essential functions, including power supply monitoring, supervision, margining and sequencing,

and feature EEPROM for storing user configurations and fault logging.

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

LTM4624

LTM4619

LTM4618

LTM4628

14V , 4A Step-Down µModule Regulator in Tiny

4V ≤ V ≤ 14V, 0.6V ≤ V

≤ 5.5V, V

Tracking, PGOOD, Light Load Mode,

IN

OUT

2

OUT

6.25mm × 6.25mm × 5.01mm BGA

Complete Solution in 1cm (Single-Sided PCB)

Dual 26V, 4A Step-Down µModule Regulator

4.5V ≤ V ≤ 26.5V, 0.8V ≤ V

≤ 5V, PLL Input, V

OUT

Tracking, PGOOD,

Tracking,

IN

OUT

15mm × 15mm × 2.82mm LGA

4.5V ≤ V ≤ 26.5V, 0.8V ≤ V

26V, 6A Step-Down µModule Regulator

IN

OUT

9mm × 15mm × 4.32mm LGA

4.5V ≤ V ≤ 26.5V, 0.6V ≤ V

Dual 26V, 8A Step-Down µModule Regulator

≤ 5.5V, Remote Sense Amplifier, Internal

OUT

IN

Temperature Sensing Output, 15mm × 15mm × 4.32mm LGA

2.375V ≤ V ≤ 5.5V, 0.8V ≤ V ≤ 5V, 15mm × 15mm × 2.82mm LGA

LTM4614

Dual 5V, 4A µModule Regulator

IN

OUT

LTM4608A

5V, 8A Step-Down µModule Regulator with

2.7V ≤ V ≤ 5.5V, 0.6V ≤ V

≤ 5V, PLL input, Clock Output, V

Tracking and

IN

OUT

Tracking, Margining and Frequency Synchronization Margining, PGOOD, 9mm × 15mm × 2.82mm LGA

LTM4616

LTM8045

LTM8001

Dual 5V, 8A Step-Down µModule Regulator with

2.7V ≤ V ≤ 5.5V, 0.6V ≤ V

≤ 5V, PLL input, Clock Output, V

Tracking and

IN

OUT

Tracking, Margining and Frequency Synchronization Margining, PGOOD, 15mm × 15mm × 2.82mm LGA

Inverting or SEPIC µModule DC/DC Converter with 2.8V ≤ V ≤ 18V, 2.5V ≤ V

Up to 700mA Output Current

36V, 5A Step-Down µModule Regulator with

Configurable Array of Five 1A LDOs

≤

15V, Synchronizable, No Derating or Logic-

IN

OUT

Level Shift for Control Inputs when Inverting, 6.25mm × 11.25mm × 4.92mm BGA

6V ≤ V ≤ 36V, 0V ≤ V

≤ 24V, Five Parallelable 1.1A 90µV

Output Noise

IN

OUT

RMS

LDOs, Synchronizable, Adjustable Switcher Output Current Limit, 15mm × 15mm

× 4.92mm BGA

2

LTC^®2978

LTC2974

Octal Digital Power Supply Manager with EEPROM I C/PMBus Interface, Configuration EEPROM, Fault Logging, 16-Bit ADC with

0.25ꢀ TUE, 3.3V to 15V Operation

Quad Digital Power Supply Manager with EEPROM I C/PMBus Interface, Configuration EEPROM, Fault Logging, Per Channel Voltage,

2

Current and Temperature Measurements

4644fe

LT 0118 REV E • PRINTED IN USA

www.linear.com/LTM4644

36

 ANALOG DEVICES, INC. 2013

For more information www.linear.com/LTM4644


型号：	LTM4644IY-1#PBF
厂家：	Linear
描述：	LTM4644 - Quad DC/DC µModule (Power Module) Regulator with Configurable 4A Output Array; Package: BGA; Pins: 77; Temperature Range: -40°C to 85°C
文件：	总36页 (文件大小：1041K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTM4644IY-1#PBF [Linear]

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