LTM2882IV-3-PBF [Linear]
Dual Isolated RS232 μModule Transceiver + Power; 双隔离RS232微型模块收发器+电源
| 型号： | LTM2882IV-3-PBF |
| 厂家： | 
Linear |
| 描述： | Dual Isolated RS232 μModule Transceiver + Power |
| 文件： | 总18页 (文件大小：286K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM2882
Dual Isolated RS232
µModule Transceiver + Power
FEATURES
DESCRIPTION
The LTM®2882 is a complete galvanically isolated dual
RS232μModule®transceiver. Noexternalcomponentsare
required. A single 3.3V or 5V supply powers both sides
of the interface through an integrated, isolated DC/DC
converter. A logic supply pin allows easy interfacing with
different logic levels from 1.62V to 5.5V, independent of
the main supply.
n
Isolated Dual RS232 Transceiver: 2500V
RMS
n
Isolated DC Power: 5V at Up to 200mA
n
No External Components Required
n
1.62V to 5.5V Logic Supply for Flexible Digital
Interface
n
High Speed Operation
1Mbps for 250pF/3kΩ Load
250kbps for 1nF/3kΩ Load
Coupled inductors and an isolation power transformer
100kbps for 2.5nF/3kΩ TIA/EIA-232-F Load
3.3V ꢁLTM2882-3ꢂ or 5V ꢁLTM2882-5ꢂ Operation
No Damage or Latchup to 10kV ESD ꢃHM on
Isolated RS232 Interface or Across Isolation Harrier
ꢃigh Common Mode Transient Immunity: 30kV/ꢀs
Common Mode Working Voltage: 560V
True RS232 Compliant Output Levels
provide2500V
ofisolationbetweenthelinetransceiver
RMS
n
n
and the logic interface. This device is ideal for systems
with different grounds, allowing for large common mode
voltages. Uninterrupted communication is guaranteed for
common mode transients greater than 30kV/ꢀs.
n
n
n
n
PEAK
This part is compatible with the TIA/EIA-232-F standard.
Driver outputs are protected from overload and can be
shorted to ground or up to 15V without damage. An
auxiliary isolated digital channel is available. This channel
allows configuration for half-duplex operation by control-
ling the DE pin.
Small Low Profile ꢁ15mm × 11.25mm × 2.8mmꢂ
Surface Mount HGA and LGA Packages
APPLICATIONS
n
Isolated RS232 Interface
n
Industrial Communication
Enhanced ESD protection allows this part to withstand up
to 10kVꢁhumanbodymodelꢂonthetransceiverinterface
pins to isolated supplies and across the isolation barrier
to logic supplies without latchup or damage.
n
Test and Measurement Equipment
Hreaking RS232 Ground Loops
n
L, LT, LTC, LTM, Linear Technology, the Linear logo and μModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Isolated Dual RS232 μModule Transceiver
1Mbps Operation
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
TIN
5V/DIV
V
V
CC
LTM2882
L
V
5V
CC2
DE
AVAILAHLE CURRENT:
150mA ꢁLTM2882-5ꢂ
100mA ꢁLTM2882-3ꢂ
OFF ON
ON
T1OUT/R1IN
10V/DIV
DIN
DOUT
T1OUT
R1IN
T2OUT/R2IN
T1IN
R1OUT
5V/DIV
R2OUT
R1OUT
T2IN
T2OUT
R2IN
2882 TA01b
400ns/DIV
R2OUT
DRIVER OUTPUTS TIED TO RECEIVER INPUTS
TOUT LOAD = 250pF + RIN
ROUT LOAD = 150pF
GND
GND2
2882 TA01a
2882fa
1
LTM2882
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V
to GND .................................................. –0.3V to 6V
CC
1
2
3
4
5
6
7
8
V to GND .................................................... –0.3V to 6V
L
V
V
CC
R2OUT
T2IN R1OUT
T1IN DIN ON
L
V
CC2
to GND2............................................... –0.3V to 6V
A
H
C
D
E
F
Logic Inputs
T1IN, T2IN, ON, DIN to GND .......–0.3V to ꢁV + 0.3Vꢂ
L
CC2
GND
DE to GND2 ............................–0.3V to ꢁV
Logic Outputs
+ 0.3Vꢂ
R1OUT, R2OUT to GND...............–0.3V to ꢁV + 0.3Vꢂ
L
DOUT to GND2........................–0.3V to ꢁV
Driver Output Voltage
+ 0.3Vꢂ
CC2
G
ꢃ
I
T1OUT, T2OUT to GND2...........................–15V to 15V
Receiver Input Voltage
R1IN, R2IN to GND2 ............................... –25V to 25V
Operating Temperature Range ꢁNote 4ꢂ
J
LTM2882C .........................................0°C ≤ T ≤ 70°C
GND2
A
K
L
LTM2882I ..................................... –40°C ≤ T ≤ 85°C
A
Storage Temperature Range .................. –55°C to 125°C
Peak Reflow Temperature ꢁSoldering, 10 secꢂ....... 245°C
R2IN
V
CC2
T2OUT R1IN T1OUT DOUT DE
HGA PACKAGE
32-PIN ꢁ15mm s 11.25mm s 3.42mmꢂ
LGA PACKAGE
32-PIN ꢁ15mm s 11.25mm s 2.8mmꢂ
T
= 125°C,
T
= 125°C,
JMAX
JMAX
Q
= 30°C/W,
Q
= 29°C/W,
JA
JA
Q
= 27.8°C/W,
Q
Q
= 27.9°C/W,
JCTOP
JCTOP
Q
= 19.3°C/W,
= 24°C/W,
= 18°C/W,
JCHOTTOM
JCHOTTOM
Q
Q
= 22.7°C/W,
JH
JH
WEIGꢃT = 1.1g
WEIGꢃT = 1.1g
ORDER INFORMATION
LEAD FREE FINISH
LTM2882CY-3#PHF
LTM2882IY-3#PHF
LTM2882CY-5#PHF
LTM2882IY-5#PHF
LTM2882CV-3#PHF
LTM2882IV-3#PHF
LTM2882CV-5#PHF
LTM2882IV-5#PHF
TRAY
PART MARKING*
LTM2882Y-3
LTM2882Y-3
LTM2882Y-5
LTM2882Y-5
LTM2882V-3
LTM2882V-3
LTM2882V-5
LTM2882V-5
PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LTM2882CY-3#PHF
LTM2882IY-3#PHF
LTM2882CY-5#PHF
LTM2882IY-5#PHF
LTM2882CV-3#PHF
LTM2882IV-3#PHF
LTM2882CV-5#PHF
LTM2882IV-5#PHF
32-Pin ꢁ15mm × 11.25mm × 3.42mmꢂ HGA
32-Pin ꢁ15mm × 11.25mm × 3.42mmꢂ HGA
32-Pin ꢁ15mm × 11.25mm × 3.42mmꢂ HGA
32-Pin ꢁ15mm × 11.25mm × 3.42mmꢂ HGA
32-Pin ꢁ15mm × 11.25mm × 2.8mmꢂ LGA
32-Pin ꢁ15mm × 11.25mm × 2.8mmꢂ LGA
32-Pin ꢁ15mm × 11.25mm × 2.8mmꢂ LGA
32-Pin ꢁ15mm × 11.25mm × 2.8mmꢂ LGA
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
2882fa
2
LTM2882
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
l
l
l
l
V
Input Supply Range
LTM2882-3
LTM2882-5
3.0
4.5
3.3
5.0
3.6
5.5
5.5
10
V
V
CC
V
Logic Supply Range
Input Supply Current
1.62
V
L
I
CC
ON = 0V
0
μA
mA
mA
V
LTM2882-3, No Load
LTM2882-5, No Load
LTM2882-3 DE = 0V, I
LTM2882-5 DE = 0V, I
DE = 0, No Load
24
17
5.0
5.0
5.0
65
30
21
V
V
Regulated Output Voltage, Loaded
= 100mA
= 150mA
4.7
4.7
4.8
CC2
LOAD
LOAD
V
Regulated Output Voltage, No Load
Efficiency
5.35
250
V
CC2ꢁNOLOADꢂ
CC2
I
= 100mA, LTM2882-5 ꢁNote 2ꢂ
%
mA
CC2
l
I
Output Supply Short-Circuit Current
Driver
l
l
l
l
V
Driver Output Voltage Low
Driver Output Voltage ꢃigh
Driver Short-Circuit Current
R = 3kΩ
–5
5
–5.7
6.2
35
V
V
OLD
OꢃD
OSD
OZD
L
V
R = 3kΩ
L
I
I
V
, V
= 0V, V
= 5.5V
15V
70
10
mA
μA
T1OUT T2OUT
CC2
Driver Three-State ꢁꢃigh Impedanceꢂ
Output Current
DE = 0V, V
, V
=
0.1
T1OUT T2OUT
Receiver
l
l
l
l
V
Receiver Input Threshold
Input Low
Input ꢃigh
0.8
1.3
1.7
0.4
5
V
V
IR
2.5
1.0
7
V
Receiver Input ꢃysteresis
Receiver Input Resistance
0.1
3
V
ꢃYSR
R
–15V ≤ ꢁV
, V ꢂ ≤ 15V
kΩ
IN
R1IN R2IN
Logic
l
l
l
l
V
Logic Input Threshold Voltage
ON, T1IN, T2IN, DIN = 1.62V ≤ V < 2.35V
0.25•V
0.4
0.75•V
V
V
ITꢃ
L
L
L
ON, T1IN, T2IN, DIN = 2.35V ≤ V ≤ 5.5V
0.67•V
L
L
DE
0.4
0.67•V
1
V
CC2
I
INL
Logic Input Current
μA
mV
V
V
Logic Input ꢃysteresis
Logic Output ꢃigh Voltage
T1IN, T2IN, DIN ꢁNote 2ꢂ
R1OUT, R2OUT
150
ꢃYS
Oꢃ
l
l
I
I
= –1mA ꢁSourcingꢂ, 1.62V ≤ V < 3.0V
V – 0.4
V
V
LOAD
LOAD
L
L
= –4mA ꢁSourcingꢂ, 3.0V ≤ V ≤ 5.5V
V – 0.4
L
L
l
DOUT, I
= –4mA ꢁSourcingꢂ
V
CC2
– 0.4
V
LOAD
V
Logic Output Low Voltage
R1OUT, R2OUT
OL
l
l
I
I
= 1mA ꢁSinkingꢂ, 1.62V ≤ V < 3.0V
0.4
0.4
V
V
LOAD
LOAD
L
= 4mA ꢁSinkingꢂ, 3.0V ≤ V ≤ 5.5V
L
l
DOUT, I
= 4mA ꢁSinkingꢂ
0.4
V
LOAD
ESD (HBM) ꢁNote 2ꢂ
RS232 Driver and Receiver Protection
ꢁT1OUT, T2OUT, R1IN, R2INꢂ to ꢁV , GND2ꢂ
10
10
10
kV
kV
kV
CC2
ꢁT1OUT, T2OUT, R1IN, R2INꢂ to ꢁV , V , GNDꢂ
CC
L
Isolation Houndary
ꢁV , GND2ꢂ to ꢁV , V , GNDꢂ
CC2 CC L
2882fa
3
LTM2882
SWITCHING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
R = 3kΩ, C = 2.5nF ꢁNote 3ꢂ
MIN
100
250
1000
10
TYP
MAX
UNITS
kbps
l
l
l
l
Maximum Data Rate
ꢁT1IN to T1OUT, T2IN to T2OUTꢂ
L
L
R = 3kΩ, C = 1nF ꢁNote 3ꢂ
kbps
L
L
R = 3kΩ, C = 250pF ꢁNote 3ꢂ
kbps
L
L
Maximum Data Rate ꢁDIN to DOUTꢂ
C = 15pF
L
Mbps
Driver
l
l
Driver Slew Rate ꢁ6V/t
or t
ꢂ
TLꢃ
R = 3kΩ, C = 50pF ꢁFigure 1ꢂ
150
0.5
V/μs
μs
TꢃL
L
L
t
t
t
t
, t
Driver Propagation Delay
Driver Skew |t – t
R = 3kΩ, C = 50pF ꢁFigure 1ꢂ
0.2
40
PꢃLD PLꢃD
L
L
|
R = 3kΩ, C = 50pF ꢁFigure 1ꢂ
ns
SKEWD
PꢃLD
PLꢃD
L
L
l
l
, t
Driver Output Enable Time
0.6
0.3
2
2
μs
DE = ↑ , R = 3kΩ, C = 50pF ꢁFigure 2ꢂ
PZꢃD PZLD
L
L
, t
Driver Output Disable Time
μs
DE = ↓ , R = 3kΩ, C = 50pF ꢁFigure 2ꢂ
PꢃZD PLZD
L
L
Receiver
l
l
t
t
t
, t
Receiver Propagation Delay
C = 150pF ꢁFigure 3ꢂ
0.2
40
60
0.4
μs
ns
ns
PꢃLR PLꢃR
L
Receiver Skew |t
– t
|
C = 150pF ꢁFigure 3ꢂ
L
SKEWR
PꢃLR
PLꢃR
, t
Receiver Rise or Fall Time
C = 150pF ꢁFigure 3ꢂ
L
200
RR FR
Auxiliary Channel
l
l
t
, t
Propagation Delay
Rise or Fall Time
C = 15pF, t and t < 4ns ꢁFigure 4ꢂ
60
60
100
200
ns
ns
PꢃLL PLꢃL
L
R
F
t
, t
C = 150pF ꢁFigure 4ꢂ
L
RL FL
Power Supply
l
Power-Up Time
0.2
2
ms
ON = ↑ to V
CC2ꢁMINꢂ
ISOLATION CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. LTM2882-3 VCC = 3.3V, LTM2882-5 VCC = 5.0V, VL = VCC, and GND =
GND2 = 0V, ON = VL unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
2500
4400
30
TYP
MAX
UNITS
V
Rated Dielectric Insulation Voltage
1 Minute, Derived from 1 Second Test
V
RMS
ISO
1 Second
ꢁNote 2ꢂ
ꢁNote 2ꢂ
V
Common Mode Transient Immunity
Maximum Working Insulation Voltage
Partial Discharge
kV/μs
V
IORM
560
V
PEAK
V
PR
= 1050 V
ꢁNote 2ꢂ
<5
pC
PEAK
9
Input to Output Resistance
Input to Output Capacitance
Creepage Distance
ꢁNote 2ꢂ
ꢁNote 2ꢂ
ꢁNote 2ꢂ
>10
Ω
pF
6
9.48
mm
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: This device includes over-temperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above specified maximum operating junction
temperature may result in device degradation or failure.
Note 2: Guaranteed by design and not subject to production test.
Note 3: Maximum Data Rate is guaranteed by other measured parameters
and is not tested directly.
2882fa
4
LTM2882
TA = 25°C, LTM2882-3 VCC = 3.3V, LTM2882-5
TYPICAL PERFORMANCE CHARACTERISTICS
V
CC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted.
VCC Supply Current vs Load
Capacitance (Dual Transceiver)
VCC Supply Current
vs Temperature
VCC Supply Current
vs Temperature
30
25
20
15
10
70
65
60
55
50
45
40
35
30
100
90
80
70
60
50
40
30
20
NO LOAD
V
= 3.3V
CC
LTM2882-3
250kbps, LTM2882-3
V
= 3.3V
CC
LTM2882-3
100kbps, LTM2882-3
19.2kbps, LTM2882-3
V
= 5.0V
CC
LTM2882-5
V
= 5.0V
250kbps, LTM2882-5
100kbps, LTM2882-5
CC
LTM2882-5
T1OUT AND T2OUT
HAUD = 100kbps
19.2kbps, LTM2882-5
R
= 3k, C = 2.5nF
L
L
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
0.5
1
1.5
2
2.5
TEMPERATURE ꢁ°Cꢂ
TEMPERATURE ꢁ°Cꢂ
LOAD CAPACITANCE ꢁnFꢂ
2882 G01
2882 G02
2882 G03
Receiver Input Threshold
vs Temperature
VCC Supply Current vs Data Rate
(Dual Transceiver)
Driver Slew Rate
vs Load Capacitance
140
120
100
80
3.0
2.5
2.0
1.5
1.0
0.5
0
70
60
50
40
30
20
10
0
3.3V C = 1nF
L
INPUT ꢃIGꢃ
3.3V C = 250pF
L
INPUT LOW
FALLING
RISING
60
5.0V C = 1nF
L
40
5.0V C = 250pF
L
20
0
200
400
600
800
1000
–50 –25
0
25
50
75 100 125
0
1
2
3
4
5
DATA RATE ꢁkbpsꢂ
TEMPERATURE ꢁ°Cꢂ
LOAD CAPACITANCE ꢁnFꢂ
2882 G04
2882 G05
2882 G06
Driver Disabled Leakage Current
vs Temperature at 15V
Driver Short-Circuit Current
vs Temperature
Receiver Output Voltage
vs Load Current
50
45
40
35
30
25
20
15
10
1000
100
10
6
5
4
3
2
1
0
V
= 15V
TOUT
V
V
V
= 5.5V
L
L
L
= 3.3V
= 1.62V
SINKING
1
SOURCING
0.1
0.01
0.001
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
2
4
6
8
10
TEMPERATURE ꢁ°Cꢂ
TEMPERATURE ꢁ°Cꢂ
LOAD CURRENTꢁmAꢂ
2882 G07
2882 G08
2882 G09
2882fa
5
LTM2882
TA = 25°C, LTM2882-3 VCC = 3.3V, LTM2882-5
TYPICAL PERFORMANCE CHARACTERISTICS
V
CC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted.
Logic Input Threshold
vs VL Supply Voltage
3.5
VCC2 Output Voltage
vs Load Current
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
V
CC
V
CC
= 3.0V TO 3.6V, LTM2882-3
= 4.5V TO 5.5V, LTM2882-5
3.0
2.5
5.5V
INPUT ꢃIGꢃ
2.0
INPUT LOW
5.0V
3.3V
1.5
1.0
0.5
0
3.0V
3.6V
4.5V
0
1
2
3
4
5
6
0
50
100
150
200
250
300
V
SUPPLY VOLTAGE ꢁVꢂ
LOAD CURRENT ꢁmAꢂ
L
2882 G10
2882 G11
Driver Outputs Exiting Shutdown
Driver Outputs Enable/Disable
ON
T1OUT
DE = DOUT,
2V/DIV
5V/DIV
DE
D
= V
IN
L
5V/DIV
T1OUT
T2OUT
T1OUT
DE = V
CC2
T2OUT
T2OUT
2882 G12
2882 G13
100μs/DIV
2μs/DIV
Operating Through 35kV/μs
Common Mode Transients
T1IN
T1OUT = R1IN
R1OUT
2V/DIV
2V/DIV
*
500V/DIV
2882 G14
50ns/DIV
* MULTIPLE SWEEPS OF
COMMON MODE TRANSIENTS
2882fa
6
LTM2882
TA = 25°C, LTM2882-3 VCC = 3.3V, LTM2882-5
TYPICAL PERFORMANCE CHARACTERISTICS
V
CC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted.
VCC2 Surplus Current
vs Temperature
300
VCC2 Power Efficiency
70
60
50
40
30
20
10
1.2
1.0
0.8
0.6
0.4
0.2
0
250
V
= 5.0V
LTM2882-5
CC
LTM2882-5
200
150
100
50
LTM2882-3
V
= 3.3V
LTM2882-3
CC
T1OUT AND T2OUT
HAUD = 100kbps
R
= 3k, C = 2.5nF
L
CC2
L
V
= 4.8V
T = 25°C
A
0
–50 –25
0
25
50
75 100 125
0
50
100
150
200
250
300
TEMPERATURE ꢁ°Cꢂ
LOAD CURRENT ꢁmAꢂ
2882 G15
2882 G16
VCC2 Load Step Response
VCC2 Ripple and Noise
200mV/DIV
50mA/DIV
100mV/DIV
T1IN = 250kbps
T1OUT, T2OUT, R = 3k
L
2882 G17
2882 G18
10μs/DIV
100μs/DIV
2882fa
7
LTM2882
TEST CIRCUITS
V
L
TIN
½V
L
0V
TOUT
t
t
PꢃLD
PLꢃD
C
TIN
R
L
V
L
OꢃD
3V
TOUT
0V
–3V
V
OLD
t , t ≤ 40ns
f
t
t
TLꢃ
r
TꢃL
2882 F01
Figure 1. Driver Slew Rate and Timing Measurement
V
CC2
0V
DE
TOUT
TOUT
½V
CC2
t
t
PꢃZD
PZꢃD
V
OꢃD
0 OR V
TOUT
L
5V
V
V
– 0.5V
– 0.5V
OꢃD
OLD
C
R
L
L
0V
0V
t
t
PLZD
DE
PZLD
t , t ≤ 40ns
r
f
–5V
V
OLD
2882 F02
Figure 2. Driver Enable/Disable Times
3V
RIN
1.5V
ROUT
–3V
t
t
PLꢃR
PꢃLR
C
RIN
t , t ≤ 40ns
L
V
Oꢃ
10%
90%
10%
ROUT
½V
L
r
f
90%
V
OL
t
t
RR
FR
2882 F03
Figure 3. Receiver Timing Measurement
V
L
DIN
½V
L
0V
DOUT
t
t
PꢃLL
PLꢃL
C
DIN
L
V
Oꢃ
10%
90%
90%
10%
DOUT
½V
CC2
V
OL
t
RL
t
FL
2882 F04
Figure 4. Auxiliary Channel Timing Measurement
2882fa
8
LTM2882
PIN FUNCTIONS
LOGIC SIDE
ISOLATED SIDE
R2OUT (Pin A1): Channel 2 RS232 Inverting Receiver
Output. Controlled through isolation barrier from receiver
input R2IN. Under the condition of an isolation communi-
cation failure R2OUT is in a high impedance state.
GND2 (Pins K1-K7): Isolated Side Circuit Ground. These
pads should be connected to the isolated ground and/or
cable shield.
V
(Pins K8, L7-L8): Isolated Supply Voltage Output.
CC2
T2IN (Pin A2): Channel 2 RS232 Inverting Driver Input.
A logic low on this input generates a high on isolated
output T2OUT. A logic high on this input generates a low
on isolated output T2OUT. Do not float.
Internally generated from V by an isolated DC/DC con-
CC
verter and regulated to 5V. Supply voltage for pins R1IN,
R2IN, DE, and DOUT. Internally bypassed to GND2 with
2.2μF.
R1OUT (Pin A3): Channel 1 RS232 Inverting Receiver
Output. Controlled through isolation barrier from receiver
input R1IN. Under the condition of an isolation communi-
cation failure R1OUT is in a high impedance state.
R2IN (Pin L1): Channel 2 RS232 Inverting Receiver Input.
A low on isolated input R2IN generates a logic high on
R2OUT. A high on isolated input R2IN generates a logic
low on R2OUT. Impedance is nominally 5kΩ in receive
mode or unpowered.
T1IN (Pin A4): Channel 1 RS232 Inverting Driver Input.
A logic low on this input generates a high on isolated
output T1OUT. A logic high on this input generates a low
on isolated output T1OUT. Do not float.
T2OUT (Pin L2): Channel 2 RS232 Inverting Driver
Output. Controlled through isolation barrier from driver
input T2IN. ꢃigh impedance when the driver is disabled
ꢁDE pin is lowꢂ.
DIN (Pin A5): General Purpose Non-Inverting Logic Input.
A logic high on DIN generates a logic high on isolated
output DOUT. A logic low on DIN generates a logic low
on isolated output DOUT. Do not float.
R1IN (Pin L3): Channel 1 RS232 Inverting Receiver Input.
A low on isolated input R1IN generates a logic high on
R1OUT. A high on isolated input R1IN generates a logic
low on R1OUT. Impedance is nominally 5kΩ in receive
mode or unpowered.
ON(PinA6):Enable. Enablespoweranddatacommunica-
tion through the isolation barrier. If ON is high the part is
enabled and power and communications are functional to
the isolated side. If ON is low the logic side is held in reset
and the isolated side is unpowered. Do not float.
T1OUT (Pin L4): Channel 1 RS232 Inverting Driver
Output. Controlled through isolation barrier from driver
input T1IN. ꢃigh impedance when the driver is disabled
ꢁDE pin is lowꢂ.
V (Pin A7): Logic Supply. Interface supply voltage for
L
pins DIN, R2OUT, T2IN, R1OUT, T1IN, and ON. Operat-
ing voltage is 1.62V to 5.5V. Internally bypassed to GND
with 2.2μF.
DOUT (Pin L5): General Purpose Non-Inverting Logic
Output. Logic output connected through isolation barrier
to DIN.
V
(Pins A8, B7-B8): Supply Voltage. Operating volt-
DE (Pin L6): Driver Output Enable. A low input forces
both RS232 driver outputs, T1OUTand T2OUT, into a high
impedance state. A high input enables both RS232 driver
outputs. Do not float.
CC
age is 3.0V to 3.6V for LTM2882-3, and 4.5V to 5.5V for
LTM2882-5. Internally bypassed to GND with 2.2μF.
GND (Pins B1-B6): Circuit Ground.
2882fa
9
LTM2882
BLOCK DIAGRAM
5V
REG
V
V
CC2
CC
2.2μF
2.2μF
V
GND2
DE
L
2.2μF
GND
DOUT
V
DD
DC/DC
CONVERTER
V
EE
ON
DIN
V
V
DD
T1OUT
R1IN
T1IN
R1OUT
T2IN
ISOLATED
COMMUNI-
CATIONS
ISOLATED
COMMUNI-
CATIONS
EE
5k
5k
INTERFACE
INTERFACE
V
DD
T2OUT
R2IN
V
EE
R2OUT
2882 HD
2882fa
10
LTM2882
APPLICATIONS INFORMATION
Overview
3.0V TO 3.6V LTM2882-3
4.5V TO 5.5V LTM2882-5
ANY VOLTAGE FROM
1.62V TO 5.5V
The LTM2882 μModule transceiver provides a galvani-
cally-isolated robust RS232 interface, powered by an
integrated, regulated DC/DC converter, complete with
decoupling capacitors. The LTM2882 is ideal for use in
networks where grounds can take on different voltages.
Isolation in the LTM2882 blocks high voltage differences,
eliminates ground loops and is extremely tolerant of com-
mon mode transients between grounds. Error-free opera-
tion is maintained through common mode events greater
than 30kV/ꢀs providing excellent noise isolation.
V
V
V
CC2
DE
LTM2882
L
CC
ON
DIN
DOUT
T1OUT
R1IN
T1IN
EXTERNAL
DEVICE
R1OUT
T2IN
T2OUT
R2IN
R2OUT
GND
GND2
μModule Technology
2882 F05
The LTM2882 utilizes isolator μModule technology to
translate signals and power across an isolation barrier.
Signals on either side of the barrier are encoded into
pulses and translated across the isolation boundary using
coreless transformers formed in the μModule substrate.
This system, complete with data refresh, error checking,
safe shutdown on fail, and extremely high common mode
immunity,providesarobustsolutionforbidirectionalsignal
isolation. The μModule technology provides the means
to combine the isolated signaling with our advanced dual
RS232transceiverandpowerfulisolatedDC/DCconverter
in one small package.
Figure 5. VCC and VL Are Independent
The internal power solution is sufficient to support the
transceiver interface at its maximum specified load and
data rate, and has the capacity to provide additional 5V
power on the isolated side V
and GND2 pins. V and
CC2
CC
V
are each bypassed internally with 2.2μF ceramic
CC2
capacitors.
V Logic Supply
L
AseparatelogicsupplypinV allowstheLTM2882tointer-
L
face with any logic signal from 1.62V to 5.5V as shown in
DC/DC Converter
Figure 5. Simply connect the desired logic supply to V .
L
The LTM2882 contains a fully integrated isolated DC/DC
converter, including the transformer, so that no external
components are necessary. The logic side contains a full-
bridge driver, running at about 2Mꢃz, and is AC-coupled
to a single transformer primary. A series DC blocking
capacitor prevents transformer saturation due to driver
duty cycle imbalance. The transformer scales the primary
voltage, and is rectified by a full-wave voltage doubler.
This topology eliminates transformer saturation caused
by secondary imbalances.
There is no interdependency between V and V ; they
CC
L
may simultaneously operate at any voltage within their
specified operating ranges and sequence in any order. V
is bypassed internally by a 2.2μF capacitor.
L
Hot Plugging Safely
Caution must be exercised in applications where power
is plugged into the LTM2882’s power supplies, V or V ,
CC
L
due to the integrated ceramic decoupling capacitors. The
parasitic cable inductance along with the high Q char-
acteristics of ceramic capacitors can cause substantial
ringing which could exceed the maximum voltage ratings
and damage the LTM2882. Refer to Linear Technology Ap-
plication Note 88, entitled “Ceramic Input Capacitors Can
Cause Overvoltage Transients” for a detailed discussion
and mitigation of this phenomenon.
TheDC/DCconverterisconnectedtoalowdropoutregulator
ꢁLDOꢂ to provide a regulated low noise 5V output, V
.
CC2
An integrated boost converter generates a 7V V supply
DD
andachargepumped–6.3VV supply.V andV power
EE
DD
EE
the output stage of the RS232 drivers and are regulated to
levels that guarantee greater than 5V output swing.
2882fa
11
LTM2882
APPLICATIONS INFORMATION
Channel Timing Uncertainty
Driver Overvoltage and Overcurrent Protection
Multiplechannelsaresupportedacrosstheisolationbound-
ary by encoding and decoding of the inputs and outputs.
ThetechniqueusedassignsT1IN/R1INthehighestpriority
such that there is no jitter on the associated output chan-
nels T1OUT/R1OUT, only delay. This preemptive scheme
willproduceacertainamountofuncertaintyonT2IN/R2IN
to T2OUT/R2OUT and DIN to DOUT. The resulting pulse
widthuncertaintyontheselowprioritychannelsistypically
6ns, but may vary up to about 40ns.
The driver outputs are protected from short-circuits to
any voltage within the absolute maximum range of 15V
relative to GND2. The maximum current is limited to no
more than 70mA to maintain a safe power dissipation and
prevent damaging the LTM2882.
Receiver Overvoltage and Open Circuit
The receiver inputs are protected from common mode
voltages of 25V relative to GND2.
Eachreceiverinputhasanominalinputimpedanceof5kΩ
relative to GND2. An open circuit condition will generate a
logic high on each receiver’s respective output pin.
Half-Duplex Operation
The DE pin serves as a low-latency driver enable for half-
duplex operation. The DE pin can be easily driven from
the logic side by using the uncommitted auxiliary digital
channel, DIN to DOUT. Each driver is enabled and disabled
in lessthan 2μs, whileeach receiverremains continuously
active. This mode of operation is illustrated in Figure 6.
RF, Magnetic Field Immunity
The LTM2882 has been independently evaluated and has
successfully passed the RF and magnetic field immunity
testing requirements per European Standard EN 55024,
in accordance with the following test standards:
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
V
ON
V
V
LTM2882
L
CC
CC2
DE
EN 61000-4-3
EN 61000-4-8
EN 61000-4-9
Radiated, Radio-Frequency,
Electromagnetic Field Immunity
DIN
DOUT
T1OUT
R1IN
R
T
X
X
Power Frequency
Magnetic Field Immunity
T1IN
R1OUT
T2IN
Pulsed Magnetic Field Immunity
T2OUT
R2IN
Tests were performed using an unshielded test card de-
signed per the data sheet PCH layout recommendations.
Specific limits per test are detailed in Table 1.
R2OUT
GND
GND2
2882 F06
Table 1
Figure 6. Half-Duplex Configuration Using DOUT to Drive DE
TEST
FREQUENCY
80Mꢃz to 1Gꢃz
1.4Mꢃz to 2Gꢃz
2Gꢃz to 2.7Gꢃz
50ꢃz and 60ꢃz
60ꢃz
FIELD STRENGTH
10V/m
EN 61000-4-3, Annex D
3V/m
1V/m
EN61000-4-8, Level 4
EN61000-4-8, Level 5
EN61000-4-9, Level 5
*Non IEC Method
30A/m
100A/m*
1000A/m
Pulse
2882fa
12
LTM2882
APPLICATIONS INFORMATION
PCB Layout
• For large ground planes a small capacitance ꢁ≤ 330pFꢂ
from GND to GND2, either discrete or embedded within
the substrate, provides a low impedance current return
path for the module parasitic capacitance, minimizing
anyhighfrequencydifferentialvoltagesandsubstantially
reducingradiatedemissions.Discretecapacitanceisnot
as effective due to parasitic ESL; in addition consider
voltage rating, leakage, and clearance for component
selection. Embedding the capacitance within the PCH
substrateprovidesanearidealcapacitorandeliminates
theothercomponentselectionissues,howeverthePCH
must be 4 layers and the use of a slot is not compatible.
Exercise care in applying either technique to ensure the
voltage rating of the barrier is not compromised.
The high integration of the LTM2882 makes PCH layout
very simple. ꢃowever, to optimize its electrical isolation
characteristics, EMI, and thermal performance, some
layout considerations are necessary.
• Under heavily loaded conditions, V and GND current
CC
can exceed 300mA. Use sufficient copper on the PCH to
ensure resistive losses do not cause the supply voltage
to drop below the minimum allowed level. Similarly,
size the V
and GND2 conductors to support any
CC2
external load current. These heavy copper traces will
also help to reduce thermal stress and improve the
thermal conductivity.
• Input and Output decoupling is not required, since
these components are integrated within the package.
If an additional bulk capacitor is used a value of 6.8μF
to 22μF is recommended. The recommendation for
EMI sensitive applications is to include an additional
low ESL ceramic capacitor of 1μF to 4.7μF, placed close
to the power and ground terminals. Alternatively, use a
number of smaller value parallel capacitors to reduce
ESL and achieve the same net capacitance.
The PCH layout in Figure 7 shows a recommended con-
figuration for a low EMI RS232 application.
TOP LAYER
C1
V
= V
L
CC
= ON
= D
IN
DE = V
CC2
• Do not place copper on the PCH between the inner col-
umnsofpads. Thisareamustremainopentowithstand
the rated isolation voltage. Slot the PCH in this area to
facilitate cleaning and ensure contamination does not
compromise the isolation voltage.
T1IN
T1OUT
R1IN
R1OUT
T2IN
T2OUT
R2IN
R2OUT
• The use of solid ground planes for GND and GND2
is recommended for non-EMI critical applications to
optimize signal fidelity, thermal performance, and to
minimize RF emissions due to uncoupled PCH trace
conduction. The drawback of using ground planes,
where EMI is of concern, is the creation of a dipole
antennastructure,whichcanradiatedifferentialvoltages
formed between GND and GND2. If ground planes are
used, minimize their area, and use contiguous planes,
any openings or splits can increase RF emissions.
HOTTOM LAYER
GND
GND2
2882 F07
Figure 7. Recommended PCB Layout
2882fa
13
LTM2882
TYPICAL APPLICATIONS
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
V
L
V
CC
LTM2882
V
V
LTM2882
L
CC
ON
DE
ON
DE
DIN
DOUT
DIN
DOUT
R
X
T
X
T1IN
T1OUT
R1IN
T1IN
T1OUT
R1IN
3.3k
3.3k
R1OUT
T2IN
R1OUT
T2IN
3k
C
L
T2OUT
R2IN
T2OUT
R2IN
R2OUT
R2OUT
DATA RATE
(kbps)
C (nF)
L
GND
GND2
GND
GND2
2882 F09
2882 F08
100
250
5
2
1000
0.5
Figure 8. Single Line Dual Half-Duplex
Isolated Transceiver
Figure 9. Driving Larger Capacitive Loads
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
1.8V
5V
REGULATED
V
L
V
CC
V
ON
V
V
CC2
LTM2882
LTM2882
150mA ꢁLTM2882-5ꢂ
100mA ꢁLTM2882-3ꢂ
L
CC
OFF ON
ON
DE
DE
DIN
DOUT
DIN
DOUT
T1IN
T1OUT
R1IN
T1IN
T1OUT
R1IN
μP
R1OUT
T2IN
R1OUT
T2IN
T2OUT
R2IN
T2OUT
R2IN
R2OUT
R2OUT
GND
GND2
GND
GND2
2882 F10
2882 F11
Figure 10. 1.8V Microprocessor Interface
Figure 11. Isolated 5V Power Supply
5V
3.0V TO 3.6V ꢁLTM2882-3ꢂ
4.5V TO 5.5V ꢁLTM2882-5ꢂ
REGULATED
V
V
V
CC2
LTM2882
L
CC
ON
DE
DIN
DOUT
OFF ON
T1IN
T1OUT
R1IN
7V
SWITCꢃED
R1OUT
T2IN
T2OUT
R2IN
–6.3V
SWITCꢃED
R2OUT
GND
GND2
2882 F12
RETURN
Figure 12. Isolated Multirail Power Supply
with Switched Outputs
2882fa
14
LTM2882
PACKAGE DESCRIPTION
/ / b b b
Z
4 . 4 4 5
3 . 1 7 5
1 . 9 0 5
0 . 6 3 5
0 . 6 3 5
0 . 0 0 0
1 . 9 0 5
3 . 1 7 5
4 . 4 4 5
a a a
Z
2882fa
15
LTM2882
PACKAGE DESCRIPTION
Z
b b b
Z
4 . 4 4 5
3 . 1 7 5
1 . 9 0 5
0 . 6 3 5
0 . 6 3 5
1 . 9 0 5
3 . 1 7 5
4 . 4 4 5
a a a
Z
2882fa
16
LTM2882
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
3/10
Changes to Features
1
2, 15
2
Add HGA Package to Pin Configuration, Order Information and Package Description Sections
Changes to LGA Package in Pin Configuration Section
Update to Pin Functions
9
Update to RF, Magnetic Field Immunity Section
“PCH Layout Isolation Considerations” Section Replaced
12
13
2882fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
ꢃowever, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTM2882
TYPICAL APPLICATIONS
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
1.62V TO 5.5V
OFF ON
V
ON
V
V
LTM2882
V
L
V
CC
L
CC
CC2
DE
LTM2882
μC
PERIPꢃERAL
ON
DE
DIN
DOUT
T1OUT
R1IN
DIN
DOUT
T1IN
T1IN
T1OUT
R1IN
T D
X
R
X
R2OUT
T2IN
R1OUT
T2IN
3V TO 25V
3V TO 25V
V
V
L
R D
T
X
X
0V
0V
–25V TO 0V
–25V TO 0V
T2OUT
R2IN
T2OUT
R2IN
P
RTS
CTS
Y
R2OUT
R2OUT
L
P
Z
GND
GND2
GND
GND2
2882 F12
2882 F13
Figure 13. Isolated RS232 Interface with Handshaking
Figure 14. Isolated Dual Inverting Level Translator
3.3V ꢁLTM2882-3ꢂ
5V ꢁLTM2882-5ꢂ
1k
+V
S
V
ON
V
CC
V
LTM2882
L
CC2
DE
DIN
DOUT
T1OUT
R1IN
RESET
T1IN
PWMA
PWMH
LOGIC
LEVEL
FETS
R1OUT
T2IN
FAULT
T2OUT
R2IN
R2OUT
IRLML6402
IRLML2402
GND
GND2
CMPT2369-LTV
1k
3k
3k
470pF
47pF
R
= 0.6/MAX CURRENT
ILIM
2882 F14
Figure 15. Isolated Gate Drive with Overcurrent Detection
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
20Mbps, 15kV ꢃHM ESD, 2500V
LTM2881
Isolated RS485/RS422 μModule Transceiver with
Integrated DC/DC Converter
Isolation with Power
RMS
LTC2804
LTC1535
1Mbps RS232 Transceiver
Isolated RS485 Transceiver
Dual Channel, Full-Duplex, 10kV ꢃHM ESD
2500 V Isolation with External Transformer Driver
RMS
2882fa
LT 0310 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Hlvd., Milpitas, CA 95035-7417
18
●
●
© LINEAR TECHNOLOGY CORPORATION 2010
ꢁ408ꢂ 432-1900 FAX: ꢁ408ꢂ 434-0507 www.linear.com
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