LTC4151IDD-TRPBF_技术文档

LTC4151/LTC4151-1

2

High Voltage I C Current

and Voltage Monitor

FEATURES

DESCRIPTION

The LTC^®4151 and LTC4151-1 are high side power

monitors that operate over a wide voltage range of 7V to

80V. In default operation mode, the onboard 12-bit ADC

continuously measures high side current, input voltage

n

Wide Operating Voltage Range: 7V to 80V

n

12-Bit Resolution for Both Current and Voltages

2

n

I C Interface

n

Additional ADC Input Monitors an External Voltage

2

n

Continuous Scan and Snapshot Modes

and an external voltage. Data is reported through the I C

n

Shutdown Mode (LTC4151) Reduces Quiescent

interface when polled by a host. The monitors can also

perform on-demand measurement in a snapshot mode.

The LTC4151 features a dedicated shutdown pin to reduce

Current to 120μA

n

Split SDA for Optoisolation (LTC4151-1)

2

n

Tiny 10-Lead MSOP and 3mm × 3mm DFN Packages

power consumption. The LTC4151-1 features split I C

data pins with data in and an inverted data output to drive

optoisolators.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

APPLICATIONS

n

Telecom Infrastructure

n

Automotive

n

Industrial

n

Consumer

12-Bit ADC DNL and INL

TYPICAL APPLICATION

1.0

High Side Power Sensing with Onboard ADC and I²C

0.5

0.02Ω

3.3V

V

IN

7V to 80V

0

V

OUT

+

–

SENSE SENSE

V

DD

2k

–0.5

–1.0

V

IN

μCONTROLLER

SCL

SDA

SHDN

SCL

LTC4151

0

2048

3072

4096

1024

SDA

CODE

ADR1

ADR0

41511 TA01b

MEASURED

VOLTAGE

41511 TA01

1.0

0.5

ADIN

GND

0

–0.5

–1.0

0

2048

3072

4096

1024

CODE

41511 TA01c

41511fa

1

LTC4151/LTC4151-1

(Notes 1, 3)

ABSOLUTE MAXIMUM RATINGS

V Voltage.................................................–0.3V to 90V

Operating Temperature Range

IN

+

–

SENSE , SENSE Voltages.......................... V – 10V or

LTC4151C/LTC4151C-1............................ 0°C to 70°C

LTC4151I/LTC4151I-1 ..........................–40°C to 85°C

Storage Temperature Range

IN

–0.3V to V + 0.3V

IN

ADR1, ADR0 Voltages .............................. –0.3V to 90V

ADIN, SHDN, SDAO Voltages...................... –0.3V to 6V

SCL, SDA, SDAI Voltages (Note 2)........... –0.3V to 5.5V

SCL, SDA, SDAI Clamp Current .............................. 5mA

MSOP ................................................–65°C to 150°C

DFN....................................................–65°C to 125°C

Lead Temperature (Soldering, 10 sec)

MSOP Only ....................................................... 300°C

PIN CONFIGURATION

LTC4151

LT4151

TOP VIEW

+

–

TOP VIEW

SENSE

1

2

3

4

5

10 SENSE

+

–

SENSE

V

10

9

SENSE

GND

SHDN

SDA

SCL

1

2

3

4

5

V

9

8

7

6

GND

SHDN

SDA

SCL

IN

ADR1

ADR0

ADIN

11

ADR1

ADR0

ADIN

8

7

6

MS PACKAGE

10-LEAD PLASTIC MSOP

DD PACKAGE

10-LEAD (3mm s 3mm) PLASTIC DFN

T

JMAX

= 125°C, θ = 85°C/W

JA

T

= 125°C, θ = 45°C/W

JA

JMAX

EXPOSED PAD (PIN 11) PCB GND CONNECTION OPTIONAL

LTC4151-1

TOP VIEW

+

–

TOP VIEW

SENSE

1

2

3

4

5

10 SENSE

+

–

SENSE

10

9

SENSE

GND

SDAO

SDAI

SCL

1

2

3

4

5

V

9

8

7

6

GND

SDAO

SDAI

SCL

IN

V

IN

11

ADR1

ADR0

ADIN

ADR1

ADR0

ADIN

8

7

6

MS PACKAGE

10-LEAD PLASTIC MSOP

DD PACKAGE

10-LEAD (3mm s 3mm) PLASTIC DFN

T

JMAX

= 125°C, θ = 85°C/W

JA

T

= 125°C, θ = 45°C/W

JA

JMAX

EXPOSED PAD (PIN 11) PCB GND CONNECTION OPTIONAL

41511fa

2

LTC4151/LTC4151-1

ORDER INFORMATION

LEAD FREE FINISH

LTC4151CDD#PBF

LTC4151IDD#PBF

LTC4151CDD-1#PBF

LTC4151IDD-1#PBF

LTC4151CMS#PBF

LTC4151IMS#PBF

LTC4151CMS-1#PBF

LTC4151IMS-1#PBF

TAPE AND REEL

PART MARKING*

LCWZ

PACKAGE DESCRIPTION

TEMPERATURE RANGE

0°C to 70°C

LTC4151CDD#TRPBF

LTC4151IDD#TRPBF

LTC4151CDD-1#TRPBF

LTC4151IDD-1#TRPBF

LTC4151CMS#TRPBF

LTC4151IMS#TRPBF

LTC4151CMS-1#TRPBF

LTC4151IMS-1#TRPBF

10-Lead (3mm x 3mm) Plastic DFN

10-Lead Plastic MSOP

LCWZ

–40°C to 85°C

0°C to 70°C

LCXC

–40°C to 85°C

0°C to 70°C

LTCWY

LTCXB

10-Lead Plastic MSOP

–40°C to 85°C

0°C to 70°C

10-Lead Plastic MSOP

LTCXB

10-Lead Plastic MSOP

–40°C to 85°C

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_INis from 7V to 80V, unless noted. (Note 3)

SYMBOL

General

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Supply Voltage

Supply Current

7

80

V

IN

l

I

V

IN

V

IN

= 48V, Normal Operation Mode

= 12V, Shutdown Mode

1.2

120

1.7

300

mA

μA

IN

+

–

+

–

l

I

SENSE Input Current

V , SENSE , SENSE = 48V

5

9

1

μA

V

SENSE

IN

–

+

–

SENSE Input Current

V , SENSE , SENSE = 48V

0.1

1.5

–5

SENSE

IN

V

SHDN Input Threshold

SHDN Input Current

1

2

SHDN(TH)

I

SHDN = 0V

–3

–8

μA

SHDN

ADC

l

RES

Resolution (No Missing Codes)

Full-Scale Voltage

(Note 4)

12

Bits

+

–

V

(SENSE – SENSE )

81.92

102.4

2.048

mV

V

FS

V

IN

ADIN

+

–

LSB

TUE

LSB Step Size

(SENSE – SENSE )

IN

20

25

0.5

μV

mV

V

ADIN

(SENSE – SENSE )

(Note 5)

+

–

l

Total Unadjusted Error

1.25

1

0.75

1

%

V

IN

ADIN, LTC4151C, LTC4151C-1

ADIN, LTC4151I, LTC4151I-1

+

–

l

V

Offset Error

(SENSE – SENSE )

(Note 6)

5

6

8

LSB

OS

V

IN

ADIN

(SENSE – SENSE )

(Note 5)

+

–

l

INL

Integral Nonlinearity

1

0.5

3

2

LSB

V

IN

ADIN

41511fa

3

LTC4151/LTC4151-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_INis from 7V to 80V, unless noted. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

+

–

Transition Noise

(SENSE – SENSE )

IN

ADIN

1.2

0.3

22

μV

mV

μV

RMS

σ_T

V

l

f

t

Conversion Rate (Continuous Mode)

Conversion Time (Snapshot Mode)

6

7.5

9

Hz

CONV

+

–

l

(SENSE – SENSE )

ADIN, V

53

26

67

33

85

42

ms

IN

l

R

ADIN Pin Input Resistance

ADIN Pin Input Current

ADIN = 3V

2

10

MΩ

ADIN

I

2

μA

ADIN

2

I C Interface

l

V

ADR0, ADR1 Input High Threshold

ADRO, ADRI Input Low Threshold

ADRO, ADRI Input Current

2.3

0.3

2.65

0.6

2.9

0.9

70

V

ADR(H)

V

ADR(L)

l

I

ADR0, ADR1 = 0V or 3V

ADR0, ADR1 = 0.8V or 2.2V

μA

ADR(IN)

8

l

V

SDA, SDAO Output Low Voltage

SDA, SDAI, SDAO, SCL Input Current

SDA, SDAI, SCL Input Threshold

SDA, SDAI, SCL Clamp Voltage

I

, I = 8mA

0.15

0

0.4

2

V

μA

V

SDA(OL)

SDA SDAO

I

SDA, SDAI, SDAO, SCL = 5V

SDA,SCL(IN)

V

1.6

5.5

1.8

6.1

2

SDA,SCL(TH)

I

, I

= 3mA

6.6

V

SDA,SCL(CL)

SDA SDAI SCL

2

I C Interface Timing (Note 4)

f

t

Maximum SCL Clock Frequency

Minimum SCL Low Period

Minimum SCL High Period

400

kHz

μs

SCL(MAX)

LOW

0.65

50

1.3

600

1.3

ns

HIGH

Minimum Bus Free Time Between Stop/

Start Condition

0.12

μs

BUF(MIN)

t

Minimum Hold Time After (Repeated)

Start Condition

140

30

600

ns

HD,STA(MIN)

Minimum Repeated Start Condition

Set-Up Time

SU,STA(MIN)

t

Minimum Stop Condition Set-Up Time

Minimum Data Hold Time Input

Minimum Data Hold Time Output

Minimum Data Set-Up Time Input

30

–100

600

30

600

0

ns

SU,STO(MIN)

HD,DATI(MIN)

HD,DATO(MIN)

SU,DAT(MIN)

SP(MAX)

300

900

100

250

Maximum Suppressed Spike

Pulse Width

50

20

110

t

Stuck-Bus Reset Time

SCL or SDA/SDAI Held Low

33

5

ms

pF

RST

C

SCL, SDA Input Capacitance

10

X

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 3: All currents into pins are positive. All voltages are referenced to

GND, unless otherwise noted.

Note 4: Guaranteed by design and not subject to test.

Note 5: Integral nonlinearity and total unadjusted error of V are tested

IN

Note 2: Internal clamps limit the SCL, SDA (LTC4151) and SDAI

(LTC4151-1) pins to a minimum of 5.5V. Driving these pins to voltages

beyond the clamp may damage the part. The pins can be safely tied to

higher voltages through a resistor that limits the current below 5mA.

between 7V and 80V.

Note 6: Offset error of V is deﬁned by extrapolating the straight line

measured between 7V and 80V.

IN

41511fa

4

LTC4151/LTC4151-1

TYPICAL PERFORMANCE CHARACTERISTICS

V_IN= 12V, T_A= 25°C, unless noted.

Supply Current vs Supply Voltage

(Normal Mode)

Supply Current vs Supply Voltage

(Shutdown Mode)

1.30

1.15

1.00

0.85

0.70

400

300

200

100

0

–40°C

25°C

–40°C

25°C

85°C

40

60

0

80

20

40

SUPPLY VOLTAGE (V)

0

60

80

20

SUPPLY VOLTAGE (V)

41511 G01

41511 G02

ADC Total Unadjusted Error

vs Code (ADIN Voltage)

ADC DNL vs Code (ADIN Voltage)

ADC INL vs Code (ADIN Voltage)

0.10

0.05

0

1.0

0.5

1.0

0.5

0

–0.05

–0.10

–0.5

–1.0

–0.5

–1.0

2048

3072

2048

3072

0

4096

2048

0

4096

1024

0

3072

4096

1024

CODE

41511 G03

41511 G05

41511 G04

ADC Total Unadjusted Error

vs Code (SENSE Voltage)

ADC DNL vs Code (SENSE Voltage)

ADC INL vs Code (SENSE Voltage)

1.0

0.5

2

1

2

1

0

–0.5

–1.0

–1

–2

–1

–2

2048

3072

0

4096

1024

2048

3072

2048

3072

0

4096

0

4096

1024

CODE

41511 G06

41511 G07

41511 G08

41511fa

5

LTC4151/LTC4151-1

TYPICAL PERFORMANCE CHARACTERISTICS

SDA, SDAO Output Low vs

V_IN= 12V, T_A= 25°C, unless noted.

SDA, SDAI, SCL Clamp Voltage

vs Load Current

Pull-Up Current (V_SDA(OL)vs I_SDA

)

0.5

0.4

0.3

0.2

0.1

0

6.3

6.2

6.1

6.0

5.9

85°C

25°C

–40°C

25°C

85°C

10

(mA)

15

0

20

5

0.01

0.1

1

10

I

(mA)

SDA

LOAD

41511 G09

41511 G10

PIN FUNCTIONS _(DD/MS)

SENSE (Pin 1): Kelvin Sense of the V Pin. See Figure 10

for recommended Kelvin connection.

+

2

SDAI (Pin 7, LTC4151-1 Only): I C Bus Data Input. Used

for shifting in address, command or data bits. This pin is

drivenbyanopencollectoroutputfromamastercontroller.

An external pull-up resistor or current source is required

IN

V

(Pin 2): Supply Voltage Input. Accepts 7V to 80V.

IN

The voltage at this pin is monitored by the onboard ADC

and can be placed between SDAI and V . The voltage at

SDAI is internally clamped to 6V (5.5V minimum).

+

IN

with a full-scale input range of 102.4V. SENSE must be

connected to V for proper ADC readout.

IN

SDAO (Pin 8, LTC4151-1 Only): Inverted Serial Bus Data

Output.Open-drainoutputusedforsendingdatabacktothe

mastercontrolleroracknowledgingawriteoperation.Data

is inverted for convenience of optoisolation. An external

pull-up resistor or current source is required.

2

ADR1, ADR0 (Pin 3, Pin 4): I C Device Address Inputs.

ConnectingADR1andADR0toV ,GNDorleavingthepins

IN

openconﬁguresoneofninepossibleaddresses.SeeTable1

in the Applications Information section for details.

ADIN(Pin5):ADCInput.TheonboardADCmeasuresvolt-

age range between 0V and 2.048V. Tie to GND if unused.

SHDN (Pin 8, LTC4151 Only): Shutdown Input. Internally

pulledupto6.3V.Pullthispinbelow1VtoforcetheLTC4151

into shutdown mode. Leave this pin open if unused.

2

SCL (Pin 6): I C Bus Clock Input. Data is shifted in and out

at the SDA pin on rising edges of SCL. This pin is driven

by an open collector output from a master controller. An

external pull-up resistor or current source is required and

GND (Pin 9): Device Ground.

–

SENSE (Pin 10): High Side Current Sense Input. Connect

+

–

can be placed between SCL and V . The voltage at SCL

is internally clamped to 6V (5.5V minimum).

an external sense resistor between SENSE and SENSE .

IN

+

–

The differential voltage between SENSE and SENSE is

monitored by the onboard ADC with a full-scale sense

voltage of 81.92mV.

2

SDA (Pin 7, LTC4151 Only): I C Bus Data Input/Output.

Used for shifting in address, command or data bits and

sending out data. An external pull-up resistor or current

Exposed Pad (Pin 11, DD Package Only): Exposed pad

may be left open or connected to device ground (GND).

sourceisrequiredandcanbeplacedbetweenSDAandV .

The voltage at SDA is internally clamped to 6V (5.5V

IN

minimum).

41511fa

6

LTC4151/LTC4151-1

BLOCK DIAGRAM

R

S

V

IN

2

1

10

8

3

4

+

–

V

IN

SENSE

ADR1

ADR0

SHDN

(LTC4151)

6.3V

INTERNAL

POWER

5μA

+

–

25X

DECODER

SHUTDOWN

CONTROL

8

SDAO

(LTC4151-1)

V

REF

= 2.048V

735k

2

7

6

I C/

REGISTERS

SDA/SDAI

(LTC4151/

LTC4151-1)

12-BIT ADC

MUX

6V

15k

SCL

GND

ADIN

9

5

41511 BD

OPERATION

TheLTC4151/LTC4151-1accuratelymonitorhighsidecur-

rent and voltages. These devices accept a wide range of

input voltages from as low as 7V up to 80V and consume

less than 1.7mA quiescent current in normal operation. A

shutdown mode is available with the LTC4151 to reduce

the quiescent current to less than 300μA by pulling the

SHDN pin below 1V.

In snapshot mode, the LTC4151/LTC4151-1 can perform

on-demand measurement of a selected voltage without

the need of continuous polling by a master controller. The

snapshot mode is enabled by programming the control

2

register through the I C interface. A status bit in the data

registermonitorstheADC’sconversion. Whentheconver-

sion is completed, the 12-bit digital code of the measured

voltage is held in the corresponding data registers.

In default continuous scan mode after power-up, the

onboard12-bitanalog-to-digitalconverter(ADC)continu-

2

The LTC4151/LTC4151-1 provide an I C interface to read

ously and sequentially measures the high side differen-

the ADC data from the data registers and to program the

control register. Two three-state pins, ADR0 and ADR1,

are used to decode nine device addresses (see Table 1).

The LTC4151 features a single SDA pin to handle both

input data and output data, while the LTC4151-1 provides

separate SDAI (input) and SDAO (inverted output) pins to

facilitate optoisolation.

+

tial voltage between SENSE (Kelvin sense of V ) and

IN

–

SENSE (full-scale 81.92mV) through an internal sense

ampliﬁer, the input voltage V (full-scale 102.4V) through

IN

an internal voltage divider, and the voltage applied to the

ADIN pin (full-scale 2.048V). The reference voltage of the

ADC is internally set to 2.048V. The digital data obtained

by the ADC is stored in the onboard registers.

41511fa

7

LTC4151/LTC4151-1

APPLICATIONS INFORMATION

The LTC4151/LTC4151-1 offer a compact complete solu-

tionforhighsidepowermonitoring. Withawideoperating

voltage range from 7V to 80V, these devices are ideal for

a variety of applications including consumer, automotive,

industrial and telecom infrastructure. The simple applica-

tion circuit as shown in Figure 1 provides monitoring of

high side current with a 0.02Ω resistor (4.096A in full-

scale), input voltage (102.4V in full-scale) and an external

voltage (2.048V in full-scale), all with an internal 12-bit

resolution ADC.

The 12-bit digital code of each measured voltage is stored

in two adjacent registers out of the six total data registers

A through F, with the eight MSBs in the ﬁrst register and

the four LSBs in the second (Table 2).

ThedatainregistersAthroughFisrefreshedatafrequency

of7.5Hzincontinuousscanmode. Settingcontrolregister

bit G4 (Table 6) invokes a test mode that halts updating

of these registers so that they can be written to and read

from for software testing.

The data converter features a snapshot mode allowing us-

ers to make one-time measurements of a selected voltage

Data Converter

(either the SENSE voltage, V voltage, or ADIN voltage).

IN

TheLTC4151/LTC4151-1featureanonboard,12-bitanalog-

to-digitalconverter(ADC)thatcontinuouslymonitorsthree

To enable snapshot mode, set control register bit G7 and

write the two-bit code of the desired ADC channel to G6

and G5 (Table 6) using a Write Byte command. When the

Write Byte command is completed, the ADC measures the

selected voltage and a Busy Bit in the LSB data register

is set to indicate that the data is not ready. After complet-

ing the conversion, the ADC is halted and the Busy Bit is

reset to indicate that the data is ready. To make another

measurement of the same voltage or to measure another

voltage, ﬁrst disable the snapshot mode for the previous

measurementbyclearingcontrolbitG7,thenre-enablethe

snapshot mode and write the code of the desired voltage

according to the procedure described above.

–

voltages in the sequence of (V

– V

) ﬁrst, V

+

SENSE

SENSE IN

second and V

third. The differential voltage between

ADIN

+

–

SENSE and SENSE is monitored with an 81.92mV full-

scale and 20μV resolution that allows accurate measure-

ment of the high side input current. SENSE is a Kelvin

+

sense pin for the V pin and must be connected to V

IN

(see Figure 10) for proper ADC readout. The supply volt-

age at V is directly measured with a 102.4V full-scale

IN

and 25mV resolution. The voltage at the uncommitted

ADIN pin is measured with a 2.048V full-scale and 0.5mV

resolution that allows monitoring of any external voltage.

0.02Ω

3.3V

V

IN

V

OUT

7V TO 80V

1

10

+

–

SENSE

V

DD

2k

2

V

IN

8

6

7

μ-Controller

SCL

SDA

SHDN

LTC4151

SCL

SDA

3

4

ADR1

ADR0

5

41511 F01

ADIN

V

ADIN

GND

9

Figure 1. Monitoring High Side Current and Voltages Using the LTC4151

41511fa

8

LTC4151/LTC4151-1

APPLICATIONS INFORMATION

I C Interface

2

the Read Page and Write Page commands, the host need

only to issue an initial register address and the internal

register address pointer automatically increments by 1

after each byte of data is read or written. After the register

address reaches 06h, it will be reset to 00h and continue

theincrement.UponaStopcondition,theregisteraddress

is reset to 00h. If desired, the Read Page and Write Page

support can be disabled by clearing control register bit

G3. The data formats for the above commands are shown

in Figures 3 to 8.

2

The LTC4151/LTC4151-1 feature an I C-compatible in-

terface to provide access to six ADC data registers and

a control register for monitoring the measured voltages.

Figure 2 shows a general data transfer format using the

2

I C. The LTC4151 and LTC4151-1 are read-write slave

devices and support SMBus Read Byte, Write Byte, Read

Word and Write Word commands. The devices also sup-

port Read Page and Write Page commands that allow one

to read or write more than two bytes of data. When using

SDA

SCL

a6 - a0

1 - 7

b7 - b0

8

9

1 - 7

8

9

1 - 7

8

9

S

P

START

CONDITION

ADDRESS

R/W

ACK

DATA

ACK

DATA

ACK

STOP

CONDITION

41511 F02

Figure 2. General Data Transfer over I²C

S

ADDRESS W A

1 1 0 a3:a0

COMMAND

A

DATA

b7:b0

A

P

S

ADDRESS W A

1 1 0 a3:a0

COMMAND

A

DATA

b7:b0

A

DATA

A

P

0

X X X X X b2:b0

0

b7:b0

0

X X X X X b2:b0

0

41511 F03

41511 F04

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

A: ACKNOWLEDGE (LOW)

A: NOT ACKNOWLEDGE (HIGH) S: START CONDITION

R: READ BIT (HIGH) P: STOP CONDITION

W: WRITE BIT (LOW)

Figure 4. LTC4151 Serial Bus SDA Write Word Protocol

Figure 3. LTC4151 Serial Bus SDA Write Byte Protocol

S

ADDRESS W A

1 1 0 a3:a0

COMMAND

A

DATA

A

DATA

A

...

DATA

A

P

S

ADDRESS W A

1 1 0 a3:a0

COMMAND

A

S

ADDRESS

R

A

DATA

A

P

0

X X X X X b2:b0

0

b7:b0

0

b7:b0

0

...

b7:b0

0

X X X X X b2:b0

0

1 1 0 a3:a0

1

0

b7:b0

1

41511 F05

41511 F06

Figure 5. LTC4151 Serial Bus SDA Write Page Protocol

Figure 6. LTC4151 Serial Bus SDA Read Byte Protocol

S

ADDRESS W A

1 1 0 a3:a0

COMMAND

A

S

ADDRESS

R

A

DATA

A

DATA

A

P

0

X X X X X b2:b0

0

1 1 0 a3:a0

1

0

b7:b0

0

b7:b0

1

41511 F07

Figure 7. LTC4151 Serial Bus SDA Read Word Protocol

S

ADDRESS W A

1 1 0 a3:a0

COMMAND

A

S

ADDRESS

R

A

DATA

A

DATA

...

DATA

A

P

0

X X X X X b2:b0

0

1 1 0 a3:a0

1

0

b7:b0

0

b7:b0

...

b7:b0

1

41511 F08

Figure 8. LTC4151 Serial Bus SDA Read Page Protocol

41511fa

9

LTC4151/LTC4151-1

APPLICATIONS INFORMATION

Using Optoisolators with LTC4151-1

Stuck-Bus Reset

2

The LTC4151-1 splits the SDA line into SDAI (input)

and SDAO (inverted output) for convenience of opto-

coupling with a host controller that sits at a differ-

ent ground level. When using optoisolators with the

LTC4151-1, connect the SDAI to the output of the

incoming optocoupler and connect the SDAO to the anode

of the outgoing optocoupler (see Figure 9). With the

outgoing optocoupler clamping SDAO and internal 6V

(5.5V minimum) clamps on SDAI and SCL, the pull-up

resistors on these three pins can be directly connected

The LTC4151/LTC4151-1 I C interface features a stuck-

bus reset timer. The low conditions of the SCL and the

SDA/SDAI pins are OR’ed to start the timer. The timer is

reset when both SCL and SDA/SDAI are pulled high. If the

SCL pin or the SDA/SDAI pin is held low for over 33ms,

2

the stuck-bus timer will expire and the internal I C state

machinewillberesettoallownormalcommunicationafter

the stuck-bus condition is cleared. The stuck-bus timer

can be disabled by clearing control register bit G2.

2

I C Device Addressing

to V . In this way (with SDAO rather than conventional

IN

2

SDAO), the need for a separate low voltage supply for

pull-ups is eliminated.

Nine distinct I C bus addresses are conﬁgurable us-

ing the three-state pins ADR0 and ADR1, as shown in

Table 1. Address bits a6, a5 and a4 are conﬁgured to

(110) and the least signiﬁcant bit is the R/W bit. In addi-

tion, the LTC4151 and LTC4151-1 will respond to a mass

write address (1100 110)b for writing to all LTC4151s

and LTC4151-1s, regardless of their individual address

settings.

Start and Stop Conditions

2

When the I C bus is idle, both SCL and SDA must remain

in the high state. A bus master signals the beginning of a

transmission with a Start condition by transitioning SDA

from high to low while SCL stays high. When the master

has ﬁnished communicating with the slave, it issues a

Stop condition by transitioning SDA from low to high

while SCL stays high. The bus is then free for another

transmission.

R

S

3.3V

0.02Ω

V

IN

48V

R1

20k

R2

20k

R3

5.1k

R5

R6 R7

10k 10k

R4

1

10

0.51k 0.51k

MOCD207M

+

–

SENSE

6

8

1

SCL

2

V

IN

7

6

2

3

V

DD

SCL

7

8

LTC4151-1

SDAI

SDA0

ADIN

3

4

μ-Controller

ADR1

ADR0

5

1

4

8

5

V

ADIN

MOCD207M

SDA

GND

9

41511 F09

2

3

7

6

4

5

Figure 9. Optoisolation of the I²C Interface Between LTC4151-1 and a Microcontroller

41511fa

10

LTC4151/LTC4151-1

APPLICATIONS INFORMATION

Acknowledge

into its internal register. If the master continues sending a

secondbyteormoredatabytes,asinaWriteWordorWrite

Page command, the second byte or more data bytes will

be acknowledged by the LTC4151/LTC4151-1, the internal

register address pointer will increment automatically, and

each byte of data will be latched into an internal register

corresponding to the address pointer. The write operation

terminates and the register address pointer resets to 00h

when the master sends a Stop condition.

The acknowledge signal is used for handshaking between

the transmitter and the receiver to indicate that the last

byte of data was received. The transmitter always releases

the SDA line during the acknowledge clock pulse. The

LTC4151/LTC4151-1 pull the SDA line low on the 9th clock

cycle to acknowledge receipt of the data. If the slave fails

to acknowledge by leaving SDA high, then the master can

abort the transmission by generating a Stop condition.

When the master is receiving data from the slave, the

master mustpulldowntheSDAlineduring the clock pulse

to indicate receipt of a data byte, and that another byte is

to be read. After the last byte has been received the master

will leave the SDA line high (not acknowledge) and issue

a Stop condition to terminate the transmission.

Read Protocol

The master begins a read operation with a Start condition

followedbythesevenbitslaveaddressandtheR/Wbitsetto

zero.AftertheaddressedLTC4151/LTC4151-1acknowledge

the address byte, the master then sends a command byte

that indicates which internal register the master wishes to

read. The LTC4151/LTC4151-1 acknowledge this and then

latches the lower three bits of the command byte into its

internal register address pointer. The master then sends

a repeated Start condition followed by the same seven bit

address with the R/W bit now set to one. The LTC4151/

LTC4151-1 acknowledge and send the contents of the

requested register. The transmission terminates when the

mastersendsaStopcondition.Ifthemasteracknowledges

the transmitted data byte, as in a Read Word command,

the LTC4151/LTC4151-1 will send the contents of the next

register. If the master acknowledges the second data byte

Write Protocol

The master begins a write operation with a Start condi-

tion followed by the seven bit slave address and the R/W

bit set to zero. After the addressed LTC4151/LTC4151-1

acknowledge the address byte, the master then sends a

command byte which indicates which internal register

the master wishes to write. The LTC4151/LTC4151-1

acknowledge this and then latches the lower three bits of

thecommandbyteintoitsinternalregisteraddresspointer.

The master then delivers the data byte and the LTC4151 or

LTC4151-1 acknowledges once more and latches the data

Table 1. LTC4151/LTC4151-1 Device Addressing*

HEX DEVICE

LTC4151/LTC4151-1

ADDRESS PINS

DESCRIPTION

ADDRESS

BINARY DEVICE ADDRESS

h

a6

1

a5

1

a4

0

a3

0

1

a2

1

0

1

a1

1

0

1

0

1

a0

0

1

0

1

0

1

0

1

0

1

R/W

0

ADR1

X

ADR0

X

Mass Write

CC

0

1

2

3

4

5

6

7

8

CE

X

H

L

D0

X

NC

H

D2

X

H

D4

X

NC

L

NC

L

D6

X

D8

X

H

DA

X

H

NC

L

DC

X

L

DE

X

L

*H = Tie High; L = Tie to GND; NC = Open; X = Don’t Care

41511fa

11

LTC4151/LTC4151-1

APPLICATIONS INFORMATION

Table 2. LTC4151/LTC4151-1 Register Address and Contents

REGISTER ADDRESS* REGISTER NAME

READ/WRITE

R/W**

R/W

DESCRIPTION

00h

01h

02h

03h

04h

05h

06h

07h

SENSE (A)

SENSE (B)

VIN (C)

ADC Current Sense Voltage Data (8 MSBs)

ADC Current Sense Voltage Data (4 LSBs)

ADC VIN Voltage Data (8 MSBs)

ADC VIN Voltage Data (4 LSBs)

ADC ADIN Voltage Data (8 MSBs)

ADC ADIN Voltage Data (4 LSBs)

Controls ADC Operation Mode and Test Mode

VIN (D)

ADIN (E)

ADIN (F)

CONTROL (G)

Reserved

*Register address MSBs b7-b3 are ignored. **Writable if bit G4 is set.

Table 3. SENSE Registers A (00h) and B (O1h)—Read/Write

BIT

NAME

OPERATION

A7:0, B7:4 SENSE Voltage Data

12-Bit Data of Current Sense Voltage with 20μV LSB and 81.92mV Full-Scale

1 = SENSE Being Converted; 0 = SENSE Conversion Completed. Not Writable

Always Returns 0. Not Writable

B3

ADC Busy in Snapshot Mode

Reserved

B2:0

Table 4. V_INRegisters C (02h) and D (O3h)—Read/Write

BIT

NAME

Voltage Data

OPERATION

12-Bit Data of V Voltage with 25mV LSB and 102.4V Full-Scale

C7:0, D7:4

D3

V

IN

ADC Busy in Snapshot Mode

Reserved

1 = V Being Converted; 0 = V Conversion Completed. Not Writable

IN IN

D2:0

Always Returns 0, Not Writable

Table 5. ADIN Registers E (04h) and F (O5h)—Read/Write

BIT

NAME

OPERATION

E7:0, F7:4

F3

ADIN Voltage Data

ADC Busy in Snapshot Mode

Reserved

12-Bit Data of Current Sense Voltage with 500μV LSB and 2.048V Full-Scale

1 = ADIN Being Converted; 0 = ADIN Conversion Completed. Not Writable

Always Returns 0, Not Writable

F2:0

Table 6. CONTROL Register G (06h)—Read/Write

BIT

NAME

OPERATION

G7

ADC Snapshot Mode

Enable

Enables ADC Snapshot Mode; 1 = Snapshot Mode Enabled. Only the channel selected by G6 and G5 is

measured by the ADC. After the conversion, the channel busy bit is reset and the ADC is halted.

0 = Snapshot Mode Disabled (ADC free running, Default).

G6

G5

ADC Channel Label for

Snapshot Mode

ADC Channel Label for Snapshot Mode

G6

0

G5

0

1

ADC CHANNEL

ADC Channel Label for

Snapshot Mode

SENSE (Default)

0

1

V

IN

ADIN

0

G4

Test Mode Enable

Test Mode Halts ADC Operation and Enables Writes to ADC Registers; 1 = Enable Test Mode,

0 = Disable Test Mode (Default)

2

G3

Page Read/Write Enable

Stuck-Bus Timer Enable

Reserved

Enables Page Read/Write; 1 = Enable I C Page Read/Write (Default), 0 = Disable I C Page Read/Write

2

G2

Enables I C Stuck-Bus Reset Timer; 1 = Enable Stuck-Bus Timer (Default), 0 = Disable Stuck-Bus Timer

G1:0

Always Returns 0, Not Writable

41511fa

12

LTC4151/LTC4151-1

APPLICATIONS INFORMATION

and each of the following (if more) data bytes, as in a

Read Page command, the LTC4151/LTC4151-1 will keep

sendingouteachdatabyteintheregisterthatcorresponds

to the incrementing register pointer. The read operation

terminates and the register address pointer resets to 00h

when the master sends a Stop condition.

V

IN

R

S

I

LOAD

+

–

SENSE

V

IN

GND

LTC4151

ADR1

ADR0

Layout Considerations

A Kelvin connection between the sense resistor R and

S

the LTC4151/LTC4151-1 is recommended to achieve ac-

curate current sensing (Figure 10). The minimum trace

width for 1oz copper foil is 0.02" per amp to make sure

the trace stays at a reasonable temperature. Using 0.03"

per amp or wider is recommended. Note that 1oz copper

exhibits a sheet resistance of about 530μΩ per square.

I

GND

LOAD

41511 F10

Figure 10. Recommended Layout for Kelvin Connection

TYPICAL APPLICATION

Temperature Monitoring with an NTC Thermistor While

Measuring Load Current and LTC4151 Supply Current

0.2Ω

V

IN

48V

VISHAY

2381 615 4.104

100k AT 25°C

1%

+

–

SENSE SENSE

V

IN

250mA

LOAD

SCL

SDA

2

40.2k

1%

I C

LTC4151

GND

ADIN

ADR1

1.5k

1%

ADR0

41511 TA02

T(°C) = 58.82 × (N

/N – 0.1066), 20°C < T < 60°C.

ADIN VIN

N

and N are digital codes measured by the ADC at the

VIN

ADIN

ADIN and V pins, respectively.

IN

41511fa

13

LTC4151/LTC4151-1

PACKAGE DESCRIPTION

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699)

R = 0.115

TYP

6

0.38 0.10

10

0.675 0.05

3.50 0.05

2.15 0.05 (2 SIDES)

1.65 0.05

3.00 0.10

(4 SIDES)

1.65 0.10

(2 SIDES)

PIN 1

PACKAGE

OUTLINE

TOP MARK

(SEE NOTE 6)

(DD) DFN 1103

5

1

0.25 0.05

0.50 BSC

0.75 0.05

0.200 REF

0.25 0.05

0.50

BSC

2.38 0.10

(2 SIDES)

2.38 0.05

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).

CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

41511fa

14

LTC4151/LTC4151-1

MS Package

10-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1661)

0.889 0.127

(.035 .005)

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

3.00 0.102

(.118 .004)

(NOTE 3)

(.0197)

0.497 0.076

(.0196 .003)

0.50

0.305 0.038

(.0120 .0015)

TYP

10 9

8

7 6

BSC

REF

RECOMMENDED SOLDER PAD LAYOUT

3.00 0.102

(.118 .004)

(NOTE 4)

4.90 0.152

(.193 .006)

DETAIL “A”

0° – 6° TYP

0.254

(.010)

GAUGE PLANE

1

2

3

4 5

0.53 0.152

(.021 .006)

0.86

(.034)

REF

1.10

(.043)

MAX

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 0.0508

(.004 .002)

0.50

(.0197)

BSC

MSOP (MS) 0307 REV E

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

41511fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC4151/LTC4151-1

TYPICAL APPLICATION

High Side Current, Input Voltage and Open Fuse Monitoring

with a Single LTC4151

F1

F2

D1

D2

V

IN1

RS

0.02Ω

48V

V

IN2

48V

+

–

D3

D4

SENSE

V

IN

SCL

SDA

+

V

2

R1

150k

R2

301k

I C

LTC4151

GND

LOAD

ADR1

ADR0

ADIN

–

V

R3

3.4k

GND

41511 TA02

CONDITION

≥ 1.375 • N

RESULT

N

Normal Operation

F2 is Open

ADIN

VIN

0.835 • N ≤ N

< 1.375 • N

VIN

ADIN

VIN

0.285 • N ≤ N

< 0.835 • N

F1 is Open

VIN

(Not Responding)

Both F1 and F2 are Open

V

and V are within 20% apart. N

IN2 ADIN

and N are digital codes measured by

IN1

VIN

the ADC at the ADIN and V pins, respectively.

IN

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41511fa

LT 0109 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC4151IDD-TRPBF
厂家：	Linear
描述：	High Voltage I2C Current and Voltage Monitor 高电压I2C电流和电压监视器监视器
文件：	总16页 (文件大小：240K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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