LTC3892-2_技术文档

LTC7813

Low I , 60V Synchronous

Q

Boost+Buck Controller

FeaTures

DescripTion

The LTC^®7813 is a high performance synchronous

Boost+Buck DC/DC switching regulator controller that

drives all N-channel power MOSFET stages. It contains

independent step-up (boost) and step-down (buck)

controllers that can regulate two separate outputs or be

cascaded to regulate an output voltage from an input

n

Synchronous Boost and Buck Controllers

n

When Cascaded, Allows V Above, Below, or Equal

IN

to Regulated V

of Up to 60V

OUT

n

Wide Bias Input Voltage Range: 4.5V to 60V

Output Remains in Regulation Through Input Dips

(e.g. Cold Crank) Down to 2.2V

n

Adjustable Gate Drive Level 5V to 10V (OPTI-DRIVE) voltage that can be above, below, or equal to the output

Low EMI with Low Input and Output Ripple

Fast Output Transient Response

No External Bootstrap Diodes Required

High Light Load Efﬁciency

Low Operating I : 29µA (One Channel On)

Low Operating I : 34µA (Both Channels On)

voltage. The LTC7813 operates from a wide 4.5V to 60V

input supply range. When biased from the output of the

boost regulator, the LTC7813 can operate from an input

supply as low as 2.2V after start-up. The 34μA no-load

quiescent current (both channels on) extends operating

runtime in battery-powered systems.

Q

R

or Lossless DCR Current Sensing

SENSE

Unlikeconventionalbuck-boostregulators,the LTC7813’s

cascaded Boost+Buck solution has continuous, non-

pulsating,inputandoutputcurrents,substantiallyreducing

voltage ripple and EMI. The LTC7813 has independent

feedback and compensation points for the boost and buck

regulationloops,enablingafastoutputtransientresponse

that can be externally optimized.

Buck Output Voltage Range: 0.8V ≤ V

≤ 60V

OUT

Boost Output Voltage Up 60V

Phase-Lockable Frequency (75kHz to 850kHz)

Small 32-Pin 5mm × 5mm QFN Package

applicaTions

n

Automotive and Industrial Power Systems

High Power Battery Operated Systems

L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks

of Linear Technology Corporation. All other trademarks are the property of their respective

owners.

n

Typical applicaTion

Wide Input Range to 10V/10A Low I_QCascaded Boost+Buck Regulator

V

IN

10µH

2.2µH

8V TO 60V

DOWN TO

2.2V AFTER

START-UP

V , 12V**

MID

V

OUT

10V

10A*

22µF

×3

22µF

×3

6.8µF

×4

47µF

1.62k

2.32k

15k

R

B1

332k

33pF

0.1µF

1µF

0.1µF

R

A1

11.5k

0.1µF

SENSE2+ SENSE2– BG2 SW2 BOOST2 TG2

V

FB2

V

TG1 BOOST1 SW1 BG1 SENSE1+ SENSE1–

V

BIAS

FB1

LTC7813

EXTV

CC

RUN1 RUN2

I

TRACK/SS1 SS2

FREQ PLLIN/MODE GND DRV

CC

INTV VPRG2 ILIM DRVUVDRVSET

CC

TH1

TH2

7813 TA01

V

IN

0.1µF

8.87k

6.19k

4.7µF

0.1µF

37.4k

470pF

100pF

0.1µF

3300pF

22nF

* WHEN V <8V MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED

IN

**V

MID

= 12V WHEN V < 12V

IN

MID

V

FOLLOWS V WHEN VIN > 12V

IN

7813f

1

For more information www.linear.com/LTC7813

LTC7813

absoluTe MaxiMuM raTings

pin conFiguraTion

(Note 1)

TOP VIEW

Bias Input Supply Voltage (V

Topside Driver Voltages

).............. –0.3V to 65V

BIAS

BOOST1, BOOST2.................................. –0.3V to 76V

Switch Voltage (SW1, SW2).......................... –5V to 70V

32 31 30 29 28 27 26 25

SW1

TG1

1

2

3

4

5

6

7

8

24 DRV

23 SS2

CC

DRV , (BOOST1-SW1), (BOOST2-SW2)....–0.3V to 11V

CC

BG1, BG2, TG1, TG2...........................................(Note 8)

TRACK/SS1

VPRG2

DRVSET

DRVUV

22

21

20

19

RUN1, RUN2 Voltages................................ –0.3V to 65V

33

GND

+

–

+

–

SENSE1 , SENSE2 , SENSE1

I

TH2

TH1

SENSE2 Voltages ..................................... –0.3V to 65V

V

FB2

FB1

+

PLLIN/MODE, FREQ, DRVSET Voltages....... –0.3V to 6V

SENSE1

18 ILIM

–

17 RUN2

EXTV Voltage ......................................... –0.3V to 14V

CC

9

10 11 12 13 14 15 16

ITH1, ITH2, V Voltages............................ –0.3V to 6V

FB1

V

Voltage............................................... –0.3V to 65V

FB2

VPRG2 Voltage ............................................ –0.3V to 6V

TRACK/SS1, SS2 Voltages........................... –0.3V to 6V

Operating Junction Temperature Range (Notes 2, 3)

LTC7813E, LTC7813I.......................... –40°C to 125°C

LTC7813H .......................................... –40°C to 150°C

LTC7813MP ....................................... –55°C to 150°C

Storage Temperature Range .................. –65°C to 150°C

UH PACKAGE

32-LEAD (5mm × 5mm) PLASTIC QFN

= 150°C, θ = 44°C/W

T

JMAX

JA

EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB

orDer inForMaTion

LEAD FREE FINISH

LTC7813EUH#PBF

LTC7813IUH#PBF

LTC7813HUH#PBF

LTC7813MPUH#PBF

TAPE AND REEL

PART MARKING*

PACKAGE DESCRIPTION

32-Lead (5mm × 5mm) Plastic QFN

TEMPERATURE RANGE

–40°C to 125°C

LTC7813EUH#TRPBF

LTC7813IUH#TRPBF

LTC7813HUH#TRPBF

LTC7813MPUH#TRPBF

7813

32-Lead (5mm × 5mm) Plastic QFN

–40°C to 125°C

–40°C to 150°C

–55°C to 150°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

7813f

2

For more information www.linear.com/LTC7813

LTC7813

elecTrical characTerisTics ^Thel denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at T_A= 25°C. (Note 2) V_BIAS= 12V, V_RUN1,2= 5V, V_EXTVCC= 0V, V_DRVSET= 0V,

VPRG2 = 0V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

4.5

TYP

MAX

60

UNITS

V

Bias Input Supply Operating Voltage Range

Buck Regulated Output Voltage Set Point

Boost Regulated Output Voltage Set Point

V

BIAS

0.8

60

OUT1

60

OUT2

SENSE2 Pins Common Mode Range

(BOOST Converter Input Supply Voltage)

2.2

60

SENSE2(CM)

V

Buck Regulated Feedback Voltage

(Note 4) ITH1 Voltage = 1.2V

0°C to 85°C

FB1

FB2

0.792 0.800 0.808

0.788 0.800 0.812

V

l

Boost Regulated Feedback Voltage

(Note 4) ITH2 Voltage = 1.2V

VPRG2 = 0V

l

1.182 1.200 1.218

9.78 10.00 10.22

11.74 12.00 12.26

V

VPRG2 = FLOAT

VPRG2 = INTV

CC

I

Buck Feedback Current

Boost Feedback Current

(Note 4)

VPRG2 = 0V

VPRG2 = FLOAT

VPRG2 = INTV

–2

50

nA

FB1

FB2

0.01

4

5

0.05

6

7

µA

CC

Reference Voltage Line Regulation

Output Voltage Load Regulation

(Note 4) V

= 4.5V to 60V

0.002 0.02

0.01 0.1

%/V

%

BIAS

l

(Note 4) Measured in Servo Loop,

∆ITH Voltage = 1.2V to 0.7V

(Note 4) Measured in Servo Loop,

∆ITH Voltage = 1.2V to 2V

–0.01 –0.1

2

%

g

Transconductance Amplifier g

Input DC Supply Current

(Note 4) ITH1,2 = 1.2V, Sink/Source 5µA

mmho

m1,2

m

I

(Note 5), V

= 0V

Q

DRVSET

Pulse-Skipping or Forced Continuous Mode RUN1 = 5V and RUN2 = 0V or

(One Channel On) RUN2 = 5V and RUN1 = 0V

= 0.83V (No Load), V = 1.25V (No Load)

1.6

0.8

mA

V

FB1

FB2

Pulse-Skipping or Forced Continuous Mode RUN1,2 = 5V, V = 0.83V (No Load),

2.2

mA

µA

FB1

(Both Channels On)

V

= 1.25V (No Load)

FB2

l

Sleep Mode (One Channel On, Buck)

RUN1 = 5V and RUN2 = 0V

= 0.83V (No Load)

29

55

V

FB1

Sleep Mode (One Channel On, Boost)

Sleep Mode (Both Channels On)

RUN2 = 5V and RUN1 = 0V, V = 1.25V (No Load)

29

34

50

55

µA

FB2

RUN1 = 5V and RUN2 = 5V,

V

= 0.83V (No Load), V = 1.25V (No Load)

FB2

FB1

Shutdown

RUN1,2 = 0V

3.6

10

µA

UVLO

Undervoltage Lockout

DRV Ramping Up

CC

l

DRVUV = 0V

4.0

7.5

4.2

7.8

V

DRVUV = INTV

CC

DRV Ramping Down

CC

l

DRVUV = 0V

3.6

6.4

3.8

6.7

4.0

7.0

V

DRVUV = INTV

CC

Buck Feedback Overvoltage Protection

Measured at V Relative to Regulated V

7

10

13

1

%

µA

FB1

+

SENSE1 Pin Current

+

SENSE2 Pin Current

170

700

–

SENSE1 Pin Current

V

– < V

– > V

– 0.5V

+ 0.5V

1

µA

SENSE1

INTVCC

–

SENSE2 Pin Current

V +, V – = 12V

SENSE2 SENSE2

µA

7813f

3

For more information www.linear.com/LTC7813

LTC7813

elecTrical characTerisTics ^Thel denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at T_A= 25°C. (Note 2) V_BIAS= 12V, V_RUN1,2= 5V, V_EXTVCC= 0V, V_DRVSET= 0V,

VPRG2 = 0V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Maximum Duty Factor for TG

Buck (Channel 1) in Dropout, FREQ = 0V

Boost (Channel 2)

97.5

99

100

%

Maximum Duty Factor for BG

Buck (Channel 1) in Overvoltage

Boost (Channel 2)

100

96

%

I

Soft-Start Charge Current

RUN Pin On Threshold

V

= 0V

8

10

12

µA

V

TRACK/SS1

SS2

TRACK/SS1

= 0V

SS2

l

V

ON

, V Rising

RUN1 RUN2

1.22 1.275 1.33

75

RUN1,2

RUN Pin Hysteresis

mV

l

V

Maximum Current Sense Threshold

I

= Float

= 0V

= INTV

65

43

90

75

50

100

85

58

109

mV

SENSE1,2(MAX)

LIM

CC

Gate Driver

TG1,2

Pull-Up On-Resistance

V

= INTV

2.2

1.0

Ω

DRVSET

CC

Pull-Down On-Resistance

BG1,2

Pull-Up On-Resistance

Pull-Down On-Resistance

2.2

1.0

Ω

DRVSET

CC

BOOST1,2 to DRV Switch On-Resistance

= 0V, V

= INTV

CC

3.7

Ω

CC

SW1,2

DRVSET

TG Transition Time:

Rise Time

(Note 6) V

= INTV

DRVSET

= 3300pF

CC

C

25

15

ns

LOAD

Fall Time

BG Transition Time:

Rise Time

(Note 6) V

= INTV

DRVSET

CC

C

= 3300pF

25

15

ns

LOAD

Fall Time

= 3300pF

Top Gate Off to Bottom Gate On Delay

Synchronous Switch-On Delay Time

C

= 3300pF Each Driver, V

= INTV

LOAD

Buck (Channel 1)

Boost (Channel 2)

DRVSET

CC

55

85

ns

Bottom Gate Off to Top Gate On Delay

Top Switch-On Delay Time

= 3300pF Each Driver, V

LOAD

DRVSET

Buck (Channel 1)

Boost (Channel 2)

50

80

ns

t

Buck Minimum On-Time

Boost Minimum On-Time

(Note 7) V

= INTV

80

ns

ON(MIN)1

ON(MIN)2

DRVSET

CC

120

DRV Linear Regulator

CC

DRV Voltage from Internal V

LDO

V

= 0V

BIAS

CC

BIAS

EXTVCC

7V < V

< 60V, DRVSET = 0V

< 60V, DRVSET = INTV

5.8

9.6

6.0

10.0

6.2

10.4

V

11V < V

BIAS

CC

DRV Load Regulation from V

LDO

I

CC

= 0mA to 50mA, V = 0V

EXTVCC

0.9

2.0

%

CC

BIAS

DRV Voltage from Internal EXTV LDO

7V < V < 13V, DRVSET = 0V

EXTVCC

5.8

9.6

6.0

10.0

6.2

10.4

V

CC

11V < V

< 13V, DRVSET = INTV

EXTVCC

CC

DRV Load Regulation from Internal

I

= 0mA to 50mA, V = 8.5V,

EXTVCC

DRVSET

0.7

2.0

%

CC

EXTV LDO

V

= 0V

CC

EXTV LDO Switchover Voltage

EXTV Ramping Positive

CC

DRVSET = 0V or R

≤ 100kΩ

4.5

7.4

4.7

7.7

4.9

8.0

V

DRVSET

DRVSET = INTV

CC

EXTV Hysteresis

250

5.0

7.0

9.0

mV

V

CC

Programmable DRV

R

= 50kΩ, V

= 70kΩ, V

= 90kΩ, V

= 0V

CC

DRVSET

EXTVCC

= 0V

6.4

7.6

V

7813f

4

For more information www.linear.com/LTC7813

LTC7813

elecTrical characTerisTics ^Thel denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at T_A= 25°C. (Note 2) V_BIAS= 12V, V_RUN1,2= 5V, V_EXTVCC= 0V, V_DRVSET= 0V,

VPRG2 = 0V unless otherwise noted.

SYMBOL

Oscillator and Phase-Locked Loop

Programmable Frequency

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

R

=25kΩ, PLLIN/MODE = DC Voltage

= 65kΩ, PLLIN/MODE = DC Voltage

= 105kΩ, PLLIN/MODE = DC Voltage

= 0V, PLLIN/MODE = DC Voltage

105

440

835

350

535

kHz

FREQ

Programmable Frequency

Low Fixed Frequency

375

505

V

320

485

75

380

585

850

High Fixed Frequency

= INTV , PLLIN/MODE = DC Voltage

CC

l

Synchronizable Frequency

PLLIN/MODE = External Clock

l

PLLIN V

PLLIN/MODE Input High Level

PLLIN/MODE Input Low Level

PLLIN/MODE = External Clock

2.5

V

IH

IL

0.5

BOOST2 Charge Pump

BOOST2 Charge Pump Available Output

Current

FREQ = 0V, PLLIN/MODE = INTV

CC

V

= 16.5V, V

= 12V

75

35

µA

BOOST2

SW2

= 19V, V

= 12V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Ratings for extended periods may affect device reliability and

lifetime.

Note 3: This IC includes overtemperature protection that is intended to

protect the device during momentary overload conditions. The maximum

rated junction temperature will be exceeded when this protection is active.

Continuous operation above the specified absolute maximum operating

junction temperature may impair device reliability or permanently damage

the device.

Note 2: The LTC7813 is tested under pulsed load conditions such that

T ≈ T . The LTC7813E is guaranteed to meet performance specifications

J

A

from 0°C to 85°C. Specifications over the –40°C to 125°C operating

junction temperature range are assured by design, characterization and

correlation with statistical process controls. The LTC7813I is guaranteed

over the –40°C to 125°C operating junction temperature range, the

LTC7813H is guaranteed over the –40°C to 150°C operating junction

temperature range and the LTC7813MP is tested and guaranteed over

the –55°C to 150°C operating junction temperature range. High junction

temperatures degrade operating lifetimes; operating lifetime is derated

for junction temperatures greater than 125°C. Note that the maximum

ambient temperature consistent with these specifications is determined by

specific operating conditions in conjunction with board layout, the rated

package thermal impedance and other environmental factors. The junction

Note 4: The LTC7813 is tested in a feedback loop that servos V

to a

ITH1,2

specified voltage and measures the resultant V . The specification at

FB1,2

85°C is not tested in production and is assured by design, characterization

and correlation to production testing at other temperatures (125°C for

the LTC7813E and LTC7813I, 150°C for the LTC7813H and LTC7813MP).

For the LTC7813I and LTC7813H, the specification at 0°C is not tested in

production and is assured by design, characterization and correlation to

production testing at –40°C. For the LTC7813MP, the specification at 0°C

is not tested in production and is assured by design, characterization and

correlation to production testing at –55°C.

Note 5: Dynamic supply current is higher due to the gate charge being

delivered at the switching frequency. See Applications information.

Note 6: Rise and fall times are measured using 10% and 90% levels. Delay

times are measured using 50% levels

temperature (T , in °C) is calculated from the ambient temperature

J

(T , in °C) and power dissipation (P , in Watts) according to the formula:

A

D

T = T + (P • θ )

JA

J

A

D

Note 7: The minimum on-time condition is specified for an inductor

where θ = 44°C.

JA

peak-to-peak ripple current >40% of I

(See Minimum On-Time

MAX

Considerations in the Applications Information section).

Note 8: Do not apply a voltage or current source to these pins. They must

be connected to capacitive loads only, otherwise permanent damage may

occur.

7813f

5

For more information www.linear.com/LTC7813

LTC7813

Typical perForMance characTerisTics

Efficiency vs Load Current,

V_IN= 18V

Efficiency vs Load Current,

V_IN= 24V

Efficiency vs Load Current,

V_IN= 36V

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

FIGURE 15 CIRCUIT

V

= 24V

V

= 24V

OUT

V

= 24V

OUT

Burst Mode

PS Mode

FC Mode

Burst Mode

PS Mode

FC Mode

Burst Mode

PS Mode

FC Mode

0.0001 0.001

0.01

0.1

1

7

0.0001 0.001

0.01

0.1

1

7

0.0001 0.001

0.01

0.1

1

7

LOAD CURRENT (A)

7813 G01

7813 G02

7813 G03

PS = PULSE-SKIPPING

FC = FORCED CONTINUOUS

Power Loss vs Load Current,

V_IN= 18V

Power Loss vs Load Current,

V_IN= 24V

Power Loss vs Load Current,

V_IN= 36V

10

1

10

1

10

1

FIGURE 15 CIRCUIT

V

= 24V

V

= 24V

V

= 24V

OUT

0.1

0.01

Burst Mode

BM

Burst Mode

PS Mode

FC Mode

PS Mode

PS

PS Mode

FC Mode

0.001

0.0001 0.001

0.01

0.1

1

7

0.0001 0.001

0.01

0.1

1

7

0.0001 0.001

0.01

0.1

1

7

LOAD CURRENT (A)

7813 G04

7813 G05

7813 G06

Buck Regulated Feedback Voltage

vs Temperature

Boost Regulated Feedback

Voltage vs Temperature

Efficiency vs Input Voltage

100

98

96

94

92

90

808

806

804

802

800

798

796

794

792

1.212

1.209

1.206

1.203

1.2

FIGURE 15 CIRCUIT

V

= 24V

OUT

1.197

1.194

1.191

1.188

I

= 2A

= 4A

OUT

5

10 15 20 25 30 35 40 45 50 55 60

-75 -50 -25

0

25 50 75 100 125 150

-75 -50 -25

0

25 50 75 100 125 150

INPUT VOLTAGE (V)

TEMPERATURE (°C)

7813 G07

7813 G08

7813 G09

7813f

6

For more information www.linear.com/LTC7813

LTC7813

Typical perForMance characTerisTics

Load Step at V_IN= 18V,

Burst Mode Operation

Load Step at V_IN= 24V,

Burst Mode Operation

Load Step at V_IN= 36V,

Burst Mode Operation

V

OUT

500mV/DIV

AC-COUPLED

I

L1

1A/DIV

L1

1A/DIV

7813 G10

7813 G13

7813 G16

7813 G11

7813 G12

200µs/DIV

FIGURE 15 CIRCUIT

V

= 24V

V

= 24V

V

= 24V

OUT

Load Step at V_IN= 18V,

Pulse-Skipping Mode

Load Step at V_IN= 24V,

Pulse-Skipping Mode

Load Step at V_IN= 36V,

Pulse-Skipping Mode

V

OUT

500mV/DIV

AC-COUPLED

I

L1

I

L1

I

L1

1A/DIV

7813 G14

7813 G15

200µs/DIV

FIGURE 15 CIRCUIT

V

OUT

= 24V

V

OUT

= 24V

V

OUT

= 24V

Load Step at V_IN= 18V,

Forced Continuous Mode

Load Step at V_IN= 24V,

Forced Continuous Mode

Load Step at V_IN= 36V,

Forced Continuous Mode

V

OUT

500mV/DIV

AC-COUPLED

I

L1

I

L1

I

L1

1A/DIV

7813 G17

7813 G18

200µs/DIV

FIGURE 15 CIRCUIT

OUT

FIGURE 15 CIRCUIT

OUT

FIGURE 15 CIRCUIT

OUT

V

= 24V

V

= 24V

V

= 24V

7813f

7

For more information www.linear.com/LTC7813

LTC7813

Typical perForMance characTerisTics

DRV_CCand EXTV_CC

EXTV_CCSwitchover and DRV_CC

Voltages vs Temperature

DRV_CCLine Regulation

vs Load Current

11

10

9

11

10

9

6.4

DRV

6.2

6

CC

DRVSET = INTV

EXTV = 0V

CC

5.8

5.6

EXTV = 8.5V

CC

DRVSET = INTV

CC

EXTV RISING

CC

5.4

5.2

8

EXTV FALLING

CC

7

5

4.8

EXTV = 5V

CC

DRV

CC

7

6

4.6

4.4

DRVSET = GND

6

EXTV RISING

CC

5

V

= 12V

BIAS

4.2

4

DRVSET = GND

EXTV FALLING

CC

4

5

-75 -50 -25

0

25 50 75 100 125 150

0

5

10 15 20 25 30 35 40 45 50 55 60 65

INPUT VOLTAGE (V)

0

25 50

75

100

125

150

TEMPERATURE (°C)

LOAD CURRENT (mA)

7813 G19

7813 G20

7813 G21

SENSE Pins Input Current

vs V_SENSEVoltage

Buck SENSE1^–Pin Input Bias

Current vs Temperature

Boost SENSE2 Pins Input Current

vs Temperature

900

800

700

600

500

400

300

200

100

0

200

180

160

140

120

100

80

800

700

600

500

400

300

200

100

0

V

= 12V

IN

–

V

> INTV + 0.5V

CC

OUT1

SENSE1 PIN (BUCK)

+

SENSE2 PIN

+

SENSE2 PIN (BOOST)

60

40

20

–

V

OUT1

< INTV – 0.5V

CC

SENSE2 PIN

0

-75 -50 -25

0

25 50 75 100 125 150

-75 -50 -25

0

25 50 75 100 125 150

0

5

10 15 20 25 30 35 40 45 50 55 60 65

COMMON MODE VOLTAGE (V)

TEMPERATURE (°C)

V

SENSE

7813 G23

7813 G24

7813 G22

Maximum Current Sense

Threshold vs Duty Cycle

Maximum Current Sense

Threshold vs I_THVoltage

TRACK/SS1 and SS2 Pull-Up

Current vs Temperature

100

90

80

70

60

50

40

30

20

10

0

100

80

12

11.5

11

5% DUTY CYCLE

BOOST

BUCK

PULSE-SKIPPING

60

Burst Mode

OPERATION

10.5

10

40

20

9.5

9

I

= GND

LIM

0

= FLOAT

= INTV

CC

–20

–40

8.5

8

FORCED CONTINUOUS MODE

0

10 20 30 40 50 60 70 80 90 100

0

0.2 0.4 0.6 0.8

(V)

1

1.2 1.4

-75 -50 -25

0

25 50 75 100 125 150

DUTY CYCLE (%)

V

ITH

TEMPERATURE (°C)

7813 G25

7813 G26

7813 G27

7813f

8

For more information www.linear.com/LTC7813

LTC7813

Typical perForMance characTerisTics

Shutdown Current vs

Input Voltage

Quiescent Current vs Temperature

Shutdown Current vs Temperature

8

7

6

5

4

3

2

1

0

14

12

10

8

80

70

60

50

40

30

20

10

0

V

= 12V

V

= 12V

BIAS

ONE CHANNEL ON

Burst Mode OPERATION

DRVSET = 70kΩ

DRVSET = INTV

CC

6

DRVSET = GND

4

2

0

-75 -50 -25

0

25 50 75 100 125 150

0

5

10 15 20 25 30 35 40 45 50 55 60 65

INPUT VOLTAGE (V)

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

V

TEMPERATURE (°C)

BIAS

7813 G28

7813 G29

7813 G30

Oscillator Frequency vs

Temperature

Undervoltage Lockout Threshold

vs Temperature

Buck Foldback Current Limit

8

7.5

7

100

90

80

70

60

50

40

30

20

10

0

600

550

500

450

400

350

300

RISING

FREQ = INTV

CC

DRVUV = INTV

CC

6.5

6

FALLING

5.5

5

4.5

4

DRVUV = GND

RISING

FREQ = GND

I

= INTV

CC

= FLOAT

= GND

LIM

FALLING

3.5

3

-75 -50 -25

0

25 50 75 100 125 150

0

100 200 300 400 500 600 700 800

FEEDBACK VOLTAGE (mV)

-75 -50 -25

0

25 50 75 100 125 150

TEMPERATURE (°C)

V

FB1

TEMPERATURE (°C)

7813 G33

7813 G31

7813 G32

BOOST2 Charge Pump Output

Voltage vs SW2 Voltage

BOOST2 Charge Pump Charging

Current vs Frequency

BOOST2 Charge Pump Charging

Current vs Switch Voltage

120

110

100

90

80

70

60

50

40

30

20

10

0

10

9

8

7

6

5

4

3

2

1

0

100

90

80

70

60

50

40

30

20

10

0

–55°C

25°C

V

– V

= 4.5V

SW2

BOOST2

25°C

150°C

V

– V

= 7.0V

SW2

BOOST2

150°C

–55°C

150°C

25°C

–55°C

25°C

FREQ = 350kHz

10MΩ LOAD BETWEEN BOOST2 AND SW2

V

= 16.5V

BOOST2

SW2

FREQ = 350kHz

= 12V

0

5

10 15 20 25 30 35 40 45 50 55 60 65

5

10 15 20 25 30 35 40 45 50 55 60 65

100 200 300 400 500 600 700 800

SW2 VOLTAGE (V)

OPERATING FREQUENCY (kHz)

7813 G36

7813 G34

7813 G35

7813f

9

For more information www.linear.com/LTC7813

LTC7813

Typical perForMance characTerisTics

Buck Inductor Current at Light

Load

Boost Inductor Current at Light

Load

Start-Up

FORCED CONTINUOUS MODE

Burst Mode OPERATION

PULSE-SKIPPING MODE

FORCED CONTINUOUS MODE

V

OUT

5V/DIV

I

L2

2A/DIV

L1

2A/DIV

Burst Mode OPERATION

PULSE-SKIPPING MODE

RUN

5V/DIV

7813 G37

7813 G38

7813 G39

5ms/DIV

FIGURE 15 CIRCUIT

5µs/DIV

FIGURE 15 CIRCUIT

5µs/DIV

FIGURE 15 CIRCUIT

V

= 32V

V

= 18V

IN

= 24V

V

= 24V

OUT

I

= 1mA

I

= 1mA

pin FuncTions

SW1, SW2 (Pins 1, 30): Switch Node Connections to

Inductors.

ITH1, ITH2 (Pins 5, 20): Error Amplifier Outputs and

Switching Regulator Compensation Points. Each associ-

ated channel’s current comparator trip point increases

with this control voltage.

TG1, TG2 (Pins 2, 29): High Current Gate Drives for Top

N-Channel MOSFETs. These are the outputs of floating

driverswithavoltageswingequaltoDRV superimposed

V

(Pin6):Thispinreceivestheremotelysensedfeedback

CC

FB1

on the switch node voltage SW.

voltage for the buck controller from an external resistive

divider across the output.

TRACK/SS1, SS2(Pins3, 23):ExternalTrackingandSoft-

+

Start Input. For the buck channel, the LTC7813 regulates

SENSE1 , SENSE2 (Pins 7, 12): The (+) Input to the

the V voltage to the smaller of 0.8V, or the voltage on

Differential Current Comparators. The ITH pin voltage and

FB1

–

+

the TRACK/SS1 pin. For the boost channel, the LTC7813

controlled offsets between the SENSE and SENSE pins

regulates the V voltage to the smaller of 1.2V, or the

in conjunction with R

set the current trip threshold.

FB2

SENSE

+

voltage on the SS2 pin. An internal 10µA pull-up current

source is connected to this pin. A capacitor to ground at

thispinsetstheramptimetofinalregulatedoutputvoltage.

Alternatively, a resistor divider on another voltage supply

connectedtotheTRACK/SS1pinallowstheLTC7813buck

output to track the other supply during start-up.

For the boost channel, the SENSE2 pin supplies current

to the current comparator.

–

SENSE1 , SENSE2 (Pins 8, 13): The (–) Input to the

–

Differential Current Comparators. When SENSE1 for the

–

buck channel is greater than INTV , the SENSE1 pin

CC

supplies current to the current comparator.

VPRG2 (Pin 4): Channel 2 Output Control Pin. This pin

sets the boost channel to adjustable output mode using

external feedback resistors or fixed 10V/12V output mode

usinginternalresistivedividers. Groundingthispinallows

FREQ (Pin 9): The frequency control pin for the internal

VCO. Connecting this pin to GND forces the VCO to a fixed

low frequency of 350kHz. Connecting this pin to INTV

CC

forces the VCO to a fixed high frequency of 535kHz.

Other frequencies between 50kHz and 900kHz can be

programmed using a resistor between FREQ and GND.

The resistor and an internal 20µA source current create a

voltage used by the internal oscillator to set the frequency.

the output to be programmed through the V pin using

FB2

external resistors, regulating V to the 1.2V reference.

FB2

Floating this pin or connecting it to INTV programs the

CC

output to 10V or 12V (respectively), with V

sense the output voltage.

used to

FB2

7813f

10

For more information www.linear.com/LTC7813

LTC7813

pin FuncTions

PLLIN/MODE (Pin 10): External Synchronization Input

to Phase Detector and Forced Continuous Mode Input.

When an external clock is applied to this pin, the phase-

locked loop will force the rising TG1 and BG2 signals

to be synchronized with the rising edge of the external

clock, and the regulators will operate in forced continuous

mode. When not synchronizing to an external clock, this

input, which acts on both controllers, determines how the

LTC7813 operates at light loads. Pulling this pin to ground

selects Burst Mode^®operation. An internal 100k resistor

to ground also invokes Burst Mode operation when the

V

(Pin 19): If VPRG2 is grounded, this pin receives the

FB2

remotely sensed feedback voltage for the boost control-

ler from an external resistive divider across the output. If

VPRG2 is floated or tied to INTV , this pin receives the

CC

remotely sensed output voltage of the boost controller.

DRVUV (Pin 21): Determines the higher or lower DRV

CC

UVLO and EXTV switchover thresholds, as listed on

CC

the Electrical Characteristics table. Connecting DRVUV to

GND chooses the lower thresholds whereas tying DRVUV

to INTV chooses the higher thresholds.

CC

DRVSET (Pin 22): Sets the regulated output voltage of the

pin is floated. Tying this pin to INTV forces continuous

CC

DRV LDO regulator. Connecting this pin to GND sets

inductor current operation. Tying this pin to a voltage

CC

DRV to 6V whereas connecting it to INTV sets DRV

greater than 1.1V and less than INTV – 1.3V selects

CC

to 10V. Voltages between 5V and 10V can be programmed

by placing a resistor (50k to 100k) between the DRVSET

pin and GND.

pulse-skipping operation. This can be done by connecting

a 100k resistor from this pin to INTV .

CC

GND (Pin 11, Exposed Pad Pin 33): Ground. The exposed

pad must be soldered to the PCB for rated electrical and

thermal performance.

DRV (Pin 24): Output of the Internal or External Low

CC

Dropout (LDO) Regulator. The gate drivers are powered

from this voltage source. The DRV voltage is set by the

CC

PGOOD1 (Pin 14): Open-Drain Logic Output. PGOOD1 is

DRVSETpin.Mustbedecoupledtogroundwithaminimum

pulled to ground when the voltage on the V pin is not

FB1

of 4.7µF ceramic or other low ESR capacitor. Do not use

within 10ꢀ of its set point.

the DRV pin for any other purpose.

CC

INTV (Pin 15): Output of the Internal 5V Low Dropout

CC

EXTV (Pin 25): External Power Input to an Internal LDO

CC

Regulator. The low voltage analog and digital circuits

are powered from this voltage source. A low ESR 0.1µF

ceramic bypass capacitor should be connected between

Connected to DRV . This LDO supplies DRV power,

CC

bypassing the internal LDO powered from V

whenever

BIAS

EXTV is higher than its switchover threshold (4.7V or

CC

INTV and GND, as close as possible to the IC.

CC

7.7VdependingontheDRVSETpin). SeeEXTV Connec-

CC

RUN1, RUN2 (Pins 16, 17): Run Control Inputs for Each

Controller. Forcing either of these pins below 1.2V shuts

down that controller. Forcing both of these pins below

0.7V shuts down the entire LTC7813, reducing quiescent

current to approximately 3.6µA.

tion in the Applications Information section. Do not float

or exceed 14V on this pin. Do not connect EXTV to a

CC

voltage greater than V

. Connect to GND if not used.

BIAS

V

(Pin26):MainSupplyPin.Abypasscapacitorshould

BIAS

be tied between this pin and the GND pin.

ILIM (Pin 18): Current Comparator Sense Voltage Range

Input. Tying this pin to GND or INTV or floating it sets

the maximum current sense threshold (for both channels)

to one of three different levels (50mV, 100mV, or 75mV,

respectively).

BG1, BG2 (Pins 31, 27): High Current Gate Drives for

CC

Bottom N-Channel MOSFETs. Voltage swing at these pins

is from ground to DRV .

CC

BOOST1, BOOST2 (Pins 32, 28): Bootstrapped Supplies

to the Topside Floating Drivers. Capacitors are connected

betweentheBOOSTandSWpins.VoltageswingatBOOST1

is from approximately DRV to (V + DRV ). Voltage

CC

IN1

CC

swing at BOOST2 is from approximately DRV to (V

CC

OUT2

+ DRV ).

CC

7813f

11

For more information www.linear.com/LTC7813

LTC7813

FuncTional DiagraMs

BUCK CHANNEL 1

DRV

CC

V

IN1

20µA

BOOST1

TG1

FREQ

VCO

C

B1

C

IN1

CLK

TOP

BOT

DROPOUT

DET

BOT

SW1

L1

R

SENSE1

TOP ON

DRV

CC

V

OUT1

S

R

Q

BG1

GND

PFD

C

OUT1

Q

SWITCHING

LOGIC

SHDN

SYNC

DET

PLLIN/MODE

0.425V

+

–

SLEEP

100k

I

R

–

+

CMP

+

–

ILIM

+

–

3mV

–

+

SENSE1

2.8V

–

0.65V

SENSE1

+

–

0.88V

PGOOD1

R

V

B1

FB1

SLOPE COMP

–

+

0.80V

EA

V

FB1

R

TRACK/SS1

A1

C

+

–

0.72V

+

–

OV

0.88V

C1

3.5V

ITH1

150nA

R

SHDN

RST

C1

C

C1A

FOLDBACK

10µA

2(V

FB

)

TRACK/SS1

C

SS1

SHDN

RUN1

7813 FD01

2.00V

1.20V

20µA

DRVSET

DRVUV

EXTV

CC

DRV LDO/UVLO

CC

CONTROL

V

IN

–

+

–

+

–

+

EN

4.7V/

7.7V

DRV

CC

4R

INTV

CC

LDO

R

INTV

CC

7813f

12

For more information www.linear.com/LTC7813

LTC7813

FuncTional DiagraMs

BOOST CHANNEL 2

DRV

CC

CHARGE

PUMP

BOOST2

V

OUT2

C

B2

C

BOTTOM

SHDN

TOP

BOT

TG2

OUT2

S

R

Q

CLK

L2

R

SENSE2

SW2

Q

V

IN2

DRV

CC

C

SWITCHING

LOGIC

IN2

BG2

GND

PLLIN/MODE

0.425V

+

–

SLEEP

I

R

–

+

CMP

+

–

+

–

3mV

–

I

LIM

–

SENSE2

2.8V

0.7V

+

SENSE2

+

–

SNSLO

SLOPE COMP

2V

VPRG2

R

V

FB2

B2

EA

V

–

+

OUT2

1.2V

SS2

R

A2

+

–

OV

C

1.32V

10µA

C2

3.5V

ITH2

SS2

150nA

R

C2

C

C2A

C

SS2

SHDN

SNSLO

RUN2

7813 FD02

7813f

13

For more information www.linear.com/LTC7813

LTC7813

operaTion

Main Control Loop

(Refer to the Functional Diagrams)

For buck channel 1, if the input voltage decreases to a

voltage close to its output, the loop may enter dropout

and attempt to turn on the top MOSFET continuously. The

dropoutdetectordetectsthisandforcesthetopMOSFEToff

for about one-twelfth of the clock period every tenth cycle

The LTC7813 uses a constant frequency, current mode

control architecture. Channel 1 is a buck (step-down)

controller, and channel 2 is a boost (step-up) controller.

During normal operation, the external top MOSFET for

the buck channel (the external bottom MOSFET for the

boost controller) is turned on when the clock for that

channel sets the RS latch, and is turned off when the

to allow C to recharge, resulting in about 99ꢀ duty cycle.

B

TheINTV supplypowersmostoftheotherinternalcircuits

CC

in the LTC7813. The INTV LDO regulates to a fixed value

CC

main current comparator, I

peak inductor current at which I

, resets the RS latch. The

CMP

of 5V and its power is derived from the DRV supply.

CMP

CC

trips and resets the

Shutdown and Start-Up (RUN, TRACK/SS Pins)

latch is controlled by the voltage on the ITH pin, which is

the output of the error amplifier, EA. The error amplifier

The two channels of the LTC7813 can be independently

shut down using the RUN1 and RUN2 pins. Pulling a RUN

pin below 1.22V shuts down the main control loop for

that channel. Pulling both pins below 0.7V disables both

compares the output voltage feedback signal at the V

FB

pin (which is generated with an external resistor divider

connected across the output voltage, V , to ground)

OUT

to the internal 0.800V reference voltage (1.2V reference

controllersandmostinternalcircuits,includingtheDRV

CC

voltage for the boost). When the load current increases,

and INTV LDOs. In this state, the LTC7813 draws only

CC

it causes a slight decrease in V relative to the reference,

FB

3.6μA of quiescent current.

which causes the EA to increase the ITH voltage until the

Releasing a RUN pin allows a small 150nA internal current

to pull up the pin to enable that controller. Each RUN pin

maybeexternallypulledupordrivendirectlybylogic.Each

RUN pin can tolerate up to 65V (absolute maximum), so it

average inductor current matches the new load current.

After the top MOSFET for the buck (the bottom MOSFET for

the boost) is turned off each cycle, the bottom MOSFET is

turned on (the top MOSFET for the boost) until either the

inductor current starts to reverse, as indicated by the cur-

canbeconvenientlytiedtoV

inalways-onapplications

BIAS

where one or both controllers are enabled continuously

rent comparator I , or the beginning of the next clock cycle.

R

and never shut down.

The start-up of each controller’s output voltage V

DRV /EXTV /INTV Power

OUT

CC

is controlled by the voltage on the TRACK/SS pin

(TRACK/SS1 for channel 1, SS2 for channel 2). When the

voltage on the TRACK/SS pin is less than the 0.8V internal

reference for the buck and the 1.2V internal reference for

Power for the top and bottom MOSFET drivers is derived

from the DRV pin. The DRV supply voltage can be

CC

programmed from 5V to 10V through control of the

DRVSET pin. When the EXTV pin is tied to a voltage

CC

the boost, the LTC7813 regulates the V voltage to the

FB

below its switchover voltage (4.7V or 7.7V depending

TRACK/SS pin voltage instead of the corresponding refer-

ence voltage. This allows the TRACK/SS pin to be used to

program a soft-start by connecting an external capacitor

from the TRACK/SS pin to GND. An internal 10μA pull-up

current charges this capacitor creating a voltage ramp on

the TRACK/SS pin. As the TRACK/SS voltage rises linearly

from 0V to 0.8V/1.2V (and beyond up to about 4V), the

on the DRVUV voltage), the V

linear regulator) supplies power from V

LDO (low dropout

BIAS

to DRV . If

BIAS

CC

EXTV is taken above its switchover voltage, the V

CC

BIAS

LDO is turned off and an EXTV LDO is turned on. Once

CC

enabled, the EXTV LDO supplies power from EXTV

CC

to DRV . Using the EXTV pin allows the DRV power

CC

to be derived from a high efficiency external source such

output voltage V

rises smoothly from zero (V for the

OUT

IN

as the LTC7813 buck regulator output.

boost) to its final value.

Each top MOSFET driver is biased from the floating boot-

strapcapacitor,C ,whichnormallyrechargesduringeach

B

cycle through an internal switch whenever SW goes low.

7813f

14

For more information www.linear.com/LTC7813

LTC7813

operaTion

Alternatively the TRACK/SS1 pin for the buck channel

can be used to cause the start-up of V to track that of

another supply. Typically, this requires connecting to the

TRACK/SS1 pin an external resistor divider from the other

supplytoground(seetheApplicationsInformationsection).

(Refer to the Functional Diagrams)

When a controller is enabled for Burst Mode operation,

the inductor current is not allowed to reverse. The reverse

OUT1

current comparator (I ) turns off the bottom external

R

MOSFET (the top external MOSFET for the boost) just

before the inductor current reaches zero, preventing it

from reversing and going negative. Thus, the controller

operates discontinuously.

Light Load Current Operation (Burst Mode Operation,

Pulse-Skipping or Forced Continuous Mode)

(PLLIN/MODE Pin)

In forced continuous operation, the inductor current is

allowed to reverse at light loads or under large transient

conditions. The peak inductor current is determined by

the voltage on the ITH pin, just as in normal operation.

In this mode, the efficiency at light loads is lower than in

Burst Mode operation. However, continuous operation

has the advantage of lower output voltage ripple and

less interference to audio circuitry. In forced continuous

mode, the output ripple is independent of load current.

Clocking the LTC7813 from an external source enables

forced continuous mode (see the Frequency Selection

and Phase-Locked Loop section).

The LTC7813 can be enabled to enter high efficiency Burst

Modeoperation,constantfrequencypulse-skippingmode,

orforcedcontinuousconductionmodeatlowloadcurrents.

ToselectBurstModeoperation,tiethePLLIN/MODEpinto

GND.Toselectforcedcontinuousoperation,tiethePLLIN/

MODE pin to INTV . To select pulse-skipping mode, tie

CC

thePLLIN/MODEpintoaDCvoltagegreaterthan1.1Vand

less than INTV – 1.3V. This can be done by connecting

CC

a 100kΩ resistor between PLLIN/MODE and INTV .

CC

When a controller is enabled for Burst Mode operation,

the minimum peak current in the inductor is set to ap-

proximately 25ꢀ of the maximum sense voltage (30ꢀ

for the boost) even though the voltage on the ITH pin

indicates a lower value. If the average inductor current is

higher than the load current, the error amplifier, EA, will

decrease the voltage on the ITH pin. When the ITH volt-

age drops below 0.425V, the internal sleep signal goes

high (enabling sleep mode) and both external MOSFETs

are turned off. The ITH pin is then disconnected from the

output of the EA and parked at 0.450V.

WhenthePLLIN/MODEpinisconnectedforpulse-skipping

mode,theLTC7813operatesinPWMpulse-skippingmode

at light loads. In this mode, constant frequency operation

is maintained down to approximately 1ꢀ of designed

maximum output current. At very light loads, the current

comparator, I

, may remain tripped for several cycles

CMP

and force the external top MOSFET (bottom for the boost)

to stay off for the same number of cycles (i.e., skipping

pulses).Theinductorcurrentisnotallowedtoreverse(dis-

continuous operation). This mode, like forced continuous

operation, exhibits low output ripple as well as low audio

noise and reduced RF interference as compared to Burst

Mode operation. It provides higher low current efficiency

than forced continuous mode, but not nearly as high as

Burst Mode operation.

In sleep mode, much of the internal circuitry is turned off,

reducing the quiescent current that the LTC7813 draws. If

one channel is in sleep mode and the other is shut down,

the LTC7813 draws only 29μA of quiescent current (with

DRVSET = 0V). If both controllers are enabled in sleep

mode, the LTC7813 draws only 34μA of quiescent cur-

rent. In sleep mode, the load current is supplied by the

output capacitor. As the output voltage decreases, the

EA’s output begins to rise. When the output voltage drops

enough, the ITH pin is reconnected to the output of the

EA, the sleep signal goes low, and the controller resumes

normal operation by turning on the top external MOSFET

(the bottom external MOSFET for the boost) on the next

cycle of the internal oscillator.

Frequency Selection and Phase-Locked Loop

(FREQ and PLLIN/MODE Pins)

Theselectionofswitchingfrequencyisatrade-offbetween

efficiency and component size. Low frequency opera-

tion increases efficiency by reducing MOSFET switching

losses, but requires larger inductance and/or capacitance

to maintain low output ripple voltage.

7813f

15

For more information www.linear.com/LTC7813

LTC7813

operaTion

The switching frequency of the LTC7813’s controllers can

be selected using the FREQ pin.

(Refer to the Functional Diagrams)

to keep the top MOSFET on continuously once V rises

IN2

above V

. An internal charge pump delivers current to

OUT2

the boost capacitor from the BOOST2 pin to maintain a

sufficiently high TG2 voltage. Because the LTC7813 uses

internal switches and does not require external bootstrap

diodes, the charge pump only has to overcome small

leakage currents (board leakage, etc.).

If the PLLIN/MODE pin is not being driven by an external

clock source, the FREQ pin can be tied to GND, tied to

INTV orprogrammedthroughanexternalresistor. Tying

CC

FREQ to GND selects 350kHz while tying FREQ to INTV

CC

selects535kHz. PlacingaresistorbetweenFREQandGND

allows the frequency to be programmed between 50kHz

and 900kHz, as shown in Figure 10.

In pulse-skipping mode, if V is between 0ꢀ and 10ꢀ

IN

above the regulated V

voltage, TG2 turns on if the

OUT2

inductor current rises above approximately 3ꢀ of the

A phase-locked loop (PLL) is available on the LTC7813

to synchronize the internal oscillator to an external clock

source that is connected to the PLLIN/MODE pin. The

LTC7813’s phase detector adjusts the voltage (through

an internal lowpass filter) of the VCO input to align the

turn-on of TG1 and BG2 to the rising edge of the syn-

chronizing signal.

programmed I

current. If the part is programmed in

LIM

Burst Mode operation under this same V window, then

IN2

TG2 turns on at the same threshold current as long as

the chip is awake (the buck channel is awake and switch-

ing). If the buck channel is asleep or shut down in this

V

window, then TG2 will remain off regardless of the

IN2

inductor current.

The VCO input voltage is prebiased to the operating fre-

quency set by the FREQ pin before the external clock is

applied. If prebiased near the external clock frequency,

the PLL loop only needs to make slight changes to the

VCO input in order to synchronize the rising edge of the

external clock’s to the rising edge of TG1 and BG2. The

ability to prebias the loop filter allows the PLL to lock-in

rapidly without deviating far from the desired frequency.

If V rises more than 10ꢀ above the regulated V

IN

OUT

voltage in any mode, the controller turns on TG2 regard-

less of the inductor current. In Burst Mode operation,

however, the internal charge pump turns off if the entire

chip is asleep (if the buck channel is also asleep or shut

down). With the charge pump off, there would be nothing

to prevent the boost capacitor from discharging, result-

ing in an insufficient TG2 voltage needed to keep the top

MOSFET completely on. The charge pump turns back on

when the chip wakes up, and it remains on as long as the

buck channel is actively switching.

The typical capture range of the LTC7813’s phase-locked

loop is from approximately 55kHz to 1MHz, with a guaran-

tee to be between 75kHz and 850kHz. In other words, the

LTC7813’s PLL is guaranteed to lock to an external clock

source whose frequency is between 75kHz and 850kHz.

Boost Controller at Low SENSE Pin Common Voltage

The typical input clock thresholds on the PLLIN/MODE

pin are 1.6V (rising) and 1.1V (falling). It is recommended

that the external clock source swings from ground (0V)

to at least 2.5V.

The current comparator of the boost controller is powered

+

directly from the SENSE2 pin and can operate to voltages

as low as 2.2V. Since this is lower than the V

UVLO of

BIAS

the chip, V

can be connected to the output of the boost

BIAS

controller, as illustrated in the typical application circuit in

Figure 12. This allows the boost controller to handle input

voltage transients down to 2.2V while maintaining output

Boost Controller Operation When V > V

IN2

OUT2

When the input voltage to the boost channel rises above

its regulated V voltage, the controller can behave

+

voltage regulation. If SENSE2 falls below 2.0V, then

OUT2

+

switching stops and SS2 is pulled low. If SENSE2 rises

differently depending on the mode, inductor current and

voltage. In forced continuous mode, the loop works

back above 2.2V, the SS2 pin will be released, initiating a

new soft-start sequence.

V

IN2

7813f

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LTC7813

operaTion

(Refer to the Functional Diagrams)

Buck Controller Output Overvoltage Protection

Buck Foldback Current

The buck channel has an overvoltage comparator that

guards against transient overshoots as well as other more

seriousconditions thatmayovervoltagethe output. When

When the buck output voltage falls to less than 70ꢀ of

its nominal level, foldback current limiting is activated,

progressivelyloweringthepeakcurrentlimitinproportion

totheseverityoftheovercurrentorshort-circuitcondition.

Foldback current limiting is disabled during the soft-start

the V pin rises by more than 10ꢀ above its regulation

FB1

point of 0.800V, the top MOSFET is turned off and the

bottom MOSFET is turned on until the overvoltage condi-

tion is cleared.

interval (as long as the V voltage is keeping up with the

FB1

TRACK/SS1voltage). Thereisnofoldbackcurrentlimiting

for the boost channel.

7813f

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LTC7813

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Cascaded Boost+Buck Regulator

power MOSFETs are selected. Finally, input and output

capacitors are selected.

The LTC7813 can be configured to regulate two separate,

completely independent outputs, one boost and one buck.

Or, it can be configured as a cascaded Boost+Buck single

output converter that regulates an output voltage from

an input voltage that can be above, below, or equal to the

output voltage. When cascaded, the input voltage feeds

theboostregulator,whichgeneratesanintermediatenode

+

–

SENSE and SENSE Pins

+

–

The SENSE and SENSE pins are the inputs to the cur-

rent comparators.

+

–

Buck Controller (SENSE1 /SENSE1 ): The common

mode voltage range on these pins is 0V to 65V (absolute

maximum), enabling the LTC7813 to regulate buck output

voltages up to a nominal 60V set point (allowing margin

supply (V ) that then serves as the input to the buck

MID

regulator, which then regulates the output voltage.

+

for tolerances and transients). The SENSE1 pin is high

When used as a cascaded Boost+Buck regulator, the

LTC7813 has distinct advantages compared to traditional

single inductor buck-boost regulators. Even though it

requires two inductors, these inductors are individually

smaller and provide inherent filtering at the input and

output, substantially reducing conducted EMI and volt-

age ripple, thereby requiring less input and output filter-

ing. Even though they are cascaded, the boost and buck

regulatorsareindependentlyoptimizedandcompensated.

The buck regulator provides a very fast transient response

compared to a buck-boost regulator, further reducing

the amount of output capacitance that is required. The

LTC7813 also features a very low quiescent current Burst

Modewhichdramaticallyreducespowerlossandincreases

efficiency at light loads. Thus, for those applications that

require low EMI, low ripple, fast transient response, low

quiescent current, and/or high light load efficiency, the

LTC7813 cascaded Boost+Buck regulator provides an

excellent solution.

impedance over the full common mode range, drawing

at most 1μA. This high impedance allows the current

comparators to be used in inductor DCR sensing. The

–

impedance of the SENSE1 pin changes depending on

–

the common mode voltage. When SENSE1 is less than

INTV – 0.5V, a small current of less than 1μA flows

CC

–

out of the pin. When SENSE1 is above INTV + 0.5V,

CC

a higher current (≈700μA) flows into the pin. Between

INTV – 0.5V and INTV + 0.5V, the current transitions

CC

from the smaller current to the higher current.

+

–

Boost Controller (SENSE2 /SENSE2 ): The common

mode input range for these pins is 2.2V to 60V, allowing

the boost converter to operate from inputs over this full

+

range. The SENSE2 pin also provides power to the cur-

rent comparator and draws about 170μA during normal

operation (when not shut down or asleep in Burst Mode

operation). There is a small bias current of less than 1μA

–

that flows into the SENSE2 pin. This high impedance on

–

theSENSE2 pinallowsthecurrentcomparatortobeused

TheTypicalApplicationonthefirstpageisabasicLTC7813

application circuit. LTC7813 can be configured to use

either DCR (inductor resistance) sensing or low value

resistor sensing. The choice between the two current

sensing schemes is largely a design trade-off between

cost, power consumption and accuracy. DCR sensing

has become popular because it saves expensive current

sensing resistors and is more power efficient, especially

in high current applications. However, current sensing

resistors provide the most accurate current limits for the

controller. Other external component selection is driven

by the load requirement, and begins with the selection of

in inductor DCR sensing.

Filter components mutual to the sense lines should be

placed close to the LTC7813, and the sense lines should

run close together to a Kelvin connection underneath the

current sense element (shown in Figure 1). Sensing cur-

rent elsewhere can effectively add parasitic inductance

and capacitance to the current sense element, degrading

the information at the sense terminals and making the

programmedcurrentlimitunpredictable.IfDCRsensingis

used (Figure 2b), R1 should be placed close to the switch-

ing node, to prevent noise from coupling into sensitive

small-signal nodes.

R

SENSE

(if R

is used) and inductor value. Next, the

SENSE

7813f

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LTC7813

applicaTions inForMaTion

TO SENSE FILTER

NEXT TO THE CONTROLLER

V

IN1

OUT2

(V

)

BOOST

TG

R

SENSE

V

OUT1

IN2

SW

(V

)

LTC7813

CURRENT FLOW

BG

7813 F01

INDUCTOR OR R

SENSE

+

SENSE1

–

(SENSE2 )

CAP

PLACED NEAR SENSE PINS

Figure 1. Sense Lines Placement with Inductor or Sense Resistor

–

SENSE1

+

(SENSE2 )

Low Value Resistor Current Sensing

GND

A typical sensing circuit using a discrete resistor is shown

7813 F02a

in Figure 2a. R

output current.

is chosen based on the required

SENSE

(2a) Using a Resistor to Sense Current

The current comparators have a maximum threshold

of 50mV, 75mV or 100mV. The current

V

IN1

OUT2

V

SENSE(MAX)

(V

)

comparator threshold voltage sets the peak of the induc-

BOOST

tor current, yielding a maximum average output current,

INDUCTOR

DCR

TG

SW

BG

I

, equal to the peak value less half the peak-to-peak

MAX

L

V

(V

OUT1

IN2

ripple current, ∆I . To calculate the sense resistor value,

L

)

LTC7813

use the equation:

V_SENSE(MAX)

R1

R2

+

SENSE1

R_SENSE

=

–

(SENSE2 )

∆I_L

C1*

I_MAX

+

–

SENSE1

2

+

(SENSE2 )

When using the buck controller in very low dropout condi-

tions, the maximum output current level will be reduced

duetotheinternalcompensationrequiredtomeetstability

criteria for buck regulators operating at greater than 50ꢀ

dutyfactor. AcurveisprovidedintheTypicalPerformance

Characteristics section to estimate this reduction in peak

inductorcurrentdependingupontheoperatingdutyfactor.

GND

(R1||R2) • C1 = L/DCR

R = DCR(R2/(R1+R2))

SENSE(EQ)

7813 F02b

*PLACE C1 NEAR SENSE PINS

(2b) Using the Inductor DCR to Sense Current

Figure 2. Current Sensing Methods

Inductor DCR Sensing

If the external (R1||R2) • C1 time constant is chosen to be

exactly equal to the L/DCR time constant, the voltage drop

across the external capacitor is equal to the drop across

theinductorDCRmultipliedbyR2/(R1+R2).R2scalesthe

voltage across the sense terminals for applications where

the DCR is greater than the target sense resistor value.

To properly dimension the external filter components, the

DCR of the inductor must be known. It can be measured

using a good RLC meter, but the DCR tolerance is not

always the same and varies with temperature; consult

the manufacturers’ data sheets for detailed information.

7813f

For applications requiring the highest possible efficiency

at high load currents, the LTC7813 is capable of sensing

the voltage drop across the inductor DCR, as shown in

Figure 2b. The DCR of the inductor represents the small

amount of DC winding resistance of the copper, which

can be less than 1mΩ for today’s low value, high current

inductors. In a high current application requiring such

an inductor, power loss through a sense resistor would

cost several points of efficiency compared to inductor

DCR sensing.

19

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LTC7813

applicaTions inForMaTion

Using the inductor ripple current value from the Inductor

ValueCalculationsection,thetargetsenseresistorvalueis:

For the boost controller, the maximum power loss in R1

will occur in continuous mode at V = 1/2 • V

:

OUT

IN

V_SENSE(MAX)

V

− V • V

(

_LOSSR1=

)

IN

OUT(MAX)

R_SENSE(EQUIV)

=

P

∆I_L

R1

I_MAX

+

2

Ensure that R1 has a power rating higher than this value.

If high efficiency is necessary at light loads, consider this

power loss when deciding whether to use DCR sensing or

sense resistors. Light load power loss can be modestly

higher with a DCR network than with a sense resistor,

due to the extra switching losses incurred through R1.

However,DCRsensingeliminatesasenseresistor,reduces

conduction losses and provides higher efficiency at heavy

loads.Peakefficiencyisaboutthesamewitheithermethod.

To ensure that the application will deliver full load current

over the full operating temperature range, choose the

minimum value for V

teristics table.

in the Electrical Charac-

SENSE(MAX)

Next, determine the DCR of the inductor. When provided,

use the manufacturer’s maximum value, usually given at

20°C. Increase this value to account for the temperature

coefficient of copper resistance, which is approximately

0.4ꢀ/°C. A conservative value for T

is 100°C.

L(MAX)

Inductor Value Calculation

To scale the maximum inductor DCR to the desired sense

The operating frequency and inductor selection are inter-

related in that higher operating frequencies allow the use

of smaller inductor and capacitor values. So why would

anyone ever choose to operate at lower frequencies with

larger components? The answer is efficiency. A higher

frequency generally results in lower efficiency because of

MOSFET switching and gate charge losses. In addition to

this basic trade-off, the effect of inductor value on ripple

currentandlowcurrentoperationmustalsobeconsidered.

resistor value (R ), use the divider ratio:

D

R_SENSE(EQUIV)

R_D=

DCR_MAXatT

L(MAX)

C1isusuallyselectedtobeintherangeof0.1μFto0.47μF.

This forces R1|| R2 to around 2k, reducing error that

+

–

might have been caused by the SENSE1 /SENSE2 pin’s

1μA current.

The equivalent resistance R1||R2 is scaled to the tempera-

ture inductance and maximum DCR:

The inductor value has a direct effect on ripple current.

The inductor ripple current, ∆I , decreases with higher

L

inductance or higher frequency. For the buck controllers,

L

R1R2 =



∆I increases with higher V :

L

IN

(DCR at 20°C)•C1

⎛

⎞

⎟

⎠

1

V_OUT

∆I_L=

V_OUT1−

⎜

The sense resistor values are:

f L

( )( )

V

⎝

IN

R1R2

R_D

R1•R_D

1−R_D

R1=



; R2 =

For the boost controller, ∆I increases with higher V

:

L

OUT

⎛

⎞

⎟

⎠

1

V

IN

V_OUT

The maximum power loss in R1 is related to duty cycle,

and will occur in continuous mode at the maximum input

voltage:

∆I_L=

V 1−

⎜

⎝

IN

f L

( )( )

Accepting larger values of ∆I allows the use of low

L

V

_IN(MAX)− V_OUT• V

inductances, but results in higher output voltage ripple

(

_LOSSR1=

)

OUT

P

and greater core losses. A reasonable starting point for

R1

setting ripple current is ∆I = 0.3(I

). The maximum

MAX

L

∆I occurs at the maximum input voltage for the bucks

L

and V = 1/2 • V

for the boost.

IN

OUT

7813f

20

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LTC7813

applicaTions inForMaTion

The inductor value also has secondary effects. The tran-

sition to Burst Mode operation begins when the average

inductor current required results in a peak current below

25ꢀ of the current limit (30ꢀ for the boost) determined

The peak-to-peak drive levels are set by the DRV volt-

CC

age. This voltage can range from 5V to 10V depending on

configurationoftheDRVSETpin.Therefore,bothlogic-level

and standard-level threshold MOSFETs can be used in

by R

. Lower inductor values (higher ∆I ) will cause

most applications depending on the programmed DRV

SENSE

L

CC

this to occur at lower load currents, which can cause a dip

inefficiencyintheupperrangeoflowcurrentoperation. In

Burst Mode operation, lower inductance values will cause

the burst frequency to decrease.

voltage. Pay close attention to the BV

the MOSFETs as well.

specification for

DSS

The LTC7813’s unique ability to adjust the gate drive level

between 5V to 10V (OPTI-DRIVE) allows an application

circuit to be precisely optimized for efficiency. When

adjusting the gate drive level, the final arbiter is the total

input current for the regulator. If a change is made and

the input current decreases, then the efficiency has im-

proved. If there is no change in input current, then there

is no change in efficiency.

Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. High efficiency converters generally cannot

affordthecorelossfoundinlowcostpowderedironcores,

forcingtheuseofmoreexpensiveferriteormolypermalloy

cores. Actual core loss is independent of core size for a

fixedinductorvalue,butitisverydependentoninductance

value selected. As inductance increases, core losses go

down. Unfortunately, increased inductance requires more

turns of wire and therefore copper losses will increase.

Selection criteria for the power MOSFETs include the

on-resistance R

, Miller capacitance C

DS(ON)

, input

MILLER

voltage and maximum output current. Miller capacitance,

, can be approximated from the gate charge curve

C

MILLER

usually provided on the MOSFET manufacturers’ data

sheet. C is equal to the increase in gate charge

Ferrite designs have very low core loss and are preferred

for high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates hard, which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

MILLER

along the horizontal axis while the curve is approximately

flat divided by the specified change in V . This result is

DS

then multiplied by the ratio of the application applied V

DS

to the gate charge curve specified V . When the IC is

DS

operating in continuous mode the duty cycles for the top

and bottom MOSFETs are given by:

V_OUT

Buck Main Switch Duty Cycle =

V

Power MOSFET Selection

IN

V − V

Two external power MOSFETs must be selected for each

controller in the LTC7813: one N-channel MOSFET for the

top switch (main switch for the buck, synchronous for the

boost), and one N-channel MOSFET for the bottom switch

(main switch for the boost, synchronous for the buck).

IN

OUT

Buck Sync Switch Duty Cycle =

Boost Main Switch Duty Cycle =

Boost Sync Switch Duty Cycle =

V

IN

V_OUT− V

IN

V_OUT

V

IN

V_OUT

7813f

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LTC7813

applicaTions inForMaTion

The MOSFET power dissipations at maximum output

current are given by:

The term (1 + δ) is generally given for a MOSFET in the

form of a normalized R

vs Temperature curve, but

DS(ON)

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs.

2

V_OUT

P_{MAIN_BUCK}

=

I

(

1+δ R

+

(

)

OUT(MAX)

DS(ON)

V

IN

Boost C , C

Selection

⎛

⎜

⎝

⎞

⎟

⎠

I_OUT(MAX)

IN OUT

(V )²

(R )(C_MILLER)•

IN

DR

The input ripple current in a boost converter is relatively

low (compared with the output ripple current), because

this current is continuous. The boost input capacitor C

voltage rating should comfortably exceed the maximum

inputvoltage.Althoughceramiccapacitorscanberelatively

tolerant of overvoltage conditions, aluminum electrolytic

capacitorsarenot.Besuretocharacterizetheinputvoltage

for any possible overvoltage transients that could apply

excess stress to the input capacitors.

2

⎡

⎢

⎤

1

+

(f)

IN

⎥

V

− V_THMINV_THMIN

⎦

⎣

DRVCC

2

V − V

IN

OUT

P

=

I

(

1+δ R

(

)

SYNC_BUCK

OUT(MAX)

DS(ON)

V

IN

V

− V V

2

(

)

IN

2

OUT

P_{MAIN_BOOST}

1+δ R

=

I

(

•

)

OUT(MAX)

V

IN

⎛

⎜

⎝

₃⎞⎛

⎟⎜

⎞

ThevalueofC isafunctionofthesourceimpedance, and

I_OUT(MAX)

V_OUT

IN

+

•

(

)

⎟

DS(ON)

ingeneral,thehigherthesourceimpedance,thehigherthe

required input capacitance. The required amount of input

capacitance is also greatly affected by the duty cycle. High

output current applications that also experience high duty

cycles can place great demands on the input supply, both

in terms of DC current and ripple current.

V

2

⎠⎝

⎠

IN

⎡

⎢

⎤

1

R

(

C

(

•

+

(f)

)

⎥

)

DR

MILLER

V

− V_THMINV_THMIN

⎣

⎦

DRVCC

2

V

IN

P

=

I

(

1+δ R

(

)

SYNC_BOOST

OUT(MAX)

DS(ON)

V_OUT

Inaboostconverter,theoutputhasadiscontinuouscurrent,

so C

must be capable of reducing the output voltage

OUT

where δ is the temperature dependency of R

and

DS(ON)

ripple. The effects of ESR (equivalent series resistance)

andthebulkcapacitancemustbeconsideredwhenchoos-

ing the right capacitor for a given output ripple voltage.

The steady ripple due to charging and discharging the

bulk capacitance is given by:

R

(approximately 2Ω) is the effective driver resistance

DR

at the MOSFET’s Miller threshold voltage. V

typical MOSFET minimum threshold voltage.

is the

THMIN

2

Both MOSFETs have I R losses while the main N-channel

equations for the buck and boost controllers include an

additional term for transition losses, which are highest at

high input voltages for the buck and low input voltages

I_OUT(MAX)• V − V

(

)

V

IN(MIN)

OUT

Ripple =

C_OUT• V_OUT• f

for the boost. For V < 20V (higher V for the boost)

IN

the high current efficiency generally improves with larger

where C

OUT

is the output filter capacitor.

MOSFETs, while for V > 20V (lower V for the boost)

IN

The steady ripple due to the voltage drop across the ESR

is given by:

the transition losses rapidly increase to the point that the

use of a higher R device with lower C actu-

DS(ON)

MILLER

∆V

= I

• ESR

L(MAX)

ally provides higher efficiency. The synchronous MOSFET

losses for the buck controller are greatest at high input

voltage when the top switch duty factor is low or during

a short-circuit when the synchronous switch is on close

to 100ꢀ of the period.

ESR

Multiple capacitors placed in parallel may be needed to

meet the ESR and RMS current handling requirements.

Dry tantalum, special polymer, aluminum electrolytic

and ceramic capacitors are all available in surface mount

7813f

22

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

packages. Ceramic capacitors have excellent low ESR

characteristics but can have a high voltage coefficient.

Capacitors are now available with low ESR and high ripple

current ratings such as OS-CON and POSCAP.

where f is the operating frequency, C

is the output

OUT

capacitance and ΔI is the ripple current in the inductor.

L

The output ripple is highest at maximum input voltage

since ΔI increases with input voltage.

L

Buck C , C

Selection

Setting Buck Output Voltage

IN OUT

TheselectionofC isusuallybasedofftheworst-caseRMS

The LTC7813 output voltage for the buck controller is set

by an external feedback resistor divider carefully placed

across the output, as shown in Figure 3. The regulated

output voltage is determined by:

IN

input current. The highest (V )(I ) product needs to

OUT OUT

be used in the formula shown in Equation 1 to determine

the maximum RMS capacitor current requirement.

Incontinuousmode,thesourcecurrentofthetopMOSFET

⎛

⎞

⎟

⎠

R_B

R_A

V_OUT(BUCK)= 0.8V 1+

⎜

is a square wave of duty cycle (V )/(V ). To prevent

OUT

IN

⎝

large voltage transients, a low ESR capacitor sized for the

maximum RMS current of one channel must be used. The

maximum RMS capacitor current is given by:

To improve the frequency response, a feedforward ca-

pacitor, C , may be used. Great care should be taken to

FF

FB

route the V line away from noise sources, such as the

I_MAX

^1/2(1)

)

⎦

inductor or the SW line.

⎡

⎤

C_INRequired I_RMS

≈

V

V – V

IN

OUT

(

_OUT)(

⎣

V

IN

V

OUT1

This formula has a maximum at V = 2V , where I

RMS

IN

OUT

= I /2. This simple worst-case condition is commonly

OUT

R

C

FF

LTC7813

B

A

usedfordesignbecauseevensignificantdeviationsdonot

offermuchrelief.Notethatcapacitormanufacturers’ripple

current ratings are often based on only 2000 hours of life.

This makes it advisable to further derate the capacitor, or

to choose a capacitor rated at a higher temperature than

required. Several capacitors may be paralleled to meet

size or height requirements in the design. Due to the high

operating frequency of the LTC7813, ceramic capacitors

V

FB1

R

7813 F03

Figure 3. Setting Buck Output Voltage

Setting Boost Output Voltage (VPRG2 Pin)

Through control of the VPRG2 pin, the boost controller

output voltage can be set by an external feedback resis-

tor divider or programmed to a fixed 10V or 12V output.

can also be used for C . Always consult the manufacturer

IN

if there is any question.

A small (0.1μF to 1μF) bypass capacitor between the chip

Grounding VPRG2 allows the boost output voltage to be

set by an external feedback resistor divider placed across

the output, as shown in Figure 4a. The regulated output

voltage is determined by:

V pin and ground, placed close to the LTC7813, is also

IN

suggested. A small (≤10Ω) resistor placed between C

IN

(C1) and the V pin provides further isolation.

IN

The selection of C

is driven by the effective series

OUT

⎛

⎞

⎟

⎠

resistance (ESR). Typically, once the ESR requirement

is satisfied, the capacitance is adequate for filtering. The

R_B

R_A

V_OUT(BOOST)= 1.2V 1+

⎜

⎝

output ripple (ΔV ) is approximated by:

OUT

Tying the VPRG2 to INTV or floating it configures the

CC

⎛

⎞

⎟

⎠

1

boost controller in fixed output voltage mode. Figure

∆V_OUT≈ ∆I ESR+

⎜

L

8 • f •C_OUT

⎝

4b shows how the V pin is used to sense the output

FB2

7813f

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voltageinthismode.TyingVPRG2toINTV programsthe

V

BIAS

CC

boost output to 12V, whereas floating VPRG2 programs

R

LTC7813

RUN

B

the output to 10V.

R

A

V

OUT2

7813 F05

LTC7813

VPRG2

R

C

FF

B

Figure 5. Using the RUN Pins as a UVLO

GND

V

FB2

TherisingandfallingUVLOthresholdsarecalculatedusing

the RUN pin thresholds and pull-up current:

A

7813 F04a

(4a) Setting Boost Output Using External Resistors

⎛

⎞

⎟

⎠

R_B

R_A

V_UVLO(RISING)=1.275V 1+

–150nA •R

⎜

B

⎝

LTC7813

V

⎛

⎞

⎟

⎠

OUT2

R_B

R_A

INTV /FLOAT

VPRG2

V

FB2

CC

12V/10V

V_{UVLO(FALLING)}=1.20V 1+

–150nA •R

⎜

B

C

OUT

⎝

7813 F04b

(4b) Setting Boost to Fixed 12V/10V Output

Tracking and Soft-Start (TRACK/SS1 and SS2 Pins)

The start-up of each V is controlled by the voltage on

OUT

Figure 4. Setting Boost Output Voltage

the TRACK/SS pin (TRACK/SS1 for channel 1, SS2 for

channel 2). When the voltage on the TRACK/SS pin is

less than the internal 0.8V reference (1.2V reference for

RUN Pins

the boost channel), the LTC7813 regulates the V pin

FB

The LTC7813 is enabled using the RUN1 and RUN2 pins.

The RUN pins have a rising threshold of 1.275V with

75mV of hysteresis. Pulling a RUN pin below 1.2V shuts

down the main control loop for that channel. Pulling all

three RUN pins below 0.7V disables the controllers and

voltage to the voltage on the TRACK/SS pin instead of

the internal reference. The TRACK/SS pin can be used to

program an external soft-start function or to allow V

to track another supply during start-up.

OUT

most internal circuits, including the DRV and INTV

CC

Soft-start is enabled by simply connecting a capacitor

from the TRACK/SS pin to ground, as shown in Figure 6.

An internal 10μA current source charges the capacitor,

providing a linear ramping voltage at the TRACK/SS pin.

The LTC7813 will regulate its feedback voltage (and hence

LDOs. In this state, the LTC7813 draws only 3.6µA of

quiescent current.

Releasing a RUN pin allows a small 150nA internal current

to pull up the pin to enable that controller. Because of

condensation or other small board leakage pulling the pin

down,itisrecommendedtheRUNpinsbeexternallypulled

up or driven directly by logic. Each RUN pin can tolerate

up to 65V (absolute maximum), so it can be conveniently

V

) according to the voltage on the TRACK/SS pin, al-

OUT

lowing V

to rise smoothly from 0V (V for the boost)

OUT

IN

LTC7813

TRACK/SS

tied to V

in always-on applications where one or more

BIAS

C

SS

controllersareenabledcontinuouslyandnevershutdown.

GND

The RUN pins can be implemented as a UVLO by con-

necting them to the output of an external resistor divider

7813 F06

Figure 6. Using the TRACK/SS Pin to Program Soft-Start

network off V

, as shown in Figure 5.

BIAS

7813f

24

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

to its final regulated value. The total soft-start time will

be approximately:

V

X(MASTER)

0.8V

t_{SS_BUCK}= C_SS

•

10µA

1.2V

OUT(SLAVE)

t_{SS_BOOST}= C_SS

•

10µA

Alternatively,theTRACK/SS1pinforthebuckcontrollercan

be used to track another supply during start-up, as shown

qualitativelyinFigures7aand7b.Todothis,aresistordivid-

7813 F07a

TIME

(7a) Coincident Tracking

er should be connected from the master supply (V ) to the

X

TRACK/SS pin of the slave supply (V ), as shown in

OUT

Figure 8. During start-up V

will track V according to

V

X(MASTER)

OUT

X

the ratio set by the resistor divider:

V_XR_A

_TRACKA+R_TRACKB

V_OUTR_TRACKA

For coincident tracking (V

R

=

•

OUT(SLAVE)

R_A+R_B

= V during start-up),

OUT

X

7813 F07b

TIME

R = R

A

TRACKA

TRACKB

(7b) Ratiometric Tracking

R = R

B

DRV and INTV Regulators (OPTI-DRIVE)

CC

Figure 7. Two Different Modes of Output Voltage Tracking

The LTC7813 features two separate internal P-channel

low dropout linear regulators (LDO) that supply power

V

at the DRV pin from either the V

supply pin or the

OUT

CC

BIAS

EXTV pin depending on the connections of the EXTV

CC

R

B

A

and DRVSET pins. A third P-channel LDO supplies power

at the INTV pin from the DRV pin. DRV powers the

V

FB1

CC

gatedriverswhereasINTV powersmuchoftheLTC7813’s

CC

BIAS

V

X

LTC7813

internal circuitry. The V

LDO and the EXTV LDO

CC

R

TRACKB

regulate DRV between 5V to 10V, depending on how

CC

TRACK/SS1

the DRVSET pin is set. Each of these LDOs can supply a

peak current of at least 50mA and must be bypassed to

ground with a minimum of 4.7μF ceramic capacitor. Good

bypassing is needed to supply the high transient currents

required by the MOSFET gate drivers and to prevent in-

TRACKA

3899 F09

Figure 8. Using the TRACK/SS1 Pin for Tracking

teraction between the channels. The INTV supply must

CC

be bypassed with a 0.1μF ceramic capacitor.

7813f

25

For more information www.linear.com/LTC7813

LTC7813

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The DRVSET pin programs the DRV supply voltage and

LDO or the EXTV LDO. When the voltage on the EXTV

CC CC

CC

the DRVUV pin selects different DRV UVLO and EXTV

pin is less than its switchover threshold (4.7V or 7.7V as

determinedbytheDRVSETpindescribedabove),theV

CC

switchover threshold voltages. Table 1a summarizes the

different DRVSET pin configurations along with the volt-

age settings that go with each configuration. Table 1b

summarizes the different DRVUV pin settings. Tying the

BIAS

LDO is enabled. Power dissipation for the IC in this case

is highest and is equal to V • I . The gate charge

BIAS DRVCC

current is dependent on operating frequency as discussed

intheEfficiencyConsiderationssection. Thejunctiontem-

perature can be estimated by using the equations given

in Note 2 of the Electrical Characteristics. For example,

DRVSET pin to INTV programs DRV to 10V. Tying the

CC

DRVSET pin to GND programs DRV to 6V. By placing

CC

a 50k to 100k resistor between DRVSET and GND the

DRV voltage can be programmed between 5V to 10V,

using the LTC7813 in the QFN package, the DRV current

CC

as shown in Figure 8.

is limited to less than 21mA from a 60V supply when not

using the EXTV supply at a 70°C ambient temperature:

CC

Table 1a

T = 70°C + (21mA)(60V)(44°C/W) = 125°C

J

DRVSET PIN

DRV VOLTAGE

CC

GND

6V

10V

To prevent the maximum junction temperature from be-

INTV

CC

ing exceeded, the V

supply current must be checked

BIAS

Resistor to GND 50k to 100k

5V to 10V

while operating in forced continuous mode (PLLIN/MODE

= INTV ) at maximum V

.

BIAS

CC

Table 1b

When the voltage applied to EXTV rises above its

DRV UVLO

EXTV SWITCHOVER

CC

RISING / FALLING

RISING/FALLING

THRESHOLD

switchover threshold, the V

LDO is turned off and the

BIAS

DRVUV PIN

THRESHOLDS

4.0V / 3.8V

7.5V / 6.7V

EXTV LDO is enabled. The EXTV LDO remains on as

CC

0V

4.7V / 4.45V

7.7V / 7.45V

long as the voltage applied to EXTV remains above the

CC

INTV

CC

switchover threshold minus the comparator hysteresis.

The EXTV LDO attempts to regulate the DRV voltage

CC

11

tothevoltageasprogrammedbytheDRVSETpin,sowhile

10

9

EXTV is less than this voltage, the LDO is in dropout

CC

and the DRV voltage is approximately equal to EXTV .

CC

When EXTV is greater than the programmed voltage,

CC

8

7

6

5

up to an absolute maximum of 14V, DRV is regulated

CC

to the programmed voltage.

Using the EXTV LDO allows the MOSFET driver and

CC

control power to be derived from the LTC7813’s buck

output (4.7V/7.7V ≤ V

≤ 14V) during normal opera-

OUT

4

50

65

55 60

70

75 80 85 90 95 100

tion and from the V

LDO when the output is out of

BIAS

DRVSET PIN RESISTOR (kΩ)

regulation (e.g., start-up, short circuit). If more current

is required through the EXTV LDO than is specified, an

7813 F09

CC

Figure 9. Relationship Between DRV_CCVoltage

and Resistor Value at DRVSET Pin

externalSchottky diode can be added between the EXTV

CC

and DRV pins. In this case, do not apply more than 10V

CC

to the EXTV pin and make sure that EXTV ≤ V .

CC

BIAS

High input voltage applications in which large MOSFETs

are being driven at high frequencies may cause the maxi-

mum junction temperature rating for the LTC7813 to be

exceeded. The DRV current, which is dominated by the

gate charge current, may be supplied by either the V

Significant efficiency and thermal gains can be realized

by powering DRV from the output, since the V cur-

CC

IN

rent resulting from the driver and control currents will be

scaled by a factor of (Duty Cycle)/(Switcher Efficiency).

CC

BIAS

7813f

26

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

For 5V to 14V regulator outputs, this means connecting

V

= V + V

(V

= V

+ V

for the

DRVCC

BOOST

IN

DRVCC BOOST

OUT

the EXTV pin directly to V . Tying the EXTV pin to

boost controller). The value of the boost capacitor, C ,

CC

OUT

CC

B

an 8.5V supply reduces the junction temperature in the

needs to be 100 times that of the total input capacitance

of the topside MOSFET(s).

previous example from 125°C to:

T = 70°C + (21mA)(8.5V)(44°C/W) = 78°C

J

Fault Conditions: Buck Current Limit and

Current Foldback

However,for3.3Vandotherlowvoltageoutputs,additional

circuitryisrequiredtoderiveDRV powerfromtheoutput.

CC

The LTC7813 includes current foldback for the buck chan-

nel to help limit load current when the output is shorted to

ground. If the buck output voltage falls below 70ꢀ of its

nominal output level, then the maximum sense voltage is

progressively lowered from 100ꢀ to 40ꢀ of its maximum

selected value. Under short-circuit conditions with very

lowdutycycles, thebuckchannelwillbegincycleskipping

in order to limit the short-circuit current. In this situation

the bottom MOSFET will be dissipating most of the power

but less than in normal operation. The short-circuit ripple

The following list summarizes the four possible connec-

tions for EXTV :

CC

1. EXTV grounded.ThiswillcauseDRV tobepowered

CC

from the internal V

powerdissipationintheLTC7813athighinputvoltages.

regulator resulting in increased

BIAS

2. EXTV connected directly to the output of the buck

CC

regulator. This is the normal connection for a 5V to

14V regulator and provides the highest efficiency.

currentisdeterminedbytheminimumon-time,t

,of

ON(MIN)

3. EXTV_CCconnected to an external supply. If an external

supply is available in the 5V to 14V range, it may be

used to power EXTV_CCproviding it is compatible with

the MOSFET gate drive requirements. Ensure that

theLTC7813(≈80ns),theinputvoltageandinductorvalue:

⎛

⎜

⎝

⎞

⎟

⎠

V

L

IN

∆I_L(SC)= t_ON(MIN)

EXTV_CC≤ V_BIAS

.

The resulting average short-circuit current is:

4. EXTV connected to an output-derived boost network

CC

off of the buck regulator. For 3.3V and other low volt-

1

2

I_SC= 40ꢀ •I_LIM(MAX)− ∆I_L(SC)

age regulators, efficiency gains can still be realized by

connecting EXTV to an output-derived voltage that

CC

has been boosted to greater than 4.7V/7.7V. Ensure

Fault Conditions: Buck Overvoltage Protection

(Crowbar)

that EXTV ≤ V

.

CC

BIAS

The overvoltage crowbar is designed to blow a system

input fuse when the output voltage of the buck regula-

tor rises much higher than nominal levels. The crowbar

causes huge currents to flow, that blow the fuse to protect

against a shorted top MOSFET if the short occurs while

the controller is operating.

Topside MOSFET Driver Supply (C )

B

Externalbootstrapcapacitors,C ,connectedtotheBOOST

B

pinssupplythegatedrivevoltageforthetopsideMOSFET.

The LTC7813 features an internal switch between DRV

CC

and the BOOST pin for each controller. These internal

switches eliminate the need for external bootstrap diodes

A comparator monitors the buck output for overvoltage

conditions.Thecomparatordetectsfaultsgreaterthan10ꢀ

above the nominal output voltage. When this condition

is sensed, the top MOSFET is turned off and the bottom

MOSFET is turned on until the overvoltage condition is

cleared. ThebottomMOSFETremainsoncontinuouslyfor

betweenDRV andBOOST.CapacitorC intheFunctional

CC

B

DiagramischargedthroughthisinternalswitchfromDRV

CC

when the SW pin is low. When the topside MOSFET is to

be turned on, the driver places the C voltage across the

B

gate-source of the MOSFET. This enhances the top MOS-

FET switch and turns it on. The switch node voltage, SW,

aslongastheovervoltageconditionpersists;ifV returns

rises to V and the BOOST pin follows. With the topside

OUT

IN

to a safe level, normal operation automatically resumes.

MOSFET on, the boost voltage is above the input supply:

7813f

27

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

AshortedtopMOSFETwillresultinahighcurrentcondition

which will open the system fuse. The switching regulator

will regulate properly with a leaky top MOSFET by altering

the duty cycle to accommodate the leakage.

If the external and internal frequencies are the same but

exhibit a phase difference, the current sources turn on for

an amount of time corresponding to the phase difference.

The voltage at the VCO input is adjusted until the phase

and frequency of the internal and external oscillators are

identical. At the stable operating point, the phase detector

output is high impedance and the internal filter capacitor,

holds the voltage at the VCO input.

Fault Conditions: Overtemperature Protection

At higher temperatures, or in cases where the internal

power dissipation causes excessive self heating on chip

(such as DRV short to ground), the overtemperature

Note that the LTC7813 can only be synchronized to an

external clock whose frequency is within range of the

LTC7813’s internal VCO, which is nominally 55kHz to

1MHz.Thisisguaranteedtobebetween75kHzand850kHz.

Typically, the external clock (on the PLLIN/MODE pin)

input high threshold is 1.6V, while the input low threshold

is 1.1V. The LTC7813 is guaranteed to synchronize to an

external clock that swings up to at least 2.5V and down

to 0.5V or less.

CC

shutdown circuitry will shut down the LTC7813. When the

junction temperature exceeds approximately 175°C, the

overtemperaturecircuitrydisablestheDRV LDO,causing

CC

theDRV supplytocollapseandeffectivelyshuttingdown

CC

the entire LTC7813 chip. Once the junction temperature

drops back to the approximately 155°C, the DRV LDO

CC

turns back on. Long-term overstress (T > 125°C) should

J

be avoided as it can degrade the performance or shorten

the life of the part.

Rapid phase locking can be achieved by using the FREQ

pin to set a free-running frequency near the desired

synchronization frequency. The VCO’s input voltage is

prebiased at a frequency corresponding to the frequency

set by the FREQ pin. Once prebiased, the PLL only needs

to adjust the frequency slightly to achieve phase lock and

synchronization. Although it is not required that the free-

running frequency be near the external clock frequency,

doingsowillpreventtheoperatingfrequencyfrompassing

through a large range of frequencies as the PLL locks.

Phase-Locked Loop and Frequency Synchronization

The LTC7813 has an internal phase-locked loop (PLL)

comprised of a phase frequency detector, a lowpass filter,

and a voltage-controlled oscillator (VCO). This allows the

turn-on of TG1 and BG2 to be locked to the rising edge of

an external clock signal applied to the PLLIN/MODE pin.

The phase detector is an edge sensitive digital type that

provides zero degrees phase shift between the external

and internal oscillators. This type of phase detector does

not exhibit false lock to harmonics of the external clock.

1000

900

800

700

600

500

400

300

200

100

If the external clock frequency is greater than the inter-

nal oscillator’s frequency, f , then current is sourced

OSC

continuously from the phase detector output, pulling up

the VCO input. When the external clock frequency is less

than f , current is sunk continuously, pulling down the

OSC

VCO input.

0

15 25 35 45 55 65 75 85 95 105 115 125

FREQ PIN RESISTOR (kΩ)

7813 F10

Figure 10. Relationship Between Oscillator Frequency

and Resistor Value at the FREQ Pin

7813f

28

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

Table 2 summarizes the different states in which the FREQ

pin can be used.

produce the most improvement. Percent efficiency can

be expressed as:

Table 2

ꢀEfficiency = 100ꢀ – (L1 + L2 + L3 + ...)

FREQ PIN

PLLIN/MODE PIN

DC Voltage

FREQUENCY

350kHz

where L1, L2, etc. are the individual losses as a percent-

age of input power.

0V

INTV

DC Voltage

535kHz

CC

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

Resistor to GND

Any of the Above

DC Voltage

50kHz to 900kHz

External Clock

75kHz to 850kHz

Phase Locked to

External Clock

losses in LTC7813 circuits: 1) IC V

current, 2) DRV

BIAS CC

regulator current, 3) I R losses, 4) Topside MOSFET

transition losses.

2

Minimum On-Time Considerations

Minimum on-time, t , is the smallest time duration

that the LTC7813 is capable of turning on the top MOSFET

(bottomMOSFETfortheboostcontroller).Itisdetermined

by internal timing delays and the gate charge required to

turn on the top MOSFET. Low duty cycle applications may

approach this minimum on-time limit and care should be

taken to ensure that:

ON(MIN)

1. The V

current is the DC supply current given in the

BIAS

Electrical Characteristics table, which excludes MOS-

FET driver and control currents. V

results in a small (<0.1ꢀ) loss.

current typically

BIAS

2. DRV current is the sum of the MOSFET driver and

CC

control currents. The MOSFET driver current results

from switching the gate capacitance of the power

MOSFETs. Each time a MOSFET gate is switched from

low to high to low again, a packet of charge, dQ, moves

V_OUT

V (f)

t_{ON(MIN)_BUCK}

<

IN

from DRV to ground. The resulting dQ/dt is a cur-

CC

V_OUT− V

IN

t_{ON(MIN)_BOOST}

<

rent out of DRV that is typically much larger than the

CC

V_OUT(f)

control circuit current. In continuous mode, I

GATECHG

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

= f(Q + Q ), where Q and Q are the gate charges of

T

B

T

B

the topside and bottom side MOSFETs.

SupplyingDRV fromanoutput-derivedsourcepower

CC

through EXTV will scale the V current required for

CC

IN

The minimum on-time for the LTC7813 is approximately

80ns for the buck and 120ns for the boost. However, for

the buck channels as the peak sense voltage decreases

the minimum on-time gradually increases up to about

130ns. This is of particular concern in forced continuous

applications with low ripple current at light loads. If the

duty cycle drops below the minimum on-time limit in this

situation, a significant amount of cycle skipping can occur

with correspondingly larger current and voltage ripple.

thedriverandcontrolcircuitsbyafactorof(DutyCycle)/

(Efficiency). For example, in a 20V to 5V application,

10mAofDRV currentresultsinapproximately2.5mA

CC

of V current. This reduces the midcurrent loss from

IN

10ꢀ or more (if the driver was powered directly from

V ) to only a few percent.

IN

2

3. I R losses are predicted from the DC resistances of the

fuse (if used), MOSFET, inductor, current sense resis-

tor and input and output capacitor ESR. In continuous

mode the average output current flows through L and

Efficiency Considerations

R

, but is chopped between the topside MOSFET

SENSE

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100ꢀ.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

and the synchronous MOSFET. If the two MOSFETs

have approximately the same R

, then the resis-

DS(ON)

tance of one MOSFET can simply be summed with the

2

resistances of L, R

and ESR to obtain I R losses.

SENSE

7813f

29

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

For example, if each R

= 30mΩ, R = 50mΩ,

or ringing, which would indicate a stability problem.

OPTI-LOOPcompensationallowsthetransientresponseto

be optimized over a wide range of output capacitance and

ESR values. The availability of the ITH pin not only allows

optimization of control loop behavior, but it also provides

a DC-coupled and AC-filtered closed-loop response test

point. The DC step, rise time and settling at this test

point truly reflects the closed-loop response. Assuming

a predominantly second order system, phase margin and/

or damping factor can be estimated using the percentage

of overshoot seen at this pin. The bandwidth can also

be estimated by examining the rise time at the pin. The

ITH external components shown in Figure 12 circuit will

provide an adequate starting point for most applications.

DS(ON)

L

R

= 10mΩ and R

= 40mΩ (sum of both input

SENSE

ESR

andoutputcapacitancelosses),thenthetotalresistance

is 130mΩ. This results in losses ranging from 3ꢀ to

13ꢀ as the output current increases from 1A to 5A for

a 5V output, or a 4ꢀ to 20ꢀ loss for a 3.3V output.

Efficiency varies as the inverse square of V

for the

OUT

sameexternalcomponentsandoutputpowerlevel. The

combined effects of increasingly lower output voltages

andhighercurrentsrequiredbyhighperformancedigital

systemsisnotdoublingbutquadruplingtheimportance

of loss terms in the switching regulator system!

4. Transition losses apply only to the top MOSFET(s) (bot-

tom MOSFET for the boost), and become significant

onlywhenoperatingathighinput(outputfortheboost)

voltages(typically20Vorgreater).Transitionlossescan

be estimated from:

The ITH series R -C filter sets the dominant pole-zero

C

loop compensation. The values can be modified slightly

to optimize transient response once the final PC layout is

done and the particular output capacitor type and value

have been determined. The output capacitors need to be

selected because the various types and values determine

the loop gain and phase. An output current pulse of 20ꢀ

to 80ꢀ of full-load current having a rise time of 1μs to

10μs will produce output voltage and ITH pin waveforms

that will give a sense of the overall loop stability without

breaking the feedback loop.

2

Transition Loss = (1.7) • V • I

• C

• f

IN

O(MAX)

RSS

Other hidden losses such as copper trace and internal

battery resistances can account for an additional 5ꢀ

to 10ꢀ efficiency degradation in portable systems. It

is very important to include these system level losses

during the design phase. The internal battery and fuse

resistancelossescanbeminimizedbymakingsurethat

C has adequate charge storage and very low ESR at

IN

Placing a power MOSFET directly across the output ca-

pacitor and driving the gate with an appropriate signal

generator is a practical way to produce a realistic load step

condition. The initial output voltage step resulting from

the step change in output current may not be within the

bandwidth of the feedback loop, so this signal cannot be

used to determine phase margin. This is why it is better

to look at the ITH pin signal which is in the feedback loop

andisthefilteredandcompensatedcontrolloopresponse.

the switching frequency. A 25W supply will typically

require a minimum of 20μF to 40μF of capacitance

having a maximum of 20mΩ to 50mΩ of ESR. Other

losses including Schottky conduction losses during

dead-time and inductor core losses generally account

for less than 2ꢀ total additional loss.

Checking Transient Response

The regulator loop response can be checked by looking at

the load current transient response. Switching regulators

take several cycles to respond to a step in DC (resistive)

The gain of the loop will be increased by increasing R

C

and the bandwidth of the loop will be increased by de-

creasing C . If R is increased by the same factor that C

C

load current. When a load step occurs, V

shifts by an

OUT

is decreased, the zero frequency will be kept the same,

thereby keeping the phase shift the same in the most

critical frequency range of the feedback loop. The output

voltage settling behavior is related to the stability of the

closed-loopsystemandwilldemonstratetheactualoverall

supply performance.

amount equal to ∆I

, where ESR is the effective

LOAD(ESR)

series resistance of C . ∆I

also begins to charge or

generating the feedback error signal that

forces the regulator to adapt to the current change and

OUT

LOAD

discharge C

OUT

return V

to its steady-state value. During this recov-

can be monitored for excessive overshoot

OUT

ery time V

OUT

7813f

30

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

A second, more severe transient is caused by switching

in loads with large (>1μF) supply bypass capacitors. The

dischargedbypasscapacitorsareeffectivelyputinparallel

ThepowerdissipationonthetopsideMOSFETcanbeeasily

estimated. Choosing a Fairchild FDS6982S dual MOSFET

results in: R

= 0.035Ω/0.022Ω, C

= 215pF.

DS(ON)

MILLER

At maximum input voltage with T(estimated) = 50°C:

with C , causing a rapid drop in V . No regulator can

OUT

alter its delivery of current quickly enough to prevent this

sudden step change in output voltage if the load switch

resistance is low and it is driven quickly. If the ratio of

3.3V

22V

2

⎡

⎤

P_MAIN

=

5A 1+ 0.005 50°C−25°C

(

)

(

)

(

)

⎦

⎣

₂5A

C

to C

is greater than 1:50, the switch rise-time

LOAD

OUT

0.035Ω + 22V

) (

2.5Ω 215pF •

)(

(

)

(

)

2

should be controlled so that the load rise-time is limited

to approximately 25 • C . Thus a 10μF capacitor would

⎡

⎤

1

LOAD

+

350kHz = 308mW

(

)

⎢

⎥

require a 250μs rise time, limiting the charging current

to about 200mA.

⎣

⎦

6V −2.3V 2.3V

A short-circuit to ground will result in a folded back cur-

rent of:

Buck Design Example

As a design example for the buck channel, assume V =

IN

⎛

⎜

⎝

⎞

⎟

⎠

80ns 22V

34mV 1

0.01Ω 2

(

)

I_SC=

−

= 3.21A

12V (nominal), V = 22V (maximum), V

= 3.3V, I

IN

OUT

MAX

4.7µH

= 5A, V

= 75mV and f = 350kHz. The induc-

SENSE(MAX)

tance value is chosen first based on a 30ꢀ ripple current

assumption. The highest value of ripple current occurs

at the maximum input voltage. Tie the FREQ pin to GND,

generating 350kHz operation. The minimum inductance

for 30ꢀ ripple current is:

with a typical value of R

and δ = (0.005/°C)(25°C)

DS(ON)

= 0.125. The resulting power dissipated in the bottom

MOSFET is:

2

P

SYNC

= (3.21A) (1.125) (0.022Ω) = 255mW

which is less than under full-load conditions.

⎛

⎞

V_OUT

f L

( )( )

V_OUT

V

IN(NOM)

⎜

⎟

∆I_L=

1−

C is chosen for an RMS current rating of at least 3A at

⎜

⎟

IN

⎝

⎠

temperature assuming only this channel is on. C

is

OUT

chosen with an ESR of 0.02Ω for low output ripple. The

output ripple in continuous mode will be highest at the

maximum input voltage. The output voltage ripple due to

ESR is approximately:

A 4.7μH inductor will produce 29ꢀ ripple current. The

peak inductor current will be the maximum DC value plus

one half the ripple current, or 5.73A. Increasing the ripple

current will also help ensure that the minimum on-time

of 80ns is not violated. The minimum on-time occurs at

V

= R (∆I ) = 0.02Ω (1.45A) = 29mV

ESR L P-P

O(RIPPLE)

maximum V :

IN

PC Board Layout Checklist

V_OUT

3.3V

22V 350kHz

t_ON(MIN)

=

= 429ns

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

IC. Figure 11 illustrates the current waveforms present in

the various branches of the synchronous boost and buck

regulators operating in the continuous mode. Check the

following in your layout:

V

f

_IN(MAX)( )

(

)

The equivalent R resistor value can be calculated by

SENSE

using the minimum value for the maximum current sense

threshold (65mV):

65mV

5.73A

R_SENSE

≤

≈ 0.01Ω

1. Are the signal and power grounds kept separate? The

combinedICsignalgroundpinandthegroundreturnof

C

mustreturntothecombinedC

(–)terminals.

DRVCC

OUT

Choosing 1ꢀ resistors: R = 25k and R = 78.7k yields

A

B

ThepathformedbythetopN-channelMOSFET, bottom

an output voltage of 3.32V.

N-channel MOSFET, and the C capacitor should have

IN

7813f

31

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

short leads and PC trace lengths. The output capacitor

(–) terminals should be connected as close as possible

to the (–) terminals of the input capacitor by placing

the capacitors next to each other and away from the

MOSFET loop described above.

drops below the low current operation threshold—typi-

cally 25ꢀ of the maximum designed current level in Burst

Mode operation.

Thedutycyclepercentageshouldbemaintainedfromcycle

tocycleinawell-designed,lownoisePCBimplementation.

Variation in the duty cycle at a subharmonic rate can sug-

gest noise pickup at the current or voltage sensing inputs

or inadequate loop compensation. Overcompensation of

the loop can be used to tame a poor PC layout if regula-

tor bandwidth optimization is not required. Only after

each controller is checked for its individual performance

should both should multiple controllers be turned on at

the same time.

2. Does the LTC7813 V pins’ resistivedivider connect to

FB

the (+) terminal of C ? The resistive divider must be

OUT

connected between the (+) terminal of C

and signal

OUT

ground. The feedback resistor connections should not

be along the high current input feeds from the input

capacitor(s).

–

+

3. Are the SENSE and SENSE leads routed together with

minimumPCtracespacing?Thefiltercapacitorbetween

+

–

SENSE and SENSE should be as close as possible

to the IC. Ensure accurate current sensing with Kelvin

connections at the SENSE resistor.

Reduce V from its nominal level to verify operation of

IN

the regulator in dropout. Check the operation of the un-

dervoltage lockout circuit by further lowering V while

IN

monitoring the outputs to verify operation.

4. IstheDRV anddecouplingcapacitorconnectedclose

CC

to the IC, between the DRV and the ground pin? This

Investigate whether any problems exist only at higher out-

put currents or only at higher input voltages. If problems

coincide with high input voltages and low output currents,

look for capacitive coupling between the BOOST, SW, TG,

and possibly BG connections and the sensitive voltage

and current pins. The capacitor placed across the current

sensing pins needs to be placed immediately adjacent to

the pins of the IC. This capacitor helps to minimize the

effects of differential noise injection due to high frequency

capacitive coupling. If problems are encountered with

high current output loading at lower input voltages, look

CC

capacitor carries the MOSFET drivers’ current peaks.

5. Keep the switching nodes (SW1, SW2), top gate (TG1,

TG2), and boost nodes (BOOST1, BOOST2) away from

sensitive small-signal nodes, especially from the other

channel’svoltageandcurrentsensingfeedbackpins.All

of these nodes have very large and fast moving signals

and therefore should be kept on the output side of the

LTC7813 and occupy minimum PC trace area.

6. Useamodifiedstargroundtechnique:alowimpedance,

large copper area central grounding point on the same

side of the PC board as the input and output capacitors

for inductive coupling between C , Schottky and the top

IN

MOSFET components to the sensitive current and voltage

sensing traces. In addition, investigate common ground

path voltage pickup between these components and the

GND pin of the IC.

with tie-ins for the bottom of the DRV decoupling

CC

capacitor, the bottom of the voltage feedback resistive

divider and the GND pin of the IC.

An embarrassing problem, which can be missed in an

otherwise properly working switching regulator, results

when the current sensing leads are hooked up backwards.

The output voltage under this improper hookup will still

be maintained but the advantages of current mode control

will not be realized. Compensation of the voltage loop will

be much more sensitive to component selection. This

behavior can be investigated by temporarily shorting out

the current sensing resistor—don’t worry, the regulator

will still maintain control of the output voltage.

PC Board Layout Debugging

Start with one controller at a time. It is helpful to use a

DC-50MHz current probe to monitor the current in the

inductor while testing the circuit. Monitor the output

switching node (SW pin) to synchronize the oscilloscope

totheinternaloscillatorandprobetheactualoutputvoltage

as well. Check for proper performance over the operating

voltage and current range expected in the application. The

frequencyofoperationshouldbemaintainedovertheinput

voltage range down to dropout and until the output load

7813f

32

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

L2

R

SW2

SENSE2

V

OUT2

IN

R

IN

C

R

L2

OUT2

V

7813 F11a

BOLD LINES INDICATE HIGH SWITCHING CURRENT.

KEEP LINES TO A MINIMUM LENGTH.

(a) Boost Regulator

L1

R

SW1

V

SENSE1

V

OUT1

IN

R

IN

C

IN

C

OUT1

R

L1

7813 F11b

BOLD LINES INDICATE HIGH SWITCHING

CURRENT. KEEP LINES TO A MINIMUM LENGTH.

(b) Buck Regulator

Figure 11. Branch Current Waveforms

7813f

33

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

Compensation and V

Capacitance in a Cascaded

Choosing the V

Regulator

Voltage in Cascaded Boost+Buck

MID

Boost+Buck Regulator

When using the LTC7813 as a cascaded Boost+Buck

regulator, the boost and buck regulator control loops are

compensated individually. While this may seem more

complicated, this is actually advantageous, as the inher-

ently fast buck loop can be designed to handle the output

load transient, while the boost loop is less important and

can be slower.

There are many performance trade-offs when considering

where to set the V (boost output) regulation voltage

MID

(V

) relative to the input voltage (V ) range and

MID_REG

IN

output (buck) regulation voltage (V

). These trade-

OUT_REG

offsincludeefficiency,quiescentcurrent,switchingnoise/

EMI, and voltage ripple.

Remember that V

will follow V if V > V

IN IN MID_REG

MID

TheamountofcapacitanceneededontheintermediateV

(see the Boost Controller Operation When V > V

MID

depends on

IN OUT

node (boost output) and the buck output V

section in the Operation section). If V < V , V

MID_REG MID

OUT

IN

a number of factors, including the input voltage, output

voltage, load current and the nature of any transients,

and the mode of operation (Burst Mode operation, forced

continuous mode, or pulse-skipping mode).

is regulated to V

.

MID_REG

Consider as an example an automotive application that

requires a regulated 12V output voltage generated from a

vehicle battery. The battery spends most of its operating

lifetime in a normal range of 10V to 16V, but may dip to

as low as 2.5V during engine start and rise as high as 38V

during high voltage transients.

In general, the buck regulator should be designed to

handle any output load transients and provide sufficiently

low output ripple.

The boost regulator does not need to respond as fast, as

We can designate the minimum normal operating voltage

the V

node can tolerate relatively high ripple and/or

as V

= 10V, and the maximum normal operating

MID

IN_MIN_OP

transient dips and therefore does not necessarily need a

lot of capacitance. The V node capacitance needs to

voltage as V

= 16V. So what voltage should we

IN_MAX_OP

choose for V

?

MID

MID_REG

be able to handle the input ripple current from the buck

regulator. It also needs to be large enough that the boost

regulator’s voltage ripple and/or transient dips do not ap-

pear as significant input line steps to the buck regulator

and feed through to the buck regulator’s output.

REGULATED OUTPUT VOLTAGE

Inthisexample,notethatwewantatightlyregulatedoutput

(V

=12V), which is within our normal operating

OUT_REG

range (V

< V

). We want

IN_MIN_OP

OUT_REG

IN_MAX_OP

V

> V

to provide headroom for the buck

MID_REG

OUT_REG

TherippleontheV nodeishigherinBurstModeopera-

MID

regulator, but we have a choice of whether to set V

MID_REG

tion and pulse-skipping mode than in forced continuous

above or below V

.

IN_MAX_OP

mode, especially at light loads and/or if the input voltage

OPTION A: V

IN_MAX_OP

> V

and V

MID_REG

>

isslightlybelowtheregulatedboostoutput(V )voltage.

MID_REG

OUT_REG

MID

V

Thus, Burst Mode operation and pulse-skipping mode

generally require more V

capacitance than in forced

MID

In this option, we set V

MID_REG

> V

(e.g.,

IN_MAX_OP

MID_REG

continuous mode to maintain a similar amount of ripple.

V

=18V). Both the boost regulator and the buck

regulator are switching (at full, constant frequency if in

forced continuous mode) over the full 10V to 16V nor-

mal operating range. Since the boost regulator is always

switching, the efficiency is lower and the input ripple and

EMI, while predictable and still low, are higher than other

potential options.

The capacitance on the V node can be all ceramic, or

MID

some combination of ceramic and polarized (tantalum,

electrolytic, etc.) capacitors.

7813f

34

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

OPTIONB:V

<V

tive 99ꢀduty cycle). This makes the circuit very efficient,

especially at heavy loads, with extremely low input and

outputrippleandEMI.Notethatinthispass-throughmode,

the circuit does not benefit from the LTC7813’s ultralow

quiescent current of 33µA in Burst Mode operation since

IN_MIN_OP

OUT_REG

MID_REG

IN_MAX_OP

This is similar to option A, but V

is set within

MID_REG

, this option is

MID_REG

the normal operating input voltage range (e.g., V

=14V). When V is well below V

IN

MID_REG

like Option A. But as V approaches V

, the boost

MID_REG

IN

the buck regulator does not go to sleep because V

<

OUT

controller will gradually begin skipping cycles (even in

V

=16V.

OUT_REG

forced continuous mode) once it reaches minimum-on-

time. If V > V

, then V

follows V . In this

REGULATED OUTPUT VOLTAGE BELOW NORMAL INPUT

VOLTAGE OPERATING RANGE

IN

MID_REG

MID

IN

region, OPTION B is more efficient than OPTION A since

the boost is not switching. But this is at the expense of

the cycle-skipping (non-constant frequency ripple) when

In some applications, the desired output voltage might

be less than the minimum normal operating voltage, but

still higher than the worst case minimum input voltage.

Consider our previous example, but instead suppose we

V is slightly below V

.

IN

MID_REG

LOOSELYREGULATEDOUTPUT(Pass-ThroughRegulator)

In some applications, it is not critical that V be tightly

want V

= 5V. In this case, we can set our V

OUT

such that:

MID_REG

OUT

regulated,butratherthatitremainswithinacertainvoltage

range. Suppose, in our example, that it is only important

OPTION D: V

> V

OUT_REG

IN_MIN_OP

MID_REG

thatV bemaintainedwithinthenormalbatteryoperating

OUT

So we might set V

just below 10V, so that the

MID_REG

voltagerangeof10Vto16V.Wecanconsiderathirdoption:

boostregulatorneverswitcheswithinthenormaloperating

range and only needs to boost during the input voltage

dips below 10V.

OPTION C: V

IN_MAX_OP

= V

and V

OUT_REG

=

MID_REG

IN_MIN_OP

V

Here we set V

= V

=10V and V

The buck controller always regulates the V

to 5V, and

MID_REG

IN_MIN_OP

OUT_REG

OUT

= V

=16V. So the boost regulator only boosts

the boost regulator’s inductor and V

capacitance cre-

IN_MAX_OP

MID

when V < 10V and the buck regulator only bucks when

ate a filter that substantially reduces any input ripple and

results in very little conducted EMI on the input.

IN

V >16V. When V is between 10V to 16V, the circuit is

IN

in a “pass-through” or “wire” mode where there is very

little switching. The boost regulator is not boosting (TG2

is on 100ꢀ in forced continuous mode) and the buck

regulator is operating in dropout (with TG1 on at an effec-

Table 3 summarizes some of the performance trade-offs

of these four potential ways to set the V

regulation

MID

voltage in an LTC7813 cascaded Boost+Buck regulator.

7813f

35

For more information www.linear.com/LTC7813

LTC7813

applicaTions inForMaTion

Table 3. Summary of Trade-Offs in Choosing the V_MIDRegulation Voltage in a Cascaded Boost+Buck Regulator

A

B

C

D

Option

V

> V

MID_REG

and

IN_MAX_OP

V

< V

IN_MAX_OP

<

V

= V

OUT_REG

and

IN_MAX_OP

V

> V

>

MID_REG

OUT_REG

IN_MIN_OP

MID_REG

OUT_REG

MID_REG

IN_MIN_OP

MID_REG

V

> V

V

< V

V

= V

V

OUT_REG

(Pass-Through/Wire Mode)

Example for Normal Input Operating

V

OUT

=18V

OUT_REG

V

OUT

= 14V

OUT_REG

V

=10V

V

OUT

=10V

MID_REG

Range of 10V to 16V (V

=

V

= V

= 12V

V

= V

= 12V

V

= 16V

V

= V

= 5V

OUT_REG

IN_MIN_OP

OUT_REG

OUT

10V, V

= 16V) with a Full

V

= 10V to 16V

IN_MAX_OP

Range of 2.5V to 38V

Boost Boosting in Normal Operating

Range?

Yes, Over Full Range

34µA

Yes, When V < V

No

IN

MID_REG

Buck Bucking in Normal Operating

Range?

Yes, Over Full Range

34µA

No, in Dropout

~3mA

Yes, Over Full Range

LTC7813 No Load Quiescent Current in

Burst Mode

34µA

High

Heavy Load Efficiency

Slightly Lower

High When Not Boosting;

Slightly Lower When

Boosting

Highest

Input Ripple

Low

Low When Boosting; Very

Low When Not Boosting;

Some Cycle-Skipping

During Transition

Extremely Low

Very Low

Output Ripple

Low

Extremely Low

Low

EMI in Normal Operating Range

Very Low When Not

Boosting; Low When

Boosting

Very Low

Example for Normal Operating Range:

V

OUT

=18V

OUT_REG

V

OUT

=14V

OUT_REG

V

=10V

V

OUT

=10V

MID_REG

V

= 10V – V

= 16V

V

= V

= 12V

V

= V

= 12V

V

= 16V

V

= V

= 5V

OUT_REG

IN_MIN_OP

IN_MAX_OP

OUT_REG

OUT

V

= 10V to 16V

7813f

36

For more information www.linear.com/LTC7813

LTC7813

Typical applicaTions

7813f

37

For more information www.linear.com/LTC7813

LTC7813

Typical applicaTions

7813f

38

For more information www.linear.com/LTC7813

LTC7813

Typical applicaTions

Figure 14. High Efficiency 12V to 60V V_INto 24V/5A and 3.3V/8A DC/DC Regulator

V

OUT2

24V*

V

RUN1

IN

5A

C

OUT10

33µF

OUT4,5,6,7,8,9

M

TG2

TOP2

2.2µF

C

B2

C14

RUN2

0.1µF

R6

10k

1500pF

BOOST2

L2

I

R

SENSE2

6m

TH1

15µH

C13

100pF

V

IN

SW2

12V TO 60V

C

IN1

33µF

IN2,3,4

LTC7813

2.2µF

M

BOT2

BG2

C16

4.7nF

R7

4.3k

I

TH2

–

C15

SENSE2

220pF

C1

1000pF

C

SS1

–

SENSE2

0.1µF

TRACK/SS1

R

232k

B2

C

SS2

0.1µF

V

FB2

SS2

R

A2

12.1k

FREQ

V

BIAS

M

TG1

TOP1

C

PLLIN/MODE

B1

0.1µF

BOOST1

L1

22µH

R

SENSE1

8m

GND

V

OUT1

SW1

3.3V

8A

VPRG2

C

OUT3

220µF

OUT1,2

C19

4.7µF

47µF

M

BG1

BOT1

DRV

CC

C8

0.1µF

+

SENSE1

INTV

CC

–

SENSE1

ILIM

R

B1

DRVUV

215k

V

FB1

R

A1

DRVSET

68.1k

EXTV

CC

*V

= 24V WHEN V < 24V

IN

OUT2

V

OUT2

FOLLOWS V WHEN V > 24V

IN IN

M

: INFINEON BSC057N08NS3

TOP1

: INFINEON BSC036NE7NS3

BOT1

, M

: INFINEON BSC042NE7NS3

TOP2 BOT2

L1: WÜRTH 744325240

L2: WÜRTH 7443551370

C

, C

OUT3

0: SUNCON 63HVP33M

IN1 OUT1

C

: SANYO 6TPB220ML

7813 F14

7813f

39

For more information www.linear.com/LTC7813

LTC7813

Typical applicaTions

7813f

40

For more information www.linear.com/LTC7813

LTC7813

package DescripTion

Please refer to http://www.linear.com/product/LTC7813#packaging for the most recent package drawings.

UH Package

32-Lead Plastic QFN (5mm × 5mm)

(Reference LTC DWG # 05-08-1693 Rev D)

0.70 ±0.05

5.50 ±0.05

4.10 ±0.05

3.45 ±0.05

3.50 REF

(4 SIDES)

3.45 ±0.05

PACKAGE OUTLINE

0.25 ±0.05

0.50 BSC

RECOMMENDED SOLDER PAD LAYOUT

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.30 TYP

OR 0.35 × 45° CHAMFER

R = 0.05

TYP

0.00 – 0.05

R = 0.115

TYP

0.75 ±0.05

5.00 ±0.10

(4 SIDES)

31 32

0.40 ±0.10

PIN 1

TOP MARK

(NOTE 6)

1

2

3.45 ±0.10

3.50 REF

(4-SIDES)

3.45 ±0.10

(UH32) QFN 0406 REV D

0.200 REF

0.25 ±0.05

0.50 BSC

NOTE:

1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE

M0-220 VARIATION WHHD-(X) (TO BE APPROVED)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

7813f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

41

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

For more information www.linear.com/LTC7813

LTC7813

Typical applicaTion

Low EMI, Wide Input Range Pass-Through Cascaded Boost+Buck Regulator

L2

4.7µH

L1

7.3µH

V

IN

V

OUT

20V TO 32V

4V TO 56V

DOWN TO

2.2V AFTER

START-UP

MTOP2

MTOP1

V , 20V**

MID

5A*

R

B2

499k

C

IN1

47µF

C

MID4

47µF

OUT1

6.7µF

OUT2,3

56µF

IN2,3,4

MBOT2

MBOT1

2.2µF

2.05k

3.01k

R

A2

3.01k

R

B1

499k

C

MID1,2,3

31.6k

2.2µF

1000pF

R

A1

C

B1

0.1µF

12.7k

C

B2

0.1µF

+

–

+

–

SENSE2 SENSE2 BG2

SW2 BOOST2 TG2

V

BIAS

TG1 BOOST1 SW1 BG1 SENSE1 SENSE1

V

FB1

FB2

LTC7813

RUN1 RUN2

I

TRACK/SS1 SS2

FREQ PLLIN/MODE GND VPRG2 DRV

CC

INTV

CC

ILIM DRVUV DRVSET

7813 TA02

TH1

TH2

V

IN

C

SS1

0.1µF

26.1k

2.94k

*

WHEN VIN < 12V MAXIMUM LOAD CURRENT

AVAILABLE IS REDUCED

4.7µF

0.1µF

820pF

C

SS2

0.1µF

100pF

** VMID = 20V WHEN VIN < 20V

2200pF

10nF

MTOP1: INFINEON BSC123N08NS3

V

MID

V

OUT

V

OUT

V

OUT

FOLLOWS V WHEN V > 20V

IN IN

MTOP2, MBOT1, MBOT2: INFINEON BSC047N08NS3

L1: WÜRTH 7443551470

= 20V WHEN V < 20V

IN

= 32V WHEN V > 32V

IN

L2: WÜRTH 7443551730

FOLLOWS V WHEN V IS 20V TO 32V

IN

C

, CMID4: SUNCON 63HVH47M

OUT3

IN1

: SUNCON 50HVH56M

relaTeD parTs

PART NUMBER DESCRIPTION

COMMENTS

4.5V (Down to 2.5V After Start-Up) ≤ V ≤ 38V, Boost V

LTC7812

LTM^®4609

LTM8056

LTC3789

38V Synchronous Boost+Buck Controller with Low EMI

and Low Input/Output Ripple

Up to 60V,

OUT

IN

0.8V ≤ Buck V

≤ 24V, I = 33µA, 5mm × 5mm QFN-32

OUT

Q

36V , 34V , Buck-Boost µModule Regulator

4.5V≤ V ≤ 36V, 0.8V ≤ V

≤ 34V, Up to 4A 15mm × 15mm LGA and

IN

OUT

IN

OUT

BGA Packages

58V , 48V , Buck-Boost µModule Regulator

5V≤ V ≤ 58V, 1.2V ≤ V

≤ 48V, Up to 5.4A 15mm × 15mm × 4.92mm

≤ 38V, SSOP-28, 4mm × 5mm QFN-28

≤ 60V, TSSOP-38

IN

OUT

IN

OUT

BGA Package

High Efficiency (Up to 98%) Synchronous 4-Switch

Buck-Boost DC/DC Controller

4V≤ V ≤ 38V, 0.8V ≤ V

IN

OUT

LT^®3790

LT8705

60V 4-Switch Synchronous Buck-Boost Controller

4.7V ≤ V ≤ 60V, 1.2V ≤ V

IN

OUT

80V V and V

Synchronous 4-Switch Buck-Boost

2.8V ≤ V ≤ 80V, 1.3V ≤ V

≤ 80V, Regulates V , I , V , I ,

IN

OUT

IN

OUT OUT OUT IN IN

DC/DC Controller

5mm × 7mm QFN-38, Modified TSSOP Package for High Voltage

LTC3769

LTC3891

LTC3859AL

LTC3899

Low I , 60V Synchronous Step-Up DC/DC Controller

4.5V (Down to 2.3V After Start-Up) ≤ V ≤ 60V, V Up to 60V, I = 28µA

Q

IN

OUT

Q

PLL Fixed Frequency 50kHz to 900kHz, 4mm × 4mm QFN-24, TSSOP-20E

Low I , 60V Synchronous Step-Down Controller with

PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ V ≤ 60V, 0.8V ≤ V ≤ 24V,

Q

IN

OUT

99% Duty Cycle

I = 50µA

Q

38V Low I Triple Output, Buck/Buck/Boost Synchronous 4.5V(Down to 2.5V after Start-Up) ≤ V ≤ 38V, V

Up to 60V,

Q

IN

OUT

Controller with 28μA Burst Mode I

Buck V

Range: 0.8V to 24V

OUT

Q

60V, Triple Output, Buck/Buck/Boost Synchronous

Controller with 29µA Burst Mode I

4.5V (Down to 2.2V after Start-Up) ≤ V ≤ 60V, V

IN OUT

Buck V

Range: 0.8V to 60V

OUT

Q

LTC3892/

LTC3892-1/

LTC3892-2

60V Low I , Dual, 2-Phase Synchronous Step-Down

4.5V≤ V ≤ 60V, 0.8V ≤ V

≤ 0.99V , 5mm × 5mm QFN-32,

OUT IN

Q

IN

DC/DC Controller with 29µA Burst Mode I

TSSOP-28 Packages

Q

7813f

LT 0316 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

42

For more information www.linear.com/LTC7813

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC7813

●

 LINEAR TECHNOLOGY CORPORATION 2016


型号：	LTC3892-2
厂家：	Linear
描述：	Low IQ, 60V Synchronous BoostBuck Controller
文件：	总42页 (文件大小：1543K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3892-2 [Linear]

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