LTC3883IUH#PBF [Linear]
LTC3883/LTC3883-1 - Single Phase Step-Down DC/DC Controller with Digital Power System Management; Package: QFN; Pins: 32; Temperature Range: -40°C to 85°C;
| 型号： | LTC3883IUH#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3883/LTC3883-1 - Single Phase Step-Down DC/DC Controller with Digital Power System Management; Package: QFN; Pins: 32; Temperature Range: -40°C to 85°C 开关 |
| 文件： | 总114页 (文件大小：1778K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3883/LTC3883-1
Single Phase Step-Down
DC/DC Controller with Digital
Power System Management
DESCRIPTION
FEATURES
2
The LTC®3883/LTC3883-1 are PolyPhase capable DC/DC
synchronous step-down switching regulator controllers
with a PMBus compliant serial interface. The controllers
use a constant frequency, current mode architecture that
is supported by the LTPowerPlay™ software development
tool with graphical user interface (GUI).
n
PMBus/I C Compliant Serial Interface
n
Telemetry Read-Back Includes V , I , V
OUT
,
IN IN OUT
I
, Temperature and Faults
n
Programmable Voltage, Current Limit, Digital
Soft-Start/Stop, Sequencing, Margining, OV/UV/OC
and Frequency Synchronization (250kHz to 1MHz)
0ꢀ5ꢁ Output Voltage Accuracy over Temperature
n
n
n
n
n
Switching frequency, output voltage, and device address
canbeprogrammedusingexternalconfigurationresistors.
Additionally, parameters can be set via the digital interface
or stored in on-chip EEPROM.
Integrated 16-Bit ADC and 12-Bit DAC
Integrated High Side Current Sense Amplifier
Internal EEPROM with ECC and Fault Logging
Integrated N-Channel MOSFET Gate Drivers
The LTC3883/LTC3883-1 can be configured for Burst
Mode® operation,discontinuous(pulse-skipping)modeor
continuousinductorcurrentmode.TheLTC3883incorpo-
rates an internal 5V linear regulator while the LTC3883-1
uses an external 5V supply for minimum power loss.
Power Conversion
n
Wide V Range: 4.5V to 24V
IN
n
n
n
V
Range: 0.5V to 5.4V
OUT
Analog Current Mode Control Loop
Accurate PolyPhase® Current Sharing for
Up to 6 Phases
The LTC3883/LTC3883-1 are available in a 32-lead 5mm
× 5mm QFN package.
n
n
n
Auto Calibration of Inductor DCR
Minimum On Time 45ns
Available in a 32-Lead (5mm × 5mm) QFN Package
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents including 5481178, 5705919, 5929620, 6100678, 6144194, 6177787, 5408150,
6580258, 6304066, 7420359. Licensed under U.S. Patent 7000125 and other related patents
worldwide.
APPLICATIONS
n
High Current Distributed Power Systems
n
Telecom Systems
n
Intelligent Energy Efficient Power Regulation
TYPICAL APPLICATION
5mΩ
V
IN
6V TO 24V
Efficiency and Power Loss
vs Load Current
10µF
1µF
10µF
D1
INTV
CC
100Ω
1µF
100Ω
ꢎꢌꢌ
ꢛꢌ
8ꢌ
ꢘꢌ
ꢜꢌ
ꢗꢌ
ꢖꢌ
3ꢌ
ꢚꢌ
ꢎꢌ
ꢌ
8
ꢘ
ꢜ
ꢗ
ꢖ
3
ꢚ
ꢎ
ꢌ
TG
M1
M2
ꢝ
ꢝ
f
ꢞ ꢎꢚꢝ
ꢐꢈ
ꢁꢅꢉ
ꢞ 3ꢗꢌꢟꢠꢡ
0.1µF
ꢞ ꢎꢍ8ꢝ
I
BOOST
SW
ꢕꢔ
IN_SNS
0.56µH
V
1.8V
20A
OUT
V
V
IN_SNS
IN
1.4k
0.22µF
BG
22µF
LTC3883*
+
–
I
I
V
SDA
SENSE
SENSE
SCL
PMBus
INTERFACE
ALERT
RUN
SENSE
TSNS
C
OUT
530µF
10nF
1µF
MMBT3906
2200pF
4.99k
FAULT
MANAGEMENT
GPIO
PGOOD
I
TH
ꢌꢍꢌꢎ
ꢌꢍꢎ
ꢎ
ꢎꢌ
ꢎꢌꢌ
V
V
DD33
DD25
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
TO/FROM
*SOME DETAILS OMITTED
FOR CLARITY
SHARE_CLK
WP
1µF
3883 ꢉꢂꢌꢎꢙ
OTHER LTC DEVICES
SGND
WRITE PROTECT
3883 TA01a
3883fe
1
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TABLE OF CONTENTS
Featuresꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 1
Applications ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 1
Typical Application ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 1
Descriptionꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 1
Table of Contents ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 2
Absolute Maximum Ratingsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 4
Pin Configuration ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 4
Order Informationꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 4
Electrical Characteristicsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 5
Typical Performance Characteristics ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 9
Pin Functionsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ12
Block Diagramꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ14
Operationꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ15
Overview................................................................. 15
Main Control Loop.................................................. 15
EEPROM ................................................................. 16
Power Up and Initialization ..................................... 16
Soft-Start................................................................ 17
Sequencing............................................................. 17
Voltage-Based Sequencing..................................... 18
Shutdown ............................................................... 18
Light Load Current Operation ................................. 19
Switching Frequency and Phase............................. 19
Output Voltage Sensing ..........................................20
Output Current Sensing ..........................................20
Auto Calibration .....................................................20
Accurate DCR Temperature Compensation ............20
Input Current Sensing.............................................20
Load Sharing ..........................................................21
External/Internal Temperature Sense......................21
RCONFIG (Resistor Configuration) Pins..................22
Fault Detection and Handling..................................23
Internal Memory with CRC and ECC ..................24
Serial Interface .......................................................24
Communication Failure ......................................24
Device Addressing..................................................24
Responses to V
and I
Faults ........................25
OUT
OUT
Output Overvoltage Fault Response ...................25
Output Undervoltage Response .........................25
Peak Output Overcurrent Fault Response...........25
Responses to Timing Faults....................................26
Responses to V OV Faults....................................26
IN
Responses to OT/UT Faults.....................................26
Overtemperature Fault Response—Internal ......26
Overtemperature and Undertemperature
Fault Response—Externals ...............................26
Responses To Input Overcurrent And Output
Undercurrent Faults................................................27
Responses to External Faults .................................27
Fault Logging..........................................................27
Bus Timeout Failure................................................27
2
Similarity Between PMBus, SMBus and I C
2-Wire Interface......................................................27
PMBus Serial Digital Interface................................28
PMBus Command Summary ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ31
PMBus Commands.................................................31
*Data Format..........................................................36
Applications Information ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ37
Current Limit Programming....................................37
+
–
I
and I
Pins.........................................37
SENSE
SENSE
Low Value Resistor Current Sensing.......................38
Inductor DCR Current Sensing................................39
Slope Compensation and Inductor Peak Current ....40
Inductor Value Calculation ......................................40
Inductor Core Selection .......................................... 41
Power MOSFET and Schottky Diode (Optional)
Selection................................................................. 41
Variable Delay Time, Soft-Start and Output Voltage
Ramping .................................................................42
Digital Servo Mode.................................................43
Soft Off (Sequenced Off)........................................43
INTV Regulator....................................................44
CC
3883fe
2
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TABLE OF CONTENTS
Current.................................................................... 74
Output Current Calibration ................................. 74
Output Current....................................................76
Input Current Calibration ...................................78
Input Current ......................................................78
Temperature............................................................78
External Temperature Calibration........................78
External Temperature Limits...............................79
Timing ....................................................................80
Timing—On Sequence/Ramp.............................80
Timing—Off Sequence/Ramp ............................81
Precondition for Restart .....................................81
Fault Response .......................................................82
Fault Responses All Faults..................................82
Fault Responses Input Voltage ...........................82
Fault Responses Output Voltage.........................83
Fault Responses Output Current.........................85
Fault Responses IC Temperature ........................86
Fault Responses External Temperature...............87
Fault Sharing...........................................................88
Fault Sharing Propagation ..................................88
Fault Sharing Response......................................90
Scratchpad .............................................................90
Identification...........................................................90
Telemetry................................................................96
NVM Memory Commands .................................... 100
Store/Restore ...................................................100
Fault Logging.................................................... 102
Block Memory Write/Read................................ 105
Typical Applicationsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 107
Package Description ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 112
Revision History ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 113
Typical Application ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 114
Related Partsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 114
Topside MOSFET Driver Supply (C , D ) ................45
B
B
Undervoltage Lockout.............................................45
C and C Selection ...........................................45
IN
OUT
Fault Conditions......................................................46
Open-Drain Pins .....................................................47
Phase-Locked Loop and Frequency
Synchronization......................................................47
Minimum On-Time Considerations..........................48
Input Current Sense Amplifier.................................48
RCONFIG (External Resistor
Configuration Pins).................................................49
Voltage Selection................................................49
Frequency and Phase Selection Using
RCONFIG ............................................................ 51
Address Selection Using RCONFIG..................... 51
Efficiency Considerations .......................................52
Checking Transient Response.................................52
PolyPhase Configuration ....................................53
PC Board Layout Checklist .....................................54
PC Board Layout Debugging...................................56
Design Example......................................................56
2
Connecting the USB to I C/SMBus/PMBus
Controller to the LTC3883 In System......................58
Inductor DCR Auto Calibration ...............................59
Accurate DCR Temperature Compensation.............60
LTpowerPlay: An Interactive GUI for
Digital Power ..........................................................61
PMBus Communication and Command
Processing..............................................................62
PMBus Command Details ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ64
Addressing and Write Protect.................................64
General Configuration COMMANDS........................65
On/Off/Margin ........................................................66
PWM Configuration ................................................68
Voltage....................................................................70
Input Voltage and Limits.....................................70
Output Voltage and Limits..................................71
3883fe
3
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
ABSOLUTE MAXIMUM RATINGS (Note 1)
V , SW...................................................... –0.3V to 28V PGOOD, GPIO, SHARE_CLK, I ,
IN
TH
Topside Driver Voltage (BOOST)................ –0.3V to 34V
V
, SYNC, WP ..................................... –0.3V to 3.6V
DD33
Switch Transient Voltage (SW) ..................... –5V to 28V INTV Peak Output Current................................100mA
CC
EXTV , INTV , BG, (BOOST – SW) ......... –0.3V to 6V Operating Junction Temperature Range
CC
CC
+
+
–
V
, I
, I
............................. –0.3V to 6V (Note 2)................................................ –40°C to 125°C*
SENSE SENSE SENSE
RUN, SDA, SCL, ALERT............................. –0.3V to 5.5V Storage Temperature Range ................ –65°C to 150°C*
FREQ_CFG, V
ASEL, V
, V
,
OUT_CFG TRIM_CFG
*See Derating EEPROM Retention at Temperature in the
ApplicationsInformationSectionforJunctionTemperatures
in Excess of 125°C.
............................................ –0.3V to 2.75V
DD25
–
V
..................................................... –0.3V to 0.3V
SENSE
(V
– V ), (V – I
) ................ –0.3V to 0.3V
IN_SNS
IN
IN
IN_SNS
PIN CONFIGURATION
LTC3883
LTC3883-1
ꢇꢈꢉ ꢊꢋꢌꢍ
ꢇꢈꢉ ꢊꢋꢌꢍ
3ꢀ 3ꢁ 3ꢂ ꢀꢃ ꢀ8 ꢀꢄ ꢀꢅ ꢀꢆ
3ꢀ 3ꢁ 3ꢂ ꢀꢃ ꢀ8 ꢀꢄ ꢀꢅ ꢀꢆ
ꢊ
ꢋ
ꢁ
ꢀ
3
ꢞ
ꢆ
ꢅ
ꢄ
8
ꢀꢞ ꢣꢈꢈꢛꢇ
ꢀ3 ꢇꢎ
ꢊ
ꢋ
ꢁ
ꢀ
3
ꢞ
ꢆ
ꢅ
ꢄ
8
ꢀꢞ ꢣꢈꢈꢛꢇ
ꢀ3 ꢇꢎ
ꢋꢏꢟꢛꢏꢛ
ꢋꢏꢟꢛꢏꢛ
ꢋꢏꢟꢛꢏꢛ
ꢠ
ꢋꢏꢟꢛꢏꢛ
ꢠ
ꢋ
ꢛꢍ
ꢊ
ꢋ
ꢛꢍ
ꢊ
ꢀꢀ
ꢀꢁ
ꢀꢀ
ꢀꢁ
ꢛꢌꢏꢛꢌ
ꢛꢌꢏꢛꢌ
ꢛꢌꢏꢛꢌ
ꢛꢌꢏꢛꢌ
ꢡ
ꢡ
ꢋ
ꢋ
ꢐꢐ33
ꢐꢐ33
33
ꢎꢏꢐ
33
ꢎꢏꢐ
ꢛꢢꢏꢔ
ꢛꢔꢗ
ꢀꢂ ꢛꢒꢓꢤꢌꢟꢔꢗꢕ
ꢛꢢꢏꢔ
ꢛꢔꢗ
ꢀꢂ ꢛꢒꢓꢤꢌꢟꢔꢗꢕ
ꢍꢉ
ꢍꢉ
ꢁꢃ
ꢁ8
ꢁꢄ
ꢁꢃ
ꢁ8
ꢁꢄ
ꢛꢐꢓ
ꢊ
ꢊ
ꢛꢐꢓ
ꢊ
ꢊ
ꢐꢐꢀꢆ
ꢐꢐꢀꢆ
ALERT
ALERT
ꢇꢤꢋꢥꢟꢔꢝꢎ
ꢇꢤꢋꢥꢟꢔꢝꢎ
ꢃ
ꢁꢂ ꢁꢁ ꢁꢀ ꢁ3 ꢁꢞ ꢁꢆ ꢁꢅ
ꢃ ꢁꢂ ꢁꢁ ꢁꢀ ꢁ3 ꢁꢞ ꢁꢆ ꢁꢅ
ꢑꢒ ꢉꢓꢔꢕꢓꢎꢌ
3ꢀꢖꢗꢌꢓꢐ ꢘꢆꢙꢙ × ꢆꢙꢙꢚ ꢉꢗꢓꢛꢇꢋꢔ ꢜꢝꢏ
ꢑꢒ ꢉꢓꢔꢕꢓꢎꢌ
3ꢀꢖꢗꢌꢓꢐ ꢘꢆꢙꢙ × ꢆꢙꢙꢚ ꢉꢗꢓꢛꢇꢋꢔ ꢜꢝꢏ
T
= 125°C, θ = 44°C/W, θ = 7.3°C/W
T
= 125°C, θ = 44°C/W, θ = 7.3°C/W
JMAX JA JC
JMAX
JA
JC
EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB
EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
http://wwwꢀlinearꢀcom/product/LTC3883#orderinfo
LEAD FREE FINISH
LTC3883EUH#PBF
LTC3883IUH#PBF
LTC3883EUH-1#PBF
LTC3883IUH-1#PBF
TAPE AND REEL
PART MARKING*
3883
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 105°C
–40°C to 125°C
–40°C to 105°C
–40°C to 125°C
LTC3883EUH#TRPBF
LTC3883IUH#TRPBF
LTC3883EUH-1#TRPBF
LTC3883IUH-1#TRPBF
32-Lead (5mm × 5mm) Plastic QFN
32-Lead (5mm × 5mm) Plastic QFN
32-Lead (5mm × 5mm) Plastic QFN
32-Lead (5mm × 5mm) Plastic QFN
3883
38831
38831
Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
3883fe
4
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C (Note 2)ꢀ VIN = 12V, VRUN = 3ꢀ3V, fSYNC = 500kHz (externally
driven) unless otherwise specifiedꢀ
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Voltage
l
V
Input Voltage Range
Input Voltage Supply Current
Normal Operation
(Note 12)
(Note 14)
RUN
RUN
4.5
24
V
IN
I
Q
V
V
= 3.3V, No Caps on TG and BG
= 0V
30
20
mA
mA
V
Undervoltage Lockout Threshold
V
V
/V
Falling
/V Rising
INTVCC EXTVCC
3.7
3.95
V
V
UVLO
INTVCC EXTVCC
when V > 4.2V
IN
T
Initialization Time from V Applied Until the
MFR_CONFIG_ALL Bit 4 = 0
MFR_CONFIG_ALL Bit 4 = 1
80
35
ms
ms
INT
IN
TON_DELAY Timer Starts
Control Loop
l
l
V
Full-Scale Voltage Range 0
Set Point Accuracy (0.6V to 5V)
Resolution
VOUT_COMMAND = 5.500V (Note 9)
5.422
–0.5
5.576
0.5
V
%
Bits
mV
OUTR0
12
1.375
LSB Step Size
l
l
V
Full-Scale Voltage Range 1
Set Point Accuracy (0.6V to 2.5V)
Resolution
VOUT_COMMAND = 2.75V (Note 9)
2.711
–0.5
2.788
0.5
V
%
Bits
mV
OUTR1
12
0.6875
LSB Step Size
l
V
V
Line Regulation
Load Regulation
6V < V < 24V
0.02
0.1
–0.1
%/V
%
%
LINEREG
IN
l
l
∆V = 1.35V – 0.7V
0.01
–0.01
LOADREG
ITH
∆V = 1.35V – 2.0V
ITH
g
Error Amplifier g
Input Current
I =1.22V
TH
3
1
mmho
µA
m
m
l
I
V
= 5.5V
ISENSE
2
ISENSE
V
V
V
Input Resistance to Ground
0V ≤ V ≤ 5.5V
47
3
kΩ
bits
SENSERIN
IlLIMIT
SENSE
PIN
Resolution
l
l
V
Hi Range
Lo Range
68
44
75
50
82
56
mV
mV
ILIMMAX
V
Hi Range
Lo Range
37.5
25
mV
mV
ILIMMIN
Gate Driver
TG
r
f
TG Transition Time:
Rise Time
Fall Time
(Note 4)
LOAD
LOAD
t
t
C
C
= 3300pF
= 3300pF
30
30
ns
ns
BG
r
f
BG Transition Time:
Rise Time
Fall Time
(Note 4)
LOAD
LOAD
t
t
C
C
= 3300pF
= 3300pF
20
20
ns
ns
TG/BG t
BG/TG t
Top Gate Off to Bottom Gate On Delay Time
Bottom Gate Off to Top Gate On Delay Time
Minimum On-Time
(Note 4) C
(Note 4) C
= 3300pF
= 3300pF
10
30
45
ns
ns
ns
1D
LOAD
LOAD
2D
t
ON(MIN)
OV/UV Output Voltage Supervisor
N
Resolution
8
bits
V
V
mV
mV
%
%
µs
µs
V
V
V
V
V
V
Voltage Range
Voltage Range
Step Size
Step Size
Threshold Accuracy 2V < V
Threshold Accuracy 0.9V < V
OV Comparator to GPIO Low Time
UV Comparator to GPIO Low Time
Range Value = 0
Range Value = 1
Range Value = 0
Range Value = 1
Range Value = 0
Range Value = 1
1
0.4
5.5
2.7
RANGE0
RANGE1
OUSTP0
OUSTP1
THACC0
THACC1
PROPOV1
PROPUV1
22
11
l
l
< 5V
2
2
35
35
OUT
< 2.5V
OUT
t
t
V
V
= 10% of Threshold
= 10% of Threshold
OD
OD
3883fe
5
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
The l denotes the specifications which apply over the specified operating
ELECTRICAL CHARACTERISTICS
junction temperature range, otherwise specifications are at TJ = 25°C (Note 2)ꢀ VIN = 12V, VRUN = 3ꢀ3V, fSYNC = 500kHz (externally
driven) unless otherwise specifiedꢀ
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Voltage Supervisor
IN
N
Resolution
Full-Scale Voltage
Step Size
Threshold Accuracy 8.75V < V < 20V
Comparator Response Time
(VIN_ON and VIN_OFF)
8
bits
V
mV
%
V
V
V
4.5
20
INRANGE
INSTP
82
l
2.5
100
INTHACC
PROPVIN
IN
t
V
= 10% of Threshold
µs
OD
Output Voltage Readback
N
Resolution
LSB Step Size
16
244
Bits
µV
V
V
Full-Scale Sense Voltage
Total Unadjusted Error
(Note 10) V
= 0V (Note 8)
> 0.6V
8
0.2
V
%
%
µV
ms
F/S
RUN
T = 25°C, V
OUT_TUE
J
OUT
l
l
(Note 8)
0.5
500
V
Zero-Code Offset Voltage
Conversion Time
OS
t
(Note 6)
80
CONVERT
V
IN
Voltage Readback
N
Resolution
Full-Scale Input Voltage
Total Unadjusted Error
(Note 5)
(Note 11)
T = 25°C, V > 4.5V
J
10
38.91
Bits
V
%
%
V
V
F/S
0.4
2
IN_TUE
VIN
l
t
Conversion Time
(Note 6)
80
ms
CONVERT
Output Current Readback
N
Resolution
LSB Step Size
(Note 5)
10
Bits
µV
µV
µV
µV
+
–
0V ≤ |V
– V
| < 16mV
15.25
31.25
62.5
125
ISENSE
ISENSE
+
+
–
16mV ≤ |V
32mV ≤ |V
– V
| < 32mV
ISENSE
ISENSE
ISENSE
ISENSE
ISENSE
ISENSE
–
– V
| < 63.9mV
+
–
63.9mV ≤ |V
– V
| < 127.9mV
I
I
V
Full-Scale Input Current
Total Unadjusted Error
Zero-Code Offset Voltage
Conversion Time
(Note 7) R
(Note 8) V
= 1mΩ
> 6mV
128
A
%
µV
ms
F/S
ISENSE
ISENSE
l
1
28
OUT_TUE
OS
t
(Note 6)
(Note 5)
8x Gain, 0V ≤ |V
4x Gain, 0V ≤ |V
2x Gain, 0V ≤ |V
80
CONVERT
Input Current Readback
N
Resolution
LSB Step Size
10
15.26
30.52
61
Bits
µV
µV
µV
– I
| ≤ 8mV
IN_SNS
IN_SNS
IN_SNS
IN_SNS
IN_SNS
IN_SNS
– I
– I
| ≤ 20mV
| ≤ 50mV
l
l
l
I
Total Unadjusted Error
8x Gain, V
4x Gain, V
2x Gain, V
> 2.5mV (Note 8)
> 4mV (Note 8)
> 6mV (Note 8)
2.0
1.5
1.2
%
%
%
IN_TUE
ISENSE
ISENSE
ISENSE
V
Zero-Code Offset Voltage
Conversion Time
50
160
µV
ms
OS
t
(Note 6)
(Note 5)
CONVERT
Supply Current Readback
N
Resolution
LSB Step Size
10
122
Bits
µV
l
l
I
Total Unadjusted Error (LTC3883 Only)
Total Unadjusted Error (LTC3883-1 Only)
Conversion Time
5
%
CHIP_TUE
CONVERT
200
µA
t
(Note 6)
(Note 5)
160
10
ms
Duty Cycle Readback
D_RES
D_TUE
Resolution
Total Unadjusted Error
Bits
16.3% Duty Cycle
–3
3
%
3883fe
6
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C (Note 2)ꢀ VIN = 12V, VRUN = 3ꢀ3V, fSYNC = 500kHz (externally
driven) unless otherwise specifiedꢀ
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
Conversion Time
(Note 6)
80
ms
CONVERT
Temperature Readback (T0, T1)
T
Resolution
0.25
°C
°C
°C
RES_T
l
T0_TUE
TI_TUE
External TSNS TUE
Internal TSNS TUE
Update Rate
∆V
= 72mV (Note 8)
3
TSNS
V
= 0.0V, f
= 0kHz (Note 8)
1
80
RUN
SYNC
t
(Note 6)
ms
CONVERT_T
INTV Regulator
CC
V
V
V
V
Internal V Voltage No Load (LTC3883 Only) 6V < V < 24V
4.8
3.2
5
0.5
5.2
2
V
%
INTVCC
CC
IN
INTV Load Regulation (LTC3883 Only)
I = 0mA to 50mA
CC
LDO_INT
CC
Regulator
DD33
DD33
LIM
Internal V
Voltage
4.5V < V
/V
3.3
100
3.5
3.1
3.4
V
mA
V
DD33
INTVCC EXTVCC
I
V
V
V
Current Limit
Overvoltage Threshold
Undervoltage Threshold
V
DD33
= GND, V = INTV = 4.5V
IN CC
DD33
DD33
DD33
V
V
V
V
DD33_OV
DD33_UV
V
Regulator
DD25
DD25
LIM
Internal V
Voltage
2.25
2.5
80
2.75
7.5
V
mA
DD25
I
V
Current Limit
V
DD25
= GND, V = INTV = 4.5V
DD25
IN
CC
Oscillator and Phase-Locked Loop
l
f
Oscillator Frequency Accuracy
SYNC Input Threshold
250kHz < f
< 1MHz Measured Falling
SYNC
%
OSC
Edge-to-Falling Edge of SYNC with
SWITCH_FREQUENCY = 250.0.and 1000.0
V
V
V
V
Falling
Rising
1
1.5
0.2
V
V
V
TH,SYNC
CLKIN
CLKIN
l
SYNC Low Output Voltage
I
= 3mA
LOAD
0.4
5
OL,SYNC
I
SYNC Leakage Current in Slave Mode
0V ≤ V ≤ 3.6V
µA
LEAKSYNC
PIN
SYNC-
SYNC to Channel Phase Relationship Based
on the Falling Edge of Sync and Rising Edge
of TG
MFR_PWM_CONFIG_LTC3883[2:0] = 0
MFR_PWM_CONFIG_LTC3883[2:0] = 1
MFR_PWM_CONFIG_LTC3883[2:0] = 2
MFR_PWM_CONFIG_LTC3883[2:0] = 3
MFR_PWM_CONFIG_LTC3883[2:0] = 4
MFR_PWM_CONFIG_LTC3883[2:0] = 5
MFR_PWM_CONFIG_LTC3883[2:0] = 6
MFR_PWM_CONFIG_LTC3883[2:0] = 7
0
Deg
Deg
Deg
Deg
Deg
Deg
Deg
Deg
90
180
270
60
120
240
300
EEPROM Characteristics
l
Endurance
(Note 13)
0°C < T < 85°C During EEPROM Write
10,000
10
Cycles
J
Operations
l
l
Retention
(Note 13)
T < 125°C
Years
ms
J
Mass_Write Mass Write Operation Time
STORE_USER_ALL, 0°C < T ≤ 85°C
440
4100
1.35
J
During EEPROM Write Operations
Digital Inputs SCL, SDA, RUN, GPIO
l
l
V
V
V
C
Input High Threshold Voltage
Input Low Threshold Voltage
Input Hysteresis
SCL, SDA, RUN, GPIO
SCL, SDA, RUN, GPIO
SCL, SDA
V
V
V
IH
0.8
IL
0.08
10
HYST
PIN
Input Capacitance
10
pF
Digital Input WP
Input Pull-Up Current
I
WP
µA
PUWP
Open-Drain Outputs SCL, SDA, GPIO, ALERT, RUN, SHARE_CLK, PGOOD
Output Low Voltage = 3mA
l
V
I
0.4
V
OL
SINK
3883fe
7
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C (Note 2)ꢀ VIN = 12V, VRUN = 3ꢀ3V, fSYNC = 500kHz (externally
driven) unless otherwise specifiedꢀ
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Digital Inputs SHARE_CLK, WP
l
l
V
V
Input High Threshold Voltage
Input Low Threshold Voltage
1.5
1.0
1.8
V
V
IH
IL
0.6
Leakage Current SDA, SCL, ALERT, RUN
Input Leakage Current
Leakage Current GPIO, PGOOD
Input Leakage Current
Digital Filtering of GPIO
Input Digital Filtering GPIO
Digital Filtering of RUN
Input Digital Filtering RUN
PMBus Interface Timing Characteristics
l
l
I
0V ≤ V ≤ 5.5V
5
2
µA
µA
µs
µs
OL
PIN
I
0V ≤ V ≤ 3.6V
GL
PIN
I
3
FLTG
I
10
FLTG
l
l
l
f
t
t
Serial Bus Operating Frequency
Bus Free Time Between Stop and Start
Hold time After Repeated Start Condition.
After this Period, the First Clock is Generated
10
1.3
0.6
400
kHz
µs
µs
SCL
BUF
HD,STA
l
l
t
t
t
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time
Receiving Data
Transmitting Data
0.6
0.6
µs
µs
SU,STA
SU,STO
HD,DAT
l
l
0
0.3
µs
µs
0.9
t
t
Data Setup Time
Receiving Data
Stuck PMBus Timer Non-Block Reads
Stuck PMBus Timer Block Reads
SU,DAT
l
0.1
µs
ms
ms
Measured from the Last PMBus Start Event
32
150
TIMEOUT_SMB
l
l
t
t
Serial Clock Low Period
Serial Clock High Period
1.3
0.6
10000
µs
µs
LOW
HIGH
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: The data format in PMBus is 5 bits exponent (signed) and 11 bits
mantissa (signed). This limits the output resolution to 10 bits though the
internal ADC is 16 bits and the calculations use 32-bit words.
Note 6: The data conversion is done in round robin fashion. All inputs
signals are continuously converted for a typical latency of 80ms.
Note 7: The IOUT_CAL_GAIN = 1.0mΩ and MFR_IOUT_TC = 0.0. Value as
read from READ_IOUT in amperes.
Note 8: Part tested with PWM disabled. Evaluation in application
demonstrates capability. TUE (%) = ADC Gain Error (%) + 100 •
[Zero Code Offset + ADC Linearity Error]/Actual Value.
Note 2: The LTC3883/LTC3883-1 are tested under pulsed load conditions
such that T ≈ T . The LTC3883E/LTC3883E-1 are guaranteed to meet
J
A
performance specifications from 0°C to 85°C. Specifications over the
–40°C to 105°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3883I/LTC3883I-1 are guaranteed over the full –40°C to 125°C operating
junction temperature range. T is calculated from the ambient temperature,
J
Note 9: All V
commands assume the ADC is used to auto-zero the
OUT
T , and power dissipation, P , according to the following formula:
A
D
output to achieve the stated accuracy. LTC3883 is tested in a feedback
loop that servos V to a specified value.
T = T + (P • θ )
J
A
D
JA
OUT
The maximum ambient temperature consistent with these specifications
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 10: The maximum V
voltage is 5.5V.
OUT
Note 11: The maximum V voltage is 28V.
IN
Note 12: When V < 6V, INTV must be tied to V .
IN
CC
IN
Note 13: EEPROM endurance is guaranteed by design, characterization
and correlation with statistical process controls. Data retention is
production tested via a high temperature bake at wafer level. The minimum
retention specification applies for devices whose EEPROM has been cycled
less than the minimum endurance specification. The RESTORE_USER_ALL
command (NVM read) is valid over the entire operating temperature range.
Note 4: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
3883fe
8
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
ELECTRICAL CHARACTERISTICS
Note 14: The LTC3883-1 quiescent current (I ) equals the I of V plus
Junction temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Q
Q
IN
the I of EXTV
.
Q
CC
Note 15: The LTC3883 includes overtemperature protection that is
intended to protect the device during momentary overload conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency and Power Loss
vs Input Voltage (LTC3883)
Efficiency vs Load Current,
OUT = 3ꢀ3V (LTC3883)
Efficiency vs Load Current,
OUT = 1ꢀ8V (LTC3883)
V
V
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
ꢕꢒ
ꢕꢆ
ꢓꢗꢆ
3ꢗꢅ
3ꢗꢆ
ꢒꢗꢅ
ꢒꢗꢆ
ꢖꢗꢅ
ꢖꢗꢆ
88
8ꢔ
V
V
f
= 12V
V
V
f
= 12V
IN
OUT
SW
IN
OUT
SW
= 1.8V
= 350kHz
= 3.3V
= 350kHz
8ꢓ
8ꢒ
8ꢆ
L = 0.56µH
L = 0.56µH
DCR = 1.8mΩ
DCR = 1.8mΩ
CCM
DCM
BM
CCM
DCM
BM
ꢅ
ꢖꢆ
ꢖꢅ
ꢃꢀꢄ
ꢒꢆ
ꢒꢅ
0.01
0.1
1
10
100
0.01
0.1
1
10
100
ꢀ
LOAD CURRENT (A)
LOAD CURRENT (A)
ꢁꢂ
3883 G01
3883 G02
3883 ꢘꢆ3
Load Step
(Burst Mode Operation)
Load Step
(Forced Continuous Mode)
Load Step
(Pulse-Skipping Mode)
ꢀ
ꢀ
ꢀ
ꢁꢂꢃꢄ
ꢁꢂꢃꢄ
ꢁꢂꢃꢄ
ꢅꢃꢆꢄꢀꢇ
ꢅꢃꢆꢄꢀꢇ
ꢅꢃꢆꢄꢀꢇ
ꢀꢈꢄꢉꢊꢋꢂꢌ
ꢊꢉꢌꢌꢍꢈꢋ
ꢅꢃꢆꢄꢀꢇ
ꢀꢈꢄꢉꢊꢋꢂꢌ
ꢊꢉꢌꢌꢍꢈꢋ
ꢅꢃꢆꢄꢀꢇ
ꢀꢈꢄꢉꢊꢋꢂꢌ
ꢊꢉꢌꢌꢍꢈꢋ
ꢅꢃꢆꢄꢀꢇ
ꢇ
ꢇ
ꢇ
ꢂꢉꢋ
ꢂꢉꢋ
ꢂꢉꢋ
ꢎꢏꢏꢐꢇꢆꢄꢀꢇ
ꢎꢏꢏꢐꢇꢆꢄꢀꢇ
ꢎꢏꢏꢐꢇꢆꢄꢀꢇ
ꢃꢊꢑꢊꢂꢉꢒꢁꢍꢄ
ꢃꢊꢑꢊꢂꢉꢒꢁꢍꢄ
ꢃꢊꢑꢊꢂꢉꢒꢁꢍꢄ
3883 ꢙꢏꢚ
3883 ꢙꢏꢅ
3883 ꢙꢏꢚ
ꢇ
ꢇ
ꢕ ꢎꢖꢇ
ꢅꢏꢓꢔꢆꢄꢀꢇ
ꢇ
ꢇ
ꢕ ꢎꢖꢇ
ꢅꢏꢓꢔꢆꢄꢀꢇ
ꢇ
ꢇ
ꢕ ꢎꢖꢇ
ꢅꢏꢓꢔꢆꢄꢀꢇ
ꢀꢈ
ꢂꢉꢋ
ꢀꢈ
ꢂꢉꢋ
ꢀꢈ
ꢂꢉꢋ
ꢕ ꢎꢗ8ꢇ
ꢕ ꢎꢗ8ꢇ
ꢕ ꢎꢗ8ꢇ
ꢏꢗ3ꢃ ꢋꢂ ꢅꢃ ꢘꢋꢍꢒ
ꢏꢗ3ꢃ ꢋꢂ ꢅꢃ ꢘꢋꢍꢒ
ꢏꢗ3ꢃ ꢋꢂ ꢅꢃ ꢘꢋꢍꢒ
Inductor Current at Light Load
Start-Up into a Pre-Biased Load
Soft-Start Ramp
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂ
ꢃꢄꢅꢆꢇꢄ
ꢀꢁꢂ
ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ
ꢋꢁꢅꢄ
ꢃꢄꢅꢆꢇꢄ
ꢌꢍꢎꢅꢈꢏ
ꢄ
ꢈꢁꢉ
ꢊꢄꢅꢆꢇꢄ
ꢄ
ꢈꢁꢉ
ꢐꢑꢒꢓꢔ ꢋꢕꢖe
ꢁꢗꢄꢂꢍꢇꢈꢁꢆ
ꢌꢍꢎꢅꢈꢏ
ꢊꢄꢅꢆꢇꢄ
ꢗꢉꢘꢊꢄꢙꢊꢚꢈꢗꢗꢈꢆꢛ
ꢋꢁꢅꢄ
3883 ꢖꢒꢗ
3883 ꢖꢒ8
ꢎ
ꢑ ꢊꢒꢌꢍ
ꢑ ꢋꢌꢍ
ꢋꢌꢍꢅꢆꢇꢄ
ꢎ
ꢎ
ꢑ ꢊꢒꢌꢍ
ꢑ ꢋꢌꢍ
ꢋꢌꢍꢅꢆꢇꢄ
ꢀꢇꢏꢐ
ꢀꢇꢏꢐ
ꢌꢍꢎꢅꢈꢏ
ꢎ
ꢆꢐꢓꢔꢕ
ꢆꢐꢓꢔꢕ
ꢄ
ꢑ ꢃꢄ
ꢈꢁꢉ
3883 ꢛꢠꢡ
ꢏ
ꢏ
ꢘꢁꢍꢅ
ꢞ ꢜꢌꢏ
ꢜꢝꢓꢎꢅꢈꢏ
ꢈꢆ
ꢞ ꢜꢟ8ꢏ
ꢁꢉꢇ
ꢈ
ꢞ ꢜꢠꢠꢝꢍ
3883fe
9
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL PERFORMANCE CHARACTERISTICS
Current Sense Threshold
Maximum Current Sense Threshold
vs Duty Cycle, VOUT = 0V
Soft-Off Ramp
vs ITH Voltage (Low Range)
ꢖꢖ
ꢖꢛ
ꢖ3
ꢖꢚ
ꢖꢗ
ꢖꢊ
ꢛꢘ
ꢛ8
ꢛꢜ
ꢛꢝ
ꢛꢖ
60
50
40
30
ꢖꢊꢔꢕ ꢑꢆꢐꢑꢆ ꢄꢓꢐꢀꢎꢂꢎꢓꢐ
ꢀꢁꢂ
ꢃꢄꢅꢆꢇꢄ
ꢄ
ꢈꢁꢉ
ꢊꢄꢅꢆꢇꢄ
20
10
3883 ꢖꢊꢕ
ꢎ
ꢒ ꢋꢌꢍ
ꢋꢌꢍꢅꢆꢇꢄ
ꢏꢐꢑꢑ
0
–10
–20
ꢎ
ꢒ ꢊꢕꢌꢍ
ꢆꢓꢑꢐꢔ
V
V
50mV
25mV
SENSE
SENSE
ꢊ
3ꢊ
ꢖꢊ
ꢜꢊ
ꢘꢊ
0.5
1
2
0
2.5
1.5
(V)
ꢀꢁꢂꢃ ꢄꢃꢄꢅꢆ ꢇꢈꢉ
V
ITH
3883 ꢙꢗꢚ
3883 G11
Maximum Current Sense Threshold
vs Common Mode Voltage
Regulated Output
vs Temperature
SHARE_CLK Frequency
vs Temperature
ꢍꢎꢌꢍꢔꢌ
ꢍꢎꢌꢍꢔꢍ
ꢍꢎꢌꢍꢕꢌ
ꢍꢎꢌꢍꢕꢍ
ꢍꢎꢌꢍꢍꢌ
ꢍꢎꢌꢍꢍꢍ
ꢍꢎꢏꢐꢐꢌ
ꢍꢎꢏꢐꢐꢍ
ꢍꢎꢏꢐ8ꢌ
ꢍꢎꢏꢐ8ꢍ
ꢍꢎꢏꢐꢑꢌ
ꢎꢗꢏꢎ
ꢎꢗꢏꢍ
ꢎꢍꢏꢎ
ꢎꢍꢏꢍ
ꢚꢚꢍ
ꢚꢍꢌ
ꢚꢍꢍ
ꢎꢌ
ꢎꢍꢖꢆ ꢔꢅꢃꢔꢅ ꢀꢁꢃꢄꢑꢈꢑꢁꢃ
ꢎꢍ
ꢋꢌꢍ
ꢌꢍ
ꢕꢍꢍ ꢕꢔꢌ
ꢕꢌꢍ
ꢍ
ꢗ
3
ꢙ
ꢎ
ꢋꢔꢌ
ꢍ
ꢔꢌ
ꢑꢌ
ꢋꢌꢍ ꢋꢛꢌ
ꢍ
ꢛꢌ ꢌꢍ ꢝꢌ ꢚꢍꢍ ꢚꢛꢌ ꢚꢌꢍ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢘ
ꢀꢁꢂꢂꢁꢃ ꢂꢁꢄꢅ ꢆꢁꢇꢈꢉꢊꢅ ꢋꢆꢌ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
3883 ꢖꢕꢏ
3883 ꢊꢗ3
3883 ꢜꢚꢌ
SHARE-CLK Frequency vs VIN
Quiescent Current vs Temperature
VOUT Measurement Error vs VOUT
ꢆꢇꢐꢆ
ꢆꢇ3ꢆ
ꢆꢇꢑꢆ
ꢆꢇꢒꢆ
ꢆ
ꢖꢗꢖꢘꢗ
ꢖꢗꢗꢘꢙ
ꢖꢗꢗꢘꢗ
ꢜꢜꢘꢙ
ꢔꢌ
ꢔꢍ
ꢎꢌ
ꢎꢍ
ꢓꢆꢇꢒꢆ
ꢓꢆꢇꢑꢆ
ꢓꢆꢇ3ꢆ
ꢓꢆꢇꢐꢆ
ꢜꢜꢘꢗ
ꢆꢇꢈ
ꢒ
ꢒꢇꢈ
ꢑ
ꢑꢇꢈ
ꢀ
3
3ꢇꢈ
ꢄꢀꢅ
ꢐ
ꢐꢇꢈ
ꢈ
ꢈꢇꢈ
ꢅ
8
ꢖꢗ ꢖꢚ ꢖꢝ ꢖꢅ ꢖ8 ꢚꢗ ꢚꢚ ꢚꢝ ꢚꢅ ꢚ8
ꢃꢀꢄ
ꢋꢌꢍ ꢋꢔꢌ
ꢍ
ꢔꢌ ꢌꢍ ꢖꢌ ꢎꢍꢍ ꢎꢔꢌ ꢎꢌꢍ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀ
ꢁꢂꢃ
ꢁꢂ
3883 ꢔꢒ8
3883 ꢛꢖꢅ
3883 ꢕꢎꢖ
3883fe
10
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL PERFORMANCE CHARACTERISTICS
VOUT Command INL
VOUT Command DNL
INTVCC Line Regulation
ꢅꢇꢊꢅ
ꢐꢈꢉ
ꢇꢈꢑ
ꢇꢈ3
ꢇꢈꢐ
ꢅꢇꢈꢈ
ꢆꢇꢉꢅ
ꢇꢈꢉ
ꢉꢈꢑ
ꢇꢈꢏ
ꢇ
ꢆꢇꢅꢈ
ꢆꢇꢊꢅ
ꢆꢇꢈꢈ
3ꢇꢉꢅ
3ꢇꢅꢈ
ꢉ
ꢆꢉꢈꢑ
ꢆꢇꢈꢉ
ꢆꢇꢈꢏ
ꢆꢇꢈꢐ
ꢆꢇꢈ3
ꢌꢈ
ꢌꢅ
ꢃꢀꢄ
ꢊꢅ
ꢅ
ꢊꢈ
ꢉꢈꢑ
ꢇ
ꢇꢈꢑ
ꢐ
ꢐꢈꢑ
ꢀ
3
3ꢈꢑ
ꢄꢀꢅ
ꢒ
ꢒꢈꢑ
ꢑ
ꢑꢈꢑ
ꢇꢈꢑ
ꢏ
ꢏꢈꢑ
ꢐ
ꢐꢈꢑ
ꢀ
3
3ꢈꢑ
ꢄꢀꢅ
ꢒ
ꢒꢈꢑ
ꢑ
ꢑꢈꢑ
ꢀ
ꢁꢂꢃ
ꢁꢂꢃ
ꢁꢂ
3883 ꢋꢊꢌ
3883 ꢓꢇꢔ
3883 ꢓꢐꢇ
V
OUT OV Threshold
VOUT OV Threshold
vs Temperature (2V Target)
VOUT OV Threshold
vs Temperature (4V Target)
vs Temperature (1V Target)
ꢑꢎꢍꢑ
ꢑꢎꢍ3
ꢑꢎꢍꢛ
ꢑꢎꢍꢙ
ꢑꢎꢍꢍ
3ꢎꢏꢏ
3ꢎꢏ8
3ꢎꢏꢘ
3ꢎꢏꢐ
ꢒꢏꢍ3
ꢒꢏꢍꢒ
ꢒꢏꢍꢎ
ꢒꢏꢍꢍ
ꢎꢏꢐꢐ
ꢎꢏꢐ8
ꢎꢏꢐꢑ
ꢐꢎꢍꢐꢍ
ꢐꢎꢍꢍꢌ
ꢐꢎꢍꢍꢍ
ꢍꢎꢏꢏꢌ
ꢍꢎꢏꢏꢍ
ꢘꢌ ꢙꢍꢍ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢋꢌꢍ ꢋꢛꢌ
ꢍ
ꢛꢌ ꢌꢍ
ꢙꢛꢌ ꢙꢌꢍ
ꢑꢌ ꢎꢍꢍ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢋꢌꢍ ꢋꢒꢌ
ꢍ
ꢒꢌ ꢌꢍ
ꢎꢒꢌ ꢎꢌꢍ
ꢋꢌꢍ ꢋꢗꢌ
ꢍ
ꢗꢌ ꢌꢍ ꢙꢌ ꢐꢍꢍ ꢐꢗꢌ ꢐꢌꢍ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
3883 ꢚꢛꢑ
3883 ꢙꢒ3
3883 ꢘꢗꢗ
External Temperature Error
vs Temperature
IOUT Error vs IOUT Room
Temperature
IIN Error vs IIN Room Temperature
ꢎꢏꢍ
ꢍꢏ8
8
ꢒ
ꢖ
ꢕ
3
ꢑ
ꢍꢏꢗ
ꢐ
ꢍꢏꢓ
ꢏ
ꢍꢏꢔ
ꢍ
ꢋ
ꢐ
ꢋ
ꢋꢍꢏꢔ
ꢋꢍꢏꢓ
ꢋꢍꢏꢗ
ꢋꢍꢏ8
ꢋꢎꢏꢍ
ꢓꢏ
ꢓꢐ
ꢓꢒ
ꢓ8
ꢔꢐ
ꢔꢑ
ꢔ3
ꢕꢋ
ꢀꢁꢂꢃꢁꢂ ꢄꢁꢅꢅꢆꢇꢂ ꢈꢉꢊ
ꢋ
ꢔ
ꢕꢔ
ꢏꢋ
ꢋꢌꢍ ꢋꢔꢌ
ꢍ
ꢔꢌ
ꢌꢍ
ꢕꢌ ꢎꢍꢍ ꢎꢔꢌ
ꢐ
ꢑ
ꢋ
3
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢄ ꢅꢃꢆꢆꢇꢁꢄ ꢈꢉꢊ
3883 ꢑꢏꢒ
3883 ꢖꢔꢌ
3883 ꢒꢑꢓ
3883fe
11
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL PERFORMANCE CHARACTERISTICS
DC Output Current Matching in a
2-Phase System (LTC3883)
Dynamic Current Sharing During a
Load Transient in a 2-Phase System
Dynamic Current Sharing During a
Load Transient in a 2-Phase System
ꢏꢎ
ꢋ
ꢋ
ꢐ ꢑꢒꢋ
ꢊꢄ
ꢓꢁꢅ
ꢐ ꢑꢔ8ꢋ
f
ꢐ ꢆꢏꢏꢗꢘꢙ
ꢕꢖ
ꢚ ꢐ ꢏꢔꢛꢌꢘ
ꢏꢋ
ꢍꢎ
ꢆꢇ ꢅꢓ ꢑꢆꢇ ꢚꢓꢇꢉ ꢕꢅꢃꢜ
ꢀꢁꢂꢂꢃꢄꢅ
ꢆꢇꢈꢉꢊꢋ
ꢀꢁꢂꢂꢃꢄꢅ
ꢆꢇꢈꢉꢊꢋ
ꢋ
ꢋ
ꢎ ꢏꢐꢋ
ꢊꢄ
ꢑꢁꢅ
ꢎ ꢏꢒ8ꢋ
f
ꢎ ꢆꢕꢕꢖꢗꢘ
ꢓꢔ
ꢙ ꢎ ꢕꢒꢚꢌꢗ
ꢏꢆꢇ ꢅꢑ ꢆꢇ ꢙꢑꢇꢉ ꢓꢅꢃꢛ
ꢍꢋ
ꢎ
3883 ꢜꢐꢝ
3883 ꢎ3ꢏ
ꢆꢌꢍꢈꢉꢊꢋ
ꢆꢌꢍꢈꢉꢊꢋ
ꢄꢌꢂꢈ ꢋ
ꢄꢌꢂꢈ ꢍ
ꢋ
ꢏꢋ
ꢀꢁꢀꢂꢃ ꢄꢅꢆꢆꢇꢈꢀ ꢉꢂꢊ
ꢋ
ꢎ
ꢍꢋ ꢍꢎ
ꢏꢎ 3ꢋ 3ꢎ ꢐꢋ
3883 ꢑꢏ8
PIN FUNCTIONS
IN_SNS
V
(Pin 1): Input Current Sense Comparator Input.
SCL (Pin 6): Serial Bus Clock Input. A pull-up resistor to
The (–) input to the input current comparator is normally
connected to the supply side of the input current sense
resistor through a 100Ω resistor. If the input current
sense amplifier is not used, this pin must be shorted to
3.3V is required in the application.
SDA (Pin 7): Serial Bus Data Input and Output. A pull-up
resistor to 3.3V is required in the application.
ALERT (Pin 8): Open-Drain Digital Output. Connect the
SMBALERT signal to this pin.
the I
and V pins.
IN_SNS
IN
I
(Pin 2): Input Current Sense Comparator Input.
IN_SNS
GPIO (Pin 9): Digital Programmable General Purpose
Inputs and Outputs. Open-drain output.
The (+) input to the input current comparator is normally
connected to the power stage side of the input current
senseresistorthrougha100Ωresistor. Iftheinputcurrent
sense amplifier is not used, this pin must be shorted to
PGOOD(Pin10):DigitalPowerGoodIndicator.Open-drain
output. The PGOOD pin is based on comparator outputs
and may be used for sequencing.
the V
and V pins.
IN_SNS
+
IN
I
(Pin 3): Current Sense Comparator Input. The (+)
RUN (Pin 11): Enable Run Input. Logic high on this pin
enables the controller. This pin requires a resistor pull-
up to 3.3V in the application and should be driven by an
open-drain digital output.
SENSE
input to the current comparator is normally connected
to the DCR sensing network or current sensing resistor.
–
I
(Pin 4): Current Sense Comparator Input. The (–)
SENSE
input is connected to the output.
DNC (Pins 12, 16): Do Not Connect to This Pin.
SYNC (Pin 5): External Clock Synchronization Input and
Open-Drain Output Pin. If an external clock is present at
this pin, the switching frequency will be synchronized to
the external clock. If clock master mode is enabled, this
pin will pull low at the switching frequency with a 500ns
pulsewidthtoground.Aresistorpull-upto3.3Visrequired
in the application.
ASEL (Pin 13): Serial Bus Address Configuration Input.
Connect a 1% resistor divider between the chip V
DD25
ASELandGNDinordertoselectthe4LSBsoftheserialbus
interface address. A resistor divider on ASEL is required
if there are more than one LTC3883 on the same board
to assure the user can independently program each IC. If
the pin is left open, the IC will use the value programmed
in the NVM. Minimize capacitance when the pin is open
to assure accurate detection of the pin state.
3883fe
12
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PIN FUNCTIONS
FREQ_CFG (Pin 14): Frequency or Phase Set/Select Pin.
Connect a 1% resistor divider between the chip V
FREQ_CFGandGNDinordertoselectswitchingfrequency
or phase. If the pin is left open, the IC will use the value
programmed in the NVM. Minimize capacitance when the
pin is open to assure accurate detection of the pin state.
BOOST (Pin 24): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor connects to this pin.
DD25
This pin swings from a diode voltage drop below INTV
CC
up to V + INTV .
IN
CC
PGND(Pin25):PowerGroundPin.Connectthispinclosely
to the source of the bottom N-channel MOSFET, the (–)
V
(Pin 15): Output Voltage Select Pin. Connect a
terminal of C
and the (–) terminal of C .
INTVCC IN
OUT_CFG
1% resistor divider between the chip V
, V
DD25 OUT_CFG
BG (Pin 26): Bottom Gate Driver Output. This pin drives
and SGND in order to select output voltage. This voltage
can be adjusted with the V pins. If the pin is left
open, the IC will use the value programmed in the NVM.
Minimize capacitance when the pin is open to assure ac-
curate detection of the pin state.
the gates of the bottom N-channel MOSFET between
TRIM_CFG
PGND and INTV .
CC
INTV (Pin 27, LTC3883): Internal Regulator 5V Out-
CC
put. The control circuits are powered from this voltage.
Decouple this pin to PGND with a minimum of 4.7μF low
ESR tantalum or ceramic capacitor.
V
(Pin 17): Voltage Trim Select Pin. Connect a
TRIM_CFG
1% resistor divider between the chip V
, V
DD25 TRIM_CFG
EXTV (Pin 27, LTC3883-1): External Regulator 5V
CC
and SGND in order to adjust the output voltage set point.
The V settings in conjunction with the V
input. The control circuits are powered from this voltage.
Decouple this pin to PGND with a minimum of 4.7µF low
ESR tantalum or ceramic capacitor.
TRIM_CFG
OUT_CFG
setting adjusts the voltage set point. If the pin is left open,
the IC will either not modify the V setting or use
OUT_CFG
NVM.Minimizecapacitancewhenthepinisopentoassure
V (Pin28):MainInputSupply.DecouplethispintoPGND
IN
accurate detection of the pin state.
with a capacitor (0.1µF to 1µF). For applications where
the main input power is 5V, tie the V and INTV pins
IN
CC
V
(Pin 18): Internally Generated 2.5V Power Supply
DD25
together. If the input current sense amplifier is not used,
Output. BypassthispintoGNDwithalowESR1μFcapaci-
this pin must be shorted to the V and I pins.
IN_SNS
IN_SNS
tor. Do not load this pin with external current.
I
(Pin 29): Current Control Threshold and Error Ampli-
TH
WP (Pin 19): Write Protect Pin Active High. An internal
fier Compensation Node. The current comparator tripping
10µA current source pulls the pin to V
the PMBus writes are restricted.
. If WP is high,
DD33
threshold increases with the I voltage.
TH
+
V
V
(Pin 30): Positive Voltage Sense Input.
(Pin 31): Negative Voltage Sense Input.
SENSE
SENSE
SHARE_CLK (Pin 20): Share Clock, Bidirectional Open-
Drain Clock Sharing Pin. Nominally 100kHz. Used to syn-
chronizethetimingbetweenmultipleLTC3883s. Tieallthe
SHARE_CLK pins together. All LTC3883s will synchronize
to the fastest clock. An equivalent pull-up resistance of
–
TSNS (Pin 32): External Diode Temperature Sense. Con-
necttotheanodeofadiode-connectedPNPtransistorand
star connect the cathode to GND in order to sense remote
temperature.Ifanexternaltemperaturesenseelementisnot
installed,shortpintogroundandsettheUT_FAULT_LIMIT
to –275°C, set the UT_FAULT_RESPONSE to ignore, and
set IOUT_CAL_GAIN_TC to 0.
5.49k to V
is required.
DD33
V
(Pin 21): Internally Generated 3.3V Power Supply
DD33
Output. BypassthispintoGNDwithalowESR1μFcapaci-
tor. Do not load this pin with external current.
SW (Pin 22): Switch Node Connection to the Inductor.
GND (Exposed Pad Pin 33): Ground. All small-signal and
compensationcomponentsshouldconnecttothisground,
which in turn connects to PGND at one point.
Voltage swings at the pins are from a Schottky diode
(external) voltage drop below ground to V .
IN
TG (Pin 23): Top Gate Driver Output. This is the output of
the floating driver with a voltage swing equal to INTV
superimposed on the switch node voltage.
CC
3883fe
13
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
BLOCK DIAGRAM
R
V
IINSNS
R
VIN
IN
+
V
IN
28
1Ω
C
IN
C
VIN
V
I
IN_SNS
IN_SNS
1
2
5V REG
LTC3883
ONLY
INTV /EXTV (LTC3883-1)
CC
CC
27
INTV /EXTV
CC
CC
V
DD33
21
+
–
3.3V
SUBREG
V
DD33
D
B
BOOST
24
I
IN
S
R
PWM_CLOCK
Q
C
B
TG
23
I
CMP
I
REV
3k
19.5R 38R
–
+
M1
FCNT
+
–
SW
ON
UV
22
+
R
R
SWITCH
LOGIC
AND
ANTI-
SHOOT-
THROUGH
I
SENSE
3
REV
UVLO
SS
–
I
SENSE
4
V
OUT
I
RANGE SELECT
HI: 1:1
LO: 1:1.5
+
LIM
C
RUN
OV
OUT
BG
26
M2
C
INTVCC
25
SLOPE
PGND
COMPENSATION
+
–
–
+
V
STBY
R
R
R
+
–
+
31
INTV
CC
UVLO
1.22V
–
+
–
V
V
REF
SENSE
16-BIT
ADC
–
+
–
8:1
+
AO
ACTIVE
CLAMP
I
DAC
LIM
(3 BITS)
MUX
+
–
+
GND
SENSE
30
1
R
71.1k
I
TH
29
–
+
PWM0
PWM1
–
+
2µA
30µA
–
R
C
+
C
C1
TSNS
32
BURST
EA
UV
OV
TMUX
33
–
–
–
–
–
+
+
+
+
+
GND
9R
2R
GND
0.56V
GND
PHASE DET
5
SYNC
8-BIT
IN_ON
THRESHOLD DAC
12-BIT
SET POINT
DAC
8-BIT
UV
DAC
8-BIT
OV
DAC
V
M2
GND
V
CO
PWM
CLOCK
PHASE SELECTOR
CLOCK DIVIDER
V
DD33
V
DD25
V
V
DD33
SHARE_CLK
WP
20
19
6
2.5V
SUBREG
18
V
DD25
PMBus
INTERFACE
(400kHz
SLAVE
MISO
DD33
COMPARE
SCL
COMPATIBLE)
SDA
7
CLK MOSI
MASTER
MAIN
OSC
(32MHz)
ALERT
3
8
SINC
UVLO
CONTROL
15
17
V
V
OUT_CFG
TRIM_CFG
CONFIG
DETECT
RUN
PGOOD
GPIO
11
10
9
CHANNEL
TIMING
MANAGEMENT
14 FREQ_CFG
13 ASEL
PROGRAM
ROM
RAM
EEPROM
SYNC
3883 F01
Figure 1ꢀ Block Diagram
3883fe
14
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
OVERVIEW
n
n
n
n
n
Average PWM Duty Cycle
TheLTC3883isaconstantfrequency,analogcurrentmode
controller for DC/DC step-down applications with a digital
interface. TheLTC3883digitalinterfaceiscompatiblewith
PMBus which supports bus speeds of up to 400kHz. A
typical application circuit is shown on the first page of this
data sheet. Major features include:
Average Output Voltage
Average Input Voltage
Average Input Current
Configurable, Latched and Unlatched Individual Fault
and Warning Status
n
Programmable Output Voltage
Fault reporting and shutdown behavior are fully configu-
rable using the GPIO output (GPIO). A dedicated pin for
ALERT is provided. The shutdown operation also allows
all faults to be individually masked and can be operated
in either unlatched (hiccup) or latched modes.
n
Programmable Input Voltage Comparator
n
Programmable Current Limit
n
Programmable Switching Frequency
n
Programmable OV and UV Comparators
Individual status commands enable fault reporting over
the serial bus to identify the specific fault event. Fault or
warning detection includes the following:
n
Programmable On and Off Delay Times
n
Programmable Output Rise/Fall Times
n
Output Undervoltage/Overvoltage
n
Phase-LockedLoopforSynchronous,PolyphaseOpera-
tion (2, 3, 4 or 6 Phases)
n
Input Undervoltage/Overvoltage
n
n
Input and Output Overcurrent
Input and Output Voltage/Current, Temperature and
Duty Cycle Telemetry
n
Internal Overtemperature
n
Fully Differential Load Sense
n
External Overtemperature
n
Integrated Gate Drivers
n
Communication, Memory or Logic (CML) Fault
n
Non-Volatile Configuration Memory with ECC
MAIN CONTROL LOOP
n
Optional External Configuration Resistors for Key
Operating Parameters
The LTC3883 is a constant frequency, current mode step-
down controller that operates at a user-defined relative
phasing. During normal operation the top MOSFET is
turnedonwhentheclockforthatchannelsetstheRSlatch,
and turned off when the main current comparator, I
resets the RS latch. The peak inductor current at which
n
Optional Time-Base Interconnect for Synchronization
Between Multiple Controllers
n
Fault Logging
,
CMP
n
WP Pin to Protect Internal Configuration
I
I
resetstheRSlatchiscontrolledbythevoltageonthe
CMP
n
StandaloneOperationAfterUserFactoryConfiguration
pin which is the output of the error amplifier, EA. The
TH
n
PMBus, 400kHz Compliant Interface
EAnegativeterminalisequaltotheV
voltagedivided
SENSE
by5.5(2.75ifrange=1).ThepositiveterminaloftheEAis
connectedtotheoutputofa12-bitDACwithvaluesranging
from0Vto1.024V. Theoutputvoltage, throughfeedback
of the EA, will be regulated to 5.5 times the DAC output
(2.75 times if range = 1). The DAC value is calculated by
the part to synthesize the users desired output voltage.
The output voltage is programmed by the user either
The PMBus interface provides access to important power
management data during system operation including:
n
Internal Controller Temperature
n
External System Temperature via Optional Diode Sense
Elements
n
Average Output Current
3883fe
15
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
with the resistor configuration pins detailed in Tables 12
EEPROM write operations. All EEPROM write operations
will be re-enabled when the die temperature drops below
125°C. (The controller will also disable when the die tem-
perature exceeds the internal overtemperature fault limit.)
and 13 or by the V
command (either from NVM or
OUT
by PMBus command). Refer to the PMBus command
section of the data sheet or the PMBus specification for
more details. The output voltage can be modified by the
user at any time with a PMBus VOUT_COMMAND. This
command will typically have a latency less than 10ms.
The user is encouraged to reference the PMBus Power
SystemManagementProtocolSpecificationtounderstand
how to program the LTC3883. This specification can be
found at http://www.pmbus.org/specs.html.
The degradation in EEPROM retention for temperatures
>125°C can be approximated by calculating the dimen-
sionless acceleration factor using the following equation:
⎡
⎢
⎣
⎤
⎞
⎥
⎟
⎠
⎦
⎛
⎜
⎝
⎛
⎜
⎝
⎞
⎟
⎠
Ea
k
1
1
•
–
T
+273 T
+273
USE
STRESS
AF = e
where:
AF = acceleration factor
Continuing the basic operation description, the current
mode controller will turn off the top gate when the peak
current is reached. If the load current increases, V
SENSE
Ea = activation energy = 1.4eV
will slightly droop with respect to the DAC reference.
–5
K = 8.617 • 10 eV/°K
This causes the I voltage to increase until the average
TH
T
T
= 125°C specified junction temperature
USE
inductor current matches the new load current. After the
top MOSFET has turned off, the bottom MOSFET is turned
on. In continuous conduction mode, the bottom MOSFET
stays on until the end of the switching cycle.
= actual junction temperature in °C
STRESS
Example: Calculate the effect on retention when operating
at a junction temperature of 135°C for 10 hours.
T
T
= 130°C
STRESS
EEPROM
= 125°C
[(1.4/8.617 • 10–5) • (1/398 – 1/403)]
USE
The LTC3883 contains internal EEPROM, also referred
to as NVM (nonvolatile memory) , with Error Correction
Coding (ECC) to store configuration settings and fault log
information.EEPROMenduranceretentionandmasswrite
operationtimearespecifiedintheElectricalCharacteristics
and Absolute Maximum Ratings sections. Write opera-
AF= e
= 1.66
The equivalent operating time at 125°C = 16.6 hours.
Thus the overall retention of the EEPROM was degraded
by 6.6 hours as a result of operating at a junction tempera-
ture of 130°C for 10 hours. The effect of the overstress
is negligible when compared to the overall EEPROM
retention rating of 87,600 hours at a maximum junction
temperature of 125°C.
tions above T = 85°C or below 0°C are possible although
J
the Electrical Characteristics are not guaranteed and the
EEPROM will be degraded. Read operations performed at
temperatures between 85°C and 125°C will not degrade
the EEPROM. Writing to the EEPROM above 85°C will
result in a degradation of retention characteristics. The
faultloggingfunction,whichisusefulindebuggingsystem
problemsthatmayoccurathightemperatures,onlywrites
tofaultlogEEPROMlocations.Ifoccasionalwritestothese
registers occur above 85°C, the slight degradation in the
data retention characteristics of the fault log will not take
away from the usefulness of the function.
POWER UP AND INITIALIZATION
The LTC3883 is designed to provide standalone supply
sequencing and controlled turn-on and turn-off opera-
tion. It operates from a single input supply (4.5V to 24V)
while three on-chip linear regulators generate internal
2.5V, 3.3V and 5V. If V is below 6V, the INTV and V
IN
CC
IN
pins must be tied together. The controller configuration
It is recommended that the EEPROM not be written
when the die temperature is greater than 85°C. If the die
temperature exceeds 130°C, the LTC3883 will disable all
is initialized by an internal threshold based UVLO where
V must be approximately 4V and the 5V, 3.3V and 2.5V
IN
linear regulators must be within approximately 20% of
3883fe
16
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
the regulated values. The LTC3883-1 does not have an
signalusethesametimebase.TheSHARE_CLKpinisheld
internal 5V linear regulator. The EXTV pin is driven by
low until the part has initialized after V is applied. The
CC
IN
an external regulator to improve efficiency of the circuit
LTC3883canbesettoturnoff(orremainoff)ifSHARE_CLK
is low (set bit 2 of MFR_CHAN_CONFIG_LTC3883 to a
1). This allows the user to assure synchronization across
numerous ADI ICs even if the RUN pins can not be con-
nected together due to board constraints. In general, if
the user cares about synchronization between chips it is
best to connect all the respective RUN pins together and
to connect all the respective SHARE_CLK pins together
and minimize power on the LTC3883. The EXTV pin
CC
must exceed approximately 4V before the internal UVLO
is exceeded. To minimize application power, the EXTV
pin can be supplied by a switching regulator.
CC
During initialization, the external configuration resistors
are identified and/or contents of the NVM are read into
the controller’s commands. The BG, TG and RUN pins
are held low. The GPIO pin is in high impedance mode.
The LTC3883 will use the contents of Tables 12 to 15 to
determine the resistor defined parameters. See the Re-
sistor Configuration section for more detail. The resistor
configuration pins only control some of the preset values
of the controller. The remaining values are programmed
in NVM either at the factory or by the user.
and pull up to V
with a 10k resistor. This assures all
DD33
chips begin sequencing at the same time and use the
same time base.
After the RUN pin releases and prior to entering a constant
output voltage regulation state, the LTC3883 performs a
monotonic initial ramp or “soft-start”. Soft-start is per-
formedbyactivelyregulatingtheloadvoltagewhiledigitally
ramping the target voltage from 0V to the commanded
voltageset-point.OncetheLTC3883iscommandedtoturn
on, (after power up and initialization) the controller waits
for the user specified turn-on delay (TON_DELAY) prior
to initiating this output voltage ramp. The rise time of the
voltage ramp can be programmed using the TON_RISE
commandtominimizeinrushcurrentsassociatedwiththe
start-up voltage ramp. The soft-start feature is disabled
by setting the value of TON_RISE to any value less than
0.25ms. The LTC3883 PWM always uses discontinuous
mode during the TON_RISE operation. In discontinuous
mode, the bottom gate is turned off as soon as reverse
current is detected in the inductor. This will allow the
regulator to start up into a pre-biased load. When the
TON_MAX_FAULT_LIMIT is reached, the part transi-
tions to continuous mode or burst, if so programmed. If
TON_MAX_FAULT_LIMIT is set to zero, there is no time
limit and the part transitions to the desired conduction
If the configuration resistors are not inserted or if the
ignoreRCONFIGbitisasserted(bit6oftheMFR_CONFIG_
ALL_LTC3883configurationcommand),theLTC3883will
use only the contents of NVM to determine the DC/DC
characteristics. The ASEL value read at power-up or reset
is always respected unless the pin is open. The ASEL will
use the MSB from NVM and the LSB from the detected
threshold. See the Applications Information section for
more detail.
Aftertheparthasinitialized,anadditionalcomparatormoni-
tors V . The VIN_ON threshold must be exceeded before
IN
theoutputpowersequencingcanbegin.AfterV isinitially
IN
applied, thepartwilltypicallyrequire80mstoinitializeand
begin the TON_DELAY timer if MFR_CONFIG_ALL bit 4
is set to a 0. The time is reduced to approximately 35ms
if MFR_CONFIG_ALL bit 4 is set to a 1. The readback of
voltages and currents may require an additional 80ms.
mode after TON_RISE completes and V
has exceeded
OUT
the VOUT_UV_FAULT_LIMIT and IOUT_OC is not pres-
ent. Setting TON_MAX_FAULT_LIMIT to a value of 0 is
not recommended. This described method of start-up
sequencing is time based.
SOFT-START
The part must enter the run state prior to soft-start. The
run pin is released by the LTC3883 after the part initializes
and V is greater than the VIN_ON threshold. If multiple
IN
LTC3883s are used in an application, they all hold their
SEQUENCING
respective run pins low until all devices initialize and
V exceeds the VIN_ON threshold for every device. The
The default mode for sequencing the output on and off is
timebased.TheoutputisenabledafterwaitingTON_DELAY
3883fe
IN
SHARE_CLK pin assures all the devices connected to the
17
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
amount of time following either the RUN pin going high, a
PMBus command to turn on, or the V pin voltage rising
If the GPIO_FAULT_RESPONSE command is not set to
ignore, the part will latch off and never be able to start.
IN
aboveapreprogrammedvoltage.Offsequencingishandled
in a similar way. To assure proper sequencing, make sure
allICsconnecttheSHARE_CLKpinstogetherandRUNpins
together. IftheRUNpinscannotbeconnectedtogetherfor
some reason, set bit 2 of MFR_CHAN_CONFIG_LTC3883
to a 1. This bit requires the SHARE_CLK pin to be clocking
beforethepowersupplyoutputcanstart.WhentheRUNpin
ispulledlow,theLTC3883willholdthepinlowfortheMFR_
RESTART_DELAY.TheminimumMFR_RESTART_DELAY
isTOFF_DELAY+TOFF_FALL+136ms.Thisdelayassures
proper sequencing of all rails. The LTC3883 calculates
this delay internally and will not process a shorter delay.
However, a longer commanded MFR_RESTART_DELAY
will be used by the part. The maximum allowed value is
65.52 seconds.
If the V
voltage bounces around the UV threshold for
OUT
a long period of time it is possible for the GPIO output
to toggle more than once. To minimize this problem, set
the TON_RISE time under 100ms. If a fault in the string
of rails is detected, only the faulted rail and downstream
rails will fault off. The rails in the string of devices in front
of the faulted rail will remain on unless commanded off.
SHUTDOWN
The LTC3883 supports two shutdown modes. The first
mode is closed-loop shutdown response, with user-
defined turn-off delay (TOFF_DELAY) and ramp down
rate (TOFF_FALL). The controller will maintain the mode
of operation for TOFF_FALL. In discontinuous conduction
mode, the controller will not draw current from the load
and the fall time will be set by the output capacitance and
load current.
VOLTAGE-BASED SEQUENCING
The GPIO pin can be asserted when the UV threshold is
exceeded. It is possible to feed the GPIO pin from one
LTC3883 into the RUN pin of the next LTC3883 in the
sequence. To use the GPIO pin for voltage based sequenc-
ing, set bit 12 of the MFR_GPIO_PROPAGATE_LTC3883
command = 1. Bit 12 is the VOUT_UVUF which is the
deglitched VOUT_UV comparator. Using the deglitched
VOUT_UV fault limit is recommended because there is
little appreciable time delay between the comparator
crossing the UV threshold and the GPIO pin releasing
This can be implemented across multiple LTC3883s. The
VOUT_UVUF has a 250µs minimum pulse width filter.
The other shutdown mode occurs in response to a fault
condition or loss of SHARE_CLK (if bit 2 of MFR_CHAN_
CONFIG_LTC3883 is set to a 1) or V falling below the
IN
VIN_OFF threshold or GPIO pulled low externally (if the
MFR_GPIO_RESPONSE is set to inhibit). Under these
conditions the power stage is disabled in order to stop
the transfer of energy to the load as quickly as possible.
The shutdown state can be entered from the soft-start or
active regulation states either through user intervention
(deasserting RUN or the PMBus OPERATION command)
or in response to a detected fault or an external fault via
the bidirectional GPIO pin, or loss of SHARE_CLK (if bit
2 of MFR_CHAN_CONFIG_LTC3883 is set to a 1) or V
falling below the VIN_OFF threshold.
IN
Voltage Based Sequencing by Cascading GPIOs into RUN Pins
In hiccup mode, the controller responds to a fault by
shutting down and entering the inactive state for a
programmable delay time (MFR_RETRY_DELAY). This
delay minimizes the duty cycle associated with autono-
mous retries if the fault that caused the shutdown disap-
pears once the output is disabled. The retry delay time
is determined by the longer of the MFR_RETRY_DELAY
command or the time required for the regulated output
to decay below 12.5% of the programmed value. If
multiple outputs are controlled by the same GPIO pin,
3883fe
GPIO ꢃ ꢄ
ꢉꢆꢊ
ꢉꢆꢊ
ꢀꢁꢂ3883
ꢀꢁꢂ3883
ꢅꢆꢁꢇꢆꢄꢆꢈ
ꢋꢁꢌꢉꢁ
GPIO ꢃ ꢄ
ꢅꢆꢁꢇꢆꢄꢆꢈ
3883 ꢈꢍꢎ
ꢁꢅ ꢊꢏꢐꢁ ꢂꢑꢌꢊꢊꢏꢀ
ꢒꢊ ꢁꢑꢏ ꢋꢏꢓꢆꢏꢊꢂꢏ
Figure 2ꢀ Event (Voltage) Based Sequencing
18
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
the decay time of the faulted output determines the retry
delay. If the natural decay time of the output is too long,
it is possible to remove the voltage requirement of the
MFR_RETRY_DELAY command by asserting bit 0 of
MFR_CHAN_CONFIG_LTC3883.Alternatively,thecontrol-
lercanbeconfiguredsothatitremainslatched-offfollow-
ing a fault and clearing requires user intervention such
as toggling RUN or commanding the part OFF then ON.
conduction mode may result in reverse inductor current,
which can cause the input supply to boost. The VIN_OV_
FAULT_LIMIT can detect this and turn off the offending
channel. However, this fault is based on an ADC read and
can take up to 80ms to detect. If there is a concern about
the input supply boosting, keep the part in discontinuous
conduction or Burst Mode operation.
If the part is set to Burst Mode operation, as the inductor
average current increases, the controller will automati-
cally modify the operation from Burst Mode operation,
to discontinuous mode to continuous mode.
LIGHT LOAD CURRENT OPERATION
The LTC3883 has three modes of operation including high
efficiency Burst Mode operation, discontinuous conduc-
tion mode or forced continuous conduction mode. Mode
selection is done using the MFR_PWM_MODE_LTC3883
command (discontinuous conduction is always the start-
upmode, forcedcontinuousisthedefaultrunningmode).
SWITCHING FREQUENCY AND PHASE
The switching frequency of the LTC3883’s controller can
be established with internal clock references or with an
external time-base. The LTC3883 can be configured for
an external clock input through the programmed value in
In Burst Mode operation the peak current in the inductor
is set to approximately one-third of the maximum sense
NVM, a PMBus command or setting the R
resistor
BOTTOM
voltage even though the voltage on the I pin indicates a
of the FREQ_CFG pin to 0Ω and the R
to open. The
TH
TOP
lower value. If the average inductor current is higher than
PMBus command FREQUENCY_SWITCH is set to exter-
nal clock. The MFR_PWM_CONFIG_LTC3883 command
determines the relative phasing. The RCONFIG input can
set the relative phasing with respect to the falling edge of
SYNC. The master should be selected to be out of phase
with the slave. The RUN pin must be low before the
FREQUENCY and MFR_PWM_CONFIG_LTC3883 com-
mands can be written to the LTC3883. The relative phas-
ing of all devices in a PolyPhase rail should be optimally
phased. The relative phasing of each rail is 360/n where
n is the number of phases in the rail.
the load current, the error amplifier, EA, will decrease the
voltage on the I pin. When the I voltage drops below
TH
TH
approximately 0.5V, the internal Burst Mode operation as-
serts and both external MOSFETS are turned off. In Burst
Mode operation, the load current is supplied by the output
capacitor. As the output voltage decreases, the EA output
begins to rise. When the output voltage drops sufficiently,
Burst Mode operation is deasserted, and the controller
resumes normal operation by turning on the top external
MOSFET on the next PWM cycle.
If a controller is enabled for Burst Mode operation, the
inductor current is not allowed to reverse. The reverse
If the LTC3883 is configured as the oscillator output on
SYNC,theswitchingfrequencysourcecanbeselectedwith
either external configuration resistors or through serial
busprogramming.TheFREQ_CFGconfigurationresistor
pin can be used to select the FREQUENCY_SWITCH
and MFR_PWM_CONFIG_LTC3883 values as outlined
in Table 14. Otherwise, the FREQUENCY_SWITCH and
MFR_PWM_CONFIG_LTC3883 PMBus commands can
beusedtoselectPWMswitchingfrequencyandthePWM
channel phase relationship. The phase and frequency
relationships are completely independent of each other
providing the numerous application options for the user.
If the LTC3883 is configured to drive the SYNC pin using
3883fe
currentcomparator,I ,turnsoffthebottomgateexternal
REV
MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus,
the controller can operate in discontinuous operation.
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. Thepeakinductorcurrentisdeterminedsolely
by the voltage on the I pin. In this mode, the efficiency
TH
at light loads is lower than in Burst Mode operation. How-
ever, continuous mode exhibits lower output ripple and
less interference with audio circuitry. Forced continuous
19
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
–
theprogrammedFREQUENCY_SWITCHcommandvalue,
the SYNC pin will pull low at the desired clock rate with
500ns low pulse. Care must be taken in the application to
assure the capacitance on SYNC is minimized to assure
the pull-up resistor versus the capacitor load has a low
enough time constant for the application. In addition,
a phase-locked loop (PLL) is available to synchronize
the internal oscillator to an external clock source that is
connected to the SYNC pin. All phase relationships are
between the falling edge of SYNC and the rising edge
of the LTC3883 TG output. Multiple LTC3883s can be
synchronized in order to realize PolyPhase arrays.
the I
pin is placed on the load side of the capacitor.
SENSE
The current sensed from the input is then given by the
expression V /DCR. V is digitized by the LTC3883’s
telemetry ADC with an input range of 128mV, a noise
floor of 7µV , and a peak-peak noise of approximately
46.5µV. The LTC3883 computes the inductor current
using the DCR value stored in the IOUT_CAL_GAIN com-
mand and the temperature coefficient stored in command
MFR_IOUT_CAL_GAIN_TC. The resulting current value is
returned by the READ_IOUT command.
DCR
DCR
RMS
AUTO CALIBRATION
Using a patent pending auto-calibration routine, the
LTC3883 can measure the actual DC resistance for DCR
current sense applications. The measured value is used
in READ_IOUT measurements and eliminates the need
for the user to know the actual resistance of the inductor.
Reference the subsection titled Inductor DCR Calibration
in the Applications Information section for further detail.
OUTPUT VOLTAGE SENSING
The differential amplifier allows remote, differential sens-
ing of the load voltage with V
pins. The telemetry
SENSEn
ADC is fully differential and makes measurements of the
output voltage at the V pins.
SENSEn
OUTPUT CURRENT SENSING
ACCURATE DCR TEMPERATURE COMPENSATION
For DCR current sense applications, a resistor in series
with a capacitor is placed across the inductor. In this
configuration, the resistor is tied to the FET side of the
inductor while the capacitor is tied to the load side of the
inductor as shown in Figure 3. If the RC values are cho-
sen such that the RC time constant matches the inductor
time constant (L/DCR, where DCR is the inductor series
The LTC3883 uses a patent pending algorithm to dy-
namically model the temperature rise from the external
temperature sensor to the inductor core. Refer to the
Accurate DCR Temperature Compensation subsection in
the Applications Information section for complete details.
INPUT CURRENT SENSING
resistance), theresultantvoltage(V )appearingacross
DCR
the capacitor will equal the voltage across the inductor
series resistance and thus represent the current flowing
through the inductor. The RC calculations are based on
the room temperature DCR of the inductor.
TosensethetotalinputcurrentconsumedbytheLTC3883
and the power stage, a resistor is placed between the sup-
ply voltage and the drain of the top N-channel MOSFET.
The V
and I
pins are connected to the sense
IN_SNS
IN_SNS
resistorthrough100Ωfilterresistors.Bothpinsneedtobe
decoupledtoGND.Afiltercapacitorneedstobeconnected
The RC time constant should remain constant, as a func-
tionoftemperature.Thisassuresthetransientresponseof
the circuit is the same regardless of the temperature. The
DCR of the inductor has a large temperature coefficient,
approximately 3900ppm/°C. The temperature coefficient
of the inductor must be written to the MFR_IOUT_CAL_
GAIN_TC command. The external temperature is sensed
neartheinductorandisusedtomodifytheinternalcurrent
across the V
and I
pins. Refer to Figure 25,
IN_SNS
IN_SNS
Low Noise Input Current Sense Circuit for further details.
The filtered voltage is amplified by the internal high side
current sense amplifier and digitized by the LTC3883’s
telemetry ADC. The input current sense amplifier has
three gain settings of 2x, 4x, and 8x set by the bits 5:4 of
the MFR_PWM_MODE command. The maximum input
sense voltage for the three gain settings is 50mV, 20mV,
and 8mV respectively. The LTC3883 computes the input
3883fe
limit circuit to maintain an essentially constant current
+
limit with temperature. In this application, the I
SENSE
pin is connected to the FET side of the capacitor while
20
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
current using the R value stored in the IIN_CAL_GAIN
command. The resulting measured powerstage current
is returned by the READ_IIN command.
pins. Figure 3 illustrates the shared connections required
for load sharing.
The frequency must only be programmed on one of the
LTC3883s. The other(s) must be programmed to External
Clock.
The MFR_READ_IIN_CHAN command returns the calcu-
lated powerstage current based on the READ_IOUT value
multiplied by the READ_DUTY_CYCLE value.
EXTERNAL/INTERNAL TEMPERATURE SENSE
The LTC3883 uses an internal 1Ω sense resistor to mea-
sure the VIN pin supply current being consumed by the
LTC3883.ThisvalueisreturnedbytheMFR_READ_ICHIP
command. Refer to the subsection titled Input Current
Sense Amplifier in the Applications Information section
for further detail.
Externaltemperaturecanbebestmeasuredusingaremote
diode-connected PNP transistor such as the MMBT3906.
The emittershould be connected to the TSNS pin while the
base and collector terminals of the PNP transistor should
be returned to the LTC3883’s GND pin, preferably using
a star connection. It is possible to connect the collector
of the PNP to the source of the bottom MOSFET. This may
optimize board layout allowing the PNP closer proximity
to the power FETs. The base of the PNP must still be tied to
ground.Forbestnoiseimmunity,theconnectionsshouldbe
routeddifferentiallyanda10nFcapacitorshouldbeplaced
LOAD SHARING
Multiple LTC3883’s can be arrayed in order to provide a
balanced load-share solution by bussing the necessary
LTC3883 + POWER STAGE
IN
V
V
POWER STAGE
SUPPLY
+
–
I
I
I
V
V
TH
SENSE
SENSE
100Ω
100Ω
+
–
I
IN_SNS
SENSE
SENSE
V
IN_SNS
CONTROL
SMBALERT
FAULT
PWM CLOCK
SHARE CLOCK
RUN
ALERT
GPIO
SYNC
SHARE_CLK
GND
PGND
LTC3883 + POWER STAGE
IN
I
V
TH
POWER STAGE
+
–
I
I
SENSE
SENSE
100Ω
100Ω
+
–
I
V
V
V
IN_SNS
SENSE
SENSE
IN_SNS
LOAD
RUN
ALERT
GPIO
SYNC
3883 F03
SHARE_CLK
GND
NOTE: SOME CONNECTORS
AND COMPONENTS OMITTED
FOR CLARITY
PGND
Figure 3ꢀ Load Sharing Connections for 2-Phase Operation
3883fe
21
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
RCONFIG (RESISTOR CONFIGURATION) PINS
ꢀꢁꢂꢁ
ꢈꢀꢉ3883
ꢍꢂꢎ
ꢊꢆꢋꢌ
The pins FREQ_CFG, VOUT_CFG and VTRIM_CFG can be
used to select important operating parameters without
programming the configuration EEPROM. Connecting
thesepinstoexternalresistordividersselectstheswitching
frequency, output voltage and basic power management
supervisor parameters. The ASEL pin is used to select the
unique device bus address. Connect this pin to an external
resistor divider to select the device address. Always use
a resistor divider to select the device address. Setting
the device address in EEPROM is allowed, but can create
problems if the device address is somehow lost by the
host. It is safe and prudent to use the ASEL pin to set the
device address. If RCONFIG pins are floated, the value
stored in the corresponding NVM command is used. If
bit 6 of the MFR_CONFIG_ALL_LTC3883 configuration
command is asserted in NVM, the resistor inputs are
ignored upon power-up except for ASEL which is always
respected. The resistor configuration pins are only mea-
sured during a power-up reset or after an MFR_RESET
command is executed.
ꢃꢃꢄꢀ3ꢅꢆꢇ
ꢍꢂꢎ
3883 ꢌꢆꢏ
Figure 4ꢀ Temperature Sense Circuit
in parallel with the diode connected PNP. Two different cur-
rentsareappliedtothediode(nominally2µAand32µA)and
thetemperatureiscalculatedfromthe∆V measurement.
Theexternaltransistortemperatureisdigitizedbythetelem-
etry ADC, and the value is returned by the PMBus READ_
TEMPERATURE_1 command.
BE
The READ_TEMPERATURE_2 command returns the
junction temperature of the LTC3883 using an on-chip
diode. Theslopeoftheexternaltemperaturesensorcanbe
modified with the temperature slope coefficient stored in
MFR_TEMP_1_GAIN. Typical PNPs require temperature
slopeadjustmentsslightlylessthan 1.TheMMBT3906has
a recommended value in this command of approximately
MFR_TEMP_1_GAIN = 0.991 based on the ideality factor
of 1.01. Simply invert the ideality factor to calculate the
MFR_TEMP_1_GAIN. Different manufacturers and differ-
ent lots may have different ideality factors. Consult with
the manufacturer to set this value.
TheV
andV
pinsettingsaredescribedinTables
OUT_CFG
TRIM
12 and 13. These pins select the output voltage for the
LTC3883’s analog PWM controller. If both pins are open,
the VOUT_COMMAND command is loaded from NVM to
determine the output voltage.
Theoffsetoftheexternaltemperaturesensecanbeadjusted
by MFR_TEMP_1_OFFSET. A value of 0 in this command
sets the temperature offset to –273.15°C.
The following parameters are set as a percentage of the
outputvoltageiftheRCONFIGpinsareusedtodetermined
output voltage:
If the PNP cannot be placed in direct contact with the
inductor, the slope or offset can be increased to account
for temperature mismatches. If the user is adjusting the
slope,theinterceptpointisatabsolutezero,–273.15°C,so
small adjustments in slope can change the apparent mea-
sured temperature significantly. Another way to artificially
increase the slope of the temperature term is to increase
the MFR_IOUT_CAL_GAIN_TC term. This will modify the
temperature slope with respect to room temperature.
n
VOUT_OV_FAULT_LIMIT.................................... +10%
n
VOUT_OV_WARN_LIMIT .................................. +7.5%
n
VOUT_MAX....................................................... +7.5%
n
VOUT_MARGIN_HIGH .........................................+5%
n
POWER_GOOD_ON .............................................–7%
n
POWER_GOOD_OFF............................................–8%
n
VOUT_MARGIN_LOW..........................................–5%
n
VOUT_UV_WARN_LIMIT ..................................–6.5%
n
If an external temperature sense element is not used, the
TSNS pin must be shorted to GND. The UT_FAULT_LIMIT
must be set to –275°C, and the UT_FAULT_RESPONSE
must be set to ignore. The user also needs to set the
IOUT_CAL_GAIN_TC to a value of 0.
VOUT_UV_FAULT_LIMIT......................................–7%
TheFREQ_CFGpinsettingsaredescribedinTable14. This
pinselectstheswitchingfrequencyandphaserelationship
between the PWM channel and SYNC pin. To synchronize
toanexternalclock,thepartmustbeputintoexternalclock
3883fe
22
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
n
n
CML Fault (Communication, Memory or Logic)
mode (FREQ_CFG pin shorted to ground). If no external
clock is supplied, the part will clock at the lowest free-
running frequency of the internal PWM oscillator. This low
clock rate will increase the ripple current of the inductor
possibly producing undesirable operation. If the external
SYNC signal is missing or misbehaving, a “PLL Lock Sta-
tus” fault will be indicated in the STATUS_MFR_SPECIFIC
command. IftheuserdoesnotwishtoseethePLL_FAULT
even if there is not a valid synchronization signal at power
up, bit 3 of the MFR_CONFIG_ALL_LTC3883 command
must be asserted. If the SYNC pin is connected between
multiple ICs only one of the ICs can be the oscillator, all
other ICs must be configured to external clock.
External Fault Detection via the Bidirectional GPIO Pin.
In addition, the LTC3883 can map any combination of
fault indicators to the GPIO pin using the propagate GPIO
responsecommands,MFR_GPIO_PROPAGATE_LTC3883.
Typical usage of the GPIO pin is as a driver for an external
crowbar device, overtemperature alert, overvoltage alert
or as an interrupt to cause a microcontroller to poll the
fault commands. Alternatively, the GPIO pin can be used
as an input to detect external faults downstream of the
controller that require an immediate response.
As described in the Soft-Start section, it is possible to con-
trol start-up through concatenated events. If GPIO is used
to drive the RUN pin of another controller, the unfiltered
VOUT_UV fault limit should be mapped to the GPIO pin.
The ASEL pin settings are described in Table 15. This
pin selects the bottom 4 bits of the slave address for the
LTC3883.Thethreemostsignificantbitsareretrievedfrom
the NVM MFR_ADDRESS command. If the pin is floating,
the 7-bit value stored in NVM MFR_ADDRESS command
is used to determine the slave address. For more detail,
refer to Table 15a.
Any fault or warning event will cause the ALERT pin to
assert low. The pin will remain asserted low until the
CLEAR_FAULTS command is issued, the fault bit is
written to a 1 or bias power is cycled or a MFR_RESET
command is issued, or the RUN pin is toggled OFF/ON
or the part is commanded OFF/ON via PMBus. The MFR_
GPIO_PROPAGATE_LTC3883commanddeterminesifthe
GPIO pin is pulled low when a fault is detected; however,
the ALERT pin is always pulled low if a fault or warning is
detected and the status bits are updated.
Note: Per the PMBus specification, pin programmed
parameters can be overridden by commands from the
digital interface with the exception of ASEL which is
always honored. Do not set any part address to 0x5A or
0x5B because these are global addresses and all parts
will respond to them.
Output and input fault event handling is controlled by the
corresponding faultresponsebyte as specifiedinTables 5
to 9. Shutdown recovery from these types of faults can
either be autonomous or latched. For autonomous re-
covery, the faults are not latched, so if the fault condition
is not present after the retry interval has elapsed, a new
soft-start is attempted. If the fault persists, the controller
will continue to retry. The retry interval is specified by the
MFR_RETRY_DELAY command and prevents damage to
the regulator components by repetitive power cycling,
assuming the fault condition itself is not immediately
destructive. The MFR_RETRY_DELAY must be greater
than 120ms. It can not exceed 83.88 seconds.
FAULT DETECTION AND HANDLING
A variety of fault and warning reporting and handling
mechanisms are available. Fault and warning detection
capabilities include:
n
Input OV/FAULT Protection and UV Warning
n
Average Input OC Warn
n
Output OV/UV Fault and Warn Protection
n
Output OC Fault and Warn Protection
n
Internal and External Overtemperature Fault and Warn
Protection
The GPIO pin of the LTC3883 can share faults with all
ADI PMBus products including the LTC3880, LTC2974,
LTC2978,LTC4676µModule,etc.Intheeventofaninternal
n
External Undertemperature Fault and Warn Protection
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
fault, one or more of the LTC3883s is configured to pull
the bussed GPIO pin low. The other LTC3883s are then
configured to shut down when the GPIO pin bus is pulled
low. For autonomous group retry, the faulted LTC3883
is configured to let go of the GPIO pin bus after a retry
interval, assuming the original fault has cleared. All the
LTC3883s in the group then begin a soft-start sequence.
If the fault response is LATCH_OFF, the GPIO pin remains
asserted low until either the RUN pin is toggled OFF/ON or
the part is commanded OFF/ON. The toggling of the RUN
either by the pin or OFF/ON command will clear faults as-
sociated with the LTC3883. If it is desired to have all faults
cleared when either RUN pin is toggled, set bit 0 of MFR_
CONFIG_ALL_LTC3883 to a 1.
See the Applications Information section or contact the
factory for details on efficient in-system EEPROM pro-
gramming, including bulk EEPROM programming, which
the LTC3883 also supports.
SERIAL INTERFACE
The LTC3883 serial interface is a PMBus compliant slave
device and can operate at any frequency between 10kHz
and 400kHz. The address is configurable using either the
NVMoranexternalresistordivider.InadditiontheLTC3883
always responds to the global broadcast address of 0x5A
(7 bit) or 0x5B (7 bit).
Theserialinterfacesupportsthefollowingprotocolsdefined
in the PMBus specifications: 1) send command, 2) write
byte, 3) write word, 4) group, 5) read byte, 6) read word
and 7) read block. All read operations will return a valid
PECifthePMBusmasterrequestsit.IfthePEC_REQUIRED
bit is set in the MFR_CONFIG_ALL_LTC3883 command,
the PMBus write operations will not be acted upon until
a valid PEC has been received by the LTC3883.
The status of all faults and warnings is summarized in the
STATUS_WORD and STATUS_BYTE commands.
Additional fault detection and handling capabilities are:
Internal Memory with CRC and ECC
The LTC3883 contains internal EEPROM with Error Cor-
rection Coding (ECC) to store user configuration settings
and fault log information. EEPROM endurance and reten-
tion are specified in the Absolute Maximum Ratings and
Electrical Characteristics table.
Communication Failure
PEC write errors (if PEC_REQUIRED is active), attempts
to access unsupported commands, or writing invalid data
to supported commands will result in a CML fault. The
CML bit is set in the STATUS_BYTE and STATUS_WORD
commands, the appropriate bit is set in the STATUS_CML
command, and the ALERT pin is pulled low.
The integrity of the NVM memory is checked with a
CRC calculation each time its data is to be read, such
as after a power-on reset. A CRC failure will prevent the
controller from leaving the inactive state. If a CRC failure
occurs, the CML bit is set in the STATUS_BYTE and
STATUS_WORD commands, the appropriate bit is set in
theSTATUS_MFR_SPECIFICcommand,andtheALERTand
RUN pins will be pulled low. At that point the device will
respond at special address 0x7C, which is only activated
after an invalid CRC has been detected. The chip will also
respond to global addresses 0x5A and 0x5B, but all ADI
PSM chips will respond to these addresses so users must
be careful when using global addresses. NVM repair can
be attempted by writing the desired configuration to the
controller and executing a STORE_USER_ALL command
followed by a CLEAR_FAULTS command. Contact the
factory if EEPROM repair is unsuccessful.
DEVICE ADDRESSING
TheLTC3883offersfourdifferenttypesofaddressingover
the PMBus interface, specifically: 1) global, 2) device, 3)
rail addressing and 4) alert response address (ARA).
Global addressing provides a means of the PMBus master
to address all LTC3883 devices on the bus. The LTC3883
globaladdressisfixed0x5A(7bit)or0xB4(8bit)andcan-
not be disabled.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
Device addressing provides the standard means of the
PMBus master communicating with a single instance
of an LTC3883. The value of the device address is set
by a combination of the ASEL configuration pin and the
MFR_ADDRESS command. Device addressing can be
disabled by writing a value of 0x80 to the MFR_ADDRESS.
OV/UV and OC can be done immediately or after a user
selectable deglitch time.
Output Overvoltage Fault Response
A programmable overvoltage comparator (OV) guards
against transient overshoots as well as long-term over-
voltages at the output. In such cases, the top MOSFET is
turned off and the bottom MOSFET is turned on until the
overvoltage condition is cleared regardless of the PMBus
VOUT_OV_FAULT_RESPONSEcommandbytevalue.This
hardware level fault response delay is typically 2µs from
the overvoltage condition to BG asserted high. Using the
VOUT_OV_FAULT_RESPONSE command, the user can
select any of the following behaviors:
Rail addressing provides a means of the PMBus master
addressing a set of LTC3883s connected to the same
output rail, simultaneously. This is similar to global ad-
dressing,however,thePMBusaddresscanbedynamically
assigned by using the MFR_RAIL_ADDRESS command.
It is recommended that rail addressing should be limited
to command write operations.
All four means of PMBus addressing require the user to
employdisciplinedplanningtoavoidaddressingconflicts.
n
OV Pull-Down Only (OV cannot be ignored)
n
Shut Down (Stop Switching) Immediately—Latch Off
RESPONSES TO V
AND I
FAULTS
n
OUT
OUT
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
V
OVandUVconditionsaremonitoredbycomparators.
OUT
The OV and UV limits are set in three ways.
Either the Latch Off or Retry fault responses can be de-
glitched in increments of (0-7) • 10µs. See Table 5.
n
n
n
As a Percentage of the V
figuration Pins
if Using the Resistor Con-
OUT
Output Undervoltage Response
In NVM if Either Programmed at the Factory or Through
the GUI
The response to an undervoltage comparator output can
be either:
By PMBus Command
n
Ignore
The I and I
overcurrent monitors are performed by
IN
OUT
n
Shut Down Immediately—Latch Off
ADC readings and calculations. Thus these values are
n
based on average currents and can have a time latency of
up to 80ms. The I
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
calculation accounts for the sense
OUT
resistorandthetemperaturecoefficientoftheresistor.The
input channel current is equal to the sum of output current
times the PWM duty cycle plus the input offset current
for each channel. If this calculated input current exceed
the IN_OC_WARN_LIMIT the ALERT pin is pulled low and
the IIN_OC_WARN bit is asserted in the STATUS_INPUT
command.
The UV responses can be deglitched. See Table 6.
Peak Output Overcurrent Fault Response
Due to the current mode control algorithm, peak output
current across the inductor is always limited on a cycle by
cycle basis. The value of the peak current limit is specified
in sense voltage in the EC table. The current limit circuit
The digital processor within the LTC3883 provides the
ability to ignore the fault, shut down and latch off or shut
down and retry indefinitely (hiccup). The retry interval
is set in MFR_RETRY_DELAY and can be from 120ms
to 83.88 seconds in 1ms increments. The shutdown for
operatesbylimitingtheI maximumvoltage.IfDCRsens-
TH
ing is used, the I maximum voltage has a temperature
TH
dependency directly proportional to the TC of the DCR
of the inductor. The LTC3883 automatically monitors the
3883fe
25
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
external temperature sensors and modifies the maximum
RESPONSES TO V OV FAULTS
IN
allowed I to compensate for this term.
TH
V overvoltageismeasuredwiththeMUX’dADC;therefore,
IN
The overcurrent fault processing circuitry can execute the
following behaviors:
the response is naturally deglitched by the 80ms typical
response time of the ADC. The fault responses are:
n
n
Current Limit Indefinitely
Ignore
n
n
Shut Down Immediately—Latch Off
Shut Down Immediately—Latch Off
n
n
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
Theovercurrentresponsescanbedeglitchedinincrements
of (0-7) • 16ms. See Table 7
See Table 9.
RESPONSES TO OT/UT FAULTS
RESPONSES TO TIMING FAULTS
Overtemperature Fault Response—Internal
TON_MAX_FAULT_LIMIT is the time allowed for V
to
OUT
An internal temperature sensor protects against NVM
damage.Above85°C,nowritestoNVMarerecommended.
Above 130°C, the part disables the NVM and does not re-
enableuntiltheinternaltemperaturehasdroppedto125°C.
The LTC3883 sets bit 7 of the STATUS_TEMPERATURE
command (‘OT Warn’) above 130°C, and this bit cannot
be cleared until the internal temperature has dropped to
125°C. Above 160°C, the LTC3883 disables the PWM and
does not re-enable the PWM until the internal temperature
has dropped to 150°C. The part sets bit 6 of the STATUS_
TEMPERATURE command (‘OT Fault’) above 160°C, and
thisbitcannotbecleareduntiltheinternaltemperaturehas
dropped to 150°C. Temperature is measured by the ADC.
Internal temperature faults cannot be ignored. Internal
temperature limits cannot be adjusted by the user.
rise and settle at start-up. The TON_MAX_FAULT_LIMIT
condition is predicated upon detection of the VOUT_UV_
FAULT_LIMIT asthe outputisundergoinga SOFT_START
sequence. The TON_MAX_FAULT_LIMIT time is started
after TON_DELAY has been reached and a SOFT_START
sequence is started. The resolution of the TON_MAX_
FAULT_LIMIT is 10µs. If the VOUT_UV_FAULT_LIMIT
is not reached within the TON_MAX_FAULT_LIMIT time,
the response of this fault is determined by the value of
the TON_MAX_FAULT_RESPONSE command value. This
response may be one of the following:
n
Ignore
n
Shut Down (Stop Switching) Immediately—Latch Off
n
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
See Table 9.
This fault response is not deglitched. A value of 0 in
TON_MAX_FAULT_LIMIT means the fault is ignored. The
TON_MAX_FAULT_LIMIT should be set longer than the
TON_RISE time. It is recommended TON_MAX_FAULT_
LIMIT always be set to a non-zero value, otherwise the
outputmaynevercomeupandnoflagwillbesettotheuser.
Overtemperature and Undertemperature
Fault Response—Externals
An external temperature sensors can be used to sense
critical circuit elements like the inductor and power
MOSFETs. The OT_FAULT_RESPONSE and UT_FAULT_
RESPOSE commands are used to determine the appropri-
ateresponsetoanovertemperatureandundertemperature
condition,respectively.Ifnoexternalsenseelementisused
(not recommended) set the UT_FAULT_RESPONSE to
ignore and set the UT_FAULT_LIMIT to –275°C.
See Table 9.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
The fault responses are:
this command re-enables the fault log feature. Before
re-enabling fault log, be sure no faults are present and a
CLEAR_FAULTS command has been issued.
n
Ignore
n
Shut Down Immediately—Latch Off
When the LTC3883 powers-up, it checks the NVM for a
valid fault log. If a valid fault log exists in NVM, the “Valid
Fault Log” bit in the STATUS_MFR_SPECIFIC command
will be set and an ALERT event will be generated. Also,
fault logging will be blocked until the LTC3883 has
received a MFR_FAULT_LOG_CLEAR command before
fault logging will be re-enabled.
n
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
See Table 9.
RESPONSES TO INPUT OVERCURRENT AND OUTPUT
UNDERCURRENT FAULTS
Input overcurrent and output undercurrent are measured
with the MUX’d ADC. Both of these measurements are
naturally deglitched by the 80ms typical response time
of the ADC. The fault responses are:
The information is stored in EEPROM in the event of
any fault that disables the controller. The GPIO pin being
externally pulled low will not trigger a fault logging event.
n
BUS TIMEOUT FAILURE
Ignore
n
Shut Down Immediately—Latch Off
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
TheLTC3883implementsatimeoutfeaturetoavoidhang-
ing the serial interface. The data packet timer begins at the
first START event before the device address write byte.
Datapacketinformationmustbecompletedwithin20msor
the LTC3883 will three-state the bus and ignore the given
data packet. Data packet information includes the device
address byte write, command byte, repeat start event
(if a read operation), device address byte read (if a read
operation), all data bytes and the PEC byte if applicable.
n
See Table 9.
RESPONSES TO EXTERNAL FAULTS
When the GPIO pin is pulled low, the OTHER bit is set in
the STATUS_WORD command, the appropriate bit is set
in the STATUS_MFR_SPECIFC command, and the ALERT
pin is pulled low. Responses are not deglitched. The
LTC3883 can be configured to ignore or shut down then
retry in response to its GPIO pin going low by modifying
theMFR_GPIO_RESPONSEcommand.ToavoidtheALERT
pin asserting low when GPIO is pulled low, assert bit 1 of
MFR_CHAN_CONFIG_LTC3883.
The LTC3883 allows longer PMBus timeouts for block
read data packets. This timeout is proportional to the
length of the block read. The additional block read timeout
applies primarily to the MFR_FAULT_LOG command. In
no circumstances will the timeout period be less than the
t
specification of 32ms (typical).
TIMEOUT_SMB
The user is encouraged to use as high a clock rate as
possibletomaintainefficientdatapackettransferbetween
all devices sharing the serial bus interface. The LTC3883
supports the full PMBus frequency range from 10kHz to
400kHz.
FAULT LOGGING
The LTC3883 has fault logging capability. Data is logged
into memory in the order shown in Table 11. The data is
stored in a continuously updated buffer in RAM. When a
fault event occurs, the fault log buffer is copied from the
RAM buffer into NVM. Fault logging is allowed at tempera-
tures above 85°C; however, retention of 10 years is not
guaranteed. When the die temperature exceeds 130°C,
the fault logging is delayed until the die temperature drops
below 120°C. The fault log data remains in NVM until a
MFR_FAULT_LOG_CLEAR command is issued. Issuing
2
SIMILARITY BETWEEN PMBUS, SMBUS AND I C
2-WIRE INTERFACE
The PMBus 2-wire interface is an incremental extension
2
of the SMBus. SMBus is built upon I C with some minor
differences in timing, DC parameters and protocol. The
PMBus/SMBus protocols are more robust than simple
3883fe
27
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
OPERATION
I C byte commands because PMBus/SMBus provide
time-outs to prevent bus hangs and optional packet er-
ror checking (PEC) to ensure data integrity. In general, a
master device that can be configured for I C communica-
2
The LTC3883 is a slave device. The master can com-
municate with the LTC3883 using the following formats:
n
Master transmitter, slave receiver
2
n
Master receiver, slave transmitter
tion can be used for PMBus communication with little or
no change to hardware or firmware. Repeat start (restart)
The following PMBus protocols are supported:
2
is not supported by all I C controllers but is required for
2
n
Write Byte, Write Word, Send Byte
SMBus/PMBus reads. If a general purpose I C controller
is used, check that repeat start is supported.
n
Read Byte, Read Word, Block Read
The LTC3883 supports the maximum SMBus clock
speed of 100kHz and is compatible with the higher speed
PMBus specification (between 100kHz and 400kHz) if
clockstretchingisenabled.Forrobustcommunicationand
operationrefertotheNotesectioninthePMBuscommand
summary. Clock stretching is enabled by asserting bit 1
of MFR_CONFIG_ALL_LTC3883.
n
Alert Response Address
Figures 7-16 illustrate the aforementioned PMBus proto-
cols. All transactions supportPEC(parity error check)and
GCP(groupcommandprotocol).TheBlockReadsupports
255 bytes of returned data. For this reason, the PMBus
timeout may be extended when reading the fault log.
For a description of the minor extensions and exceptions
PMBus makes to SMBus, refer to PMBus Specification
Part 1 Revision 1.1: Paragraph 5: Transport.
ꢘ
ꢐ
ꢘ
ꢘ
ꢂ
ꢚ
8
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ꢂ
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ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢊꢋ
ꢅꢂꢇꢂ ꢈꢉꢇꢄ
ꢌ
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ꢀꢇꢂꢆꢇ ꢑꢒꢓꢅꢔꢇꢔꢒꢓ
For a description of the differences between SMBus and
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ꢆꢄꢌꢄꢂꢇꢄꢅ ꢀꢇꢂꢆꢇ ꢑꢒꢓꢅꢔꢇꢔꢒꢓ
2
I C, refer to System Management Bus (SMBus) Speci-
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ꢊꢋ ꢊꢆꢔꢇꢄ ꢖꢈꢔꢇ ꢃꢂꢁꢗꢄ ꢒꢍ ꢎꢙ
fication Version 2.0: Appendix B—Differences Between
2
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SMBus and I C.
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ꢍꢒꢆ ꢂꢓ ꢂꢑꢝ ꢒꢆ ꢘ ꢍꢒꢆ ꢂ ꢓꢂꢑꢝꢙ
PMBUS SERIAL DIGITAL INTERFACE
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ꢀꢇꢒꢌ ꢑꢒꢓꢅꢔꢇꢔꢒꢓ
ꢌꢄꢑ ꢌꢂꢑꢝꢄꢇ ꢄꢆꢆꢒꢆ ꢑꢒꢅꢄ
ꢟꢂꢀꢇꢄꢆ ꢇꢒ ꢀꢁꢂꢃꢄ
TheLTC3883communicateswithahost(master)usingthe
standardPMBusserialbusinterface.TheTimingDiagram,
Figure 5, shows the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources are required on these lines.
ꢀꢁꢂꢃꢄ ꢇꢒ ꢟꢂꢀꢇꢄꢆ
ꢠꢠꢠ
ꢑꢒꢓꢇꢔꢓꢗꢂꢇꢔꢒꢓ ꢒꢍ ꢌꢆꢒꢇꢒꢑꢒꢁ
3883 ꢍꢎꢏ
Figure 6ꢀ PMBus Packet Protocol Diagram Element Key
ꢀꢁꢂ
ꢅ
ꢔ
ꢅ
ꢀꢊꢇꢁꢂꢈꢉ
ꢅ
ꢅ
ꢀꢍ
ꢅ
ꢔ
ꢆꢁꢇꢀꢁꢂꢉ
ꢅ
ꢅ
ꢅ
ꢅ
f
ꢎꢊꢏ
f
ꢄꢋꢌ
ꢀꢃꢄ
ꢅ
ꢅ
ꢅ
ꢀꢊꢇꢀꢈꢋꢉ
ꢆꢁꢇꢀꢈꢂꢉ
ꢀꢊꢇꢀꢈꢂꢉ
ꢅ
ꢅ
ꢆꢒꢕꢆ
ꢆꢁꢇꢁꢂꢈꢉ
3883 ꢏꢖꢗ
ꢀꢈꢂꢐꢈ
ꢃꢋꢑꢁꢒꢈꢒꢋꢑ
ꢐꢓꢍꢓꢂꢈꢓꢁ ꢀꢈꢂꢐꢈ
ꢃꢋꢑꢁꢒꢈꢒꢋꢑ
ꢀꢈꢋꢍ
ꢀꢈꢂꢐꢈ
ꢃꢋꢑꢁꢒꢈꢒꢋꢑ ꢃꢋꢑꢁꢒꢈꢒꢋꢑ
Figure 5ꢀ Timing Diagram
3883fe
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LTC3883/LTC3883-1
OPERATION
Figure 6 is a key to the protocol diagrams in this section.
PEC is optional.
the slave receiver) the master transmitter becomes a
master receiver and the slave receiver becomes a slave
transmitter.
A value shown below a field in the following figures is a
mandatory value for that field.
n
Combined format. During a change of direction within
a transfer, the master repeats both a start condition and
the slave address but with the R/W bit reversed. In this
case, the master receiver terminates the transfer by
generating a NACK on the last byte of the transfer and
a STOP condition.
The data formats implemented by PMBus are:
n
Master transmitter transmits to slave receiver. The
transfer direction in this case is not changed.
n
Master reads slave immediately after the first byte. At
the moment of the first acknowledgment (provided by
Examples of these formats are shown in Figures 7-16.
Table 1ꢀ Data Format Terminology
FOR MORE DETAIL REFER TO
PMBus
TERMINOLOGY FOR: SPECS,
ABBREVIATIONS FOR
THE DATA FORMAT SECTION
OF TABLE 2
TERMINOLOGY
MEANING
Linear
GUI, APPLICATION NOTES
SUMMARY COMMAND TABLE
Linear
Linear_5s_11s
L11
L16
Page 35
Page 35
Linear (for Voltage
Related Commands)
Linear
Linear_16u
Direct
Direct-Manufacturer
Customized
DirectMfr
CF
Page 35
Hex
Hex
ASCII
Reg
I16
ASC
Reg
ASCII
Register Fields
ꢔ
ꢓ
ꢔ
ꢔ
8
ꢔ
8
ꢔ
ꢔ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢎꢏ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢅꢂꢋꢂ ꢌꢍꢋꢄ
ꢂ
ꢐ
3883 ꢑꢒꢓ
Figure 7ꢀ Write Byte Protocol
ꢔ
ꢓ
ꢔ
ꢔ
8
ꢔ
8
ꢔ
8
ꢔ
ꢔ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢎꢏ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢅꢂꢋꢂ ꢌꢍꢋꢄ ꢁꢈꢎ
ꢂ
ꢅꢂꢋꢂ ꢌꢍꢋꢄ ꢕꢖꢗꢕ
ꢂ
ꢐ
3883 ꢑꢒ8
Figure 8ꢀ Write Word Protocol
ꢕ
ꢔ
ꢕ
ꢕ
8
ꢕ
8
ꢕ
8
ꢕ
ꢕ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢎꢏ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢅꢂꢋꢂ ꢌꢍꢋꢄ
ꢂ
ꢐꢄꢇ
ꢂ
ꢐ
3883 ꢑꢒꢓ
Figure 9ꢀ Write Byte Protocol with PEC
ꢒ
ꢔ
ꢒ
ꢒ
8
ꢒ
8
ꢒ
8
ꢒ
8
ꢒ
ꢒ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢎꢏ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢅꢂꢋꢂ ꢌꢍꢋꢄ ꢁꢈꢎ
ꢂ
ꢅꢂꢋꢂ ꢌꢍꢋꢄ ꢕꢖꢗꢕ
ꢂ
ꢐꢄꢇ
ꢂ
ꢐ
3883 ꢑꢒꢓ
Figure 10ꢀ Write Word Protocol with PEC
3883fe
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LTC3883/LTC3883-1
OPERATION
ꢋ
ꢌ
ꢋ
ꢋ
8
ꢋ
ꢋ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢇꢈ
ꢂ
ꢍꢎꢏꢏꢂꢐꢅ ꢍꢎꢅꢄ
ꢂ
ꢉ
3883 ꢊꢋꢋ
Figure 11ꢀ Send Byte Protocol
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
8
ꢏ
ꢏ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢌꢍ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢋꢄꢇ
ꢂ
ꢋ
3883 ꢎꢏꢐ
Figure 12ꢀ Send Byte Protocol with PEC
ꢏ
ꢐ
ꢏ
ꢏ
8
ꢏ
ꢏ
ꢐ
ꢏ
ꢏ
8
ꢏ
8
ꢏ
ꢏ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢋꢌ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢆꢗ
ꢂ
ꢅꢂꢑꢂ ꢒꢓꢑꢄ ꢁꢈꢋ
ꢂ
ꢅꢂꢑꢂ ꢒꢓꢑꢄ ꢔꢕꢖꢔ
ꢂ
ꢍ
3883 ꢎꢏ3
Figure 13ꢀ Read Word Protocol
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
8
ꢏ
8
ꢏ
ꢏ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢋꢌ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢆꢘ
ꢂ
ꢅꢂꢒꢂ ꢓꢔꢒꢄ ꢁꢈꢋ
ꢂ
ꢅꢂꢒꢂ ꢓꢔꢒꢄ ꢕꢖꢗꢕ
ꢂ
ꢍꢄꢇ
ꢂ
ꢍ
3883 ꢎꢏꢐ
Figure 14ꢀ Read Word Protocol with PEC
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
ꢏ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢋꢌ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢆꢕ
ꢂ
ꢅꢂꢒꢂ ꢓꢔꢒꢄ
ꢂ
ꢍ
3883 ꢎꢏꢐ
Figure 15ꢀ Read Byte Protocol
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
ꢏ
ꢑ
ꢏ
ꢏ
8
ꢏ
ꢏ
ꢏ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢋꢌ
ꢂ
ꢇꢈꢉꢉꢂꢊꢅ ꢇꢈꢅꢄ
ꢂ
ꢀ
ꢀꢁꢂꢃꢄ ꢂꢅꢅꢆꢄꢀꢀ ꢆꢕ
ꢂ
ꢅꢂꢒꢂ ꢓꢔꢒꢄ
ꢂ
ꢍꢄꢇ
ꢂ
ꢍ
3883 ꢎꢏꢐ
Figure 16ꢀ Read Byte Protocol with PEC
Refer to Figure 6 for a legend.
Handshaking features are included to ensure robust
system communication. Please refer to the PMBus Com-
munication and Command Processing subsection of the
Applications Information section for further details.
3883fe
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LTC3883/LTC3883-1
PMBus COMMAND SUMMARY
PMBUS COMMANDS
implicitlynotsupportedbythemanufacturer.Attemptingto
access non-supported or reserved commands may result
in a CML command fault event. All output voltage settings
ThefollowingtableslistsupportedPMBuscommandsand
manufacturerspecificcommands.Acompletedescription
of these commands can be found in the “PMBus Power
System Mgt Protocol Specification – Part II – Revision
1.1”. Usersareencouragedtoreferencethisspecification.
Exceptions or manufacturer specific implementations
are listed below in Table 2. Floating point values listed
in the “DEFAULT VALUE” column are either Linear 16-bit
Signed (PMBus Section 8.3.1) or Linear_5s_11s (PMBus
Section 7.1)format,whicheverisappropriateforthecom-
mand. All commands from 0xD0 through 0xFF not listed
in this table are implicitly reserved by the manufacturer.
Users should avoid blind writes within this range of com-
mands to avoid undesired operation of the part. All com-
mands from 0x00 through 0xCF not listed in this table are
and measurements are based on the VOUT_MODE setting
–12
of 0x14. This translates to an exponent of 2
.
IfPMBuscommandsarereceivedfasterthantheyarebeing
processed, the part may become too busy to handle new
commands. In these circumstances the part follows the
protocols defined in the PMBus Specification v1.1, Part II,
Section 10.8.7, to communicate that it is busy. The part
includes handshaking features to eliminate busy errors
andsimplifyerrorhandlingsoftwarewhileensuringrobust
communication and system behavior. Please refer to the
subsection titled PMBus Communication and Command
Processing in the Applications Information section for
further details.
Table 2ꢀ Summary (Note: The Data Format abbreviations are detailed at the end of this tableꢀ)
CMD
DATA
FORMAT UNITS
DEFAULT
VALUE
COMMAND NAME
CODE DESCRIPTION
TYPE
NVM
PAGE
PAGE
0x00 Provides integration with multi-page PMBus
devices.
R/W Byte
Reg
Reg
Reg
0x00
0x80
0x1E
64
OPERATION
0x01 Operating mode control. On/off, margin high and R/W Byte
margin low.
Y
Y
67
66
ON_OFF_CONFIG
0x02 RUN pin and PMBus bus on/off command
configuration.
R/W Byte
CLEAR_FAULTS
0x03 Clear any fault bits that have been set.
Send Byte
R/W Byte
NA
92
64
WRITE_PROTECT
0x10 Level of protection provided by the device
against accidental changes.
Reg
Y
0x00
STORE_USER_ALL
RESTORE_USER_ALL
CAPABILITY
0x15 Store user operating memory to EEPROM.
Send Byte
Send Byte
R Byte
NA
NA
100
101
91
0x16 Restore user operating memory from EEPROM.
0x19 Summary of PMBus optional communication
protocols supported by this device.
Reg
Reg
0xB0
–12
–12
VOUT_MODE
0x20 Output voltage format and exponent (2 ).
R Byte
2
71
73
72
72
73
80
70
0x14
VOUT_COMMAND
VOUT_MAX
0x21 Nominal output voltage set point.
R/W Word
R/W Word
R/W Word
R/W Word
R/W Word
R/W Word
L16
L16
L16
L16
L11
L11
V
V
Y
Y
Y
Y
Y
Y
1.0
0x1000
0x24 Upper limit on the commanded output voltage
including VOUT_MARIN_HIGH.
5.5
0x5800
VOUT_MARGIN_HIGH
VOUT_MARGIN_LOW
0x25 Margin high output voltage set point. Must be
greater than VOUT_COMMAND.
V
1.05
0x10CD
0x26 Margin low output voltage set point. Must be
less than VOUT_COMMAND.
V
0.95
0x0F33
VOUT_TRANSITION_RATE 0X27 Rate the output changes when VOUT
commanded to a new value.
V/ms
kHz
0.25
AA00
FREQUENCY_SWITCH
0x33 Switching frequency of the controller.
350
0xFABC
3883fe
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PMBus COMMAND SUMMARY
CMD
DATA
FORMAT UNITS
DEFAULT
VALUE
COMMAND NAME
CODE DESCRIPTION
TYPE
NVM
PAGE
VIN_ON
0x35 Input voltage at which the unit should start
power conversion.
R/W Word
L11
L11
L11
V
Y
6.5
71
0xCB40
VIN_OFF
0x36 Input voltage at which the unit should stop
power conversion.
R/W Word
V
Y
Y
6.0
0xCB00
71
74
IOUT_CAL_GAIN
0x38 The ratio of the voltage at the current sense pins R/W Word
to the sensed current. For devices using a fixed
current sense resistor, it is the resistance value
in mΩ.
mΩ
1.8
0xBB9A
VOUT_OV_FAULT_LIMIT
0x40 Output overvoltage fault limit.
R/W Word
R/W Byte
R/W Word
R/W Word
R/W Word
R/W Byte
R/W Word
R/W Byte
R/W Word
R/W Word
L16
Reg
L16
L16
L16
Reg
L11
Reg
L11
L11
Reg
L11
L11
Reg
L11
Reg
L11
L11
L16
L16
L11
V
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
1.1
72
83
72
73
73
84
77
86
77
79
87
79
79
88
70
82
70
78
73
74
80
0x119A
VOUT_OV_FAULT_
RESPONSE
0x41 Action to be taken by the device when an output
overvoltage fault is detected.
0xB8
VOUT_OV_WARN_LIMIT
VOUT_UV_WARN_LIMIT
VOUT_UV_FAULT_LIMIT
0x42 Output overvoltage warning limit.
0x43 Output undervoltage warning limit.
0x44 Output undervoltage fault limit.
V
V
V
1.075
0x1133
0.925
0x0ECD
0.9
0x0E66
VOUT_UV_FAULT_
RESPONSE
0x45 Action to be taken by the device when an output
undervoltage fault is detected.
0xB8
IOUT_OC_FAULT_LIMIT
0x46 Output overcurrent fault limit.
A
29.75
0xDBB8
IOUT_OC_FAULT_
RESPONSE
0x47 Action to be taken by the device when an output
overcurrent fault is detected.
0x00
IOUT_OC_WARN_LIMIT
0x4A Output overcurrent warning limit.
A
C
20.0
0xDA80
OT_FAULT_LIMIT
0x4F External overtemperature fault limit.
100.0
0xEB20
OT_FAULT_RESPONSE
OT_WARN_LIMIT
0x50 Action to be taken by the device when an external R/W Byte
overtemperature fault is detected,
0xB8
0x51 External overtemperature warning limit.
R/W Word
C
C
85.0
0xEAA8
UT_FAULT_LIMIT
0x53 External undertemperature fault limit.
R/W Word
–40.0
0xE580
UT_FAULT_RESPONSE
VIN_OV_FAULT_LIMIT
0x54 Action to be taken by the device when an external R/W Byte
undertemperature fault is detected.
0xB8
0x55 Input supply overvoltage fault limit.
R/W Word
R/W Byte
R/W Word
R/W Word
R/W Word
R/W Word
R/W Word
V
15.5
0xD3E0
VIN_OV_FAULT_
RESPONSE
0x56 Action to be taken by the device when an input
overvoltage fault is detected.
0x80
VIN_UV_WARN_LIMIT
IIN_OC_WARN_LIMIT
POWER_GOOD_ON
POWER_GOOD_OFF
TON_DELAY
0x58 Input supply undervoltage warning limit.
V
A
6.3
0xCB26
0x5D Input supply overcurrent warning limit.
10.0
0xD280
0x5E Output voltage at or above which a power good
should be asserted.
V
0.93
0x0EE1
0x5F Output voltage at or below which a power good
should be de-asserted.
V
0.92
0x0EB8
0x60 Time from RUN and/or Operation on to output
rail turn-on.
ms
0.0
0x8000
3883fe
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PMBus COMMAND SUMMARY
CMD
DATA
FORMAT UNITS
DEFAULT
VALUE
COMMAND NAME
CODE DESCRIPTION
TYPE
NVM
PAGE
TON_RISE
0x61 Time from when the output starts to rise until the R/W Word
L11
ms
Y
8.0
0xD200
80
output voltage reaches the VOUT commanded
value.
TON_MAX_FAULT_LIMIT 0x62 Maximum time from V
on for VOUT to
R/W Word
R/W Byte
L11
Reg
L11
L11
L11
ms
Y
Y
Y
Y
Y
10.00
80
85
81
81
81
OUT_EN
cross the VOUT_UV_FAULT_LIMIT.
0xD280
TON_MAX_FAULT_
RESPONSE
0x63 Action to be taken by the device when a TON_
MAX_FAULT event is detected.
0xB8
TOFF_DELAY
0x64 Time from RUN and/or Operation off to the start R/W Word
of TOFF_FALL ramp.
ms
ms
ms
0.0
0x8000
TOFF_FALL
0x65 Time from when the output starts to fall until the R/W Word
output reaches zero volts.
8.00
0xD200
TOFF_MAX_WARN_LIMIT 0x66 Maximum allowed time, after TOFF_FALL
completed, for the unit to decay below 12.5%.
R/W Word
150
0xF258
STATUS_BYTE
STATUS_WORD
STATUS_VOUT
STATUS_IOUT
STATUS_INPUT
0x78 One byte summary of the unit’s fault condition.
0x79 Two byte summary of the unit’s fault condition.
0x7A Output voltage fault and warning status.
0x7B Output current fault and warning status.
0x7C Input supply fault and warning status.
R/W Byte
R/W Word
R/W Byte
R/W Byte
R/W Byte
Reg
Reg
Reg
Reg
Reg
Reg
NA
NA
NA
NA
NA
NA
92
92
93
93
93
94
STATUS_TEMPERATURE 0x7D External temperature fault and warning status for R/W Byte
READ_TEMERATURE_1.
STATUS_CML
0x7E Communication and memory fault and warning
status.
R/W Byte
Reg
NA
94
STATUS_MFR_SPECIFIC
READ_VIN
0x80 Manufacturer specific fault and state information. R/W Byte
Reg
L11
L11
L16
L11
L11
NA
NA
NA
NA
NA
NA
94
98
98
98
98
98
0x88 Measured input supply voltage.
0x89 Measured input supply current.
0x8B Measured output voltage.
0x8C Measured output current.
R Word
R Word
R Word
R Word
R Word
V
A
V
A
C
READ_IIN
READ_VOUT
READ_IOUT
READ_TEMPERATURE_1 0x8D External diode junction temperature. This is the
value used for all temperature related processing,
including IOUT_CAL_GAIN.
READ_TEMPERATURE_2
0x8E Internal junction temperature. Does not affect
any other commands.
R Word
L11
C
NA
98
READ_DUTY_CYCLE
READ_POUT
0x94 Duty cycle of the top gate control signal.
0x96 Calculated output power.
R Word
R Word
R Word
R Byte
L11
L11
L11
Reg
%
W
W
NA
NA
98
99
99
91
READ_PIN
0x97 Calculated input power
NA
PMBus_REVISION
0x98 PMBus revision supported by this device.
Current revision is 1.1.
FS
0x11
MFR_ID
0x99 The manufacturer ID of the LTC3883 in ASCII.
0x9A Manufacturer part number in ASCII.
R String
R String
R Word
ASC
ASC
L16
LTC
91
91
74
MFR_MODEL
MFR_VOUT_MAX
LTC3883
0xA5 Maximum allowed voltage command including
VOUT_OV_FAULT_LIMIT.
V
5.5
0x5800
USER_DATA_00
0xB0 OEM RESERVED. Typically used for part
serialization.
R/W Word
Reg
Y
NA
90
USER_DATA_01
USER_DATA_02
0xB1 Manufacturer reserved for LTpowerPlay.
R/W Word
R/W Word
Reg
Reg
Y
Y
NA
NA
90
90
0xB2 OEM RESERVED. Typically used for part
serialization
USER_DATA_03
0xB3 An NVM word available for the user.
R/W Word
Reg
Y
0x0000
90
3883fe
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PMBus COMMAND SUMMARY
CMD
DATA
DEFAULT
VALUE
COMMAND NAME
USER_DATA_04
MFR_INFO
CODE DESCRIPTION
TYPE
R/W Word
R Word
R Word
FORMAT UNITS
NVM
PAGE
90
0xB4 An NVM word available for the user.
0xB6 Manufacturing Specific Information
Reg
Reg
Y
0x0000
NA
96
MFR_T_SELF_HEAT
0xB8 Reports the calculated self heat value attributed
to the inductor.
L11
L11
L11
Reg
Reg
Reg
C
NA
75
–1
MFR_IOUT_CAL_GAIN_
TAU_INV
0xB9 Coefficient used to emulate thermal time
constant.
R/W Word
R/W Word
R/W Byte
s
Y
Y
0.0
0x8000
75
75
MFR_IOUT_CAL_GAIN_
THETA
0xBA Used to calculate the instance inductor self
heating effect.
C/Watt
0.0
0x8000
MFR_EE_UNLOCK
MFR_EE_ERASE
MFR_EE_DATA
0xBD Unlock user EEPROM for access by MFR_EE_
ERASE and MFR_EE_DATA commands.
NA
NA
NA
105
106
106
0xBE Initialize user EEPROM for bulk programming by R/W Byte
MFR_EE_DATA.
0xBF Data transferred to and from EEPROM using
sequential PMBus word reads or writes.
Supports bulk programming.
R/W Word
MFR_CHAN_CONFIG_
LTC3883
0xD0 Configuration bits that are channel specific.
R/W Byte
R/W Byte
R/W Word
R/W Byte
R/W Byte
R Byte
Reg
Reg
Reg
Reg
Reg
Reg
L11
L11
L11
L16
L11
L11
Y
Y
Y
Y
Y
0x1F
0x09
0x2993
0xD2
0xC0
0xC0
NA
65
66
89
68
90
87
99
82
82
99
99
99
MFR_CONFIG_ALL_
LTC3883
0xD1 General configuration bit.
MFR_GPIO_PROPAGATE_ 0xD2 Configuration that determines which faults are
LTC3883
propagated to the GPIO pin.
MFR_PWM_MODE_
LTC3883
0xD4 Configuration for the PWM engine.
MFR_GPIO_RESPONSE
0xD5 Action to be taken by the device when the GPIO
pin is externally asserted low.
MFR_OT_FAULT_
RESPONSE
0xD6 Action to be taken by the device when an internal
overtemperature fault is detected.
MFR_IOUT_PEAK
MFR_RETRY_DELAY
MFR_RESTART_DELAY
MFR_VOUT_PEAK
MFR_VIN_PEAK
0xD7 Report the maximum measured value of READ_
IOUT since last MFR_CLEAR_PEAKS.
R Word
A
ms
ms
V
0xDB Retry interval during FAULT retry mode.
R/W Word
R/W Word
R Word
Y
Y
350
0xFABC
0xDC Minimum time the RUN pin is held low by the
LTC3883.
500
0xFBE8
0xDD Maximum measured value of READ_VOUT since
last MFR_CLEAR_PEAKS.
NA
NA
NA
0xDE Maximum measured value of READ_VIN since
last MFR_CLEAR_PEAKS.
R Word
V
MFR_TEMPERATURE_1_ 0xDF Maximum measured value of external
PEAK
R Word
C
Temperature (READ_TEMPERATURE_1) since
last MFR_CLEAR_PEAKS.
MFR_READ_IIN_PEAK
0xE1 Maximum measured value of READ_IIN
command since last MFR_CLEAR_PEAKS
R Word
L11
A
A
NA
99
MFR_CLEAR_PEAKS
MFR_READ_ICHIP
MFR_PADS
0xE3 Clears all peak values.
Send Byte
R Word
NA
NA
92
100
95
0xE4 Measured supply current of the LTC3883
0xE5 Digital status of the I/O pads.
L11
Reg
Reg
Reg
L11
R Word
NA
2
MFR_ADDRESS
0xE6 Sets the 7-bit I C address byte.
R/W Byte
R Word
Y
Y
0x4F
0x430X
65
MFR_SPECIAL_ID
MFR_IIN_CAL_GAIN
0xE7 Manufacturer code representing the LTC3883
91
0xE8 The resistance value of the input current sense
element in mΩ.
R/W Word
mΩ
5
78
0xCA80
3883fe
34
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND SUMMARY
CMD
DATA
FORMAT UNITS
DEFAULT
VALUE
COMMAND NAME
CODE DESCRIPTION
TYPE
NVM
PAGE
MFR_FAULT_LOG_STORE 0xEA Command a transfer of the fault log from RAM to Send Byte
EEPROM. This causes the part to behave as if a
NA
102
channel has faulted off.
MFR_FAULT_LOG_CLEAR 0xEC Initialize the EEPROM block reserved for fault
Send Byte
NA
105
logging and clear any previous fault logging
locks.
MFR_READ_IIN_CHAN
MFR_FAULT_LOG
MFR_COMMON
0xED Calculated input current based upon READ_IOUT
and DUTY_CYCLE.
R Word
R Block
R Byte
L11
Reg
Reg
A
NA
NA
100
102
95
0xEE Fault log data bytes. This sequentially retrieved
data is used to assemble a complete fault log.
Y
0xEF Manufacturer status bits that are common across
multiple ADI chips.
NA
MFR_COMPARE_USER_
ALL
0xF0 Compares current command contents with NVM. Send Byte
NA
101
100
69
MFR_TEMPERATURE_2_ 0xF4 Peak internal die temperature since last MFR_
PEAK
R Word
R/W Byte
R/W Word
L11
Reg
CF
C
NA
CLEAR_PEAKS.
MFR_PWM_CONFIG_
LTC3883
0xF5 Set numerous parameters for the DC/DC
controller including phasing.
Y
Y
Y
Y
Y
Y
0x10
MFR_IOUT_CAL_GAIN_TC 0xF6 Temperature coefficient of the current sensing
element.
ppm/°C
mΩ
3900
0x0F3C
74
MFR_RVIN
0xF7 The resistance value of the V pin filter element R/W Word
L11
CF
3000
0x12EE
71
IN
in mΩ.
MFR_TEMP_1_GAIN
MFR_TEMP_1_OFFSET
MFR_RAIL_ADDRESS
MFR_RESET
0xF8 Sets the slope of the external temperature sensor. R/W Word
1.0
0x4000
78
0xF9 Sets the offset of the external temperature
sensor with respect to –273.1°C
R/W Word
R/W Byte
Send Byte
L11
Reg
C
0.0
0x8000
79
0xFA Common address for PolyPhase outputs to
adjust common parameters.
0x80
NA
65
0xFD Commanded reset without requiring a power
down.
68
Note 1: Commands indicated with Y indicate that these commands are
stored and restored using the STORE_USER_ALL and RESTORE_USER_
ALL commands, respectively.
Note 4: Some of the unpublished commands are read-only and will
generate a CML bit 6 fault if written.
Note 5: Writing to commands not published in this table is not permitted.
Note 2: Commands with a default value of NA indicate “not applicable”.
Commands with a default value of FS indicate “factory set on a per part
basis”.
Note 3: The LTC3883 contains additional commands not listed in this
table. Reading these commands is harmless to the operation of the IC;
however, the contents and meaning of these commands can change
without notice.
Note 6: The user should not assume compatibility of commands
between different parts based upon command names. Always refer to
the manufacturer’s data sheet for each part for a complete definition of a
command’s function.
ADI has made every reasonable attempt to keep command functionality
compatible between parts; however, differences may occur to address
product requirements.
3883fe
35
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND SUMMARY
*DATA FORMAT
L11 Linear_5s_11s
PMBus data field b[15:0]
N
Value = Y • 2
where N = b[15:11] is a 5-bit two’s complement integer and Y = b[10:0] is an 11-bit
two’s complement integer
Example:
For b[15:0] = 0x9807 = ‘b10011_000_0000_0111
–13
–6
Value = 7 • 2 = 854 • 10
From “PMBus Spec Part II: Paragraph 7.1”
L16 Linear_16u
PMBus data field b[15:0]
N
Value = Y • 2
where Y = b[15:0] is an unsigned integer and N = Vout_mode_parameter is a 5-bit two’s
complement exponent that is hardwired to –12 decimal
Example:
For b[15:0] = 0x4C00 = ‘b0100_1100_0000_0000
–12
Value = 19456 • 2 = 4.75
From “PMBus Spec Part II: Paragraph 8.2”
Reg Register
PMBus data field b[15:0] or b[7:0].
Bit field meaning is defined in detailed PMBus Command Description.
I16 Integer Word
PMBus data field b[15:0]
Value = Y
where Y = b[15:0] is a 16 bit unsigned integer
Example:
For b[15:0] = 0x9807 = ‘b1001_1000_0000_0111
Value = 38919 (decimal)
CF Custom Format
ASC ASCII Format
Value is defined in detailed PMBus Command Description.
This is often an unsigned or two’s complement integer scaled by an MFR specific
constant.
A variable length string of text characters conforming to ISO/IEC 8859-1 standard.
3883fe
36
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
inductors or sense resistors, but at the expense of cur-
rent limit accuracy. Keep in mind this operation is on a
cycle-by-cycle basis and is only a function of the peak
inductorcurrent.Theaverageinductorcurrentismonitored
by the ADC converter and can provide a warning if too
much average output current is detected. The overcurrent
fault is detected when the ITH voltage hits the maximum
value. The digital processor within the LTC3883 provides
theabilitytoeitherignorethefault, shutdownandlatchoff
or shut down and retry indefinitely (hiccup). Refer to the
overcurrentportionoftheOperationsectionformoredetail.
TheTypicalApplicationonthebackpageisabasicLTC3883
application circuit. The LTC3883 can be configured to use
either DCR (inductor resistance) sensing or low value
resistor sensing. The choice between the two current
sensing schemes is largely a design trade-off between
cost, power consumption and accuracy. DCR sensing
is becoming popular because it saves expensive current
sensing resistors and is more power efficient, especially
in high current applications. The LTC3883 can nominally
accountforthetemperaturedependencyoftheDCRsensing
element. The accuracy of the current reading and current
limit are typically limited by the accuracy of the DCR resis-
tor (accounted for in the IOUT_CAL_GAIN parameter of
the LTC3883). Thus current sensing resistors provide the
most accurate current sense and limiting for the applica-
tion. Other external component selection is driven by the
+
–
I
AND I
PINS
SENSE
SENSE
+
–
The I
and I
pins are the inputs to the current
SENSE
SENSE
comparatorandtheA/D. Thecommonmodeinputvoltage
range of the current comparators is 0V to 5.5V. Both the
SENSE pins are high impedance inputs with small base
load requirement, and begins with the selection of R
SENSE
(if R
is used) and inductor value. Next, the power
SENSE
currents typically less than 1µA. When the I
pin volt-
SENSE
MOSFETs are selected. Then the input and output capaci-
tors are selected. Finally the current limit is selected. All of
thesecomponentsandrangesarerequiredtobedetermined
priortocalculatingtheexternalcompensationcomponents.
The current limit range is required because the two ranges
(25mV to 50mV vs 37.5mV to 75mV) have different EA
gains set with bit 7 of the MFR_PWM_MODE_LTC3883
command. The voltage RANGE bit also modifies the loop
gain and impacts the compensation network set with bits
5, 6ofMFR_PWM_CONFIG_LTC3883. Allotherprogram-
mable parameters do not affect the loop gain, allowing
parameters to be modified without impact to the transient
response to load.
agesarebetween0Vand1.4V,thesmallbasecurrentsflow
out of the SENSE pins. When the I pin voltages are
SENSE
greater than 1.4V, the base currents flow into the I
SENSE
pins. The high impedance inputs to the current compara-
tors allow accurate DCR sensing. Do not float these pins
during normal operation.
Filter components mutual to the I
lines should be
SENSE
placed close to the IC. The positive and negative traces
should be routed differentially and Kelvin connected to
the current sense element, see Figure 17. A non-Kelvin
connection elsewhere can add parasitic inductance and
capacitance to the current sense element, degrading
the information at the sense terminals and making the
programmed current limit unpredictable. In a PolyPhase
system,poorplacementofthesensingelementwillresultin
sub-optimalcurrentsharingbetweenpowerstages.IfDCR
sensing is used (Figure 18a), sense resistor R1 should be
placed close to the switching node to prevent noise from
coupling into sensitive small-signal nodes. The capacitor
CURRENT LIMIT PROGRAMMING
The LTC3883 has two ranges of current limit programming
and a total of eight levels within each range. Refer to the
IOUT_OC_FAULT_LIMITsectionofthePMBuscommands.
Within each range the error amp gain is fixed, resulting in
constant loop gain. The LTC3883 will account for the DCR
oftheinductorandautomaticallyupdatethecurrentlimitas
the inductor temperature changes. The temperature coef-
ficientoftheDCRisstoredintheMFR_IOUT_TCcommand.
ꢃꢁ ꢄꢅꢆꢄꢅ ꢇꢈꢉꢃꢅꢊꢋ
ꢆꢅꢌꢃ ꢃꢁ ꢃꢍꢅ ꢀꢁꢆꢃꢊꢁꢉꢉꢅꢊ
ꢀ
ꢁꢂꢃ
For the best current limit accuracy, use the 75mV setting.
The 25mV setting will allow for the use of very low DCR
ꢈꢆꢎꢂꢀꢃꢁꢊ ꢁꢊ ꢊ
3883 ꢇꢏꢐ
ꢄꢅꢆꢄꢅ
Figure 17ꢀ Optimal Sense Line Placement
3883fe
37
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
C1 should be placed close to the IC pins. This impedance
difference can result in loss of accuracy in the current
reading of the ADC. The current reading accuracy can be
improved by matching the impedance of the two pins. To
The current comparator has a maximum threshold
determined by the I setting. The input
V
SENSE(MAX)
LIMIT
common mode range of the current comparator is 0V to
5.5V (if V is greater than 6V). The current comparator
IN
accomplish this add a series resistor between V
SENSE
be placed in parallel with this resistor. If the peak voltage
is <75mV at room temperature, R2 is not required.
and
threshold sets the peak of the inductor current, yielding
OUT
–
I
equal to R1. A capacitor of 1µF or greater should
a maximum average output current I
equal to the
MAX
peak value less half the peak-to-peak ripple current ∆I .
L
To calculate the sense resistor value, use the equation:
V
SENSE(MAX)
R
=
LOW VALUE RESISTOR CURRENT SENSING
SENSE
∆I
L
I
+
MAX
A typical sensing circuit using a discrete resistor is shown
2
in Figure 18b. R
output current.
is chosen based on the required
SENSE
Due to possible PCB noise in the current sensing loop, the
AC current sensing ripple of ∆V = ∆I • R also
SENSE
L
SENSE
ꢀ
ꢁꢂ
needs to be checked in the design to get a good signal-to-
ꢀ
ꢁꢂꢃꢀ
ꢁꢂ
ꢄꢄ
noise ratio. In general, for a reasonably good PCB layout,
a 15mV minimum ∆V
voltage is recommended as
ꢅꢆꢆꢇꢃ
ꢃꢈ
SENSE
ꢁꢂꢋꢕꢄꢃꢆꢑ
ꢋꢄꢑ
a conservative number to start with, either for R
DCR sensing applications.
or
SENSE
ꢍ
ꢇꢉ
ꢀ
ꢆꢕꢃ
ꢍꢃꢄ3883
ꢅꢈ
For previous generation current mode controllers, the
maximum sense voltage was high enough (e.g., 75mV for
theLTC1628/LTC3728family)thatthevoltagedropacross
the parasitic inductance of the sense resistor represented
a relatively small error. In the new highest current density
solutions; however, the value of the sense resistor can be
less than 1mΩ and the peak sense voltage can be less than
20mV.Inaddition,inductorripplecurrentsgreaterthan50%
with operation up to 1MHz are becoming more common.
Under these conditions, the voltage drop across the sense
resistor’s parasitic inductance is no longer negligible. A
typical sensing circuit using a discrete resistor is shown in
Figure 18b. In previous generations of controllers, a small
RC filter placed near the IC was commonly used to reduce
the effects of the capacitive and inductive noise coupled
in the sense traces on the PCB. A typical filter consists of
two series 100Ω resistors connected to a parallel 1000pF
capacitor, resulting in a time constant of 200ns.
ꢄꢖ
ꢊꢈꢂꢋ
ꢗꢐꢘꢙ
ꢑꢐ
ꢄꢐꢌ ꢑꢖ
ꢒ
ꢁ
ꢁ
ꢇꢏꢂꢇꢏ
ꢑ3
ꢔ
ꢇꢏꢂꢇꢏ
ꢇꢈꢂꢋ
ꢆꢊꢃꢁꢆꢂꢎꢍ
ꢖ • ꢍ
3883 ꢙꢐ8ꢚ
ꢛꢜꢑꢐꢒ ꢑ3ꢝꢞꢞꢑꢖꢟ • ꢄꢐ ꢠ
ꢋꢄꢑ
ꢑꢖ
ꢁꢆꢕꢃꢡꢄꢎꢍꢡꢈꢎꢁꢂ ꢠ ꢋꢄꢑ •
ꢢ ꢑ3 ꢠ ꢑꢐ
ꢑꢐ ꢒ ꢑꢖ ꢒ ꢑ3
ꢔ
ꢒ
ꢌꢊꢍꢎꢄꢏ ꢄꢐ ꢂꢏꢎꢑ ꢇꢏꢂꢇꢏ ꢓ ꢇꢏꢂꢇꢏ ꢊꢁꢂꢇ
Figure 18aꢀ Inductor DCR Current Sense Circuit
V
IN
INTV
V
CC
IN
SENSE RESISTOR
PLUS PARASITIC
INDUCTANCE
BOOST
TG
R
ESL
SW
S
V
OUT
LTC3883
BG
C • 2 ≤ ESL/R
F
RF
S
POLE-ZERO
PGND
CANCELLATION
This same RC filter with minor modifications, can be
used to extract the resistive component of the current
sense signal in the presence of parasitic inductance. For
example,Figure19illustratesthevoltagewaveformacross
a 2mΩ resistor with a 2010 footprint. The waveform is
the superposition of a purely resistive component and a
3883fe
R
R
F
F
+
I
I
SENSE
C
F
–
SENSE
SGND
FILTER COMPONENTS
PLACED NEAR SENSE PINS
3883 F018b
Figure 18bꢀ Resistor Current Sense Circuit
38
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
purely inductive component. It was measured using two
scope probes and waveform math to obtain a differential
measurement. Based on additional measurements of the
INDUCTOR DCR CURRENT SENSING
For applications requiring the highest possible efficiency
at high load currents, the LTC3883 is capable of sensing
the voltage drop across the inductor DCR, as shown in
Figure 18a. The DCR of the inductor represents the small
amount of DC winding resistance of the copper, which
can be less than 1mΩ for today’s low value, high current
inductors. In a high current application requiring such an
inductor, conduction loss through a sense resistor would
cost a few points of efficiency compared to DCR sensing.
inductor ripple current and the on-time, t , and off-time,
ON
t
, ofthetopswitch, thevalueoftheparasiticinductance
was determined to be 0.5nH using the equation:
OFF
V
t
t
• t
ESL(STEP)
ON OFF
ESL =
•
(1)
∆I
+ t
L
ON
OFF
If the RC time constant is chosen to be close to the para-
sitic inductance divided by the sense resistor (L/R), the
resultantwaveformlooksresistive, asshowninFigure 20.
For applications using low maximum sense voltages,
check the sense resistor manufacturer’s data sheet for
information about parasitic inductance. In the absence of
data, measure the voltage drop directly across the sense
resistor to extract the magnitude of the ESL step and use
Equation1todeterminetheESL.However,donotoverfilter
the signal. Keep the RC time constant less than or equal to
the inductor time constant to maintain a sufficient ripple
If the external (R1 + R3)||R2 • C1 time constant is chosen
to be exactly equal to the L/DCR time constant, assuming
R1=R3, thevoltagedropacrosstheexternalcapacitor,C1,
is equal to the drop across the inductor DCR multiplied by
R2/(R1+R2+R3). R2 scales the voltage across the sense
terminals for applications where the DCR is greater than
the target sense resistor value. The DCR value is entered
as the IOUT_CAL_GAIN in mΩ unless R2 is required. If
R2 is used:
R2
voltage on V
for optimal operation of the current
RSENSE
loop controller.
IOUT _ CAL _ GAIN = DCR •
R1+R2+R3
If there is no need to attenuate the signal, R2 can be
removed. To properly dimension the external filter com-
ponents, the DCR of the inductor must be known. It
can be measured using an accurate RLC meter, but the
DCR tolerance is not always the same and varies with
temperature. Consult the manufacturers’ data sheets
for detailed information. The LTC3883 will account for
temperature variation if the correct parameter is entered
into the MFR_IOUT_CAL_GAIN_TC command. Typically
the resistance has a 3900ppm/°C coefficient.
ꢇ
ꢈꢉꢊꢈꢉ
ꢋꢁꢌꢇꢄꢅꢆꢇ
ꢇ
ꢉꢈꢐꢑꢈꢒꢉꢓꢔ
3883 ꢍꢎꢏ
ꢀꢁꢁꢂꢃꢄꢅꢆꢇ
Figure 19ꢀ Voltage Measured Directly Across RSENSE
C2 can be optimized for a flat frequency response, assum-
ing R1 = R3 by the following equation:
2
C2 = [2R1 • R2 • C1-L/DCR • (2R1+R2)]/R1
Using the inductor ripple current value from the Inductor
ValueCalculationsection,thetargetsenseresistorvalueis:
ꢇ
ꢈꢉꢊꢈꢉ
ꢋꢁꢌꢇꢄꢅꢆꢇ
V
SENSE(MAX)
R
=
SENSE(EQUIV)
∆I
L
I
+
MAX
3883 ꢍꢋꢁ
2
ꢀꢁꢁꢂꢃꢄꢅꢆꢇ
Figure 20ꢀ Voltage Measured After the RSENSE Filter
3883fe
39
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
To ensure that the application will deliver full load current
over the full operating temperature range, be sure to pick
mode will improve the converter efficiency at light loads
regardless of the current sensing method.
the optimum I
value accounting for errors in the DCR
LIMIT
To maintain a good signal-to-noise ratio for the current
versus the MFR_IOUT_CAL_GAIN parameter entered.
sense signal, use a minimum ∆V
of 10mV to 15mV.
SENSE
Next, determine the DCR of the inductor. Where provided,
use the manufacturer’s maximum value, usually given
at 20°C. Increase this value to account for errors in the
temperature sensing element of 3°C to 5°C and any
additional errors associated with the proximity of the
temperature sensor element to the inductor.
For a DCR sensing application, the actual ripple voltage
will be determined by the equation:
V – V
V
OUT
IN
OUT
∆V
=
•
SENSE
R1• C1
V • f
IN
OSC
SLOPE COMPENSATION AND INDUCTOR PEAK
CURRENT
C1 is usually selected to be in the range of 0.047µF to
4.7µF. This forces (R1 + R3)||R2 to be approximately 2k.
Adding optional elements R3 and C2 shown in Figure 18a
will minimize offset errors associated with the ISNS leak-
age currents. Set R3 equal to the value of R1. Set C2 to a
value of 1µF or greater to ensure adequate noise filtering.
Slope compensation provides stability in constant
frequency current mode architectures by preventing
sub-harmonic oscillations at high duty cycles. This is
accomplished internally by adding a compensation ramp
to the inductor current signal at duty cycles in excess of
35%.TheLTC3883usesapatentedcurrentlimittechnique
that counteracts the compensating ramp. This allows the
maximum inductor peak current to remain unaffected
throughout all duty cycles.
The equivalent resistance (R1 + R3)||R2 is scaled to the
room temperature inductance and maximum DCR:
2•L
R1+ R3 ||R2 =
(
)
DCR at 20°C • C1
The sense resistor values are:
INDUCTOR VALUE CALCULATION
R1 R2
R1•RD
Given the desired input and output voltages, the inductor
R1= R3; R1=
; R2 =
value and operating frequency, f , directly determine
RD
1– RD
OSC
the inductor peak-to-peak ripple current:
The maximum power loss in R1 is related to the duty
cycle, and will occur in continuous mode at the maximum
input voltage:
V
V – V
IN
OUT
(
)
OUT
I
=
RIPPLE
V • f
• L
IN
OSC
V
– V
• V
(
R1=
)
IN(MAX)
OUT OUT
P
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors, and output voltage
ripple. Thus, highestefficiencyoperationisobtainedatthe
lowest frequency with a small ripple current. Achieving
this, however, requires a large inductor.
LOSS
R1
Ensure that R1 has a power rating higher than this value.
If high efficiency is necessary at light loads, consider this
power loss when deciding whether to use DCR sensing or
sense resistors. Light load power loss can be modestly
higher with a DCR network than with a sense resistor
due to the extra switching losses incurred through R1.
However, DCR sensing eliminates a sense resistor, reduc-
ing conduction losses and provides higher efficiency at
heavy loads. Peak efficiency is about the same with either
method.SelectingBurstModeoperationordiscontinuous
A reasonable starting point is to choose a ripple current
that is about 40% of I . Note that the largest ripple
OUT(MAX)
current occurs at the highest input voltage. To guarantee
that the ripple current does not exceed a specified maxi-
mum, the inductor should be chosen according to:
V
V – V
IN
OUT
(
)
OUT
L ≥
V • f
•I
IN
RIPPLE
OSC
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APPLICATIONS INFORMATION
INDUCTOR CORE SELECTION
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Once the inductor value is determined, the type of induc-
tor must be selected. Core loss is independent of core
size for a fixed inductor value, but it is very dependent
on inductance. As the inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses increase.
V
OUT
Main Switch Duty Cycle =
V
IN
V – V
IN
OUT
Synchronous Switch Duty Cycle =
V
IN
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core materials saturate hard, which means that the induc-
tance collapse abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
The MOSFET power dissipations at maximum output
current are given by:
V
2
OUT
P
=
I
(
1+ d R
+
) (
)
MAIN
MAX
DS(ON)
V
IN
⎛
⎞
I
2
MAX
V
R
C
•
(
)
⎜
⎟
(
)
(
DR
)
IN
MILLER
⎝
⎠
2
⎡
⎢
⎢
⎤
1
1
⎥
+
• f
OSC
V
– V
V
POWER MOSFET AND SCHOTTKY DIODE (OPTIONAL)
SELECTION
⎥
⎦
TH(MIN)
TH(MIN)
⎣ INTVCC
Two external power MOSFETs must be selected for each
controller in the LTC3883: one N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for
the bottom (synchronous) switch.
V – V
2
IN
OUT
P
=
I
1+ d R
DS(ON)
(
) (
)
MAX
SYNC
V
IN
where d is the temperature dependency of R
and
DS(ON)
R
(approximately 2Ω) is the effective driver resistance
DR
The peak-to-peak drive levels are set by the INTV volt-
CC
at the MOSFET’s Miller threshold voltage. V
typical MOSFET minimum threshold voltage.
is the
TH(MIN)
age. This voltage is typically 5V. Consequently, logic-level
threshold MOSFETs must be used in most applications.
2
The only exception is if low input voltage is expected (V
BothMOSFETshaveI RlosseswhilethetopsideN-channel
equation includes an additional term for transition losses,
IN
< 5V); then, sub-logic level threshold MOSFETs (V
GS(TH)
< 3V) should be used. Pay close attention to the BV
which are highest at high input voltages. For V < 20V
DSS
IN
specification for the MOSFETs as well; most of the logic-
the high current efficiency generally improves with larger
level MOSFETs are limited to 30V or less.
MOSFETs, while for V > 20V the transition losses rapidly
IN
increasetothepointthattheuseofahigherR
device
DS(ON)
Selection criteria for the power MOSFETs include the on-
withlowerC
actuallyprovideshigherefficiency.The
MILLER
resistance, R
, Miller capacitance, C
, input
MILLER
DS(ON)
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
voltage and maximum output current. Miller capacitance,
, can be approximated from the gate charge curve
C
MILLER
usually provided on the MOSFET manufacturers’ data
sheet. C
is equal to the increase in gate charge
MILLER
along the horizontal axis while the curve is approximately
The term (1 + d) is generally given for a MOSFET in the
flat divided by the specified change in V . This result is
form of a normalized R
vs Temperature curve, but
DS
DS(ON)
then multiplied by the ratio of the application applied V
d = 0.005/°C can be used as an approximation for low
DS
to the gate charge curve specified V . When the IC is
voltage MOSFETs.
DS
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APPLICATIONS INFORMATION
TheoptionalSchottkydiodesconductduringthedeadtime
betweentheconductionofthetwopowerMOSFETs.These
preventthebodydiodesofthebottomMOSFETsfromturn-
ing on, storing charge during the dead time and requiring
a reverse recovery period that could cost as much as 3%
The LTC3883 will perform the necessary math internally
to assure the voltage ramp is controlled to the desired
slope. However, the voltage slope can not be any faster
thanthefundamentallimitsofthepowerstage.Theshorter
TON_RISEtimeisset,themorejaggedtheTON_RISEramp
will appear. The number of steps in the ramp is equal to
TON_RISE/0.1ms.
in efficiency at high V . A 1A to 3A Schottky is generally
IN
a good compromise for both regions of operation due to
the relatively small average current. Larger diodes result
in additional transition losses due to their larger junction
capacitance.
The LTC3883 PWM will always use discontinuous mode
during the TON_RISE operation. In discontinuous mode,
the bottom gate is turned off as soon as reverse current
is detected in the inductor. This will allow the regulator to
start up into a pre-biased load.
VARIABLE DELAY TIME, SOFT-START AND OUTPUT
VOLTAGE RAMPING
There is no tracking feature in the LTC3883; how-
ever, two outputs can be given the same TON_RISE and
TON_DELAY times to effectively ramp up at the same
time. If the RUN pin is released at the same time and both
LTC3883s use the same time base, the outputs will track
very closely. If the circuit is in a PolyPhase configuration,
all timing parameters must be the same.
The LTC3883 must enter the run state prior to soft-start.
The RUN pin is released after the part initializes and V is
IN
greater than the VIN_ON threshold. If multiple LTC3883s
are used in an application, they should be configured to
share the same RUN pins. They all hold their respective
RUN pins low until all devices initialize and V exceeds
IN
the VIN_ON threshold for all devices. The SHARE_CLK
pin assures all the devices connected to the signal use
the same time base.
Thedescribedmethodofstart-upsequencingistimebased.
For concatenated events it is possible to control the RUN
pinbasedontheGPIOpinofadifferentcontroller.TheGPIO
pincanbeconfiguredtoreleasewhentheoutputvoltageof
theconverterisgreaterthantheVOUT_UV_FAULT_LIMIT.
After the RUN pin releases, the controller waits for the
user-specified turn-on delay (TON_DELAY) prior to ini-
tiating an output voltage ramp. Multiple LTC3883s and
other ADI parts can be configured to start with variable
delay times. To work correctly, all devices use the same
timing clock (SHARE_CLK) and all devices must share
the RUN pin. This allows the relative delay of all parts to
be synchronized. The actual variation in the delay will be
dependent on the highest clock rate of the devices con-
nected to the SHARE_CLK pin (all Linear Technology ICs
are configured to allow the fastest SHARE_CLK signal to
control the timing of all devices). The SHARE_CLK signal
can be 10% in frequency, thus the actual time delays will
have proportional variance.
It is recommended to use the deglitched V
UV fault
OUT
limit because there is little appreciable time delay between
the converter crossing the UV threshold and the GPIO pin
releasing. The deglitched output can be enabled by set-
ting the MFR_GPIO_PROPAGATE_VOUT_UVUF bit in the
MFR_GPIO_PROPAGATE_LTC3883 command. (Refer to
the MFR section of the PMBus commands in this docu-
ment).Thedeglitchedsignalmayhavesomeglitchingasthe
V
signaltransitionsthroughthecomparatorthreshold.
OUT
A small internal digital filter of 250µs has been added to
minimize this problem. To minimize the risk of GPIO pin
glitching, make the TON_RISE times less than 100ms. If
unwantedtransitionsstilloccuronGPIO,placeacapacitor
to ground on the GPIO pin to filter the waveform. The RC
time-constant of the filter should be set sufficiently fast to
assure no appreciable delay is incurred. A value of 300µs
to 500µs will provide some additional filtering without
significantly delaying the trigger event.
Soft-startisperformedbyactivelyregulatingtheloadvolt-
age while digitally ramping the target voltage from 0.0V
to the commanded voltage set point. The rise time of the
voltage ramp can be programmed using the TON_RISE
commandtominimizeinrushcurrentsassociatedwiththe
start-up voltage ramp. The soft-start feature is disabled
by setting TON_RISE to any value less than 0.250ms.
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APPLICATIONS INFORMATION
DIGITAL SERVO MODE
If the TON_MAX_FAULT_LIMIT is set to a value greater
than 0 and the TON_MAX_FAULT_RESPONSE is not set
to ignore 0X00, the servo begins:
For maximum accuracy in the regulated output voltage,
enable the digital servo loop by asserting bit 6 of the
MFR_PWM_MODE_LTC3883 command. In digital servo
mode,theLTC3883willadjusttheregulatedoutputvoltage
based on the ADC voltage reading. Every 80ms the digital
servoloopwillsteptheLSBoftheDAC(nominally1.375mV
or 0.6875mV depending on the voltage range bit) until the
outputisatthecorrectADCreading.Atpower-upthismode
engagesafterTON_MAX_FAULT_LIMITunlessthelimitis
set to 0 (infinite). If the TON_MAX_FAULT_LIMIT is set to
0 (infinite), the servo begins after TON_RISE is complete
and VOUT has exceeded the VOUT_UV_FAULT_LIMIT.
This same point in time is when the output changes from
discontinuous to the programmed mode as indicated
in MFR_PWM_MODE_LTC3883 bits 0 and 1. Refer to
Figure 21 for details on the VOUT waveform under time
based sequencing.
1. After the TON_RISE sequence is complete;
2. After the TON_MAX_FAULT_LIMIT time has expired
and both VOUT_UV_FAULT and IOUT_OC_FAULT are
not present.
The maximum rise time is limited to 1.3 seconds.
In a PolyPhase configuration it is recommended only one
of the control loops have the digital servo mode enabled.
Thiswillassurethevariousloopsdonotworkagainsteach
other due to slight differences in the reference circuits.
SOFT OFF (SEQUENCED OFF)
In addition to a controlled start-up, the LTC3883 also sup-
portscontrolledturn-off.TheTOFF_DELAYandTOFF_FALL
functions are shown in Figure 22. TOFF_FALL is processed
when the RUN pin goes low or if the part is commanded
off. If the part faults off or GPIO is pulled low externally
and the part is programmed to respond to this, the output
will three-state rather than exhibiting a controlled ramp.
The output will decay as a function of the load.
ꢀꢎꢇꢎꢆꢁꢅ ꢌꢈꢉꢃꢄ
ꢏꢄꢀꢈ ꢈꢋꢁꢘꢅꢈꢀ
ꢑꢎꢋꢁꢅ ꢄꢙꢆꢚꢙꢆ
ꢃꢄꢅꢆꢁꢇꢈ ꢉꢈꢁꢂꢛꢈꢀ
ꢆꢄꢋꢜꢏꢁꢝꢜꢑꢁꢙꢅꢆꢜꢅꢎꢏꢎꢆ
ꢀꢁꢂ ꢃꢄꢅꢆꢁꢇꢈ
ꢈꢉꢉꢄꢉ ꢊꢋꢄꢆ
ꢆꢄ ꢌꢂꢁꢅꢈꢍ
ꢆꢎꢏꢈ ꢀꢈꢅꢁꢐ ꢄꢑ
ꢒꢓꢓꢔꢕꢓꢓꢖꢗ
ꢃ
ꢄꢙꢆ
The output voltage will operate as shown in Figure 22 so
long as the part is in forced continuous mode and the
TOFF_FALL time is sufficiently slow that the power stage
can achieve the desired slope. The TOFF_FALL time can
only be met if the power stage and controller can sink
3883 ꢑꢒꢞ
ꢆꢎꢏꢈ
ꢆꢄꢋꢜꢉꢎꢌꢈ
ꢆꢄꢋꢜꢀꢈꢅꢁꢐ
Figure 21ꢀ Timing Controlled VOUT Rise
If the TON_MAX_FAULT_LIMIT is set to a value greater
than 0 and the TON_MAX_FAULT_RESPONSE is set to
ignore 0x00, the servo begins:
ꢌ
ꢁꢍꢀ
1. After the TON_RISE sequence is complete
2. AftertheTON_MAX_FAULT_LIMITtimeisreached;and
3883 ꢂꢋꢋ
ꢀꢉꢊꢇ
ꢀꢁꢂꢂꢃꢆꢇꢅꢄꢈ
ꢀꢁꢂꢂꢃꢂꢄꢅꢅ
3. After the VOUT_UV_FAULT_LIMIT has been exceed or
the IOUT_OC_FAULT_LIMIT is not longer active.
Figure 22ꢀ TOFF_DELAY and TOFF_FALL
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sufficient current to assure the output is a zero volts by
the end of the fall time interval. If the TOFF_FALL time is
set shorter than the time required to discharge the load
capacitance, the output will not reach the desired zero volt
state. At the end of TOFF_FALL, the controller will cease
Electrical Characteristics. For example, at 70°C ambient,
the LTC3883 INTVCC current is limited to less than 52mA
from a 24V supply:
T = 70°C + 52mA • 24V • 44°C/W = 125°C
J
To prevent the maximum junction temperature from being
exceeded, a LTC3883-1 can be used. In the LTC3883-1,
to sink current and V
will decay at the natural rate
OUT
determined by the load impedance. If the controller is in
discontinuous mode, the controller will not pull negative
current and the output will be pulled low by the load, not
the power stage. The maximum fall time is limited to 1.3
seconds. The shorter TOFF_FALL time is set, the more
jagged the TOFF_FALL ramp will appear. The number of
steps in the ramp is equal to TOFF_FALL/0.1ms.
the INTV linear regulator is disabled and approximately
CC
2mA of current is supplied internally from V . Significant
IN
system efficiency and thermal gains can be realized by
powering the EXTV pin from a switching 5V regulator.
CC
The V current resulting from the gate driver and control
IN
circuitry will be scaled by a factor of:
⎛
⎜
⎝
⎞
⎟
⎠
⎛
⎞
V
1
EXTVCC
⎜
⎟
INTV REGULATOR
CC
V
Efficiency
⎝
⎠
IN
The LTC3883 features an NPN linear regulator that sup-
Tying the EXTV pin to a 5V supply (LTC3883-1 only)
CC
plies power to INTV from the V supply. INTV powers
CC
DD33
IN
CC
reduces the junction temperature in the previous example
the gate drivers, V
and much of the LTC3883 internal
from 125°C to:
circuitry. The linear regulator produces 5V at the INTV
CC
pin when V is greater than 6.5V. The regulator can sup-
T = 70°C + 52mA • 5V • 44°C/W + 2mA • 24V • 44°C/W
IN
J
ply a peak current of 100mA and must be bypassed to
ground with a minimum of 1µF ceramic capacitor or low
ESR electrolytic capacitor. No matter what type of bulk
capacitor is used, an additional 0.1µF ceramic capacitor
= 103°C
Do not tie INTV on the LTC3883 to an external supply
CC
because INTV will attempt to pull the external supply
CC
high and hit current limit, significantly increasing the die
placed directly adjacent to the INTV and PGND pins is
CC
temperature.
highlyrecommended.Goodbypassingisneededtosupply
the high transient currents required by the MOSFET gate
drivers. The NPN linear regulator on the LTC3883-1 is not
present and an external 5V supply is needed.
For applications where V is 5V, tie the V and INTV
CC
IN
IN
pins together and tie the combined pins to the 5V input
with a 1Ω or 2.2Ω resistor as shown in Figure 23. To mini-
mize the voltage drop caused by the gate charge current a
High input voltage application in which large MOSFETs
low ESR capacitor must be connected to the V /INTV
IN
CC
CC
CC
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3883 to be
exceeded. The INTVCC current, of which a large percent-
age is due to the gate charge current, may be supplied by
either the internal 5V linear regulator or from an external
5V regulator on the LTC3883-1. If the LTC3883 is used
with the internal regulator activated, the power through
the IC is equal to VIN • IINTVCC. The gate charge current is
dependent on operating frequency as discussed in the Ef-
ficiencyConsiderationssection.Thejunctiontemperature
can be estimated by using the equations in Note 2 of the
(EXTV ) pins. This configuration will override the INTV
CC
CC
(EXTV )linearregulatorandwillpreventINTV (EXTV )
CC
from dropping too low. Make sure the INTV (EXTV )
CC
CC
V
IN
LTC3883
LTC3883-1
R
VIN
1Ω
INTV /EXTV
5V
CC
CC
+
C
INTVCC
4.7µF
C
IN
3883 F23
Figure 23ꢀ Setup for a 5V Input
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voltage exceeds the R
test voltage for the MOSFETs
UNDERVOLTAGE LOCKOUT
The LTC3883 is initialized by an internal threshold-based
DS(ON)
which is typically 4.5V for logic level devices. The UVLO
on INTV (EXTV ) is set to approximately 4V. Both the
CC
CC
UVLO where V must be approximately 4V and INTV /
IN
CC
LTC3883 and LTC3883-1 are valid for this configuration.
EXTV , V
, V
must be within approximately 20%
CC DD33 DD25
of the regulated values. In addition, V
must be within
DD33
TOPSIDE MOSFET DRIVER SUPPLY (C , D )
approximately 7% of the targeted value before the RUN
pin is released. After the part has initialized, an additional
B
B
External bootstrap capacitors C connected to the BOOST
B
comparator monitors V . The VIN_ON threshold must be
IN
pin supplies the gate drive voltages for the topside MOS-
exceeded before the power sequencing can begin. When
FETs. CapacitorC intheBlockDiagramischargedthough
B
V drops below the VIN_OFF threshold, the SHARE_CLK
IN
external diode D from INTV when the SW pin is low.
B
CC
pin will be pulled low and V must increase above the
IN
When one of the topside MOSFETs is to be turned on,
VIN_ON threshold before the controller will restart.
The normal start-up sequence will be allowed after the
VIN_ON threshold is crossed. If GPIO is held low when
the driver places the C voltage across the gate source
B
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
V is applied, ALERT will be asserted low even if the part
IN
rises to V and the BOOST pin follows. With the topside
IN
is programmed to not assert ALERT when GPIO is held
MOSFET on, the boost voltage is above the input supply:
2
low. If I C communication occurs before the LTC3883 is
V
B
= V + V
. The value of the boost capacitor
BOOST
IN
INTVCC
out of reset and only a portion of the command is seen by
the part, this can be interpreted as a CML fault. If a CML
fault is detected, ALERT is asserted low.
C needstobe100timesthatofthetotalinputcapacitance
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than V
.
IN(MAX)
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
It is possible to program the contents of the NVM in the
application if the V
supply is externally driven. This
DD33
will activate the digital portion of the LTC3883 without
engaging the high voltage sections. PMBus communica-
tions are valid in this supply configuration. If V has not
IN
been applied to the LTC3883, bit 3 (NVM Not Initialized)
in MFR_COMMON will be asserted low. If this condition is
detected,thepartwillonlyrespondtoaddresses5Aand5B.
To initialize the part issue the following set of commands:
global address 0x5B command 0xBD data 0x2B followed
by global address 5B command 0xBD and data 0xC4. The
part will now respond to the correct address. Configure
thepartasdesiredthenissueaSTORE_USER_ALL. When
PWM jitter has been observed in some designs operating
at higher V /V
ratios. This jitter does not substantially
IN OUT
affect the circuit accuracy. Referring to Figure 24, PWM
jitter can be removed by inserting a series resistor with a
value of 1Ω to 5Ω between the cathode of the diode and
the BOOST pin. A resistor case size of 0603 or larger is
recommended to reduce ESL and achieve the best results.
V is applied a MFR_RESET command must be issued to
IN
V
V
IN
IN
1Ω TO 5Ω
allow the PWM to be enabled and valid ADC conversions
to be read.
C
BOOST
TGATE
B
0.2µF
LTC3883/
LTC3883-1
D
B
SW
C AND C
SELECTION
IN
OUT
INTV /EXTV
CC
CC
C
INTVCC
Incontinuousmode,thesourcecurrentofthetopMOSFET
10µF
BGATE
PGND
is a square wave of duty cycle (V )/(V ). To prevent
OUT
IN
large voltage transients, a low ESR capacitor sized for the
3883 F24
Figure 24ꢀ Boost Circuit to Minimize PWM Jitter
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maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
The selection of C
is driven by the effective series
OUT
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
I
1/2
MAX
⎡
⎤
output ripple (∆V ) is approximated by:
C
Required I
≈
V
V – V
IN
OUT
(
)(
)
⎦
OUT
⎣
IN
RMS
OUT
V
IN
⎛
⎜
⎝
⎞
⎟
⎠
1
∆V
≈ I
ESR +
This formula has a maximum at V = 2V , where
IN
OUT
OUT
RIPPLE
8fC
OUT
I
= I /2. This simple worst-case condition is com-
RMS
OUT
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci-
tor, or to choose a capacitor rated at a higher temperature
thanrequired.Severalcapacitorsmaybeparalleledtomeet
size or height requirements in the design. Due to the high
operating frequency of the LTC3883, ceramic capacitors
where f is the operating frequency, C
is the output
OUT
capacitance and I
is the ripple current in the
RIPPLE
inductor. The output ripple is highest at maximum input
voltage since I increases with input voltage.
RIPPLE
FAULT CONDITIONS
The LTC3883 GPIO pin is configurable to indicate a vari-
ety of faults including OV, UV, OC, OT, timing faults, peak
overcurrent faults. In addition the GPIO pin can be pulled
low by external sources indicating a fault in some other
portion of the system. The fault response is configurable
and allows the following options:
can also be used for C . Always consult the manufacturer
IN
if there is any question.
The benefit of using two LTC3883 2-phase operation can
be calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap
of current pulses required through the input capacitor’s
ESR. This is why the input capacitor’s requirement cal-
culated above for the worst-case controller is adequate
for the dual controller design. Also, the input protection
fuse resistance, battery resistance, and PC board trace
resistance losses are also reduced due to the reduced
peak currents in a 2-phase system. The overall benefit of
a multiphase design will only be fully realized when the
sourceimpedanceofthepowersupply/batteryisincluded
in the efficiency testing. The sources of the top MOSFETs
should be placed within 1cm of each other and share a
commonCIN(s). SeparatingthesourcesandCIN maypro-
duce undesirable voltage and current resonances at VIN.
n
Ignore
n
Shut Down Immediately—Latch Off
n
ShutDownImmediately—RetryIndefinitelyattheTime
Interval Specified in MFR_RETRY_DELAY
Refer to the PMBus section of the data sheet and the
PMBus specification for more details.
The OV response is automatic. If an OV condition is de-
tected, TG goes low and BG is asserted.
Fault logging is available on the LTC3883. The fault log-
ging is configurable to automatically store data when a
fault occurs that causes the unit to fault off. The header
portion of the fault logging table contains peak values. It
is possible to read these values at any time. This data will
be useful while troubleshooting the fault.
A small (0.1µF to 1µF) bypass capacitor between the chip
IN
If the LTC3883 internal temperature is in excess of 85°C,
the write into the NVM is not recommended. The data will
still be held in RAM, unless the 3.3V supply UVLO thresh-
old is reached. If the die temperature exceeds 130°C all
NVM communication is disabled until the die temperature
drops below 120°C.
V pin and ground, placed close to the LTC3883, is also
suggested. A 2.2Ω – 10Ω resistor placed between C
IN
(C1) and the V pin provides further isolation between
IN
the two LTC3883s.
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OPEN-DRAIN PINS
3x time constant is required, the resistor calculation is
as follows:
The LTC3883 has the following open-drain pins:
2µs – 500ns
3.3V Pins
R
=
= 5k
PULLUP
3 • 100pF
1. GPIO
The closest 1% resistor is 4.99k.
2. SYNC
If timing errors are occurring or if the SYNC frequency is
notasfastasdesired,monitorthewaveformanddetermine
if the RC time constant is too long for the application. If
possible reduce the parasitic capacitance. If not reduce
the pull up resistor sufficiently to assure proper timing.
3. SHARE_CLK
4. PGOOD
5VPins(5Vpinsoperatecorrectlywhenpulledto3.3V.)
1. RUN
2. ALERT
3. SCL
PHASE-LOCKED LOOP AND FREQUENCY
SYNCHRONIZATION
4. SDA
The LTC3883 has a phase-locked loop (PLL) comprised
of an internal voltage-controlled oscillator (VCO) and a
phase detector. The PLL is locked to the falling edge of
the SYNC pin. The phase relationship between the PWM
controller and the falling edge of SYNC is controlled by the
lower 3 bits of the MFR_PWM_CONFIG_LTC3883 com-
mand. For PolyPhase applications, it is recommended all
the phases be spaced evenly. Thus for a 2-phase system
the signals should be 180° out of phase and a 4-phase
system should be spaced 90°.
All the above pins have on-chip pull-down transistors
that can sink 3mA at 0.4V. The low threshold on the pins
is 1.4V; thus, plenty of margin on the digital signals with
3mA of current. For 3.3V pins, 3mA of current is a 1.1k
resistor. Unless there are transient speed issues associ-
ated with the RC time constant of the resistor pull-up and
parasitic capacitance to ground, a 10k resistor or larger
is generally recommended.
For high speed signals such as the SDA, SCL and SYNC,
a lower value resistor may be required. The RC time con-
stant should be set to 1/3 to 1/5 the required rise time
to avoid timing issues. For a 100pF load and a 400kHz
PMBus communication rate, the rise time must be less
than 300ns. The resistor pull-up on the SDA and SCL pins
with the time constant set to 1/3 the rise time:
The phase detector is an edge-sensitive digital type that
provides a known phase shift between the external and
internal oscillators. This type of phase detector does not
exhibit false lock to harmonics of the external clock.
The output of the phase detector is a pair of complemen-
tary current sources that charge or discharge the internal
filter network. The PLL lock range is guaranteed between
250kHzand1MHz.Nominalpartswillhavearangebeyond
this; however, operation to a wider frequency range is not
guaranteed.
t
RISE
R
=
= 1k
PULLUP
3 • 100pF
The closest 1% resistor value is 1k. Be careful to minimize
parasitic capacitance on the SDA and SCL pins to avoid
communicationproblems. Toestimatetheloadingcapaci-
tance, monitor the signal in question and measure how
long it takes for the desired signal to reach approximately
63% of the output value. This is one time constant.
The PLL has a lock detection circuit. If the PLL should lose
lockduringoperation,bit4oftheSTATUS_MFR_SPECIFIC
command is asserted and the ALERT pin is pulled low.
The fault can be cleared by writing a 1 to the bit. If the
user does not wish to see the PLL_FAULT, even if a
synchronization clock is not available at power up, bit 3
of the MFR_CONFIG_ALL_LTC3883 command must be
The SYNC pin has an on-chip pull-down transistor with
the output held low for nominally 500ns. If the internal
oscillator is set for 500kHz and the load is 100pF and a
asserted.
3883fe
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APPLICATIONS INFORMATION
If the SYNC signal is not clocking in the application, the
PLL will run at the lowest free running frequency of the
VCO. This will be well below the intended PWM frequency
of the application and may cause undesirable operation
of the converter.
a significant amount of cycle skipping can occur with cor-
respondingly larger current and voltage ripple.
INPUT CURRENT SENSE AMPLIFIER
The LTC3883 input current sense amplifier can sense the
If the PWM signal appears to be running at too high a
frequency, monitor the SYNC pin. Extra transitions on
the falling edge will result in the PLL trying to lock on to
noise versus the intended signal. Review routing of digital
control signals and minimize crosstalk to the SYNC signal
to avoid this problem. Multiple LTC3883s are required to
share the SYNC pin in PolyPhase configurations, for other
configurations it is optional. If the SYNC pin is shared be-
tween LTC3883s, only one LTC3883 can be programmed
with a frequency output. All the other LTC3883s must be
programmed to external clock.
supply current into the V pin using an internal sense re-
IN
sistor as well as the power stage current using an external
senseresistor.Highfrequencynoisecausedbythediscon-
tinuous input current can cause input current measure-
ment errors. The noise will be the greatest in high current
applications and at large step-down ratios. Care must be
taken to mitigate the noise seen at the input current sense
amplifier inputs and supply. This can be accomplished by
careful layout as well as filtering at the V , V
and
IN IN_SNS
I
pins. The V pin should be filtered with a resistor
INSNS
IN
and a ceramic capacitor located as close to the V pin as
IN
possible. The supply side of the V pin filter should be
IN
MINIMUM ON-TIME CONSIDERATIONS
Kelvin connected to the supply side of the R
resistor.
IINSNS
A 3Ω resistor should be sufficient for most applications.
The resistor will cause an IR voltage drop from the sup-
Minimum on-time, t
, is the smallest time duration
ON(MIN)
that the LTC3883 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn off the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
ply to the V pin due to the current flowing into the V
IN
IN
pin. To compensate for this voltage drop, the MFR_RVIN
command value should be set to the nominal resistor
value. The LTC3883 will multiply the MFR_READ_ICHIP
measurement value by the user defined MFR_RVIN value
V
and add this voltage to the measured voltage at the V
OUT
IN
t
<
ON(MIN)
pin.ThereforeREAD_VIN=V
+(MFR_READ_ICHIP
V • f
VIN_PIN
IN
OSC
• MFR_RVIN), so that this command will return the value
of the voltage at the supply side of the V pin filter. If no
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
IN
V filter element is used, set MFR_RVIN = 0.
IN
R
IINSNS
The minimum on-time for the LTC3883 is approximately
45ns, with reasonably good PCB layout, minimum 30%
inductor current ripple and at least 10mV – 15mV ripple
on the current sense signal. The minimum on-time can be
affected by PCB switching noise in the voltage and cur-
rent loop. As the peak current sense voltage decreases,
the minimum on-time gradually increases to 130ns. This
is of particular concern in forced continuous applications
with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
V
IN
10µF
100Ω
1µF
100Ω
TG
M1
M2
LTC3883
I
IN_SNS
3Ω
V
V
SW
BG
IN_SNS
IN
10nF
10nF
10µF
3883 F25
Figure 25ꢀ Low Noise Input Current Sense Circuit
3883fe
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LTC3883/LTC3883-1
APPLICATIONS INFORMATION
Both the V
and I
pins need to be filtered with
Voltage Selection
IN_SNS
IN_SNS
a 1% tolerance 100Ω resistor to R
and a 10nF ce-
IINSNS
When an output voltage is set using the RCONFIG pins
on VOUT_CFG and VTRIM_CFG, the following parameters
are set as a percentage of the output voltage:
ramic capacitor to GND. A larger value capacitor to GND
may be used for additional filtering. Because the input
current sense amplifier gain is calibrated for 100Ω filter
resistors, any other filter resistance value will cause an
input current measurement error. The amplifier input filter
• VOUT_OV_FAULT_LIMIT
• VOUT_OV_WARN_LIMIT
• VOUT_MAX
+10%
+7.5%
+7.5%
+5%
networks should be located as close to the V
IN_SNS
and
IN_SNS
I
pins as possible.
• VOUT_MARGIN_HIGH
• POWER_GOOD_ON
• POWER_GOOD_OFF
• VOUT_MARGIN_LOW
• VOUT_UV_WARN_LIMIT
• VOUT_UV_FAULT_LIMIT
The capacitor from the intermediate bus to ground should
be a low ESR ceramic capacitor. It should be placed as
close as possible to the drain of the top gate MOSFET to
supply high frequency transient input current. This will
help prevent noise from the top gate MOSFET current
from feeding into the input current sense amplifier inputs
and supply.
–7%
–8%
–5%
–6.5%
–7%
If the input current sense amplifier is not used, short the
Refer to Tables 12 and 13 to set the output voltage us-
ing RCONFIG pins VOUT_CFG and VTRIM_CFG. RTOP is
connected between VDD25 and the pin and RBOTTOM is
connected between the pin and SGND. 1% resistors must
be used to assure proper operation.
V , V
IN IN_SNS
, and I
pins together.
IN_SNS
RCONFIG (EXTERNAL RESISTOR
CONFIGURATION PINS)
The LTC3883 default NVM is programmed to respect the
RCONFIG pins. If a user wishes the output voltage, PWM
frequency and phasing to be set without programming
the part or purchasing specially programmed parts, the
FREQ_CFG, VOUT_CFG, andVTRIM_CFGpinscanbeused
to establish these parameters. To save external compo-
nents, the user may float the FREQ_CFG, VOUT_CFG, and
VTRIM_CFG pins which will cause the LTC3883 to default
to the respective parameters stored in NVM. The ASEL pin
should always be programmed with a resistor divider to
safeguard against a lost device address by the host.
The output voltage set point is equal to:
V
= VOUT_CFG + VTRIM_CFG
SETPOINT
For example, if the VOUT_CFG pin has R equal to 24.9k
TOP
and R
TOP
equal to 4.32k, and VTRIM_CFG is set with
BOTTOM
not inserted and R
R
equal to 0Ω:
BOTTOM
V
= 1.1V – 0.099V or 1.001V
SETPOINT
If odd values of output voltage are required from 0.5V to
3.3V, use only the VOUT_CFG resistor divider, the V
TRIM
pin can be open or shorted to V
. If the output set
DD25
point is 5V, the VOUT_CFG must have R
equal to 10k
ToexternallyprogramtheRCONFIGpinsconnectaresistor
TOP
and R
equal to 23.2k and VTRIM_CFG must have
divider between the V
and GND of the LTC3883. The
BOTTOM
equal to 20k and R
DD25
R
equal to 11k.
RCONFIG pins are only monitored at initial power up and
during a reset so modifying their values perhaps using an
A/D after the part is powered will have no effect. 1% resis-
tors or better must be used to assure proper operation.
Noisy clock signals should not be routed near these pins.
TOP
BOTTOM
Programming the output voltage with the RCONFIG pins
will automatically set the part to low or high range. Any
V
voltage at 2.5V or below will be set to low range. All
OUT
voltages above 2.5V will be set to high range.
3883fe
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Table 12ꢀ VOUT_CFG
Table 13ꢀ VTRIM_CFG
R
(kΩ)
R
(kΩ)
V
(V)
V
(mV)
V
OUT
OUT
10kΩ/23ꢀ3kΩ
(V)
TOP
BOTTOM
OUT
TRIM
CHANGE TO
IF V
HAS
0 or Open
10
Open
23.2
15.8
20.5
17.4
17.8
15
NVM
R
(kΩ)
R
(kΩ)
V VOLTAGE
SET
TOP
BOTTOM
See VTRIM
3.3
0 or Open
10
Open
23.2
15.8
20.5
17.4
17.8
15
0
10
99
16.2
16.2
20
3.1
10
86.625
74.25
2.9
16.2
16.2
20
2.7
61.875
49.5
20
2.5
20
12.7
11
2.3
20
37.125
24.75
5.5
5.25
5
20
2.1
20
12.7
11
24.9
24.9
24.9
24.9
24.9
30.1
30.1
Open
11.3
9.09
7.32
5.76
4.32
3.57
1.96
0
1.9
20
12.375
–12.375
–24.75
–37.125
–49.5
1.7
24.9
24.9
24.9
24.9
24.9
30.1
30.1
Open
11.3
9.09
7.32
5.76
4.32
3.57
1.96
0
4.75
4.5
1.5
1.3
4.25
4
1.1
0.9
–61.875
–74.25
–86.625
–99
3.75
3.63
3.5
0.7
0.5
3.46
Table 14ꢀ FREQ_CFG (Phase Based on Falling Edge of SYNC)
RTOP (kΩ)
0 or Open
10
RBOTTOM (kΩ)
Open
23.2
15.8
20.5
17.4
17.8
15
FREQUENCY (kHz)
θSYNC TO θ0
DESCRIPTION
NVM
250
NVM
0
NVM
2-Phase
3-Phase
2-Phase
2-Phase
3-Phase
2-Phase
2-Phase
2-Phase
2-Phase
3-Phase
2-Phase
2-Phase
3-Phase
2-Phase
2-Phase
10
250
120
180
0
16.2
16.2
20
250
425
425
120
180
0
20
425
20
12.7
11.3
9.09
7.32
5.76
4.32
3.57
1.96
0
500
24.9
24.9
24.9
24.9
24.9
30.1
30.1
Open
500
180
0
575
575
120
180
0
575
650
650
120
180
0
650
External Clock
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Frequency and Phase Selection Using RCONFIG
To choose address 0x45 R
BOTTOM
= 24.9k and
= 10.0k and
TOP
TOP
R
= 7.32k
The frequency and phase commands are linked if they
are set using the RCONFIG pins. If PMBus commands
are used the two parameters are independent. The SYNC
pins must be shared in poly-phase configurations where
multiple LTC3883s are used to produce the output. If
the configuration is not PolyPhase the SYNC pins do not
have to be shared. If the SYNC pins are shared between
LTC3883s only one SYNC pin can be set as a frequency
output, all other SYNC pins must be set to External Clock.
To choose address 0x4E R
= 15.8k
R
BOTTOM
Table 15A1ꢀ LTC3883 MFR_ADDRESS Command Examples
Expressing Both 7- or 8-Bit Addressing
HEX DEVICE
ADDRESS
BIT BIT BIT BIT BIT BIT BIT BIT
DESCRIPTION 7 BIT 8 BIT
7
0
0
0
0
0
1
6
1
1
1
1
1
0
5
0
0
0
1
1
0
4
1
1
0
0
0
0
3
1
1
1
0
0
0
2
0
0
1
0
0
0
1
1
1
1
0
0
0
0
0
1
1
0
1
0
R/W
0
4
Rail
0x5A 0xB4
0x5B 0xB6
0x4F 0x9E
0x60 0xC0
0x61 0xC2
4
Global
0
Forexampleina2-phaseconfigurationclockedat425kHz,
one of the LTC3883s must be set to the desired frequency
and phase and the other LTC3883 must be set to External
Clock.AllphasingiswithrespecttothefallingedgeofSYNC.
Default
0
Example 1
Example 2
0
0
2,3,5
Disabled
0
LTC3883 Chip 1 set the frequency to 425kHz with 180°
phase shift:
Note 1: This table can be applied to the MFR_RAIL_ADDRESS command
as well as the MFR_ADDRESS command.
Note 2: A disabled value in one command does not disable the device, nor
does it disable the Global address.
R
TOP
= 20kΩ and R
= 15kΩ
BOTTOM
Note 3: A disabled value in one command does not inhibit the device from
responding to device addresses specified in other commands.
Note 4: It is not recommended to write the value 0x00, 0x0C (7 bit), or
0x5A or 0x5B (7 bit) to the MFR_ADDRESS or the MFR_RAIL_ADDRESS
commands.
LTC3883 Chip 2 set the frequency to External Clock with
0° phase shift:
R
TOP
= open and R
= 0Ω
BOTTOM
Note 5: To disable the address enter 0x80 in the MFR_ADDRESS
command. The 0x80 is greater than the 7-bit address field, disabling the
address.
Frequencies of 350kHz, 750kHz and 1000kHz can only be
set using NVM programming. If a 6-phase configuration
is desired, NVM programming will give optimal phasing.
All other configurations in frequency and phasing can be
achieved using the FREQ_CFG pin.
Table 15ꢀ ASEL
R
(kΩ)
R
(kΩ)
BOTTOM
SLAVE ADDRESS
NVM
LSB HEX
TOP
0 or Open
10
Open
23.2
15.8
20.5
17.4
17.8
15
NVM (3MSBs)_1111
NVM (3MSBs)_1110
NVM (3MSBs)_1101
NVM (3MSBs)_1100
NVM (3MSBs)_1011
NVM (3MSBs)_1010
NVM (3MSBs)_1001
NVM (3MSBs)_1000
NVM (3MSBs)_0111
NVM (3MSBs)_0110
NVM (3MSBs)_0101
NVM (3MSBs)_0100
NVM (3MSBs)_0011
NVM (3MSBs)_0010
NVM (3MSBs)_0001
NVM (3MSBs)_0000
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
Address Selection Using RCONFIG
10
TheLTC3883addressmaybeselectedusingacombination
of the address stored in NVM and the ASEL pin. The three
MSBs of the device address are set by the three MSBs
stored in NVM, and four LSBs of the device address are
set by the ASEL pin. This allows 16 different LTC3883s
on a single board with one programmed address in NVM.
16.2
16.2
20
20
20
12.7
11
20
24.9
24.9
24.9
24.9
24.9
30.1
30.1
Open
11.3
9.09
7.32
5.76
4.32
3.57
1.96
0
If the address stored in NVM is 0x4F, then the part address
can be set from 0x40 to 0x4F using ASEL. (The standard
default address is 0x4F). Do not set any part address to
0x5A or 0x5B because these are global addresses and all
parts will respond to them.
To choose address 0x40 R
BOTTOM
is open and
TOP
R
= 0Ω
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EFFICIENCY CONSIDERATIONS
2
3. I R losses are predicted from the DC resistances of the
fuse(ifused), MOSFET, inductor, currentsenseresistor.
In continuous mode, the average output current flows
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
through L and R
, but is “chopped” between the
SENSE
topside MOSFET and the synchronous MOSFET. If the
two MOSFETs have approximately the same R
,
DS(ON)
then the resistance of one MOSFET can simply be
summed with the resistances of L and R
to ob-
SENSE
2
%Efficiency = 100% – (L1 + L2 + L3 + ...)
tain I R losses. For example, if each R
= 10mΩ,
DS(ON)
R = 10mΩ, R
= 5mΩ, then the total resistance
L
SENSE
where L1, L2, etc. are the individual losses as a percent-
age of input power.
is 25mΩ. This results in losses ranging from 2% to
8% as the output current increases from 3A to 15A for
a 5V output, or a 3% to 12% loss for a 3.3V output.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
Efficiency varies as the inverse square of V
for the
OUT
losses in LTC3883 circuits: 1) IC V current, 2) INTV
IN
CC
sameexternalcomponentsandoutputpowerlevel. The
combined effects of increasingly lower output voltages
andhighercurrentsrequiredbyhighperformancedigital
systemsisnotdoublingbutquadruplingtheimportance
of loss terms in the switching regulator system!
2
regulator current, 3) I R losses, 4) Topside MOSFET
transition losses.
1. The V current is the DC supply current given in
IN
the Electrical Characteristics table, which excludes
MOSFET driver and control currents. V current typi-
IN
4. Transition losses apply only to the topside MOSFET(s),
and become significant only when operating at high
input voltages (typically 15V or greater). Transition
losses can be estimated from:
cally results in a small (<0.1%) loss.
2. INTV current is the sum of the MOSFET driver and
CC
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
2
Transition Loss = (1.7) V
I
C
f
IN O(MAX) RSS
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
from INTV to ground. The resulting dQ/dt is a cur-
CC
rent out of INTV that is typically much larger than the
CC
control circuit current. In continuous mode, I
GATECHG
= f(Q + Q ), where Q and Q are the gate charges of
T
B
T
B
losses can be minimized by making sure that C has ad-
IN
the topside and bottom side MOSFETs.
equate charge storage and very low ESR at the switching
frequency. A 25W supply will typically require a minimum
of 20µF to 40µF of capacitance having a maximum of
20mΩto50mΩofESR.TheLTC38832-phasearchitecture
typically halves this input capacitance requirement over
competingsolutions.OtherlossesincludingSchottkycon-
duction losses during dead time and inductor core losses
generally account for less than 2% total additional loss.
On the LTC3883-1, supplying EXTV from an output-
CC
derived source will scale the V current required for
IN
the driver and control circuits by a factor of:
⎛
⎜
⎝
⎞
⎟
⎠
⎛
⎞
V
1
EXTVCC
⎜
⎟
V
Efficiency
⎝
⎠
IN
Forexample,ina20Vto5Vapplication,10mAofINTV
CC
current results in approximately 2.5mA of V current.
IN
CHECKING TRANSIENT RESPONSE
This reduces the mid-current loss from 10% or more
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
(if the driver was powered directly from V ) to only a
IN
few percent.
take several cycles to respond to a step in DC (resistive)
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load current. When a load step occurs, V
shifts by an
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This
OUT
amount equal to ∆I
(ESR), where ESR is the effective
LOAD
series resistance of C . ∆I
also begins to charge or
is why it is better to look at the I pin signal which is in
OUT
LOAD
TH
discharge C
generating the feedback error signal that
the feedback loop and is the filtered and compensated
control loop response. The gain of the loop will be in-
OUT
forces the regulator to adapt to the current change and
return V
to its steady-state value. During this recov-
can be monitored for excessive overshoot
creased by increasing R and the bandwidth of the loop
OUT
ery time V
C
will be increased by decreasing C . If R is increased by
OUT
C
C
or ringing, which would indicate a stability problem.
The availability of the I pin not only allows optimization
the same factor that C is decreased, the zero frequency
C
will be kept the same, thereby keeping the phase shift the
same in the most critical frequency range of the feedback
loop. The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
TH
of control loop behavior but also provides a DC-coupled
and AC-filtered closed-loop response test point. The DC
step, rise time and settling at this test point truly reflects
the closed loop response. Assuming a predominantly
second order system, phase margin and/or damping fac-
tor can be estimated using the percentage of overshoot
seen at this pin. The bandwidth can also be estimated
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
by examining the rise time at the pin. The I external
TH
with C , causing a rapid drop in V . No regulator can
OUT
OUT
components shown in the Typical Application circuit will
provide an adequate starting point for most applications.
The only two programmable parameters that affect loop
gain are the voltage range, bits 5 and 6 of the MFR_PWM_
CONFIG_LTC3883 command and the current range, bit 7
oftheMFR_PWM_MODE_LTC3883command. Besureto
establishthesesettingspriortocompensationcalculation.
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C
LOAD
to C
is greater than 1:50, the switch rise time
OUT
should be controlled so that the load rise time is limited
to approximately 25 • C . Thus a 10µF capacitor would
LOAD
require a 250µs rise time, limiting the charging current
to about 200mA.
The I series R -C filter sets the dominant pole-zero
TH
C
C
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the
loop gain and phase. An output current pulse of 20%
to 80% of full-load current having a rise time of 1µs to
PolyPhase Configuration
WhenconfiguringaPolyPhaserailwithmultipleLTC3883s/
LTC3880s, the user must share the SYNC, ITH, SHARE_
CLK, GPIO, and ALERT pins of both parts. Be sure to use
pull-upresistorsonGPIO,SHARE_CLKandALERT.Oneof
the part's SYNC pin must be set to the desired switching
frequency,andallotherFREQUENCY_SWITCHcommands
must be set to External Clock. If an external oscillator is
provided, set the FREQUENCY_SWITCH command to
External Clock for all parts. The relative phasing of all
the channels should be spaced equally. The MFR_RAIL_
ADDRESSofallthedevicesshouldbesettothesamevalue.
10µs will produce output voltage and I pin waveforms
TH
that will give a sense of the overall loop stability without
breakingthefeedbackloop. PlacingapowerMOSFETwith
a resistor to ground directly across the output capacitor
and driving the gate with an appropriate signal generator
is a practical way to produce to a load step. The MOSFET
+ R
will produce output currents approximately
OUT SERIES SERIES
When connecting a PolyPhase rail with LTC3883s, con-
SERIES
equal to V /R
. R
values from 0.1Ω to 2Ω
nect the V pins of the 3883s directly back to the supply
IN
are valid depending on the current limit settings and the
programmed output voltage. The initial output voltage
step resulting from the step change in output current may
voltage through the V pin filter networks. Refer to the
IN
TypicalApplicationcircuit:HighEfficiency500kHz2-Phase
1.8V Step-Down Converter with Sense Resistors.
3883fe
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LTC3883/LTC3883-1
APPLICATIONS INFORMATION
When connecting a 3-phase LTC3883/LTC3880, the V
The actual current of phase 1, IOUT_1A is calculated by:
IN
pin and power stage of the LTC3880 should be connected
to the downstream side of the LTC3883 input current
sense resistor. This allows the user to measure the total
input current of the rail. Refer to the Typical Application
circuit: High Efficiency 3-Phase 350kHz 1.8V Step-Down
Converter with Input Current Sense. The inductor DCR for
all three inductors of LTC3883/LTC3880 application can
be calculated. The DCR auto calibration routine can be
performed on the LTC3883 phase by shutting down the
othertwophases.TheDCRoftheinductorsoftheLTC3880
phases can be calculated using the READ_IIN value of
the LTC3883, and the MFR_READ_IIN of the LTC3880
phases. The user can shut down the other two phases
and adjust the IOUT_CAL_GAIN value of the respective
LTC3880phasesothattheactivephase’sMFR_READ_IIN
= READ_IIN of the LTC3883.
IOUT_1A = READ_IIN_A – READ_IIN_A •
{(READ_IOUT_2A + READ_IOUT_3A)/(READ_
IOUT_2B + READ_IOUT_3B)
The actual DCR of the phase 1 inductor is calibrated to
the correct value by:
DCR_CAL = DCR_NOM • (IOUT_1A/READ_IOUT_A)
The user then needs to update the IOUT_CAL_GAIN com-
mand value with the calibrated value of inductor DCR,
DCR_CAL.
The above procedure can then be repeated to determine
the inductor DCR for phases 2 and 3.
Reference the subsection titled Inductor DCR Auto Cali-
bration in the Applications Information section for further
detail regarding the operating conditions that must be met
to accurately calculate the inductor DCR.
The user may also calibrate the DCR of all three inductors
by only shutting down one phase at a time and leaving the
other two phases active, however the DCR auto calibra-
tion routine cannot be used for the LTC3883 phase. The
IOUT_CAL_GAIN value of all the inductors should be set
to the nominal DRC value, DCR_NOM prior to beginning
the procedure.
When configuring a PolyPhase rail with a LTC3883 and
multiple LTC3870s, the user must share the ITH and
GPIO/FAULT pins of all parts. Bit 12 VOUT_UVUF of the
MFR_GPIO_PROPAGATE_LTC3883 command must be
set to 0. If the GPIO pin of the LTC3883 must be used for
sequencing, and bit 12 of MFR_GPIO_PROPAGATE is set
to a 1, tie the FAULT pins of the LTC3870 high with a 10k
During the procedure, the circuit must be in a steady-state
load condition, with the converter in CCM and sufficient
load current to create a 6mV average signal across the
pull-upresistortoeitherVDD33orINTV oftheLTC3870.
CC
If the LTC3870 phases require discontinuous mode dur-
ing startup and continuous mode thereafter, connect the
MODE pins of the LTC3870 to the LTC3883 PGOOD pin.
R
IINSNS
sense resistor, as well as 6mV across the output
current sense network. First, the user needs to record
the values of READ_IIN of the LTC3883 as well as the
READ_IOUTforallthreephases. Thesevaluesarereferred
toasREAD_IIN_A,READ_IOUT_1A,READ_IOUT_2A,and
READ_IOUT_3A.
PC BOARD LAYOUT CHECKLIST
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 26. Figure 27 illustrates the cur-
rent waveforms present in the various branches of the
synchronous regulator operating in the continuous mode.
Check the following in your layout:
Next, phase 1 should be shut off and the values for READ_
IIN of the LTC3883 and the READ_IOUT for the two active
phases need to be recorded. These values are referred to
as READ_IIN_B, READ_IOUT_2B, and READ_IOUT_3B.
To calculate the DCR of phase 1:
Verify that READ_IIN_A = READ_IIN_B
1. Is the top N-channel MOSFET, M1, located within 1cm
of C ?
IN
3883fe
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LTC3883/LTC3883-1
APPLICATIONS INFORMATION
ꢐ
ꢆꢆꢄꢈꢄꢈ
ꢌ
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3883 ꢚꢍꢜ
Figure 26ꢀ Recommended Printed Circuit Layout Diagram
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3883 ꢕꢖꢗ
ꢍꢈꢁꢂ ꢁꢌꢆꢅꢃ ꢌꢆꢂꢌꢋꢎꢊꢅ
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Figure 27ꢀ Branch Current Waveforms
2. Are ground and power ground kept separate? The
combinedICgroundpinandthegroundreturnofC
capacitor by placing the capacitors next to each other
and away fromthe Schottky loop describedabove.
INTVCC
(–)terminals.TheI
mustreturntothecombinedC
+
–
OUT
TH
3. Are the I
and I
leads routed together with
SENSE
SENSE
traceshouldbeasshortaspossible.Thepathformedby
minimumPCtracespacing?Thefiltercapacitorbetween
the top N-channel MOSFET, Schottky diode and the C
+
–
IN
I
and I
should be as close as possible to
SENSE
SENSE
capacitor should have shortleads andPCtrace lengths.
Theoutputcapacitor(–)terminalsshouldbeconnected
as close as possible to the (–) terminals of the input
the IC. Ensure accurate current sensing with Kelvin
connectionsatthesenseresistororinductor,whichever
is used for current sensing.
3883fe
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LTC3883/LTC3883-1
APPLICATIONS INFORMATION
output load drops below the low current operation
threshold—typically 10% of the maximum designed cur-
rent level in Burst Mode operation.
4. Is the INTV decoupling capacitor connected close to
CC
theIC, betweentheINTV andthepowergroundpins?
CC
ThiscapacitorcarriestheMOSFETdrivercurrentpeaks.
Anadditional1µFceramiccapacitorplacedimmediately
Thedutycyclepercentageshouldbemaintainedfromcycle
tocycleinawell-designed,lownoisePCBimplementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required.
next to the INTV and PGND pins can help improve
CC
noise performance substantially.
5. Keep the switching node (SW), top gate node (TG), and
boost node (BOOST) away from sensitive small-signal
nodes, especially from the voltage and current sensing
feed-back pins. All of these nodes have very large and
fast moving signals and therefore should be kept on the
“output side” of the LTC3883 and occupy minimum PC
tracearea. IfDCRsensingisused, placethetopresistor
(Figure 18a, R1) close to the switching node.
Reduce V from its nominal level to verify operation of
IN
the regulator in dropout. Check the operation of the un-
dervoltage lockout circuit by further lowering V while
IN
monitoring the outputs to verify operation.
6. Use a modified “star ground” technique: a low imped-
ance, large copper area central grounding point on
the same side of the PC board as the input and output
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
capacitors with tie-ins for the bottom of the INTV
CC
decouplingcapacitor,thebottomofthevoltagefeedback
resistive divider and the GND pin of the IC.
7. Are the V
and I
filters Kelvin connected
IN_SNS
IN_SNS
to the R
sense resistor? This will prevent the
SENSEIN
PCB trace resistance from causing errors in the input
current measurement. These traces should be as short
aspossibleandroutedawayfromanynoisynodessuch
as the switching or boost nodes.
for inductive coupling between C , Schottky and the top
IN
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground
path voltage pickup between these components and the
GND pin of the IC.
8. Is the V filter Kelvin connected to the input side of
IN
SENSEIN
the R
resistor? This can help improve the noise
performance of the input current sense amplifier by
reducing the voltage transients between the amplifier
inputsandamplifiersupplycausedbythediscontinuous
power stage current.
DESIGN EXAMPLE
As a design example for a medium current regulator, as-
sume V = 12V nominal, V = 20V maximum, V
=
IN
IN
OUT
PC BOARD LAYOUT DEBUGGING
3.3V, I
= 15A and f = 500kHz (see Figure 28).
MAX
ItishelpfultouseaDC-50MHzcurrentprobetomonitorthe
currentintheinductorwhiletestingthecircuit.Monitorthe
output switching node (SW pin) to synchronize the oscil-
loscopetotheinternaloscillatorandprobetheactualoutput
voltageaswell.Checkforproperperformanceovertheoper-
atingvoltageandcurrentrangeexpectedintheapplication.
The frequency of operation should be maintained over
the input voltage range down to dropout and until the
The regulated output is established by the VOUT_
COMMAND stored in NVM or placing the following resis-
tor divider between VDD25 the RCONFIG pin and SGND:
1. VOUT_CFG, R
= 10k, R
= 15.8 k
TOP
BOTTOM
2. VTRIM_CFG, Open
3883fe
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LTC3883/LTC3883-1
APPLICATIONS INFORMATION
5mΩ
V
IN
6V TO 20V
22µF
50V
10µF
1µF
D4
INTV
CC
TG
M1
M2
0.1µF
1µF
100Ω
100Ω
LTC3883
I
BOOST
SW
IN_SNS
1.0µH
V
IN_SNS
10nF
3Ω
10nF
2.2k
0.2µF
BG
PGND
FREQ_CFG
V
IN
10k
10k
10k
10k
10k
10k
10k
5k
10µF
V
PGOOD
SDA
OUT_CFG
V
TRIM_CFG
PMBus
INTERFACE
SCL
ASEL
WP
ALERT
RUN
SHARE_CLK
+
–
+
–
I
SENSE
SENSE
SENSE
SENSE
GPIO
I
V
V
V
3.3V
15A
OUT
SYNC
V
DD33
V
DD25
+
C
OUT
TSNS
V
DD33
530µF
6V
I
TH
MMBT3906
10nF
GND
2200pF
6.04k
1.0µF
3883 F28
1.0µF
C : 330μH SANYO 4TPF330ML, 2× 100µF AVX 12106D107KAT2A
OUT
L: COILCRAFT XPL7070 1µH
M1: INFINEON BSC050NE2LS
M2: INFINEON BSC010NE2LSI
Figure 28ꢀ High Efficiency 500kHz 3ꢀ3V Step-Down Converter
The frequency and phase are set by NVM or by setting
the resistor divider between VDD25 FREQ_CFG and GND
All other user defined parameters must be programmed
into the NVM. The GUI can be utilized to quickly set up
the part with the desired operating parameters.
with R
= 20k and R
= 12.7k. The address is set
TOP
BOTTOM
to XF where X is the MSB stored in NVM.
Theinductancevaluesarebasedona35%maximumripple
current assumption (5.25A). The highest value of ripple
current occurs at the maximum input voltage:
The following parameters are set as a percentage of the
output voltage if the resistor configuration pins are used
to determined output voltage:
⎡
⎢
⎢
⎣
⎤
⎥
⎥
⎦
V
V
OUT
OUT
n
L =
1–
VOUT_OV_FAULT_LIMIT.................................... +10%
f • ∆I
V
IN(MAX)
L(MAX)
n
VOUT_OV_WARN_LIMIT .................................. +7.5%
n
VOUT_MAX....................................................... +7.5%
The controller will require 1.05µH. The nearest standard
value is 1µH. At the nominal input the ripple will be:
n
VOUT_MARGIN_HIGH .........................................+5%
n
POWER_GOOD_ON .............................................–7%
n
POWER_GOOD_OFF............................................–8%
⎡
⎢
⎢
⎣
⎤
⎥
⎥
⎦
V
V
OUT
OUT
n
∆I
=
1–
VOUT_MARGIN_LOW..........................................–5%
L(NOM)
f • L
V
IN(NOM)
n
VOUT_UV_WARN_LIMIT ..................................–6.5%
n
VOUT_UV_FAULT_LIMIT......................................–7%
3883fe
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APPLICATIONS INFORMATION
The ripple will be 4.79A (32%). The peak inductor current
will be the maximum DC value plus one-half the ripple
current or 17.39A. The minimum on time occurs at the
1.8V
20V
2
P
=
• 17.25 • 1+ 0.005 50°C – 25°C
⎡ ⎤
( ) ( )
⎣ ⎦
(
)
MAIN
1
1
⎛
⎝
⎞
2
maximum V , and should not be less than 45ns:
• 5.7mΩ + 20V 8.695A •
) (
+
(
)
IN
⎜
⎟
⎠
5 – 2.3 2.3
V
1.8V
• f 20V 500kHz
OUT
IN(MAX)
35pF 500kHz = 0.221W
t
=
=
= 180ns
ON(MIN)
V
(
)
The loss in the bottom side MOSFET is:
The Vishay IHLP4040DZ-11 1µH (2.3mΩ DCR
is the chosen inductor.
at 25°C)
TYP
20V – 1.8V
20V
(
)
2
P
=
• 17.25A
(
•
)
SYNC
Assuming the temperature measurement of the inductor
1+ 0.005 50°C – 25°C • 1.1mΩ
⎡
⎤
(
)
(
)
⎣
⎦
temperatureisaccurateandC1issetto0.2µF,R isinfinite
D
and removed from the equations.
= 0.335W
2
L
1µH
Both MOSFETS have I R losses while the P
equation
MAIN
R1=
=
= 1.37k
DCR at 25°C • C1 2.5mΩ • 0.2µF
includes an additional term for transition losses, which
are highest at high input voltages.
The maximum power loss in R0 is related to the duty
cycle, and will occur in continuous mode at the maximum
input voltage:
C is chosen for an RMS current rating of:
IN
17.25
1/2
⎡
⎤
C
Required I
=
1.8 • 20 – 1.8
) (
(
)
⎦
⎣
IN
RMS
20
= 4.9A
V
– V
• V
(
(
)
IN(MAX)
OUT OUT
P
R1=
LOSS
R1
at temperature. C
is chosen with an ESR of 0.006Ω for
20 – 1.8 • 1.8
OUT
)
=
= 23.91mW
low output ripple. The output ripple in continuous mode
will be highest at the maximum input voltage. The output
voltage ripple due to ESR is
1.37k
The current limit will be set 20% higher than the peak
value to assure variation in components and noise in the
system do not limit the average current.
V
= R(∆I ) = 0.006Ω • 5.5A = 33mV.
ORIPPLE
L
2
V
= I
• R
= 17.39A • 2.5mΩ = 43mV
ILIMIT
PEAK
DCR(MAX)
CONNECTING THE USB TO I C/SMBus/PMBus
CONTROLLER TO THE LTC3883 IN SYSTEM
TheclosestV
settingis42.9mVor46.4mV.Thevalues
ILIMIT
2
are entered with the IOUT_OC_FAULT_LIMIT command.
Based on expected variation and measurement in the lab
across the sense capacitor the user can determine the
optimal setting.
The ADI USB to I C/SMBus/PMBus controller can be
interfaced to the LTC3883 on the user’s board for pro-
gramming, telemetry and system debug. The controller,
when used in conjunction with LTpowerPlay, provides a
powerful way to debug an entire power system. Faults are
quicklydiagnosedusingtelemetry,faultstatuscommands
and the fault log. The final configuration can be quickly
developed and stored to the LTC3883 EEPROM.
The power dissipation on the topside MOSFET can be
easily estimated. Choose a M1: INFINEON BSC050NE2LS
topside MOSFET. R
maximum input voltage with T estimated = 50°C and a
bottom side MOSFET a M2: INFINEON BSC010NE2LSI,
DS(ON)
= 5.7mΩ, C
= 35pF. At
DS(ON)
MILLER
Figure 29 illustrates the application schematic for power-
ing, programming and communication with one or more
LTC3883s via the ADI I C/SMBus/PMBus controller
regardless of whether or not system power is present.
R
= 1.1mΩ:
2
3883fe
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APPLICATIONS INFORMATION
ꢀ
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3883 ꢊꢄꢙ
Figure 29ꢀ ADI Controller Connection
If system power is not present the dongle will power the
LTC3883 through the V supply pin. To initialize the
PFET. If V is not applied, the V
because the on-chip LDO is off. The controller 3.3V cur-
rent limit is 100mA but typical V currents are under
pins can be in parallel
IN
DD33
DD33
part when V is not applied and the V
pin is powered
IN
DD33
DD33
use global address 0x5B command 0xBD data 0x2B fol-
lowed by address 0x5B command 0xBD data 0xC4. The
part can now be communicated with, and the project file
updated. To write the updated project file to the NVM is-
sueaSTORE_USER_ALLcommand. WhenVINisapplied,
a MFR_RESET must be issued to allow the PWM to be
enabled and valid ADCs to be read.
15mA. The V
does back drive the INTV /EXTV pin.
DD33 CC CC
Normally this is not an issue if V is open.
IN
INDUCTOR DCR AUTO CALIBRATION
Using the DC resistance of the inductor as a current shunt
element has several advantages—no additional power
loss, lower circuit complexity and cost. However any
error between the specified nominal inductor DCR value
and the actual DCR value will cause a proportional error
in the peak current limit, as well as the output current
read-back value. The LTC3883 can calibrate the inductor
DCR value to compensate for the tolerance from its typical
value. Setting bit 3 of the MFR_PWM_MODE_3883 com-
mand will start the calibration procedure. To successfully
complete the calibration procedure, the PWM must be
enabled, the DUTY_CYCLE value must be at least 3%, the
READ_IIN value must be at least 10mA, and the calibrated
IOUT_CAL_GAIN must be with 30% of the uncalibrated
IOUT_CAL_GAIN value. If any of the above conditions are
not met, bit 0 of the STATUS_CML command will be set,
and the value of IOUT_CAL_GAIN will not be changed.
3883fe
Becauseofthecontrollerslimitedcurrentsourcingcapabil-
ity, only the LTC3883s, their associated pull-up resistors
2
and the I C pull-up resistors should be powered from the
2
ORed 3.3V supply. In addition any device sharing the I C
bus connections with the LTC3883 should not have body
diodes between the SDA/SCL pins and their respective
V
node because this will interfere with bus communica-
DD
tion in the absence of system power. If V is applied the
IN
dongle will not supply the LTC3883s on the board. It is
recommendedtheRUNpinsbeheldlowtoavoidproviding
power to the load until the part is fully configured.
2
The ADI controller I C connections are opto-isolated from
thePCUSB. The3.3VfromthecontrollerandtheLTC3883
V
DD33
pin must be driven to each LTC3883 with a separate
59
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
and its corresponding thermal image (left). The converter
is providing 1.8V, 1.5A to the output load.
During the inductor DCR calibration the supply voltage,
output voltage, and load current must be in a steady state
condition for 160ms during the command execution to
ensure accurate calibration. The load current should be
sufficiently large to create at least a 6mV average signal
Heat dissipation in the inductor under high load condi-
tions creates transient and steady state thermal gradients
between the inductor and the temperature sensor, and the
sensed temperature does not accurately represent the
inductor core temperature. This temperature gradient is
clearlyvisibleinthethermalimageofFigure30.Inaddition,
transient heating/cooling effects have to be accounted for
in order to reduce the transient errors introduced when
load current changes are faster than heat transfer time
constants of the inductor. Both of these problems are
addressed by introducing two additional parameters: the
across the R
sense resistor as well as 6mV across
IINSNS
the output current sense network in order to ensure that
the READ_IIN and READ_IOUT values used in the DCR
calibration calculation are within 1% TUE. The inductor
DCR is calibrated by multiplying the measured READ_IIN
valuebythemeasuredREAD_DUTY_CYCLEvaluetoobtain
acalculatedoutputcurrent.TheLTC3883thenupdatesthe
IOUT_CAL_GAIN value so that the measured READ_IOUT
value matches the calculated output current value that is
based on power stage input current and duty cycle, so
that READ_IOUT • DUTY_CYCLE = READ_IIN.
thermal resistance θ from the inductor core to the on-
IS
board temperature sensor, and the inductor thermal time
constant τ. The thermal resistance θ [°C/W], is used to
IS
calculate the steady-state difference between the sensed
ACCURATE DCR TEMPERATURE COMPENSATION
temperature T and the internal inductor temperature T
S
I
for a given power dissipated in the inductor P :
I
Using the DC resistance of the inductor as a current shunt
elementhasseveraladvantages—noadditionalpowerloss,
lower circuit complexity and cost. However, the strong
temperature dependence of the inductor resistance and
the difficulty in measuring the exact inductor core tem-
perature introduce errors in the current measurement.
For copper, a change of inductor temperature of only 1°C
correspondstoapproximately0.39%currentgainchange.
Figure 30 shows a DC/DC converter sample layout (right)
T – T = θ P = θ V I
IS DCR OUT
I
S
IS
I
Theadditionaltemperatureriseisusedforamoreaccurate
estimate of the inductor DC resistance R :
I
R = R0 (1 + a [T – T + θ V
I
])
I
S
REF
IS DCR OUT
In the equations above, V
is the inductor DC voltage
DCR
drop, I
is the RMS value of the output current, R0 is
OUT
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3883 ꢉ3ꢊ
Figure 30ꢀ Thermal Image and Layout Photo
3883fe
60
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
the inductor DC resistance at the reference temperature
The time constant τ is calculated from the slope of the
T
andaisthetemperaturecoefficientoftheresistance.
best-fit line y = ln(∆I/I) = a1 + a2t:
REF
Since most inductors are made of copper, we can expect
1
a temperature coefficient close to a = 3900ppm/°C.
τ = –
CU
a2
For a given a, the remaining parameters θ and R0 can
IS
be calibrated at a single temperature using only two load
In summary, a single load current step is all that is needed
tocalibratetheDCRcurrentmeasurement. Thestablepor-
currents:
tionsoftheresponsegiveusthethermalresistanceθ and
IS
R2 – R1 P2+P1 – R2+R1 P2 – P1
)( )( )
(
)
(
RO =
nominal DC resistance R0, and the settling characteristic
a T2 – T1 P2+P1 – P2 – P1 2+ a T1+ T2 – 2T
(
)(
)
(
)
[
]
)
REF
(
is used to measure the inductor thermal time constant τ.
a R1+R2 T2 – T1 – R2 – R1 2+ a T1+ T2 – 2T
(
)(
)
(
)
[
]
)
1
(
REF
REF
θ
=
•
IS
To get the best performance, the temperature sensor has
to be as close as possible to the inductor and away from
other significant heat sources. For example in Figure 30,
the bipolar sense transistor is close to the inductor and
away from the switcher. Connecting the collector of the
PNPtothelocalpowergroundplaneassuresgoodthermal
contact to the inductor, while the base and emitter should
be routed to the LTC3883 separately, and the base con-
nected to the signal ground close to LTC3883.
aRO a T2 – T1 P2+P1 – P2 – P1 2+ a T1+ T2 – 2T
)(
(
)
(
)
[
]
(
)
The inductor resistance, R = V
/I
, power dis-
K
DCR(K) OUT(K)
sipation P = V
K
I
and the sensed temperature
K
DCR(K) OUT(K)
T ,(K=1,2)arerecordedforeachloadcurrent.Toincrease
theaccuracyincalculatingθ ,thetwoloadcurrentsshould
IS
be chosen around I = 10% and I = 90% of the current
1
2
range of the system.
Theinductorthermaltimeconstantτmodelsthefirstorder
thermalresponseoftheinductorandallowsaccurateDCR
compensation during load transients. During a transition
from low-to-high load current, the inductor resistance
increases due to the self-heating. If we apply a single load
LTpowerPlay: AN INTERACTIVE GUI FOR DIGITAL
POWER
LTpowerPlay is a powerful Windows-based development
environment that supports Linear Technology digital
power ICs including the LTC3883. The software supports
a variety of different tasks. LTpowerPlay can be used to
evaluate Linear Technology ICs by connecting to a demo
board or the user application. LTpowerPlay can also be
used in an offline mode (with no hardware present) in
order to build multiple IC configuration files that can be
saved and re-loaded at a later time. LTpowerPlay provides
unprecedenteddiagnosticanddebugfeatures.Itbecomes
a valuable diagnostic tool during board bring-up to pro-
gram or tweak the power system or to diagnose power
issues when bring up rails. LTpowerPlay utilizes Linear
step from the low current I to the higher current I , the
1
2
voltage across the inductor will change instantaneously
from I R1 to I R1 and then slowly approach I R2. Here R1
1
2
2
isthesteady-stateresistanceatthegiventemperatureand
load current I , and R2 is the slightly higher DC resistance
1
at I , due to the inductor self-heating. Note that the electri-
2
cal time constant τ = L/R is several orders of magnitude
EL
shorter than the thermal one, and “instantaneous” is rela-
tive to the thermal time constant. The two settled regions
give us the data sets (I , T1, R1, P1) and (I , T2, R2, P2)
1
2
and the 2-point calibration technique (1.3-1.4) is used to
extract the steady-state parameters θ and R0 (given a
IS
2
Technology’s USB-to-I C/SMBus/PMBus controller to
previously characterized average a). The relative current
error calculated using the steady-state expression (1.2)
will peak immediately after the load step, and then decay
to zero with the inductor thermal time constant τ.
communication with one of the many potential targets
including the DC1778A demo board, the DC1890A sock-
eted programming board, or a customer target system.
The software also provides an automatic update feature
to keep the revisions current with the latest set of device
∆I
–t/τ
t = a θ V2I – V1I e
( )
(
)
1
2
IS
I
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
Figure 31ꢀ LTpowerPlay Screen Shot
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ꢀꢉꢈꢉ ꢎꢏꢐꢐꢁꢄ
drivers and documentation. A great deal of context sen-
sitive help is available with LTpowerPlay along with sev-
eral tutorial demos. Complete information is available at
http://www.linear.com/ltpowerplay.
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•
•
•
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•
•
•
PMBus COMMUNICATION AND COMMAND
PROCESSING
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3883 ꢐ3ꢔ
The LTC3883/LTC3883-1 have a one deep buffer to hold
the last data written for each supported command prior
to processing as shown in Figure 32; Write Command
Data Processing. When the part receives a new command
from the bus, it copies the data into the Write Command
Data Buffer, indicates to the internal processor that this
command data needs to be fetched, and converts the
command to its internal format so that it can be executed.
Figure 32ꢀ Write Command Data Processing
ensure the last data written to any command is never lost.
CommanddatabufferinghandlesincomingPMBuswrites
by storing the command data to the Write Command Data
Buffer and marking these commands for future process-
ing. The internal processor runs in parallel and handles
the sometimes slower task of fetching, converting and
executing commands marked for processing.
Two distinct parallel blocks manage command buffering
and command processing (fetch, convert, and execute) to
3883fe
62
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
APPLICATIONS INFORMATION
// wait until bits 6, 5, and 4 of MFR_COMMON are all set
is in a transitional V
state (margining hi/lo, power off/
OUT
do
on, moving to a new output voltage set point, etc.) it will
clear bit 4 of MFR_COMMON (‘output not in transition’).
Wheninternalcalculationsareinprocess,thepartwillclear
bit5ofMFR_COMMON(‘calculationsnotpending’).These
three status bits can be polled with a PMBus read byte of
the MFR_COMMON command until all three bits are set. A
command immediately following the status bits being set
will be accepted without NACKing or generating a BUSY
fault/ALERT notification. The part can NACK commands
forotherreasons,however,asrequiredbythePMBusspec
(for instance, an invalid command or data). An example
of a robust command write algorithm for the VOUT_
COMMAND register is provided in Figure 31.
{
mfrCommonValue = PMBUS_READ_BYTE(0xEF);
partReady = (mfrCommonValue & 0x70) == 0x70;
}while(!partReady)
Figure 33ꢀ Example of a Command Write of VOUT_COMMAND
Some computationally intensive commands (e.g., timing
parameters, temperatures, voltages and currents) have
internalprocessorexecutiontimesthatmaybelongrelative
toPMBustiming.Ifthepartisbusyprocessingacommand,
and new command(s) arrive, execution may be delayed
or processed in a different order than received. The part
indicateswheninternalcalculationsareinprocessviabit5
of MFR_COMMON (‘calculations not pending’). When the
part is busy calculating, bit 5 is cleared. When this bit is
set, the part is ready for another command. An example
polling loop is provided in Figure 33 which ensures that
commands are processed in order while simplifying error
handling routines.
It is recommended that all command writes (write byte,
write word, etc.) be preceded with a polling loop to avoid
the extra complexity of dealing with busy behavior and
unwantedALERTnotification. Asimplewaytoachievethis
is to create a SAFE_WRITE_BYTE() and SAFE_WRITE_
WORD()subroutine.Theabovepollingmechanismallows
your software to remain clean and simple while robustly
communicating with the part. For a detailed discussion
of these topics and other special cases please refer to
the application note TBD “Implementing Robust PMBus
SystemSoftware”locatedatwww.linear.com/designtools/
app_notes.
When the part receives a new command while it is busy,
it will communicate this condition using standard PMBus
protocol. Depending on part configuration it may either
NACK the command or return all ones (0xFF) for reads. It
may also generate a BUSY fault and ALERT notification,
or stretch the SCL clock low. For more information refer
to PMBus Specification v1.1, Part II, Section 10.8.7 and
SMBusv2.0section4.3.3.Clockstretchingcanbeenabled
by asserting bit 1 of MFR_CONFIG_ALL_LTC3883. Clock
stretching will only occur if enabled and the bus com-
munication speed exceeds 100kHz.
When communicating using bus speeds at or below
100kHz, the polling mechanism shown here provides a
simplesolutionthatensuresrobustcommunicationwithout
clock stretching. At bus speeds in excess of 100kHz, it is
strongly recommended that the part be configured to en-
able clock stretching. This requires a PMBus master that
supports clock stretching. System software that detects
and properly recovers from the standard PMBus NACK/
BUSYfaultsasdescribedinthePMBusSpecificationv1.1,
Part II, Section 10.8.7 is required to communicate above
100kHz without clock stretching. Clock stretching will not
enabletheLTC3883tocommunicateproperlywhenthebus
speed exceeds the specified 400kHz maximum frequency.
The LTC3883 is not recommended in applications where
the PMBus speed exceeds 400kHz.
PMBus busy protocols are well accepted standards, but
can make writing system level software somewhat com-
plex. The part provides three ‘hand shaking’ status bits
which reduce complexity while enabling robust system
level communication.
The three hand shaking status bits are in the MFR_
COMMON command. When the part is busy executing an
internaloperation,itwillclearbit6ofMFR_COMMON(‘chip
not busy’). When the part is busy specifically because it
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
ADDRESSING AND WRITE PROTECT
CMD
DATA
DEFAULT
VALUE
COMMAND NAME
PAGE
CODE DESCRIPTION
TYPE
FORMAT
UNITS
NVM
0x00 Provides integration with multi-page PMBus devices.
R/W Byte
R/W Byte
Reg
Reg
0x00
0x00
WRITE_PROTECT
0x10 Level of protection provided by the device against
accidental changes.
Y
2
MFR_ADDRESS
0xE6 Sets the 7-bit I C address byte.
R/W Byte
R/W Byte
Reg
Reg
Y
Y
0x4F
0x80
MFR_RAIL_ADDRESS
0xFA Common address for PolyPhase outputs to adjust
common parameters.
PAGE
The LTC3883 only supports a PAGE value of 0x00 or 0xFF. Any other value will generate a CML fault. The page command
is included to provide integration with multi-page PMBus devices. There are no restrictions as to what commands can
be written or read when PAGE is set to 0xF F.
WRITE_PROTECT
The WRITE_PROTECT command is used to control writing to the LTC3883 device. This command does not indicate
the status of the WP pin which is defined in the MFR_COMMON command. The WP pin takes precedence over the
value of this command unless the WRITE_PROTECT command is more stringent.
BYTE MEANING
0x80 Disable all writes except to the WRITE_PROTECT, PAGE, MFR_
EE_UNLOCK, and STORE_USER_ALL command.
0x40 Disable all writes except to the WRITE_PROTECT, PAGE,
MFR_EE_UNLOCK, MFR_CLEAR_PEAKS, STORE_USER_ALL,
OPERATION and CLEAR_FAULTS command. Individual fault
bits can be cleared by writing a 1 to the respective bits in the
STATUS commands.
0x20 Disable all writes except to the WRITE_PROTECT, OPERATION,
MFR_EE_UNLOCK, MFR_CLEAR_PEAKS, CLEAR_FAULTS,
PAGE, ON_OFF_CONFIG, VOUT_COMMAND and STORE_USER_
ALL. Individual fault bits can be cleared by writing a 1 to the
respective bits in the STATUS commands.
0x10 Reserved, must be 0
0x08 Reserved, must be 0
0x04 Reserved, must be 0
0x02 Reserved, must be 0
0x01 Reserved, must be 0
Enable writes to all commands when WRITE_PROTECT is set to 0x00.
IfWPpinishigh,PAGE,OPERATION,MFR_CLEAR_PEAKS,MFR_EE_UNLOCK,WRITE_PROTECTandCLEAR_FAULTS
commands are supported. Individual fault bits can be cleared by writing a 1 to the respective bits in the STATUS
commands.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_ADDRESS
The MFR_ADDRESS command byte sets the 7 bits of the PMBus slave address for this device.
Setting this command to a value of 0x80 disables device addressing. The GLOBAL device address, 0x5A and 0x5B,
cannot be deactivated. If RCONFIG is set to ignore, the ASEL pin is still used to determine the LSB of the channel ad-
dress. If the ASEL pin is open, the LTC3883 will use the address value stored in NVM.
This command has one data byte.
MFR_RAIL_ADDRESS
The MFR_RAIL_ADDRESS command enables direct device address access to the PAGE activated channel. The value
of this command should be common to all devices attached to a single power supply rail.
The user should only perform command writes to this address. If a read is performed from this address and the rail
devices do not respond with EXACTLY the same value, the LTC3883 will detect bus contention and may set a CML
communications fault.
Setting this command to a value of 0x80 disables rail device addressing for the channel.
This command has one data byte.
GENERAL CONFIGURATION COMMANDS
DATA
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
FORMAT UNITS NVM
MFR_CHAN_CONFIG_LTC3883
MFR_CONFIG_ALL_LTC3883
0xD0
0xD1
Configuration bits that are channel specific.
General configuration bits.
R/W Byte
R/W Byte
Reg
Reg
Y
Y
0x1F
0x09
MFR_CHAN_CONFIG_LTC3883
General purpose configuration command common to multiple ADI products.
BIT MEANING
7
6
5
4
3
Reserved
Reserved
Reserved
Disable RUN Low. When asserted the RUN pin is not pulsed low if commanded OFF
Short Cycle. When asserted the output will immediate off if commanded ON while waiting for TOFF_DELAY or TOFF_FALL. TOFF_MIN of 120mS
is honored then the part will command ON.
2
1
0
SHARE_CLOCK control. If SHARE_CLOCK is held low, the output is disabled
No GPIO ALERT, ALERT is not pulled low if GPIO is pulled low externally.
Disables the VOUT decay value requirement for MFR_RETRY_TIME processing. When this bit is set to a 0, the output must decay to less than
12.5% of the programmed value for any action that turns off the rail including a fault, an OFF/ON command, or a toggle of RUN from high to low
to high.
This command has one data byte.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_CONFIG_ALL_LTC3883
General purpose configuration command common to multiple ADI products
BIT MEANING
7
6
5
4
3
2
Enable Fault Logging
Ignore Resistor Configuration Pins
Reserved
Fast (35ms) TINIT
Mask PLL Unlock Fault
PMBus command writes require a valid Packet Error Checking, or PEC,
byte to be accepted.*
1
0
Enable the use of PMBus clock stretching
Reserved
*PMBus command writes that have a valid PEC byte are always processed.
PMBus command writes that have an invalid PEC byte are not processed and set
a CML status fault.
This command has one data byte.
ON/OFF/MARGIN
CMD
DATA
DEFAULT
VALUE
COMMAND NAME
ON_OFF_CONFIG
OPERATION
CODE DESCRIPTION
TYPE
FORMAT UNITS NVM
0x02 RUN pin and PMBus bus on/off command configuration.
0x01 Operating mode control. On/off, margin high and margin low.
0xFD Commanded reset without requiring a power-down.
R/W Byte
R/W Byte
Send Byte
Reg
Reg
Y
Y
0x1E
0x80
NA
MFR_RESET
ON_OFF_CONFIG
The ON_OFF_CONFIG command configures the combination of RUN pin input and serial bus commands needed to
turn the unit on and off. This includes how the unit responds when power is applied.
Table 3ꢀ Supported Values
VALUE
MEANING
0x1F
OPERATION value and RUNn pin must both command the device to start/run. Device executes immediate off when commanded off.
OPERATION value and RUNn pin must both command the device to start/run. Device uses TOFF_command values when commanded off.
RUNn pin control with immediate off when commanded off. OPERATION on/off control ignored.
RUNn pin control using TOFF_command values when commanded off. OPERATION on/off control ignored.
0x1E
0x17
0x16
Note: A high on the RUN pin is always required to start power conversion. Power conversion will always stop with a low on RUN.
Programming an unsupported ON_OFF_CONFIG value will generate a CML fault and the command will be ignored.
This command has one data byte.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
OPERATION
The OPERATION command is used to turn the unit on and off in conjunction with the input from the RUN pin. It is also
used to cause the unit to set the output voltage to the upper or lower MARGIN VOLTAGEs. The unit stays in the com-
manded operating mode until a subsequent OPERATION command or change in the state of the RUN pin instructs the
device to change to another mode. If the part is stored in the MARGIN_LOW/HIGH state, the next RESET or POWER_ON
cycle will ramp to that state. If the OPERATION command is modified, for example ON is changed to MARGIN_LOW,
the output will move at a fixed slope set by the VOUT_TRANSITION_RATE.
Margin High (Ignore Faults) and Margin Low (Ignore Faults) operations are not supported by the LTC3883.
The part defaults to the ON state.
This command has one data byte.
Table 4ꢀ OPERATION Command Detail Command
OPERATION Data Contents When On_Off_Config_Use_PMBus Enables
Operation_Control
SYMBOL
BITS
ACTION
VALUE
Turn off immediately
Turn on
0x00
0x80
0x98
0xA8
0x40
FUNCTION Margin Low
Margin High
Sequence off
OPERATION Data Contents When On_Off_Config is Configured Such That
OPERATION Command is Not Used to Command Channel On or Off
SYMBOL
BITS
ACTION
VALUE
Output at Nominal
0x80
0x98
0xA8
FUNCTION Margin Low
Margin High
Note: Attempts to write a reserved value will cause a CML fault.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_RESET
This command provides a means by which the user can perform a reset of the LTC3883.
This write-only command has no data bytes.
PWM CONFIGURATION
DATA
DEFAULT
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
FORMAT UNITS NVM VALUE
MFR_PWM_MODE_
LTC3883
0xD4
0xF5
0x33
Configuration for the PWM engine.
R/W Byte
Reg
Reg
L11
Y
Y
Y
0xD2
0x10
MFR_PWM_CONFIG_
LTC3883
Set numerous parameters for the DC/DC controller including
phasing.
R/W Byte
FREQUENCY_SWITCH
Switching frequency of the controller.
R/W Word
kHz
350
0xFABC
MFR_PWM_MODE_LTC3883
TheMFR_PWM_MODE_LTC3883commandallowstheusertoprogramthePWMcontrollertouseBurstModeoperation,
discontinuous (pulse-skipping mode), or forced continuous conduction mode.
BIT
MEANING
7
0b
1b
Use High Range of I
Low Current Range
High Current Range
LIMIT
6
Enable Servo Mode
[5:4]
00b
01b
10b
READ_IIN Gain Setting
2x Gain, 50mV Max Input
4x Gain, 20mV Max Input
8x, Gain, 8mV Max Input
3
2
Start DCR Auto Calibration
Reserved
Bit[1:0] Mode
00b
01b
10b
Discontinuous
Burst Mode Operation
Forced Continuous
Whenever the channel is ramping on, the PWM mode will be discontinuous, regardless of the value of this
command.
Bit [7] of this command determines if the part is in high range or low range of the IOUT_OC_FAULT_LIMIT command.
Changing this bit value changes the PWM loop gain and compensation. Changing this bit value whenever an output is
active may have detrimental system results.
Bit [6] The LTC3883 will not servo while the part is OFF, ramping on or ramping off. When set to a one, the output servo
is enabled. The output set point DAC will be slowly adjusted to minimize the difference between the READ_VOUT_ADC
and the VOUT_COMMAND (or the appropriate margined value).
Bit[5:4] set the READ_IIN gain and range setting of the input current sense amplifier.
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PMBus COMMAND DETAILS
Bit[3] Setting this bit to a 1 starts the patent pending inductor DCR auto calibration to determine the DCR of the in-
ductor. This will update the value of IOUT_CAL_GAIN using the READ_IIN, READ_IOUT, and DUTY_CYCLE values.
IOUT_CAL_GAIN is adjusted so that READ_IOUT • DUTY_CYCLE = READ_IIN. The auto calibration procedure will only
complete successfully if the following conditions are met.
1) The PWM is enabled
2) DUTY_CYCLE is at least 3%
3) READ_IIN is at least 10mA
4) The calibrated IOUT_CAL_GAIN is within 30% of the uncalibrated IOUT_CAL_GAIN
If any of the above conditions are not met, bit 0 of the STATUS_CML command will be set, and the value of IOUT_
CAL_GAIN will not be changed. Bit[3] must then be reset to a 0 by the user. A STORE_USER_ALL command must be
issued to store the updated IOUT_CAL_GAIN value into NVM.
Bit[1:0] determine the PWM mode of operation.
This command has one data byte.
MFR_PWM_CONFIG_LTC3883
The MFR_PWM_CONFIG_LTC3883 command sets the switching frequency and phase offset with respect to the fall-
ing edge of the SYNC signal. The part must be in the OFF state to process this command. The RUN pin must be low
or the part must be commanded off. If the part is in the RUN state and this command is written, the command will be
ignored and a BUSY fault will be asserted. Bit 6 of this command affects the loop gain of the PWM output which may
require modifications to the external compensation network.
BIT
7
MEANING
Reserved, set to 0.
6
If V
RANGE = 1, the maximum output voltage is 2.75V.
OUT
If RANGE = 0, the maximum output voltage is 5.5V.
5
4
Reserved
Share Clock Enable : If this bit is 1, the SHARE_CLK pin
will not be released until V > VIN_ON. The SHARE_CLK
IN
pin will be pulled low when V < VIN_OFF. If this bit is
IN
0, the SHARE_CLK pin will not be pulled low when VIN <
VIN_OFF except for the initial application of VIN.
3
BIT [2:0]
000b
001b
010b
011b
100b
101b
110b
111b
Reserved, set to 0
Phase Offset
0
90
180
270
60
120
240
300
This command has one data byte.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
FREQUENCY_SWITCH
The FREQUENCY_SWITCH command sets the switching frequency, in kHz, of a PMBus device.
Supported Frequencies:
VALUE [15:0]
0x0000
0xF3E8
RESULTING FREQUENCY (TYP)
External Oscillator
250kHz
0xFABC
0xFB52
0xFBE8
0x023F
350kHz
425kHz
500kHz
575kHz
0x028A
0x02EE
0x03E8
650kHz
750kHz
1000kHz
The part must be in the OFF state to process this command. The RUN pin must be low or the part must be commanded
off. If the part is in the RUN state and this command is written, the command will be ignored and a BUSY fault will be
asserted. When the part is commanded off and the frequency is changed, a PLL_UNLOCK status may be detected as
the PLL locks onto the new frequency.
This command has two data bytes and is formatted in Linear_5s_11s format.
VOLTAGE
Input Voltage and Limits
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
DATA FORMAT UNITS
NVM
DEFAULT VALUE
VIN_OV_FAULT_ LIMIT
0x55
0x58
0x35
0x36
0xF7
Input supply overvoltage fault limit.
R/W
L11
L11
L11
L11
L11
V
Y
15.5
Word
0xD3E0
VIN_UV_WARN_LIMIT
VIN_ON
Input supply undervoltage warning limit.
R/W
Word
V
Y
Y
Y
Y
6.3
0xCB26
Input voltage at which the unit should start
power conversion.
R/W
Word
V
6.5
0xCB40
VIN_OFF
Input voltage at which the unit should stop
power conversion.
R/W
Word
V
6.0
0xCB00
MFR_RVIN
The resistance value of the V pin filter
R/W
Word
mΩ
3000
0x12EE
IN
element in milliohms
VIN_OV_FAULT_LIMIT
The VIN_OV_FAULT_LIMIT command sets the value of the measured input voltage, in volts, that causes an input
overvoltage fault. The fault is detected with the A/D converter resulting in latency up to 80ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
VIN_UV_WARN_LIMIT
The VIN_UV_WARN_LIMIT command sets the value of the input voltage that causes an input undervoltage warning.
The warning is detected with the A/D converter resulting in latency up to 80ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
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PMBus COMMAND DETAILS
VIN_ON
The VIN_ON command sets the input voltage, in volts, at which the unit should start power conversion.
This command has two data bytes and is formatted in Linear_5s_11s format.
VIN_OFF
The VIN_OFF command sets the input voltage, in volts, at which the unit should stop power conversion.
This command has two data bytes and is formatted in Linear_5s_11s format.
MFR_RVIN
The MFR_RVIN command is used to set the resistance value of the V pin filter element in milliohms. (See also
IN
READ_VIN). Set MFR_RVIN equal to 0 if no filter element is used.
This command has two data bytes and is formatted in Linear_5s_11s format.
Output Voltage and Limits
DATA
DEFAULT
VALUE
2
0x14
5.5
0x5800
1.1
0x119A
1.075
0x1133
1.05
0x10CD
1.0
0x1000
0.95
0x0F33
0.925
0x0ECD
0.9
0x0E66
0.93
0x0EE1
0.92
0x0EB8
COMMAND NAME
VOUT_MODE
CMD CODE DESCRIPTION
Output voltage format and exponent (2 ).
TYPE
R Byte
FORMAT
UNITS
NVM
–12
–12
0x20
0x24
0x40
0x42
0x25
0x21
0x26
0x43
0x44
0x5E
0x5F
0xA5
Reg
L16
L16
L16
L16
L16
L16
L16
L16
L16
L16
L16
VOUT_MAX
Upper limit on the commanded output voltage R/W Word
including VOUT_MARGIN_HIGH
V
V
V
V
V
V
V
V
V
V
V
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
VOUT_OV_FAULT_ LIMIT
VOUT_OV_WARN_ LIMIT
VOUT_MARGIN_HIGH
VOUT_COMMAND
Output overvoltage fault limit.
R/W Word
Output overvoltage warning limit.
R/W Word
Margin high output voltage set point. Must be R/W Word
greater than VOUT_COMMAND.
Nominal output voltage set point.
R/W Word
VOUT_MARGIN_LOW
VOUT_UV_WARN_ LIMIT
VOUT_UV_FAULT_ LIMIT
POWER_GOOD_ON
POWER_GOOD_OFF
MFR_VOUT_MAX
Margin low output voltage set point. Must be R/W Word
less than VOUT_COMMAND.
Output undervoltage warning limit.
R/W Word
R/W Word
R/W Word
R/W Word
R Word
Output undervoltage fault limit.
Output voltage at or above which a power
good should be asserted.
Output voltage at or below which a power
good should be de-asserted.
Maximum allowed voltage command
including VOUT_OV_FAULT_LIMIT.
5.5
0x5800
VOUT_MODE
The data byte for VOUT_MODE command, used for commanding and reading output voltage, consists of a 3-bit mode
(only linear format is supported) and a 5-bit parameter representing the exponent used in output voltage Read/Write
commands.
This read-only command has one data byte.
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PMBus COMMAND DETAILS
VOUT_MAX
The VOUT_MAX command sets an upper limit on the output voltage, including VOUT_MARGIN_HIGH, the unit can
command regardless of any other commands or combinations.
This command has two data bytes and is formatted in Linear_16u format.
VOUT_OV_FAULT_LIMIT
The VOUT_OV_FAULT_LIMIT command sets the value of the output voltage measured at the sense pins, in volts, which
causes an output overvoltage fault.
If the VOUT_OV_FAULT_LIMIT is modified and the part is in the RUN state, allow 10ms after the command is modified
to assure the new value is being honored. The part indicates if it is busy making a calculation. Monitor bits 5 and 6 of
MFR_COMMON. Either bit is low if the part is busy. If this wait time is not met, and the VOUT_COMMAND is modified
above the old overvoltage limit, an OV condition might temporarily be detected resulting in undesirable behavior and
possible damage to the switcher.
If VOUT_OV_FAULT_RESPONSE is set to OV_PULLDOWN or 0x00, the GPIO pin will not assert if VOUT_OV_FAULT is
propagated. The LTC3883 will pull the TG low and assert the BG bit as soon as the overvoltage condition is detected.
This command has two data bytes and is formatted in Linear_16u format.
VOUT_OV_WARN_LIMIT
The VOUT_OV_WARN_LIMIT command sets the value of the output voltage measured at the sense pins, in volts,
which causes an output voltage high warning. The MFR_VOUT_PEAK value will be used to determine if this limit has
been exceeded.
In response to the VOUT_OV_WARN_LIMIT being exceeded, the device:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the VOUT bit in the STATUS_WORD
• Sets the VOUT Overvoltage Warning bit in the STATUS_VOUT command
• Notifies the host by asserting ALERT pin
This condition is detected by the ADC so the response time may be up to 80ms.
This command has two data bytes and is formatted in Linear_16u format.
VOUT_MARGIN_HIGH
The VOUT_MARGIN_HIGH command loads the unit with the voltage to which the output is to be changed, in volts,
when the OPERATION command is set to “Margin High”. The value must be greater than VOUT_COMMAND.
ThiscommandwillnotbeactedonduringTON_RISEandTOFF_FALLoutputsequencing.TheVOUT_TRANSITION_RATE
will be used if this command is modified while the output is active and in a steady-state condition.
This command has two data bytes and is formatted in Linear_16u format.
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PMBus COMMAND DETAILS
VOUT_COMMAND
The VOUT_COMMAND consists of two bytes and is used to set the output voltage, in volts.
ThiscommandwillnotbeactedonduringTON_RISEandTOFF_FALLoutputsequencing.TheVOUT_TRANSITION_RATE
will be used if this command is modified while the output is active and in a steady-state condition.
This command has two data bytes and is formatted in Linear_16u format.
VOUT_MARGIN_LOW
The VOUT_MARGIN_LOW command loads the unit with the voltage to which the output is to be changed, in volts,
when the OPERATION command is set to “Margin Low”. The value must be less than VOUT_COMMAND.
ThiscommandwillnotbeactedonduringTON_RISEandTOFF_FALLoutputsequencing.TheVOUT_TRANSITION_RATE
will be used if this command is modified while the output is active and in a steady-state condition.
This command has two data bytes and is formatted in Linear_16u format.
VOUT_UV_WARN_LIMIT
The VOUT_UV_ WARN_LIMIT command reads the value of the output voltage measured at the sense pins, in volts,
which causes an output voltage low warning.
In response to the VOUT_UV_WARN_LIMIT being exceeded, the device:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the VOUT bit in the STATUS_WORD
• Sets the VOUT Undervoltage Warning bit in the STATUS_VOUT command
• Notifies the host by asserting ALERT pin
This condition is detected by the ADC so the response time may be up to 80ms.
This command has two data bytes and is formatted in Linear_16u format.
VOUT_UV_FAULT_LIMIT
The VOUT_UV_FAULT_LIMIT command reads the value of the output voltage measured at the sense pins, in volts,
which causes an output undervoltage fault.
This command has two data bytes and is formatted in Linear_16u format.
POWER_GOOD_ON
The PGOOD pin and PGOOD status bit only reflect the OV/UV comparator status, the POWER_GOOD_ON command
does not impact part operation or status.
This command has two data bytes and is formatted in Linear_16u format.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
POWER_GOOD_OFF
The PGOOD pin and PGOOD status bit only reflect the OV/UV comparator status, the POWER_GOOD_OFF command
does not impact part operation or status.
This command has two data bytes and is formatted in Linear_16u format.
MFR_VOUT_MAX
The MFR_VOUT_MAX command is the maximum output voltage in volts the part can produce including
VOUT_OV_FAULT_LIMIT. If the output voltage is set to high range (Bit 6 of MFR_PWM_CONFIG_LTC3883 set to a 0)
MFR_VOUT_MAX is 5.5V. If the output voltage is set to low range (Bit 6 of MFR_PWM_CONFIG_LTC3883 set to a 1)
the MFR_VOUT_MAX is 2.75V. Entering a VOUT_COMMAND value greater than this will result in a CML fault and the
output voltage setting will be clamped to the maximum level. This will also result in Bit 3 VOUT_MAX_Warning in the
STATUS_VOUT command being set.
This read only command has 2 data bytes and is formatted in Linear_16u format.
CURRENT
Output Current Calibration
CMD
DATA
DEFAULT
VALUE
COMMAND NAME
CODE DESCRIPTION
TYPE
FORMAT UNITS NVM
IOUT_CAL_GAIN
0x38 The ratio of the voltage at the current sense pins to the sensed
current. For devices using a fixed current sense resistor, it is the
resistance value in mΩ.
R/W Word
L11
mΩ
Y
1.8
0xBB9A
MFR_IOUT_CAL_GAIN_ 0xF6 Temperature coefficient of the current sensing element.
TC
R/W Word
CF
Y
3900
0x0F3C
MFR_T_SELF_HEAT
0xB8 Reports the calculated self heat value attributed to the inductor.
R Word
L11
L11
C
NA
–1
MFR_IOUT_CAL_GAIN_ 0xB9 Coefficient used to emulate thermal time constant.
TAU_INV
R/W Word
s
Y
Y
0.0
0x8000
MFR_IOUT_CAL_GAIN_ 0xBA Used to calculate the instance inductor self heating effect.
THETA
R/W Word
L11
C/W
0.0
0x8000
IOUT_CAL_GAIN
The IOUT_CAL_GAIN command is used to set the resistance value of the current sense resistor in milliohms. (see
also MFR_IOUT_CAL_GAIN_TC).
This command has two data bytes and is formatted in Linear_5s_11s format.
MFR_IOUT_CAL_GAIN_TC
TheMFR_IOUT_CAL_GAIN_TCcommandallowstheusertoprogramthetemperaturecoefficientoftheIOUT_CAL_GAIN
sense resistor or inductor DCR in ppm/°C.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
This command has two data bytes and is formatted in 16-bit 2’s complement integer ppm. N = –32768 to 32767 •
–6
10 . Nominal temperature is 27°C. The IOUT_CAL_GAIN is multiplied by:
[1.0 + MFR_IOUT_CAL_GAIN_TC • (READ_TEMPERATURE_1-27)]. DCR sensing will have a typical value of 3900.
The IOUT_CAL_GAIN and MFR_IOUT_CAL_GAIN_TC impact all current parameters including: READ_IOUT, MFR_
READ_IIN_CHAN, IOUT_OC_FAULT_LIMIT and IOUT_OC_WARN_LIMIT.
MFR_T_SELF_HEAT, MFR_IOUT_CAL_GAIN_TAU_INV AND MFR_IOUT_CAL_GAIN_THETA
The LTC3883 uses an innovative (patent pending) algorithm to dynamically model the temperature rise from the
external temperature sensor to the inductor core. This temperature rise is called MFR_T_SELF_HEAT and is used to
calculate the final temperature correction required by IOUT_CAL_GAIN. The temperature rise is a function of the power
dissipated in the inductor DCR, the thermal resistance from the inductor core to the remote temperature sensor and
the thermal time constant of the inductor to board system. The algorithm simplifies the placement requirements for
the external temperature sensor and compensates for the significant steady state and transient temperature error from
the inductor core to the primary inductor heat sink.
The best way to understand the self heating effect inside the inductor is to model the system using the circuit analogy
of Figure 21. The 1st order differential equation for the above model may be approximated by the following difference
equation:
P – T /θ = C ∆T /∆t (Eq1) (when T = 0)
I
I
IS
τ
I
S
from which:
∆T = ∆t (P θ – T )/(θ C ) (Eq2) or
I
I
IS
I
IS
τ
∆T = (P θ – T ) • τ (Eq3)
I
I
IS
I
INV
where
τ
INV
= ∆t/(θ C ) (Eq4)
IS τ
and ∆t is the sample period of the external temperature ADC.
The LTC3883 implements the self heating algorithm using Eq3 and Eq4 where:
∆T = ∆MFR_T_SELF_HEAT
I
P = READ_IOUT • (V
– V
)
I
ISENSEP
ISENSEM
T = READ_TEMPERATURE_1
S
T = MFR_T_SELF_HEAT + T
I
S
∆t = 1s
τ
= MFR_IOUT_CAL_GAIN_TAU_INV
INV
ꢀ θ = MFR_IOUT_CAL_GAIN_THETA
IS
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Initially self heat is set to zero. After each temperature measurement self heat is updated to be the previous value of
self heat incremented or decremented by ∆MFR_T_SELF_HEAT.
The actual value of C is not required. The important quantity is the thermal time constant τ = (θ C ). For example,
τ
INV
IS τ
if an inductor has a thermal time constant τ
= 5 seconds then:
THERMAL
MFR_IOUT_CAL_GAIN_TAU_INV = ∆t / τ
= 1/5 = 0.2
THERMAL
Refer to the application section for more information on calibrating θ and τ
.
IS
INV
If the external temperature sense network fails to detect a READ_TEMPERATURE_1 reading of –50°C to 150°C, the
variable T in the self-heating algorithm will be set to a fixed value of –50°C. See READ_TEMPERATURE_1 for more
S
information.
MFR_T_SELF_HEAT is a read-only command that has two data bytes and is formatted in Linear_5_11s format.
MFR_IOUT_CAL_GAIN_TAU_INV has two data bytes and is formatted in Linear_5_11 format.
MFR_IOUT_CAL_GAIN_THETA has two data bytes and is formatted in Linear_5_11 format.
MFR_T_SELF_HEAT Data Content
Bit(s) Symbol
Operation
b[15:0] Mfr_t_self_heat
Values are limited to the range 0°C to 50°C.
MFR_IOUT_CAL_GAIN_THETA Data Content
Bit(s) Symbol
Operation
Values ≤ 0 set MFR_T_SELF_HEAT to zero.
b[15:0] Mfr_iout_cal_gain_theta
MFR_IOUT_CAL_GAIN_TAU_INV Data Content
Bit(s) Symbol
Operation
b[15:0] Mfr_iout_cal_gain_tau_inv
Values ≤ 0 set MFR_T_SELF_HEAT to zero.
Values ≥ 1 set MFR_T_SELF_HEAT to MFR_IOUT_CAL_GAIN_THETA • READ_IOUT • (V
– V
).
ISENSEP
ISENSEM
Output Current
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
IOUT_OC_FAULT_LIMIT
0x46
Output overcurrent fault limit.
R/W Word
L11
A
Y
29.75
0xDBB8
IOUT_OC_WARN_LIMIT
0x4A
Output overcurrent warning limit.
R/W Word
L11
A
Y
20.0
0xDA80
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PMBus COMMAND DETAILS
IOUT_OC_FAULT_LIMIT
The IOUT_OC_FAULT_LIMIT command sets the value of the peak output current limit, in amperes. When the controller
is in current limit, the overcurrent detector will indicate an overcurrent fault condition. The programmed overcurrent
fault limit value is rounded up to the nearest one of the following set of discrete values:
25mV/IOUT_CAL_GAIN
28.6mV/IOUT_CAL_GAIN
32.1mV/IOUT_CAL_GAIN
35.7mV/IOUT_CAL_GAIN
39.3mV/IOUT_CAL_GAIN
42.9mV/IOUT_CAL_GAIN
46.4mV/IOUT_CAL_GAIN
50mV/IOUT_CAL_GAIN
37.5mV/IOUT_CAL_GAIN
42.9mV/IOUT_CAL_GAIN
48.2mV/IOUT_CAL_GAIN
53.6mV/IOUT_CAL_GAIN
58.9mV/IOUT_CAL_GAIN
64.3mV/IOUT_CAL_GAIN
69.6mV/IOUT_CAL_GAIN
75mV/IOUT_CAL_GAIN
Low Range (1.5x Nominal Loop Gain)
MFR_PWM_MODE_LTC3883 [7]=0
High Range (Nominal Loop Gain)
MFR_PWM_MODE_LTC3883 [7]=1
Note: This is the peak of the current waveform. The READ_IOUT command returns the average current. The peak output
current limits are adjusted with temperature based on the MFR_IOUT_CAL_GAIN_TC using the equation:
Peak Current Limit = IOUT_CAL_GAIN • (1 + MFR_IOUT_CAL_GAIN_TC • (READ_TEMPERTURE_1-27.0)).
The LTpowerPlay GUI automatically convert the voltages to currents.
The I
range is set with bit 7 of the MFR_PWM_MODE_LTC3883 command.
OUT
The IOUT_OC_FAULT_LIMIT is ignored during TON_RISE and TOFF_FALL.
This command has two data bytes and is formatted in Linear_5s_11s format.
IOUT_OC_WARN_LIMIT
This command sets the value of the output current that causes an output overcurrent warning in amperes. The
READ_IOUT value will be used to determine if this limit has been exceeded.
In response to the IOUT_OC_WARN_LIMIT being exceeded, the device:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the IOUT bit in the STATUS_WORD
• Sets the IOUT Overcurrent Warning bit in the STATUS_IOUT command, and
• Notifies the host by asserting ALERT pin
This condition is detected by the ADC so the response time may be up to 80ms.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
The IOUT_OC_FAULT_LIMIT is ignored during TON_RISE and TOFF_FALL.
This command has two data bytes and is formatted in Linear_5s_11s format.
Input Current Calibration
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
DATA FORMAT UNITS
L11 mΩ
NVM
DEFAULT VALUE
MFR_IIN_CAL_GAIN
0xE8
The resistance value of the input current R/W Word
sense element in mΩ.
Y
5.000 0xCA80
MFR_IIN_CAL_GAIN
The IOUT_CAL_GAIN command is used to set the resistance value of the input current sense resistor in milliohms.
(see also READ_IIN).
This command has two data bytes and is formatted in Linear_5s_11s format.
Input Current
COMMAND NAME
CMD CODE DESCRIPTION
0x5D Input overcurrent warning limit.
TYPE
DATA FORMAT UNITS
L11
NVM
DEFAULT VALUE
IIN_OC_WARN_LIMIT
R/W Word
A
Y
10.0 0xD280
IIN_OC_WARN_LIMIT
The IIN_OC_WARN_LIMIT command sets the value of the input current, in amperes, that causes a warning indicating
the input current is high. The READ_IIN value will be used to determine if this limit has been exceeded.
In response to the IIN_OC_WARN_LIMIT being exceeded, the device:
• Sets the OTHER bit in the STATUS_BYTE
• Sets the INPUT bit in the upper byte of the STATUS_WORD
• Sets the IIN Overcurrent Warning bit in the STATUS_INPUT command, and
• Notifies the host by asserting ALERT pin
This condition is detected by the ADC so the response time may be up to 80ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
TEMPERATURE
External Temperature Calibration
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
DATA FORMAT UNITS NVM DEFAULT VALUE
MFR_TEMP_1_GAIN
0xF8
0xF9
Sets the slope of the external temperature
R/W Word
CF
Y
1.0
sensor.
0x4000
MFR_TEMP_1_OFFSET
Sets the offset of the external temperature
sensor with respect to –273.1°C.
R/W Word
L11
C
Y
0.0
0x8000
MFR_TEMP_1_GAIN
TheMFR_TEMP_1_GAINcommandwillmodifytheslopeoftheexternaltemperaturesensortoaccountfornon-idealities
in the element and errors associated with the remote sensing of the temperature in the inductor.
This command has two data bytes and is formatted in 16-bit 2’s complement integer. N = 8192 to 32767. The effective
–14
adjustment is N • 2 . The nominal value is 1.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_TEMP_1_OFFSET
The MFR_TEMP_1_OFFSET command will modify the offset of the external temperature sensor to account for non-
idealities in the element and errors associated with the remote sensing of the temperature in the inductor.
This command has two data bytes and is formatted in Linear_5s_11s format. The part starts the calculation with a
value of –273.15 so the default adjustment value is zero.
External Temperature Limits
COMMAND NAME
OT_FAULT_LIMIT
OT_WARN_LIMIT
UT_FAULT_LIMIT
CMD CODE DESCRIPTION
TYPE
DATA FORMAT
UNITS
NVM
DEFAULT VALUE
100.0 0xEB20
85.0 0xEAA8
0x4F
0x51
0x53
External overtemperature fault limit.
R/W Word
R/W Word
R/W Word
L11
L11
L11
C
C
C
Y
Y
Y
External overtemperature warning limit.
External undertemperature fault limit.
–40.0 0xE580
OT_FAULT_LIMIT
The OT_FAULT_LIMIT command sets the value of the external sense temperature, in degrees Celsius, which causes an
overtemperature fault. The READ_TEMPERATURE_1 value will be used to determine if this limit has been exceeded.
This condition is detected by the ADC so the response time may be up to 80ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
OT_WARN_LIMIT
The OT_WARN_LIMIT command sets the value of the external sense temperature, in degrees Celsius, which causes an
overtemperature warning. The READ_TEMPERATURE_1 value will be used to determine if this limit has been exceeded.
In response to the OT_WARN_LIMIT being exceeded, the device:
• Sets the TEMPERATURE bit in the STATUS_BYTE
• Sets the Overtemperature Warning bit in the STATUS_TEMPERATURE command, and
• Notifies the host by asserting ALERT pin.
This condition is detected by the ADC so the response time may be up to 80ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
UT_FAULT_LIMIT
The UT_FAULT_LIMIT command sets the value of the external sense temperature, in degrees Celsius, which causes
an undertemperature fault. The READ_TEMPERATURE_1 value will be used to determine if this limit has been
exceeded.
Note: If the temp sensors are not installed, the UT_FAULT_LIMIT can be set to –275°C and UT_FAULT_LIMIT response
set to ignore to avoid ALERT being asserted.
This condition is detected by the ADC so the response time may be up to 80ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
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PMBus COMMAND DETAILS
TIMING
Timing—On Sequence/Ramp
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
TON_DELAY
0x60
Time from RUN and/or Operation on to output R/W Word
rail turn-on.
L11
L11
ms
Y
0.0
0x8000
TON_RISE
0x61
Time from when the output starts to rise
until the output voltage reaches the VOUT
commanded value.
R/W Word
ms
Y
8.0
0xD200
TON_MAX_FAULT_LIMIT
VOUT_TRANSITION_RATE
0x62
0x27
Maximum time from V
on for VOUT to R/W Word
L11
L11
ms
Y
Y
10.0
OUT_EN
cross the VOUT_UV_FAULT_LIMIT.
0xD280
Rate the output changes when VOUT
commanded to a new value.
R/W Word
V/ms
0.25
0xAA00
TON_DELAY
The TON_DELAY command sets the time, in milliseconds, from when a start condition is received until the output
voltage starts to rise. Values from 0ms to 83 seconds are valid. The TON_DELAY will have a typical delay of 270µs
with an uncertainty of 50µs.
This command has two data bytes and is formatted in Linear_5s_11s format.
TON_RISE
The TON_RISE command sets the time, in milliseconds, from the time the output starts to rise to the time the output
enters the regulation band. Values from 0 to 1.3 seconds are valid. The part will be in discontinuous mode during
TON_RISE events. If TON_RISE is less than 0.25ms, the LTC3883 digital slope will be bypassed. The output voltage
transition will be controlled by the analog performance of the PWM switcher. The number of steps in TON_RISE is
equal to TON_RISE (in ms)/0.1ms with an uncertainty of 0.1ms.
This command has two data bytes and is formatted in Linear_5s_11s format.
TON_MAX_FAULT_LIMIT
The TON_MAX_FAULT_LIMIT command sets the value, in milliseconds, on how long the unit can attempt to power
up the output without reaching the output undervoltage fault limit.
A data value of 0ms means that there is no limit and that the unit can attempt to bring up the output voltage indefinitely.
The maximum limit is 83 seconds.
This command has two data bytes and is formatted in Linear_5s_11s format.
VOUT_TRANSITION_RATE
When a PMBus device receives either a VOUT_COMMAND or OPERATION (Margin High, Margin Low) that causes the
output voltage to change this command set the rate in V/ms at which the output voltage changes. This commanded
rate of change does not apply when the unit is commanded on or off. The maximum allowed slope is 4V/ms.
Values of greater than 0.1V/ms and less than or equal to 1V/ms are recommended. If a transition rate out of this range
is desired, contact the factory for more information.
This command has two data bytes and is formatted in Linear_5s_11s format.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Timing—Off Sequence/Ramp
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
TOFF_DELAY
0x64
0x65
0x66
Time from RUN and/or Operation off to the start R/W Word
of TOFF_FALL ramp.
Time from when the output starts to fall until the R/W Word
output reaches zero volts.
L11
L11
L11
ms
Y
0.0
0x8000
TOFF_FALL
ms
ms
Y
Y
8.0
0xD200
150
0xF258
TOFF_MAX_WARN_LIMIT
Maximum allowed time, after TOFF_FALL
completed, for the unit to decay below 12.5%.
R/W Word
TOFF_DELAY
The TOFF_DELAY command sets the time, in milliseconds, from when a stop condition is received until the output
voltage starts to fall. Values from 0 to 83 seconds are valid. The TON_DELAY will have a typical delay of 270µs with
an uncertainty of 50µs.
This command is excluded from fault events.
This command has two data bytes and is formatted in Linear_5s_11s format.
TOFF_FALL
The TOFF_FALL command sets the time, in milliseconds, from the end of the turn-off delay time until the output volt-
age is commanded to zero. It is the ramp time of the V
DAC. When the V
DAC is zero, the part will three-state.
OUT
OUT
The part will maintain the mode of operation programmed. For defined TOFF_FALL times, the user should set the part
to continuous conduction mode. Loading the max value indicates the part will ramp down at the slowest possible rate.
The minimum supported fall time is 0.25ms. A value less than 0.25ms will result in a 0.25ms ramp. The maximum
fall time is 1.3 seconds. The number of steps in TOFF_FALL is equal to TOFF_FALL (in ms)/0.1ms with an uncertainty
of 0.1ms.
In discontinuous conduction mode, the controller will not draw current from the load and the fall time will be set by
the output capacitance and load current.
This command has two data bytes and is formatted in Linear_5s_11s format.
TOFF_MAX_WARN_LIMIT
The TOFF_MAX_WARN_LIMIT command sets the value, in milliseconds, on how long the unit can attempt to turn off
the output until a warning is asserted. The output is considered off when the V
voltage is less than 12.5% of the
OUT
programmed VOUT_COMMAND value. The calculation begins after TOFF_FALL is complete. TOFF_MAX_WARN_LIMIT
is not enabled if VOUT_DECAY is disabled.
A data value of 0ms means that there is no limit and that the unit can attempt to turn off the output voltage indefinitely.
Other than 0, values from 120ms to 524 seconds are valid.
This command has two data bytes and is formatted in Linear_5s_11s format.
Precondition for Restart
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
MFR_RESTART_ DELAY
0xDC
Minimum time the RUN pin is held low by the R/W Word
LTC3883.
L11
ms
Y
500
0xFBE8
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PMBus COMMAND DETAILS
MFR_RESTART_DELAY
This command specifies the minimum RUN off time in milliseconds. This device will pull the RUN pin low for this length
of time once a falling edge of RUN has been detected. The minimum recommended value is 136ms.
Note: The restart delay is different than the retry delay. The restart delay pulls RUN low for the specified time, after
which a standard start-up sequence is initiated. The minimum restart delay should be equal to TOFF_DELAY + TOFF_
FALL + 136ms. Valid values are from 136ms to 65.52 seconds in 16ms increments. To assure a minimum off time,
set the MFR_RESTART_DELAY 16mS longer than the desired time. The output rail can be off longer than the MFR_
RESTART_DELAY after the RUN pin is pulled high if the output decay bit 0 is enabled in MFR_CHAN_CONFIG_LTC3883
and the output takes a long time to decay below 12.5% of the programmed value.
This command has two data bytes and is formatted in Linear_5s_11s format.
FAULT RESPONSE
Fault Responses All Faults
DATA
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
0xDB Retry interval during FAULT retry mode.
TYPE
FORMAT
UNITS
NVM
MFR_RETRY_ DELAY
R/W Word
L11
ms
Y
350
0xFABC
MFR_RETRY_DELAY
This command sets the time in milliseconds between retries if the fault response is to retry the controller at specified
intervals. This command value is used for all fault responses that require retry. The retry time starts once the fault has
been detected by the offending channel. Valid values are from 120ms to 83.88 seconds in 10µs increments.
Note: The retry delay time is determined by the longer of the MFR_RETRY_DELAY command or the time required
for the regulated output to decay below 12.5% of the programmed value. If the natural decay time of the output is
too long, it is possible to remove the voltage requirement of the MFR_RETRY_DELAY command by asserting bit 0 of
MFR_CHAN_CONFIG_LTC3883.
This command has two data bytes and is formatted in Linear_5s_11s format.
Fault Responses Input Voltage
DATA
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
0x56 Action to be taken by the device when an
input supply overvoltage fault is detected.
TYPE
FORMAT
UNITS
NVM
VIN_OV_FAULT_RESPONSE
R/W Byte
Reg
Y
0x80
VIN_OV_FAULT_RESPONSE
The VIN_OV_FAULT_RESPONSE command instructs the device on what action to take in response to an input over-
voltage fault. The data byte is in the format given in Table 9.
The device also:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Set the INPUT bit in the upper byte of the STATUS_WORD
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PMBus COMMAND DETAILS
• Sets the VIN Overvoltage Fault bit in the STATUS_INPUT command, and
• Notifies the host by asserting ALERT pin
This command has one data byte.
Fault Responses Output Voltage
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
VOUT_OV_FAULT_RESPONSE
0x41
0x45
0x63
Action to be taken by the device when an
R/W Byte
Reg
Reg
Reg
Y
0xB8
0xB8
0xB8
output overvoltage fault is detected.
VOUT_UV_FAULT_RESPONSE
Action to be taken by the device when an
output undervoltage fault is detected.
R/W Byte
R/W Byte
Y
Y
TON_MAX_FAULT_
RESPONSE
Action to be taken by the device when a
TON_MAX_FAULT event is detected.
VOUT_OV_FAULT_RESPONSE
The VOUT_OV_FAULT_RESPONSE command instructs the device on what action to take in response to an output
overvoltage fault. The data byte is in the format given in Table 5.
The device also:
• Sets the VOUT_OV bit in the STATUS_BYTE
• Sets the VOUT bit in the STATUS_WORD
• Sets the VOUT Overvoltage Fault bit in the STATUS_VOUT command
• Notifies the host by asserting ALERT pin
The only values recognized for this command are:
0x00–Part performs OV pull down only, or OV_PULLDOWN.
0x80–The device shuts down (disables the output) and the unit does not attempt to retry. (PMBus, Part II, Section 10.7).
0xB8–The device shuts down (disables the output) and device attempts to retry continuously, without limitation, until
it is commanded OFF (by the RUN pin or OPERATION command or both), bias power is removed, or another fault
condition causes the unit to shut down.
0x4n The device shuts down and the unit does not attempt to retry. The output remains disabled until the part is com-
manded OFF then ON or the RUN pin is asserted low then high or RESET through the command or removal of VIN.
The OV fault must remain active for a period of n • 10µs, where n is a value from 0 to 7.
0x78+n The device shuts down and the unit attempts to retry continuously until either the fault condition is cleared
or the part is commanded OFF then ON or the RUN pin is asserted low then high or RESET through the command or
removal of VIN. The OV fault must remain active for a period of n • 10µs, where n is a value from 0 to 7.
Any other value will result in a CML fault and the write will be ignored.
This command has one data byte.
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LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Table 5ꢀ VOUT_OV_FAULT_RESPONSE Data Byte Contents
BITS DESCRIPTION
VALUE MEANING
7:6
Response
00
Part performs OV pull down only or OV_PULLDOWN
(i.e., turns off the top MOSFET and turns on lower MOSFET
while V is > VOUT_OV_FAULT)
For all values of bits [7:6], the LTC3883:
• Sets the corresponding fault bit in the status commands and
• Notifies the host by asserting ALERT pin
OUT
01
The PMBus device continues operation for the delay time
specified by bits [2:0] and the delay time unit specified for that
particular fault. If the fault condition is still present at the end of
the delay time, the unit responds as programmed in the Retry
Setting (bits [5:3]).
The fault bit, once set, is cleared only when one or more of the
following events occurs:
• The device receives a CLEAR_FAULTS command.
10
11
The device shuts down immediately (disables the output) and
responds according to the retry setting in bits [5:3].
• The output is commanded through the RUN pin, the OPERATION
command, or the combined action of the RUN pin and
OPERATION command, to turn off and then to turn back on, or
Not supported. Writing this value will generate a CML fault.
• Bias power is removed and reapplied to the LTC3883.
Retry Setting
5:3
2:0
000
111
The unit does not attempt to restart. The output remains
disabled until the fault is cleared until the device is commanded
OFF bias power is removed.
The PMBus device attempts to restart continuously, without
limitation, until it is commanded OFF (by the RUN pin or
OPERATION command or both), bias power is removed, or
another fault condition causes the unit to shut down without
retry. Note: The retry interval is set by the MFR_RETRY_DELAY
command.
Delay Time
000-111 The delay time in 10µs increments. This delay time determines
how long the controller continues operating after a fault is
detected. Only valid for deglitched off state.
VOUT_UV_FAULT_RESPONSE
The VOUT_UV_FAULT_RESPONSE command instructs the device on what action to take in response to an output
undervoltage fault. The data byte is in the format given in Table 6.
The device also:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the VOUT bit in the STATUS_WORD
• Sets the VOUT undervoltage fault bit in the STATUS_VOUT command
• Notifies the host by asserting ALERT pin
The UV fault and warn are masked until the following criteria are achieved:
1) The TON_MAX_FAULT_LIMIT has been reached
2) The TON_DELAY sequence has completed
3) The TON_RISE sequence has completed
4) The VOUT_UV_FAULT_LIMIT threshold has been reached
5) The IOUT_OC_FAULT_LIMIT is not present
The UV fault and warn are masked whenever the channel is not active.
The UV fault and warn are masked during TON_RISE and TOFF_FALL sequencing.
This command has one data byte.
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PMBus COMMAND DETAILS
Table 6ꢀ VOUT_UV_FAULT_RESPONSE Data Byte Contents
BITS DESCRIPTION
VALUE MEANING
7:6
Response
00
The PMBus device continues operation without interruption.
(Ignores the fault functionally)
For all values of bits [7:6], the LTC3883:
• Sets the corresponding fault bit in the status commands and
• Notifies the host by asserting ALERT pin
01
The PMBus device continues operation for the delay time
specified by bits [2:0] and the delay time unit specified for
that particular fault. If the fault condition is still present at the
end of the delay time, the unit responds as programmed in the
Retry Setting (bits [5:3]).
The fault bit, once set, is cleared only when one or more of the
following events occurs:
• The device receives a CLEAR_FAULTS command
10
11
The device shuts down (disables the output) and responds
according to the retry setting in bits [5:3].
• The output is commanded through the RUN pin, the OPERATION
command, or the combined action of the RUN pin and
OPERATION command, to turn off and then to turn back on, or
Not supported. Writing this value will generate a CML fault.
• Bias power is removed and reapplied to the LTC3883
Retry Setting
5:3
2:0
000
111
The unit does not attempt to restart. The output remains
disabled until the fault is cleared until the device is commanded
OFF bias power is removed.
The PMBus device attempts to restart continuously, without
limitation, until it is commanded OFF (by the RUN pin or
OPERATION command or both), bias power is removed, or
another fault condition causes the unit to shut down without
retry. Note: The retry interval is set by the MFR_RETRY_DELAY
command.
Delay Time
000-111 The delay time in 10µs increments. This delay time determines
how long the controller continues operating after a fault is
detected. Only valid for deglitched off state.
TON_MAX_FAULT_RESPONSE
The TON_MAX_FAULT_RESPONSE command instructs the device on what action to take in response to a TON_MAX
fault. The data byte is in the format given in Table 9.
The device also:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the VOUT bit in the STATUS_WORD
• Sets the TON_MAX_FAULT bit in the STATUS_VOUT command, and
• Notifies the host by asserting ALERT pin
A value of 0 disables the TON_MAX_FAULT_RESPONSE. It is not recommended to use 0.
This command has one data byte.
Fault Responses Output Current
DATA
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
0x47 Action to be taken by the device when an
output overcurrent fault is detected.
TYPE
FORMAT
UNITS
NVM
IOUT_OC_FAULT_RESPONSE
R/W Byte
Reg
Y
0x00
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PMBus COMMAND DETAILS
IOUT_OC_FAULT_RESPONSE
The IOUT_OC_FAULT_RESPONSE command instructs the device on what action to take in response to an output
overcurrent fault. The data byte is in the format given in Table 7.
The device also:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the IOUT_OC bit in the STATUS_BYTE
• Sets the IOUT bit in the STATUS_WORD
• Sets the IOUT Overcurrent Fault bit in the STATUS_IOUT command, and
• Notifies the host by asserting ALERT pin
This command has one data byte.
Table 7ꢀ IOUT_OC_FAULT_RESPONSE Data Byte Contents
BITS DESCRIPTION
VALUE MEANING
7:6
Response
00
The LTC3883 continues to operate indefinitely while maintaining
the output current at the value set by IOUT_OC_FAULT_LIMIT
without regard to the output voltage (known as constant-
current or brick-wall limiting).
For all values of bits [7:6], the LTC3883:
• Sets the corresponding fault bit in the status commands and
• Notifies the host by asserting ALERT pin
01
10
Not supported.
The fault bit, once set, is cleared only when one or more of the
following events occurs:
The LTC3883 continues to operate, maintaining the output
current at the value set by IOUT_OC_FAULT_LIMIT without
regard to the output voltage, for the delay time set by bits [2:0].
If the device is still operating in current limit at the end of the
delay time, the device responds as programmed by the Retry
Setting in bits [5:3].
• The device receives a CLEAR_FAULTS command
• The output is commanded through the RUN pin, the OPERATION
command, or the combined action of the RUN pin and
OPERATION command, to turn off and then to turn back on, or
11
The LTC3883 shuts down immediately and responds as
programmed by the Retry Setting in bits [5:3].
• Bias power is removed and reapplied to the LTC3883.
Retry Setting
5:3
2:0
000
The unit does not attempt to restart. The output remains
disabled until the fault is cleared by cycling the RUN pin or
removing bias power.
111
The device attempts to restart continuously, without limitation,
until it is commanded OFF (by the RUN pin or OPERATION
command or both), bias power is removed, or another fault
condition causes the unit to shut down. Note: The retry interval
is set by the MFR_RETRY_DELAY command.
Delay Time
000-111 The number of delay time units in 16ms increments. This
delay time is used to determine the amount of time a unit is
to continue operating after a fault is detected before shutting
down. Only valid for deglitched off response.
Fault Responses IC Temperature
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
MFR_OT_FAULT_
RESPONSE
0xD6
Action to be taken by the device when an
internal overtemperature fault is detected
R Byte
Reg
0xC0
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PMBus COMMAND DETAILS
MFR_OT_FAULT_RESPONSE
The MFR_OT_FAULT_RESPONSE command byte instructs the device on what action to take in response to an internal
overtemperature fault. The data byte is in the format given in Table 8.
The LTC3883 also:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the MFR bit in the STATUS_WORD, and
• Sets the Overtemperature Fault bit in the STATUS_MFR_SPECIFIC command
• Notifies the host by asserting ALERT pin
This command has one data byte.
Table 8ꢀ Data Byte Contents MFR_OT_FAULT_RESPONSE
BITS DESCRIPTION
VALUE MEANING
7:6
Response
00
01
10
Not supported. Writing this value will generate a CML fault.
For all values of bits [7:6], the LTC3883:
• Sets the corresponding fault bit in the status commands and
• Notifies the host by asserting ALERT pin
Not supported. Writing this value will generate a CML fault
The device shuts down immediately (disables the output) and
responds according to the retry setting in bits [5:3].
11
The device’s output is disabled while the fault is present.
Operation resumes and the output is enabled when the fault
condition no longer exists.
The fault bit, once set, is cleared only when one or more of the
following events occurs:
• The device receives a CLEAR_FAULTS command
• The output is commanded through the RUN pin, the OPERATION
command, or the combined action of the RUN pin and
OPERATION command, to turn off and then to turn back on, or
• Bias power is removed and reapplied to the LTC3883
Retry Setting
5:3
2:0
000
The unit does not attempt to restart. The output remains
disabled until the fault is cleared.
001-111 Not supported. Writing this value will generate CML fault.
Delay Time
XXX
Not supported. Value ignored
Fault Responses External Temperature
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
OT_FAULT_ RESPONSE
0x50
Action to be taken by the device when an external R/W Byte
overtemperature fault is detected,
Reg
Y
0xB8
UT_FAULT_ RESPONSE
0x54
Action to be taken by the device when an external R/W Byte
undertemperature fault is detected.
Reg
Y
0xB8
OT_FAULT_RESPONSE
The OT_FAULT_RESPONSE command instructs the device on what action to take in response to an external overtem-
perature fault on the external temp sensors. The data byte is in the format given in Table 9.
The device also:
• Sets the TEMPERATURE bit in the STATUS_BYTE
• Sets the Overtemperature Fault bit in the STATUS_TEMPERATURE command, and
• Notifies the host by asserting ALERT pin
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This condition is detected by the ADC so the response time may be up to 80ms.
This command has one data byte.
UT_FAULT_RESPONSE
The UT_FAULT_RESPONSE command instructs the device on what action to take in response to an external under-
temperature fault on the external temp sensors. The data byte is in the format given in Table 9.
The device also:
• Sets the TEMPERATURE bit in the STATUS_BYTE
• Sets the Undertemperature Fault bit in the STATUS_TEMPERATURE command, and
• Notifies the host by asserting ALERT pin
This condition is detected by the ADC so the response time may be up to 80ms.
This command has one data byte.
Table 9ꢀ Data Byte Contents: TON_MAX_FAULT_RESPONSE, VIN_OV_FAULT_RESPONSE,
OT_FAULT_RESPONSE, UT_FAULT_RESPONSE
BITS DESCRIPTION
VALUE MEANING
7:6
Response
00
01
10
The PMBus device continues operation without interruption.
For all values of bits [7:6], the LTC3883:
• Sets the corresponding fault bit in the status commands, and
• Notifies the host by asserting ALERT pin
Not supported. Writing this value will generate a CML fault.
The device shuts down immediately (disables the output) and
responds according to the retry setting in bits [5:3].
11
Not supported. Writing this value will generate a CML fault.
The fault bit, once set, is cleared only when one or more of the
following events occurs:
• The device receives a CLEAR_FAULTS command
• The output is commanded through the RUN pin, the OPERATION
command, or the combined action of the RUN pin and
OPERATION command, to turn off and then to turn back on, or
• Bias power is removed and reapplied to the LTC3883
Retry Setting
5:3
2:0
000
111
The unit does not attempt to restart. The output remains
disabled until the fault is cleared until the device is commanded
OFF bias power is removed.
The PMBus device attempts to restart continuously, without
limitation, until it is commanded OFF (by the RUN pin or
OPERATION command or both), bias power is removed, or
another fault condition causes the unit to shut down without
retry. Note: The retry interval is set by the MFR_RETRY_DELAY
command.
Delay Time
XXX
Not supported. Values ignored
FAULT SHARING
Fault Sharing Propagation
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
MFR_GPIO_
PROPAGATE_LTC3883
0xD2
Configuration that determines which faults are
propagated to the GPIO pin.
R/W Word
Reg
Y
0x2993
3883fe
88
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_GPIO_PROPAGATE_LTC3883
The MFR_GPIO_PROPAGATE_LTC3883 command enables the events that can cause the GPIO pin to assert low. The
command is formatted as shown in Table 10. Faults can only be propagated to the GPIO pin if they are programmed
to respond to faults.
This command has two data bytes.
Table 10: GPIO Propagate Configuration
The GPIO pin is designed to provide electrical notification of selected events to the user.
BIT(S)
SYMBOL
OPERATION
B[15]
VOUT disabled while not decayed.
This status bit is used in a PolyPhase configuration when bit 0 of the MFR_CHAN_CONFIG_
LTC3883 is a zero. If the PWM is turned off, by toggling the RUN pin or commanding the part OFF,
and then the RUN is reasserted or the part is commanded back on before the output has decayed,
VOUT will not restart until the 12.5% decay is honored. The GPIO pin is asserted during this
condition if bit 15 is asserted.
B[14]
b[13]
Mfr_gpio_propagate_short_CMD_cycle 0: No action
1: This status bit asserts low if commanded off then on before the output has sequenced off.
Re-asserts high after sequence off.
Mfr_gpio_propagate_ton_max_fault
0: No action if a TON_MAX_FAULT fault is asserted
1: GPIO will be asserted low if a TON_MAX_FAULT fault is asserted
b[12]
b[11]
Reserved
Mfr_gpio_propagate_int_ot
0: No action if the MFR_OT_FAULT_LIMIT fault is asserted
1: Output will be asserted low if the MFR_OT_FAULT_LIMIT fault is asserted
Must be set to 0
b[10]
b[9]
Reserved
Reserved
b[8]
Mfr_gpio_propagate_ut
0: No action if the UT_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the UT_FAULT_LIMIT fault is asserted
0: No action if the OT_FAULT_LIMIT fault is asserted
b[7]
Mfr_gpio_propagate_ot
1: GPIO will be asserted low if the OT_FAULT_LIMIT fault is asserted
b[6]
b[5]
b[4]
Reserved
Reserved
Mfr_gpio_propagate_input_ov
0: No action if the VIN_OV_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the VIN_OV_FAULT_LIMIT fault is asserted
b[3]
b[2]
Reserved
Mfr_gpio_propagate_iout_oc
0: No action if the IOUT_OC_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the IOUT_OC_FAULT_LIMIT fault is asserted
0: No action if the VOUT_UV_FAULT_LIMIT fault is asserted
b[1]
Mfr_gpio_propagate_vout_uv
Mfr_gpio_propagate_vout_ov
1: GPIO will be asserted low if the VOUT_UV_FAULT_LIMIT fault is asserted
If this fault bit is asserted, GPIO is low anytime VOUT is below the UV threshold due to a fault. A
UV fault can only occur when the part is in a steady-state ON condition.
0: No action if the VOUT_OV_FAULT_LIMIT fault is asserted
b[0]
1: GPIO will be asserted low if the VOUT_OV_FAULT_LIMIT fault is asserted
3883fe
89
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Fault Sharing Response
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
MFR_GPIO_RESPONSE
0xD5
Action to be taken by the device when the GPIO pin R/W Byte
is asserted low.
Reg
Y
0xC0
MFR_GPIO_RESPONSE
This command determines the controller’s response to the GPIO pin being pulled low by an external source.
VALUE
0xC0
0x00
MEANING
GPIO_INHIBIT The LTC3883 will three-state the output in response to the GPIO pin pulled low.
GPIO_IGNORE The LTC3883 continues operation without interruption.
The device also:
• Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE
• Sets the MFR bit in the STATUS_WORD
• Sets the GPIO bit in the STATUS_MFR_SPECIFIC command, and notifies the host by asserting ALERT pin. The ALERT
pin pulled low can be disabled by setting bit[1] of MFR_CHAN_CFG_LTC3883.
This command has one data byte.
SCRATCHPAD
DATA
DEFAULT
VALUE
COMMAND NAME
USER_DATA_00
USER_DATA_01
USER_DATA_02
USER_DATA_03
USER_DATA_04
CMD CODE DESCRIPTION
TYPE
OEM reserved. Typically used for part serialization. R/W Word
Manufacturer reserved for LTpowerPlay. R/W Word
OEM reserved. Typically used for part serialization. R/W Word
FORMAT
UNITS
NVM
0xB0
0xB1
0xB2
0xB3
0xB4
Reg
Reg
Reg
Reg
Reg
Y
Y
Y
Y
Y
NA
NA
NA
A NVM word available for the user.
A NVM word available for the user.
R/W Word
R/W Word
0x0000
0x0000
USER_DATA_00 THROUGH USER_DATA_04
These commands are non-volatile memory locations for customer storage. The customer has the option to write any
value to the USER_DATA_nn at any time. However, the LTpowerPlay software and contract manufacturers use some of
these commands for inventory control. Modifying the reserved USER_DATA_nn commands may lead to undesirable
inventory control and incompatibility with these products.
These commands have 2 data bytes and are in register format.
IDENTIFICATION
DATA
DEFAULT
VALUE
COMMAND NAME
PMBUS_REVISION
CAPABILITY
CMD CODE DESCRIPTION
TYPE
FORMAT UNITS NVM
0x98
0x19
PMBus revision supported by this device. Current revision is 1.1. R Byte
Reg
Reg
FS
0x11
0xB0
Summary of PMBus optional communication protocols
supported by this device.
R Byte
MFR_ID
0x99
0x9A
0xE7
The manufacturer ID of the LTC3883 in ASCII.
Manufacturer part number in ASCII.
R String
R String
R Word
ASC
ASC
Reg
LTC
MFR_MODEL
MFR_SPECIAL_ID
LTC3883
Manufacturer code representing the LTC3883.
0x430X
3883fe
90
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
PMBus_REVISION
The PMBUS_REVISION command indicates the revision of the PMBus to which the device is compliant. The LTC3883
is PMBus Version 1.1 compliant in both Part I and Part II.
This read-only command has one data byte.
CAPABILITY
This command provides a way for a host system to determine some key capabilities of a PMBus device.
The LTC3883 supports packet error checking, 400kHz bus speeds, and ALERT pin.
This read-only command has one data byte.
MFR_ID
The MFR_ID command indicates the manufacturer ID of the LTC3883 using ASCII characters.
This read-only command is in block format.
MFR_MODEL
The MFR_MODEL command indicates the manufacturer’s part number of the LTC3883 using ASCII characters.
This read-only command is in block format.
MFR_SPECIAL_ID
The 16-bit word representing the part name and revision. 0x43 denotes the part is an LTC3883, X is adjustable by the
manufacturer.
This read-only command has two data bytes.
FAULT WARNING AND STATUS
DEFAULT
COMMAND NAME
CLEAR_FAULTS
MFR_CLEAR_PEAKS
STATUS_BYTE
CMD CODE DESCRIPTION
TYPE
FORMAT
UNITS
NVM
VALUE
NA
NA
0x03
0xE3
0x78
Clear any fault bits that have been set.
Clears all peak values.
One byte summary of the unit’s fault
condition.
Send Byte
Send Byte
R/W Byte
Reg
NA
STATUS_WORD
STATUS_VOUT
STATUS_IOUT
STATUS_INPUT
STATUS_ TEMPERATURE
0x79
0x7A
0x7B
0x7C
0x7D
Two byte summary of the unit’s fault condition. R/W Word
Reg
Reg
Reg
Reg
Reg
NA
NA
NA
NA
NA
Output voltage fault and warning status.
Output current fault and warning status.
Input supply fault and warning status.
R/W Byte
R/W Byte
R/W Byte
R/W Byte
External temperature fault and warning status
for READ_TEMERATURE_1.
STATUS_CML
0x7E
0x80
Communication and memory fault and
warning status.
Manufacturer specific fault and state
information.
R/W Byte
R/W Byte
Reg
Reg
NA
NA
STATUS_MFR_ SPECIFIC
MFR_PADS
MFR_COMMON
0xE5
0xEF
Digital status of the I/O pads.
Manufacturer status bits that are common
across multiple ADI chips.
R Word
R Byte
Reg
Reg
NA
NA
MFR_INFO
0xB6
Manufacturing Specific Information
R Byte
Reg
N/A
3883fe
91
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
CLEAR_FAULTS
The CLEAR_FAULTS command is used to clear any fault bits that have been set. This command clears all bits in all
status commands simultaneously. At the same time, the device negates (clears, releases) its ALERT pin signal output
if the device is asserting the ALERT pin signal.
The CLEAR_FAULTS does not cause a unit that has latched off for a fault condition to restart. Units that have shut
down for a fault condition are restarted when:
• The output is commanded through the RUN pin, the OPERATION command, or the combined action of the RUN pin
and OPERATION command, to turn off and then to turn back on, or
• MFR_RESET command is issued.
• Bias power is removed and reapplied to the integrated circuit
If the fault is still present when the bit is cleared, the fault bit will remain set and the host notified by asserting the
ALERT pin pin low. CLEAR_FAULTS can take up to 10µs to process. If a fault occurs within that time frame it may be
cleared before the status register is set.
This write-only command has no data bytes.
MFR_CLEAR_PEAKS
The MFR_CLEAR_PEAKS command clears the MFR_*_PEAK data values. The MFR_RESET command will initiate this
command.
This write-only command has no data bytes.
STATUS_BYTE
The STATUS_BYTE command returns one byte of information with a summary of the most critical faults. This is the
lower byte of the status word.
The following status bits can be cleared by writing a 1 to their position in the STATUS_BYTE command:
[7] BUSY
This permits the user to clear status by means other than using the CLEAR_FAULTS command. This is also the only
bit of this command that can initiate an ALERT event.
[6] Bit 6 of this command will be set whenever the PWM is turned off. Setting this bit does not assert ALERT.
This command has one data byte.
STATUS_WORD
The STATUS_WORD command returns two bytes of information with a summary of the unit’s fault condition. The
low byte of STATUS_WORD is typically the same as the STATUS_BYTE command. When polling STATUS_WORD, if a
fault occurs at the exact right time, the read value can have a bit set in the lower byte with no corresponding bits set in
the upper byte. An immediate second read of STATUS_WORD will have the corresponding bits in the upper byte set.
The following status bits can be cleared by writing a 1 to their position in the STATUS_WORD command:
[8] UNKNOWN
3883fe
92
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
[7] BUSY
This permits the user to clear status by means other than using the CLEAR_FAULTS command. These are also the
only bits of this command that can initiate an ALERT event.
[6] Bit 6 of this command will be set whenever the output is turned off.
[11] Bit 11 of this command will be set whenever the output voltage is outside of the 0V/UV thresholds.
If any of the bits in the upper byte are set, NONE_OF_THE_ABOVE is asserted.
[14] Bit 14 of this command will be set by an IOUT_OC Warning or IOUT_OC Fault condition.
This command has two data bytes.
STATUS_VOUT
The STATUS_VOUT commands returns one byte with status information on V
Bit 0 of this command is undefined and reserved in the LTC3883.
.
OUT
The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear
status by means other than using the CLEAR_FAULTS command.
Any supported fault bit in this command will initiate an ALERT event.
This command has one data byte.
STATUS_IOUT
The STATUS_IOUT commands returns one byte with status information on I
Only bits 7, 6, and 5 are supported in the LTC3883.
.
OUT
The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear
status by means other than using the CLEAR_FAULTS command.
Any supported fault bit in this command will initiate an ALERT event.
This command has one data byte.
STATUS_INPUT
The STATUS_INPUT commands returns one byte with status information on V .
IN
Only bits 7, 5 and 1 are supported in the LTC3883.
The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear
status by means other than using the CLEAR_FAULTS command.
Any supported fault bit in this command will initiate an ALERT event. Bit 3 of this command is not latched and will not
generate an ALERT even if it is set.
This command has one data byte.
3883fe
93
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
STATUS_TEMPERATURE
The STATUS_TEMPERATURE commands returns one byte with status information on temperature. This command is
related to the respective READ_TEMPERATURE_1 value.
Only bits 7, 6 and 4 are supported in the LTC3883.
The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear
status by means other than using the CLEAR_FAULTS command.
Any supported fault bit in this command will initiate an ALERT event.
This command has one data byte.
STATUS_CML
The STATUS_CML commands returns one byte with the status information on received commands and system
memory/logic.
Bit 2 of this command is not supported in the LTC3883.
If either bit 3 or bit 4 of this command is set, a serious and significant internal error has been detected. Continued
operation of the part is not recommended if these bits are continuously set.
The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear
status by means other than using the CLEAR_FAULTS command.
Any supported fault bit in this command will initiate an ALERT event.
This command has one data byte.
STATUS_MFR_SPECIFIC
The STATUS_MFR_SPECIFIC commands returns one byte with the manufacturer specific status information.
The format for this byte is:
BIT MEANING
7
6
5
4
3
2
0
Internal Temperature Fault Limit Exceeded.
Internal Temperature Warn Limit Exceeded.
Factory Trim Area NVM CRC Fault.
PLL is Unlocked
Fault Log Present
V
DD33
UV or OV Fault
GPIO Pin Asserted Low by External Device
If any of these bits are set, the MFR bit in the STATUS_WORD will be set.
The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear
status by means other than using the CLEAR_FAULTS command. Exception: The fault log present bit can only be
cleared by issuing the MFR_FAULT_LOG_CLEAR command.
Any supported fault bit in this command will initiate an ALERT event.
This command has one data byte.
3883fe
94
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_PADS
This command provides the user a means of directly reading the digital status of the I/O pins of the device. The bit
assignments of this command are as follows:
BIT ASSIGNED DIGITAL PIN
15
14
V
V
OV Fault
UV Fault
DD33
DD33
13 Reserved
12 Reserved
11 ADC Values Invalid, Occurs During Start-Up
10 Device Driving ALERT Low
9
8
7
6
5
4
3
2
1
0
Reserved
Power Good
Reserved
Device Driving RUN Low
Reserved
RUN
Reserved
Device Driving GPIO Low
Reserved
GPIO
A 1 indicates the condition is true.
This read-only command has two data bytes.
MFR_COMMON
The MFR_COMMON command contains bits that are common to all LTC digital power and telemetry products.
BIT
7
MEANING
Chip Not Driving ALERT Low
Busy when Low
6
5
Calculations Not Pending
Output in Transition when Low
NVM Initialized
4
3
2
Reserved
1
SHARE_CLK Timeout
WP Pin Status
0
This read-only command has one data byte.
3883fe
95
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_INFO
The MFR_INFO command contains additional status bits that are LTC3883 specific and may be common to multiple
LTC PSM products.
MFR_INFO Data Contents:
BIT MEANING
15:6 Reserved
5
EEPROM ECC status
0: Corrections made in the EEPROM user space
1: No corrections made in the EEPROM user space
4:0 Reserved
EEPROM ECC status is updated after each RESTORE_USER_ALL or RESET command, a power-on reset or an EEPROM
bulk read operation. This read-only command has two data bytes.
TELEMETRY
CMD
DEFAULT
VALUE
COMMAND NAME
READ_VIN
READ_IIN
READ_VOUT
READ_IOUT
CODE DESCRIPTION
TYPE
FORMAT
L11
L11
L16
L11
UNITS
NVM
0x88 Measured input supply voltage.
0x89 Measured input supply current.
0x8B Measured output voltage.
0x8C Measured output current.
0x8D External diode junction temperature. This is the value R Word
used for all temperature related processing, including
IOUT_CAL_GAIN.
R Word
R Word
R Word
R Word
V
A
V
A
C
NA
NA
NA
NA
NA
READ_TEMPERATURE_1
L11
READ_TEMPERATURE_2
0x8E Internal junction temperature. Does not affect any
other commands.
R Word
L11
C
NA
READ_DUTY_CYCLE
READ_POUT
READ_PIN
0x94 Duty cycle of the top gate control signal.
0x96 Calculated output power.
0x97 Calculated input power
0xD7 Report the maximum measured value of READ_IOUT R Word
since last MFR_CLEAR_PEAKS.
R Word
R Word
R Word
L11
L11
L11
L11
%
W
W
A
NA
NA
NA
NA
MFR_IOUT_PEAK
MFR_VOUT_PEAK
MFR_VIN_PEAK
0xDD Maximum measured value of READ_VOUT since last
MFR_CLEAR_PEAKS.
0xDE Maximum measured value of READ_VIN since last
MFR_CLEAR_PEAKS.
R Word
R Word
R Word
L16
L11
L11
V
V
C
NA
NA
NA
MFR_TEMPERATURE_1_PEAK 0xDF Maximum measured value of external Temperature
(READ_TEMPERATURE_1) since last MFR_CLEAR_
PEAKS.
MFR_READ_IIN_CHAN_PEAK
0xE1 Maximum measured value of READ_IIN command
since last MFR_CLEAR_PEAKS.
R Word
L11
A
NA
MFR_READ_ICHIP
MFR_READ_IIN_CHAN
0xE4 Measured current used by the LTC3883
0xED Calculated input supply current based upon
READ_IOUT and DUTY_CYCLE
R Word
R Word
L11
L11
A
A
NA
NA
MFR_TEMPERATURE_2_PEAK 0xF4 Peak internal die temperature since last
MFR_CLEAR_PEAKS.
R Word
L11
C
NA
3883fe
96
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Summary of the Status Commands
STATUS_WORD
STATUS_VOUT*
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ꢀꢁꢂꢃꢄꢅꢆ
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ꢡꢜꢝꢢꢜꢝ ꢠꢬꢝ ꢕꢖ ꢪꢑꢒꢖꢔꢙꢝꢙꢬꢖ
ꢄꢄꢁꢛꢡꢱ ꢕꢖꢙꢝꢙꢒꢘꢙꢲeꢓ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢞꢳꢂꢛꢄꢨꢚꢩꢴꢨꢩꢡꢧ
ꢧꢁ ꢁꢙꢖ ꢳꢙꢮꢦ
STATUS_TEMPERATURE
MFR_PADS
ꢍ
ꢎ
ꢈ
ꢉ
3
ꢊ
ꢇ
ꢋ
ꢡꢪ ꢫꢒꢜꢘꢝ
ꢇꢈ ꢏꢅꢅ33 ꢋꢏ
ꢇꢉ ꢏꢅꢅ33 ꢐꢏ
ꢇ3 ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢇꢊ ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢡꢪ ꢧꢒꢑꢖꢙꢖꢮ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢐꢪ ꢫꢒꢜꢘꢝ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢇꢇ ꢕꢖꢗꢒꢘꢙꢓ ꢂꢅꢚ ꢛeꢔꢜꢘꢝꢀꢔꢆ
ꢇꢋ ꢞꢟꢠꢚ ꢡꢜꢝꢢꢜꢝ ꢅꢙꢔꢒꢣꢘeꢓ ꢄꢤꢝeꢑꢖꢒꢘꢘꢥ
MFR_INFO
ꢌ
8
ꢍ
ꢎ
ꢈ
ꢉ
3
ꢊ
ꢇ
ꢋ
ꢚꢦꢒꢖꢖeꢘ ꢇ ꢙꢔ ꢁꢡꢧꢄꢛꢨꢃꢡꢡꢅ
ꢚꢦꢒꢖꢖeꢘ ꢋ ꢙꢔ ꢁꢡꢧꢄꢛꢨꢃꢡꢡꢅ
ꢩꢪꢚ3883 ꢫꢬꢑꢭꢙꢖꢮ ꢛꢐꢠꢇ ꢩꢬꢯ
ꢩꢪꢚ3883 ꢫꢬꢑꢭꢙꢖꢮ ꢛꢐꢠꢋ ꢩꢬꢯ
ꢛꢐꢠꢇ ꢁꢙꢖ ꢞꢝꢒꢝe
ꢇꢈ ꢛeꢔeꢑꢗeꢓ
ꢇꢉ ꢛeꢔeꢑꢗeꢓ
ꢇ3 ꢛeꢔeꢑꢗeꢓ
ꢇꢊ ꢛeꢔeꢑꢗeꢓ
ꢇꢇ ꢛeꢔeꢑꢗeꢓ
ꢇꢋ ꢛeꢔeꢑꢗeꢓ
ꢀꢁꢂꢃꢄꢅꢆ
STATUS_CML
ꢍ
ꢎ
ꢈ
ꢉ
3
ꢊ
ꢇ
ꢋ
ꢕꢖꢗꢒꢘꢙꢓꢷꢐꢖꢔꢜꢢꢢꢬꢑꢝeꢓ ꢚꢬꢵꢵꢒꢖꢓ
ꢕꢖꢗꢒꢘꢙꢓꢷꢐꢖꢔꢜꢢꢢꢬꢑꢝeꢓ ꢅꢒꢝꢒ
ꢁꢒꢭꢸeꢝ ꢄꢑꢑꢬꢑ ꢚꢦeꢭꢸ ꢫꢒꢙꢘeꢓ
ꢱeꢵꢬꢑꢥ ꢫꢒꢜꢘꢝ ꢅeꢝeꢭꢝeꢓ
ꢁꢑꢬꢭeꢔꢔꢬꢑ ꢫꢒꢜꢘꢝ ꢅeꢝeꢭꢝeꢓ
ꢀꢑeꢒꢓꢔ ꢋꢆ
ꢛꢐꢠꢋ ꢁꢙꢖ ꢞꢝꢒꢝe
ꢩꢪꢚ3883 ꢫꢬꢑꢭꢙꢖꢮ GPIOꢀ ꢩꢬꢯ
ꢩꢪꢚ3883 ꢫꢬꢑꢭꢙꢖꢮ GPIOꢁ ꢩꢬꢯ
GPIOꢀ ꢁꢙꢖ ꢞꢝꢒꢝe
ꢌ
8
ꢍ
ꢎ
ꢈ
ꢉ
3
ꢊ
ꢇ
ꢋ
ꢛeꢔeꢑꢗeꢓ
ꢛeꢔeꢑꢗeꢓ
ꢛeꢔeꢑꢗeꢓ
ꢛeꢔeꢑꢗeꢓ
GPIOꢁ ꢁꢙꢖ ꢞꢝꢒꢝe
3883 ꢞꢛꢋꢇ
ꢛeꢔeꢑꢗeꢓ
ꢡꢝꢦeꢑ ꢚꢬꢵꢵꢜꢖꢙꢭꢒꢝꢙꢬꢖ ꢫꢒꢜꢘꢝ
ꢡꢝꢦeꢑ ꢱeꢵꢬꢑꢥ ꢬꢑ ꢩꢬꢮꢙꢭ ꢫꢒꢜꢘꢝ
ꢄꢄꢁꢛꢡꢱ ꢄꢚꢚ ꢞꢝꢒꢝꢜꢔ
ꢛeꢔeꢑꢗeꢓ
ꢛeꢔeꢑꢗeꢓ
ꢛeꢔeꢑꢗeꢓ
ꢛeꢔeꢑꢗeꢓ
DESCRIPTION
MASKABLE GENERATES ALERT BIT CLEARABLE
ꢃeꢖeꢑꢒꢘ ꢫꢒꢜꢘꢝ ꢬꢑ ꢧꢒꢑꢖꢙꢖꢮ ꢄꢗeꢖꢝ
ꢅꢥꢖꢒꢵꢙꢭ
ꢞꢝꢒꢝꢜꢔ ꢅeꢑꢙꢗeꢓ fꢑꢬꢵ ꢡꢝꢦeꢑ ꢰꢙꢝꢔ
ꢟeꢔ
ꢠꢬ
ꢠꢬ
ꢟeꢔ
ꢠꢬ
ꢠꢬꢝ ꢅꢙꢑeꢭꢝꢘꢥ
ꢟeꢔ
ꢠꢬ
ꢠꢬ
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
READ_VIN
The READ_VIN command returns the measured V pin voltage, in volts added to READ_ICHIP • MFR_RVIN. This
IN
compensates for the IR voltage drop across the V filter element due to the supply current of the LTC3883.
IN
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
READ_VOUT
The READ_VOUT command returns the measured output voltage in the same format as set by the VOUT_MODE
command.
This read-only command has two data bytes and is formatted in Linear_16u format.
READ_IIN
The READ_IIN command returns the input current, in Amperes, as measured across the input current sense resistor
(see also MFR_IIN_CAL_GAIN).
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
READ_IOUT
The READ_IOUT command returns the average output current in amperes. The IOUT value is a function of:
a) the differential voltage measured across the I
b) the IOUT_CAL_GAIN value
pins
SENSE
c) the MFR_IOUT_CAL_GAIN_TC value, and
d) READ_TEMPERATURE_1 value
e) The MFR_TEMP_1_GAIN and the MFR_TEMP_1_OFFSET
f) The MFR_IOUT_CAL_GAIN_TAU_INV and MFR_IOUT_CAL_GAIN_THETA
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
READ_TEMPERATURE_1
The READ_TEMPERATURE_1 command returns the temperature, in degrees Celsius, of the external sense element.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
READ_TEMPERATURE_2
The READ_TEMPERATURE_2 command returns the temperature, in degrees Celsius, of the internal sense element.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
READ_DUTY_CYCLE
The READ_DUTY_CYCLE command returns the duty cycle of controller, in percent.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
READ_POUT
The READ_POUT command is a reading of the DC/DC converter output power in Watts. The POUT is calculated based
on the most recent correlated output voltage and current reading.
This read-only command has 2 data bytes and is formatted in Linear_5s_11s format.
READ_PIN
The READ_PIN command is a reading of the DC/DC converter input power in Watts. The PIN is calculated based on
the most recent correlated input voltage and current reading.
This read-only command has 2 data bytes and is formatted in Linear_5s_11s format.
MFR_IOUT_PEAK
The MFR_IOUT_PEAK command reports the highest current, in amperes, reported by the READ_IOUT measurement.
This command is cleared using the MFR_CLEAR_PEAKS command.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
MFR_VOUT_PEAK
The MFR_VOUT_PEAK command reports the highest voltage, in volts, reported by the READ_VOUT measurement.
This command is cleared using the MFR_CLEAR_PEAKS command.
This read-only command has two data bytes and is formatted in Linear_16u format.
MFR_VIN_PEAK
The MFR_VIN_PEAK command reports the highest voltage, in volts, reported by the READ_VIN measurement.
This command is cleared using the MFR_CLEAR_PEAKS command.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
MFR_TEMPERATURE_1_PEAK
The MFR_TEMPERATURE_1_PEAK command reports the highest temperature, in degrees Celsius, reported by the
READ_TEMPERATURE_1 measurement.
This command is cleared using the MFR_CLEAR_PEAKS command.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
MFR_READ_IIN_PEAK
TheMFR_READ_IIN_PEAKcommandreportsthehighestcurrent, inAmperes, reportedbytheREAD_IINmeasurement.
This command is cleared using the MFR_CLEAR_PEAKS command.
This command has two data bytes and is formatted in Linear_5s_11s format.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
MFR_READ_ICHIP
The MFR_READ_ICHIP command returns the measured input current, in Amperes, used by the LTC3883.
This command has two data bytes and is formatted in Linear_5s_11s format.
MFR_READ_IIN_CHAN
The MFR_READ_IIN_CHAN command returns the calculated value of the input current, in Amperes, as a function of
READ_IOUT and DUTY_CYCLE. For accurate values at low currents, the part must be in continuous conduction mode.
If DCR sensing is used, the accuracy of the inductor DCR resistance, IOUT_CAL_GAIN, will effect the accuracy of the
MFR_READ_IIN command.
This command has two data bytes and is formatted in Linear_5s_11s format.
MFR_TEMPERATURE_2_PEAK
The MFR_TEMPERATURE_2_PEAK command reports the highest temperature, in degrees Celsius, reported by the
READ_TEMPERATURE_2 measurement.
This command is cleared using the MFR_CLEAR_PEAKS command.
This read-only command has two data bytes and is formatted in Linear_5s_11s format.
NVM MEMORY COMMANDS
Store/Restore
CMD
DEFAULT
VALUE
COMMAND NAME
CODE DESCRIPTION
TYPE
FORMAT
UNITS
NVM
STORE_USER_ALL
0x15
0x16
0xF0
Store user operating memory to EEPROM.
Restore user operating memory from EEPROM.
Send Byte
Send Byte
NA
NA
NA
RESTORE_USER_ALL
MFR_COMPARE_USER_ALL
Compares current command contents with NVM. Send Byte
STORE_USER_ALL
The STORE_USER_ALL command instructs the PMBus device to copy the non-volatile user contents of the Operating
Memory to the matching locations in the non-volatile User NVM memory.
Executing this command if the die temperature exceeds 85°C or is below 0°C is not recommended and the data reten-
tion of 10 years cannot be guaranteed. If the die temperature exceeds 130°C, the STORE_USER_ALL command is
disabled. The command is re-enabled when the IC temperature drops below 125°C.
Communication with the LTC3883 and programming of the NVM can be initiated when VDD33 is available and VIN is
not applied. To enable the part in this state, using global address 0x5B write MFR_EE_UNLOCK to 0x2B followed by
0xC4. The part can now be communicated with, and the project file updated. To write the updated project file to the
NVM issue a STORE_USER_ALL command. When VIN is applied, a MFR_RESET must be issued to allow the PWM to
be enabled and valid ADCs to be read.
This write-only command has no data bytes.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
RESTORE_USER_ALL
The RESTORE_USER_ALL command instructs the PMBus device to copy the contents of the non-volatile User memory
to the matching locations in the Operating Memory. The values in the Operating Memory are overwritten by the value
retrieved from the User commands. When a RESTORE_USER_ALL command is issued, the RUN pin and SHARE_CLK
pin are asserted low until the restore is complete. The RUN pin and SHARE_CLK pin are then released. The RUN pins
are held low for the MFR_RESTART_DELAY. The RESTORE_USER_ALL command will place the value of all commands
stored in NMV into the RAM ignoring the pin-strapped resistor configuration pins including ASEL. The MFR_RESET
command is recommended to be used instead of RESTORE_USER_ALL because the MFR_RESET command always
honors the ASEL pins and will honor the pin-strapped RCONFIG pins, if the part is programmed to respect them.
STORE_USER_ALL, MFR_COMPARE_USER_ALLandRESTORE_USER_ALLcommandsaredisabledifthedieexceeds
130°C and are not re-enabled until the die temperature drops below 125°C.
This write-only command has no data bytes.
MFR_COMPARE_USER_ALL
The MFR_COMPARE_USER_ALL command instructs the PMBus device to compare current command contents with
what is stored in non-volatile memory. If the compare operation detects differences, a CML bit 0 fault will be generated.
This write-only command has no data bytes.
Fault Log Operation
A conceptual diagram of the fault log is shown in Figure 34. The fault log provides telemetry recording capability to
the LTC3883. During normal operation the contents of the status registers, the output voltage readings, temperature
readings as well as peak values of these quantities are stored in a continuously updated buffer in RAM. This is simi-
lar to a strip chart recorder. When a fault occurs, the contents are written into EEPROM for nonvolatile storage. The
EEPROM fault log is then locked. The part can be powered down with the fault log available for reading at a later time.
As a consequence of adding ECC, the area in the EEPROM available for fault log is reduced. When reading the fault
log from RAM all 6 events of cyclical data remain. However, when the fault log is read from EEPROM (after a reset),
the last 2 events are lost. The read length of 147 bytes remains the same, but the fifth and sixth events are a repeat
of the fourth event.
RAM 255 BYTES
EEPROM 255 BYTES
8
ꢇꢎꢏ ꢊꢅꢇꢎꢃꢋꢒꢌ
ꢏꢆꢋꢂꢃꢋꢈꢆꢈꢌꢉꢓ
ꢀꢃꢉꢉ ꢑꢈꢀꢀꢅꢊ
ꢂꢃꢄꢅ ꢆꢀ ꢀꢇꢈꢉꢂ
ꢂꢊꢇꢋꢌꢀꢅꢊ ꢂꢆ
ꢅꢅꢍꢊꢆꢄ ꢇꢋꢎ
ꢉꢆꢏꢐ
•
•
•
•
•
•
ꢇꢀꢂꢅꢊ ꢀꢇꢈꢉꢂ
ꢊꢅꢇꢎ ꢀꢊꢆꢄ
ꢅꢅꢍꢊꢆꢄ ꢇꢋꢎ
ꢉꢆꢏꢐ ꢑꢈꢀꢀꢅꢊ
3883 ꢀ3ꢁ
Figure 34. Fault Log Conceptual Diagram
3883fe
101
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Fault Logging
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
MFR_FAULT_LOG
0xEE
Fault log data bytes. This sequentially retrieved
data is used to assemble a complete fault log.
R Block
CF
Y
NA
MFR_FAULT_LOG_ STORE
MFR_FAULT_LOG_CLEAR
0xEA
Command a transfer of the fault log from RAM to Send Byte
EEPROM. This causes the part to behave as if the
PWM has faulted off.
NA
0xEC
Initialize the EEPROM block reserved for fault
logging and clear any previous fault logging
locks.
Send Byte
NA
MFR_FAULT_LOG
The MFR_FAULT_LOG command allows the user to read the contents of the FAULT_LOG after the first fault occur-
rence since the last MFR_FAULT_LOG_CLEAR command was last written. The contents of this command are stored
in non-volatile memory, and are cleared by the MFR_FAULT_LOG_CLEAR command. The length and content of this
command are listed in Table 11. If the user accesses the MFR_FAULT_LOG command and no fault log is present, the
command will return a data length of 0. If a fault log is present, the MFR_FAUTL_LOG will return a block of data 147
bytes long. If a fault occurs within the first second of applying power, some of the earlier pages in the fault log may
not contain valid data. When a fault occurs and Fault Log is enabled, a header section and the last 6 ADC events are
stored in NVM. If the Fault Log is read before a reset occurs, the most recent event is in location N (the first location).
If the part resets or VIN is lost, the event may appear in any one of the 6 cyclical data locations.
NOTE: The approximate transfer time for this command is 3.4ms using a 400kHz clock.
This read-only command is in block format.
MFR_FAULT_LOG_STORE
The MFR_FAULT_LOG_STORE command forces the fault log operation to be written to NVM just as if a fault event
occurred. This command will set bit 3 of the STATUS_MFR_SPECIFIC fault if bit 7 “Enable Fault Logging” is set in the
MFR_CONFIG_ALL_LTC3883 command.
If the die temperature exceeds 130°C, the MFR_FAULT_LOG_STORE command is disabled until the IC temperature
drops below 125°C.
This write-only command has no data bytes.
Table 11. Fault Logging
This table outlines the format of the block data from a read block data of the MFR_FAULT_LOG command.
Data Format Definitions
LIN 11 = PMBus = Rev 1.1, Part 2, section 7.1
LIN 16 = PMBus Rev 1.1, Part 2, section 8. Mantissa portion only
BYTE = 8 bits interpreted per definition of this command
DATA
FORMAT BYTE NUM BLOCK READ COMMAND
DATA
BITS
Block Length
BYTE
147
The MFR_FAULT_LOG command is a fixed length of 147 bytes
The block length will be zero if a data log event has not been captured
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
HEADER INFORMATION
Fault Position
BYTE
0
Indicates the fault that caused the fault log to be activated.
MFR_REAL_TIME
[7:0]
[15:8]
[23:16]
[31:24]
[39:32]
[47:40]
[15:8]
[7:0]
BYTE
BYTE
BYTE
BYTE
BYTE
BYTE
LIN 16
1
2
3
4
5
6
7
8
48 bit binary counter. The value is the time since the last reset in 200µs
increments.
MFR_VOUT_PEAK
Peak READ_VOUT since last MFR_CLEAR_PEAKS command.
Reserved
Reserved
BYTE
BYTE
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
MFR_IOUT_PEAK
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
LIN 11
Peak READ_IOUT since last MFR_CLEAR_PEAKS command.
Peak READ_IIN since last MFR_CLEAR_PEAKS command.
Peak READ_VIN since last MFR_CLEAR_PEAKS command.
External temperature during last event.
MFR_READ_IIN_CHAN_PEAK
MFR_VIN_PEAK
LIN 11
LIN 11
LIN 11
READ_TEMPERATURE_1
Reserved
Reserved
READ_TEMPERATURE_2
BYTE
BYTE
LIN 11
Always returns 0x00.
Always returns 0x00.
Internal temperature sensor during last event
[15:8]
[7:0]
[15:8]
[7:0]
MFR_TEMPERATURE_1_PEAK
LIN 11
Peak READ_TEMPERATURE_1 since last MFR_CLEAR_PEAKS
command.
Reserved
Reserved
BYTE
BYTE
Always returns 0x00.
Always returns 0x00.
CYCLICAL DATA
EVENT n
Event “n” represents one complete cycle of ADC reads through the MUX
at time of fault. Example: If the fault occurs when the ADC is processing
step 15, it will continue to take readings through step 25 and then store
the header and all 6 event pages to EEPROM
(Data at Which Fault Occurred; Most Recent Data)
READ_VOUT
[15:8]
[7:0]
LIN 16
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Reserved
Reserved
READ_IOUT
BYTE
BYTE
LIN 11
Always returns 0x00.
Always returns 0x00.
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
MFR_READ_IIN_CHAN
READ_VIN
LIN 11
LIN 11
LIN 11
READ_IIN
STATUS_VOUT
Reserved
BYTE
BYTE
Always returns 0x00.
3883fe
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For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
STATUS_WORD
[15:8]
[7:0]
[15:8]
[7:0]
WORD
41
42
43
44
45
46
MFR_READ_ICHIP
MFR_READ_ICHIP
STATUS_MFR_SPECIFIC
Reserved
WORD
BYTE
BYTE
Always returns 0x00.
EVENT n-1
(data measured before fault was detected)
READ_VOUT
[15:8]
[7:0]
LIN 16
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Reserved
Reserved
READ_IOUT
BYTE
BYTE
LIN 11
Always returns 0x00.
Always returns 0x00.
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
MFR_READ_IIN_CHAN
READ_VIN
LIN 11
LIN 11
LIN 11
READ_IIN
STATUS_VOUT
Reserved
STATUS_WORD
BYTE
BYTE
WORD
Always returns 0x00.
[15:8]
[7:0]
Reserved
Reserved
STATUS_MFR_SPECIFIC
Reserved
BYTE
BYTE
BYTE
BYTE
Always returns 0x00.
Always returns 0x00.
Always returns 0x00.
*
*
*
EVENT n-5
(Oldest Recorded Data)
READ_VOUT
[15:8]
[7:0]
LIN 16
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Reserved
Reserved
READ_IOUT
BYTE
BYTE
LIN 11
Always returns 0x00.
Always returns 0x00.
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
[15:8]
[7:0]
MFR_READ_IIN_CHAN
READ_VIN
LIN 11
LIN 11
LIN 11
READ_IIN
STATUS_VOUT
Reserved
BYTE
BYTE
Always returns 0x00.
3883fe
104
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
STATUS_WORD
[15:8]
[7:0]
WORD
141
142
143
144
145
146
Reserved
Reserved
STATUS_MFR_SPECIFIC
Reserved
BYTE
BYTE
BYTE
BYTE
Always returns 0x00.
Always returns 0x00.
Always returns 0x00.
Table 11a: Explanation of Position_Fault Values
POSITION_FAULT VALUE
SOURCE OF FAULT LOG
MFR_FAULT_LOG_STORE
TON_MAX_FAULT
VOUT_OV_FAULT
0xFF
0x00
0x01
0x02
0x03
0x05
0x06
0x07
0x0A
VOUT_UV_FAULT
IOUT_OC_FAULT
TEMP_OT_FAULT
TEMP_UT_FAULT
VIN_OV_FAULT
MFR_TEMP_2_OT_FAULT
MFR_FAULT_LOG_CLEAR
The MFR_FAULT_LOG_CLEAR command will erase the fault log file stored values. It will also clear bit 3 in the
STATUS_MFR_SPECIFIC command. After a clear is issued, the status can take up to 8ms to clear.
This write-only command is send bytes.
Block Memory Write/Read
DATA
FORMAT
DEFAULT
VALUE
COMMAND NAME
CMD CODE DESCRIPTION
TYPE
UNITS
NVM
MFR_EE_UNLOCK
0xBD
0xBE
0xBF
Unlock user EEPROM for access by MFR_EE_ERASE and
MFR_EE_DATA commands.
R/W Byte
Reg
Reg
Reg
NA
NA
NA
MFR_EE_ERASE
MFR_EE_DATA
Initialize user EEPROM for bulk programming by MFR_EE_ R/W Byte
DATA.
Data transferred to and from EEPROM using sequential
PMBus word reads or writes. Supports bulk programming.
R/W
Word
All the NVM commands are disabled if the die temperature exceeds 130°C. NVM commands are re-enabled when the
die temperature drops below 125°C.
MFR_EE_UNLOCK
Multiple writes to MFR_EE_UNLOCK with the appropriate unlock keys are used to enable MFR_EE_ERASE and MFR_
EE_DATA access and configure PEC.
Communication with the LTC3883 and programming of the NVM can be initiated when VDD33 is applied and VIN is
not. To enable the part in this state, use global address 0x5B command MFR_EE_UNLOCK data 0x2B followed by ad-
dress 0x5B command MFR_EE_UNLOCK data 0xC4. When VIN is applied, a MFR_RESET must be issued to allow the
PWM to be enabled and valid ADCs to be read.
3883fe
105
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PMBus COMMAND DETAILS
Writing 0x2B followed by 0xD4 clears PEC, resets the EEPROM address pointer and unlocks the part for EEPROM
erase and data command writes.
Writing 0x2B followed by 0xD5 sets the PEC, resets the EEPROM address pointer and unlocks the part for EEPROM
erase and data command writes.
Writing 0x2B followed by 0x91 and 0xE4 clears PEC, resets the EEPROM address pointer and unlocks the part for
EEPROM data reads of all locations.
Writing 0x2B followed by 0x91 and 0xE5 sets PEC, resets the EEPROM address pointer and unlocks the part for
EEPROM data reads of all locations.
MFR_EE_ERASE
A single write after the appropriate unlock key erases the EEPROM allowing subsequent data writes. This command
may be read to indicate if an EEPROM access is in progress.
A value of 0x2B will erase the EEPROM. If the part is busy writing or erasing the EEPROM a non-zero value will be
returned.
MFR_EE_DATA
Sequential writes or reads perform block loads or restores from the EEPROM. Successive MFR_EE_DATA word writes
will enter the EEPROM until it is full. Extra writes will lock the part. The first write is to the lowest address. The first
read returns the 16 bit EEPROM packing revision ID. The second read returns the number of 16 bit words available.
Subsequent reads return EEPROM data starting with the lowest address.
3883fe
106
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL APPLICATIONS
High Efficiency 500kHz 1.2V Step-Down Converter with External VCC
5mΩ
V
IN
6V TO 14V
5V
22µF
50V
IN
10µF
1µF
D1
EXTV
CC
TG
M1
M2
100Ω
100Ω
1µF
0.1µF
LTC3883-1
I
BOOST
SW
IN_SNS
0.32µH
V
IN_SNS
10nF
3Ω
10nF
BG
V
DD25
20k
PGND
V
IN
24.9k
4.32k
10k
20k
10k
10k
10k
10k
10k
10k
10k
5k
1k
10µF
FREQ_CFG
PGOOD
SDA
1µF
12.7k
23.2k
17.8k
PMBus
INTERFACE
V
SCL
OUT_CFG
V
ALERT
RUN
TRIM_CFG
ASEL
1k
0.22µF
SHARE_CLK
+
–
+
–
I
SENSE
SENSE
SENSE
SENSE
GPIO
I
V
V
V
1.2V
20A
OUT
V
DD33
SYNC
WP
+
C
OUT
TSNS
V
V
DD25
DD33
530µF
I
TH
MMBT3906
10nF
GND
6800pF
10k
C
: 330μH SANYO 4TPF330ML,
OUT
1.0µF
3883 TA06
2× 100µF AVX 12106D107KAT2A
1.0µF
D1: CENTRAL CMDSH-3TR
L: PULSE PA 0515.321NLT 0.32µH
M1: INFINEON BSC032NE2LS
M2: INFINEON BSC009NE2LS
3883fe
107
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL APPLICATIONS
High Efficiency 500kHz 2.5V Step-Down Converter with Sense Resistor, No Input Current Sense
V
IN
6V TO 24V
22µF
50V
10µF
1µF
D1
INTV
CC
TG
M1
M2
0.1µF
LTC3883
I
BOOST
SW
IN_SNS
0.56µH
0.002Ω
V
V
IN_SNS
IN
BG
10µF
PGND
V
DD25
10k
PGOOD
SDA
20k
20k
20k
10k
10k
10k
10k
10k
10k
5k
FREQ_CFG
PMBus
INTERFACE
12.7k
15k
17.8k
SCL
V
OUT_CFG
ALERT
RUN
V
TRIM_CFG
ASEL
SHARE_CLK
30Ω
30Ω
+
I
GPIO
SENSE
1000pF
–
+
–
I
V
V
SYNC
SENSE
SENSE
SENSE
V
DD33
V
2.5V
15A
OUT
WP
+
C
OUT
V
TSNS
DD25
530µF
V
I
TH
DD33
MMBT3906
10nF
GND
4700pF
6.81k
1.0µF
3883 TA04
1.0µF
C
: 330μH SANYO 4TPF330ML,
L: VISHAY IHLP4040DZ01 0.56μH
2× 100µF AVX 12106D107KAT2A M1: INFINEON BSC050N03LSG
D1: CENTRAL CMDSH-3TR M2: INFINEON BSC011N03LSI
OUT
3883fe
108
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL APPLICATIONS
High Efficiency 425kHz 1V Step-Down Converter with Power Block
5mΩ
V
IN
7V TO 14V
22µF
50V
10µF
1µF
7V
INTV
CC
GATE DRIVE
BOOST
V
100Ω
100Ω
IN
1µF
TG
V
PWMH
OUT
–
+
+
–
I
IN_SNS
P1
CS
CS
V
IN_SNS
V
GATE
10nF
10µF
10nF
3Ω
LTC3883
TEMP
PWML TEMP
GND
BG
SW
V
IN
10k
10k
10k
10k
10k
10k
10k
5k
SDA
PGND
WP
V
DD25
SCL
PMBus
INTERFACE
SHARE_CLK
24.9k
20k
16.2k
17.4k
ALERT
RUN
V
OUT_CFG
4.32k
17.8k
V
TRIM_CFG
ASEL
PGOOD
GPIO FREQ_CFG
SYNC
V
TSNS
DD33
+
I
SENSE
1µF
0.22µF
1000pF
1.2k
–
I
SENSE
SENSE
SENSE
V
OUT
+
–
V
V
V
1V
DD25
35A
V
DD33
+
C
OUT
I
TH
530µF
GND
1.0µF
100pF
1.0µF
5.62k
3883 TA05
C
: 330μH SANYO 4TPF330ML, 2× 100µF AVX 12106D107KAT2A
OUT
P1: VRA001-4C3G ACBEL POWER BLOCK
3883fe
109
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL APPLICATIONS
High Efficiency 500kHz 2-Phase 1.8V Step-Down Converter with Sense Resistors
5mΩ
V
IN
6V TO 18V
22µF
50V
10µF
1µF
D1
INTV
CC
TG
M1
M2
100Ω
10nF
100Ω
1µF
0.1µF
LTC3883
I
BOOST
SW
IN_SNS
0.4µH
0.002Ω
V
IN_SNS
10nF
BG
3Ω
PGND
V
IN
FREQ_CFG
10k
10k
10k
10k
10k
10µF
V
DD25
PGOOD
SDA
V
OUT_CFG
V
TRIM_CFG
PMBus
INTERFACE
20k
24.9k
11.3k
SCL
ASEL
17.8k
ALERT
RUN
WP
10k
10k
5k
SHARE_CLK
30Ω
30Ω
+
I
SENSE
GPIO
1000pF
–
+
–
I
V
V
V
DD33
SENSE
SENSE
SENSE
SYNC
+
C
OUT1
V
V
TSNS
DD25
530µF
I
TH
DD33
GND
2200pF
1.0µF
5mΩ
MMBT3906
10nF
1.0µF
4.99k
22µF
50V
10µF
1µF
D2
INTV
CC
TG
M3
M4
100Ω
100Ω
1µF
0.1µF
LTC3883
I
BOOST
SW
IN_SNS
0.4µH
0.002Ω
V
IN_SNS
10nF
3Ω
10nF
BG
PGND
FREQ_CFG
V
IN
10µF
V
PGOOD
SDA
V
DD25
OUT_CFG
V
TRIM_CFG
20k
SCL
ASEL
15k
ALERT
RUN
WP
SHARE_CLK
30Ω
30Ω
+
I
SENSE
GPIO
1000pF
–
+
–
I
V
V
SENSE
SENSE
SENSE
V
1.8V
40A
SYNC
OUT
+
C
OUT2
530µF
V
TSNS
DD25
C
, C
OUT1 OUT2
: 330μH SANYO 4TPF330ML,
2× 100µF AVX 12106D107KAT2A
V
I
TH
DD33
D1, D2: CENTRAL CMDSH-3TR
L: VITEC 59PR9875 0.4µH
M1, M3: INFINEON BSC050NE2LS
M2, M4: INFINEON BSC010NE2LSI
GND
1.0µF
100pF
MMBT3906
10nF
1.0µF
3883 TA07
3883fe
110
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
TYPICAL APPLICATIONS
High Efficiency 3-Phase 425kHz 1.8V Step-Down Converter with Input Current Sense
5mΩ
V
IN
6V TO 14V
22µF
50V
10µF
1µF
D1
INTV
CC
TG
M1
M2
100Ω
10nF
100Ω
10nF
0.1µF
1µF
LTC3883
L0
0.56µH
I
BOOST
SW
IN_SNS
V
IN_SNS
BG
PGND
3Ω
V
DD25
V
IN
1.4k
1µF
10k
10k
10k
10k
10k
10k
10k
5k
10µF
PGOOD
SDA
24.9k
20k
17.8k
V
OUT_CFG
PMBus
INTERFACE
11.3k
SCL
V
TRIM_CFG
ALERT
RUN
ASEL
1.4k
0.22µF
FREQ_CFG
NOTE: BIT[12] VOUT_UVUF
OF COMMAND
SHARE_CLK
+
–
+
–
I
SENSE
SENSE
SENSE
SENSE
GPIO
MFR_GPIO_PROPAGATE_LTC3883
MUST BE SET TO 0.
I
V
V
V
1.8V
50A
OUT
SYNC
WP
+
C
OUT1
530µF
V
TSNS
DD25
V
DD33
I
TH
1.0µF
MMBT3906
GND
2200pF
1.0µF
10nF
4.99k
22µF
10µF
1µF
D2
D3
0.1µF
V
INTV
CC
IN
M3
TG0
TG1
M4
M6
0.1µF
LTC3870
L1
0.56µH
L2
0.56µH
BOOST0
SW0
BOOST1
SW1
BG0
BG1
M5
PGND
1.4k
1.4k
1µF
SYNC
EXTV
CC
1µF
PHASMD
MODE0
MODE1
FREQ
100k
FAULTꢁ
FAULTꢀ
I
LIM
RUN0
RUN1
+
+
I
I
I
I
SENSE0
SENSE1
1.4k
1.4k
0.22µF
0.22µF
–
–
SENSE0
SENSE1
I
I
TH0
TH1
+
+
C
OUT2
C
100pF
OUT3
SGND
530µF
530µF
3883 TA08
C
, C
, C
: 330μH SANYO 4TPF330ML,
2× 100µF AVX 12106D107KAT2A
D1-D3: CENTRAL CMDSH-3TR
L0-L2: VISHAY IHLP-4040DZ-11 0.56µH
M1, M3, M4: INFINEON BSC050NE2LS
M2, M5, M6: INFINEON BSC010NE2LSI
OUT1 OUT2 OUT3
3883fe
111
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC3883#packaging for the most recent package drawings.
UH Package
32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693 Rev D)
ꢂꢁꢦꢂ ±ꢂꢁꢂꢀ
ꢀꢁꢀꢂ ±ꢂꢁꢂꢀ
ꢅꢁꢃꢂ ±ꢂꢁꢂꢀ
3ꢁꢅꢀ ± ꢂꢁꢂꢀ
3ꢁꢀꢂ ꢏꢉꢠ
ꢄꢅ ꢆꢇꢈꢉꢆꢊ
3ꢁꢅꢀ ± ꢂꢁꢂꢀ
ꢓꢐꢖꢗꢐꢒꢉ ꢌꢘꢍꢙꢇꢋꢉ
ꢂꢁꢜꢀ ± ꢂꢁꢂꢀ
ꢂꢁꢀꢂ ꢔꢆꢖ
ꢏꢉꢖꢌꢚꢚꢉꢋꢈꢉꢈ ꢆꢌꢙꢈꢉꢏ ꢓꢐꢈ ꢙꢐꢣꢌꢘꢍ
ꢐꢓꢓꢙꢣ ꢆꢌꢙꢈꢉꢏ ꢚꢐꢆꢗ ꢍꢌ ꢐꢏꢉꢐꢆ ꢍꢞꢐꢍ ꢐꢏꢉ ꢋꢌꢍ ꢆꢌꢙꢈꢉꢏꢉꢈ
ꢔꢌꢍꢍꢌꢚ ꢝꢇꢉꢑꢥꢉꢟꢓꢌꢆꢉꢈ ꢓꢐꢈ
ꢓꢇꢋ ꢃ ꢋꢌꢍꢖꢞ ꢏ ꢧ ꢂꢁ3ꢂ ꢍꢣꢓ
ꢌꢏ ꢂꢁ3ꢀ × ꢅꢀ° ꢖꢞꢐꢚꢠꢉꢏ
ꢏ ꢧ ꢂꢁꢂꢀ
ꢍꢣꢓ
ꢂꢁꢂꢂ ꢩ ꢂꢁꢂꢀ
ꢏ ꢧ ꢂꢁꢃꢃꢀ
ꢍꢣꢓ
ꢂꢁꢦꢀ ± ꢂꢁꢂꢀ
ꢀꢁꢂꢂ ± ꢂꢁꢃꢂ
ꢄꢅ ꢆꢇꢈꢉꢆꢊ
3ꢃ 3ꢜ
ꢂꢁꢅꢂ ± ꢂꢁꢃꢂ
ꢓꢇꢋ ꢃ
ꢍꢌꢓ ꢚꢐꢏꢗ
ꢄꢋꢌꢍꢉ ꢤꢊ
ꢃ
ꢜ
3ꢁꢅꢀ ± ꢂꢁꢃꢂ
3ꢁꢀꢂ ꢏꢉꢠ
ꢄꢅꢛꢆꢇꢈꢉꢆꢊ
3ꢁꢅꢀ ± ꢂꢁꢃꢂ
ꢄꢘꢞ3ꢜꢊ ꢨꢠꢋ ꢂꢅꢂꢤ ꢏꢉꢝ ꢈ
ꢂꢁꢜꢂꢂ ꢏꢉꢠ
ꢂꢁꢜꢀ ± ꢂꢁꢂꢀ
ꢂꢁꢀꢂ ꢔꢆꢖ
ꢋꢌꢍꢉꢎ
ꢃꢁ ꢈꢏꢐꢑꢇꢋꢒ ꢓꢏꢌꢓꢌꢆꢉꢈ ꢍꢌ ꢔꢉ ꢐ ꢕꢉꢈꢉꢖ ꢓꢐꢖꢗꢐꢒꢉ ꢌꢘꢍꢙꢇꢋꢉ
ꢚꢂꢛꢜꢜꢂ ꢝꢐꢏꢇꢐꢍꢇꢌꢋ ꢑꢞꢞꢈꢛꢄꢟꢊ ꢄꢍꢌ ꢔꢉ ꢐꢓꢓꢏꢌꢝꢉꢈꢊ
ꢜꢁ ꢈꢏꢐꢑꢇꢋꢒ ꢋꢌꢍ ꢍꢌ ꢆꢖꢐꢙꢉ
3ꢁ ꢐꢙꢙ ꢈꢇꢚꢉꢋꢆꢇꢌꢋꢆ ꢐꢏꢉ ꢇꢋ ꢚꢇꢙꢙꢇꢚꢉꢍꢉꢏꢆ
ꢅꢁ ꢈꢇꢚꢉꢋꢆꢇꢌꢋꢆ ꢌꢠ ꢉꢟꢓꢌꢆꢉꢈ ꢓꢐꢈ ꢌꢋ ꢔꢌꢍꢍꢌꢚ ꢌꢠ ꢓꢐꢖꢗꢐꢒꢉ ꢈꢌ ꢋꢌꢍ ꢇꢋꢖꢙꢘꢈꢉ
ꢚꢌꢙꢈ ꢠꢙꢐꢆꢞꢁ ꢚꢌꢙꢈ ꢠꢙꢐꢆꢞꢡ ꢇꢠ ꢓꢏꢉꢆꢉꢋꢍꢡ ꢆꢞꢐꢙꢙ ꢋꢌꢍ ꢉꢟꢖꢉꢉꢈ ꢂꢁꢜꢂꢢꢢ ꢌꢋ ꢐꢋꢣ ꢆꢇꢈꢉ
ꢀꢁ ꢉꢟꢓꢌꢆꢉꢈ ꢓꢐꢈ ꢆꢞꢐꢙꢙ ꢔꢉ ꢆꢌꢙꢈꢉꢏ ꢓꢙꢐꢍꢉꢈ
ꢤꢁ ꢆꢞꢐꢈꢉꢈ ꢐꢏꢉꢐ ꢇꢆ ꢌꢋꢙꢣ ꢐ ꢏꢉꢠꢉꢏꢉꢋꢖꢉ ꢠꢌꢏ ꢓꢇꢋ ꢃ ꢙꢌꢖꢐꢍꢇꢌꢋ
ꢌꢋ ꢍꢞꢉ ꢍꢌꢓ ꢐꢋꢈ ꢔꢌꢍꢍꢌꢚ ꢌꢠ ꢓꢐꢖꢗꢐꢒꢉ
3883fe
112
For more information www.linear.com/LTC3883
LTC3883/LTC3883-1
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
11/13 Changed V
range to 5.4V. Added patent number.
1
4
6
OUT
Added SYNC to the Absolute Maximum Ratings.
Fixed conditions on the LSB step size.
Deleted "and," and added "The BG, TG and RUN pins are held low. The GPIO pin is in high impedance mode."
Deleted "ARA command..."
17
23, 24
33, 35
45
Deleted five instances of "MFR_REGISTERS”
Changed RUN to SHARE_CLK. Added text.
Deleted NVM.
50
Changed "IOUT_OC_FAULT_LIMIT” to "Peak Current Limit”
Deleted MFR registers. Added text to the CLEAR_FAULTS and STATUS_WORD sections.
Revised patent note.
77
91-93
112
B
7/14
Change Electrical Characteristics condition from T = 25°C to T = 25°C
5, 6, 7, 8
24, 65, 81, 82
58
A
J
Reduced minimum time to react to command
Updated P equation
SYNC
Revised schematic
12/15 Updated Related Parts
109
C
D
112
5/16
Clarified PGOOD pin description.
12
Clarified PolyPhase operation.
Added ECC
54
E
1/18
1, 15, 16
Reduced initialization time
Reduced minimum on-time
5
5
3883fe
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
113
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LTC3883/LTC3883-1
TYPICAL APPLICATION
High Efficiency 500kHz 1.8V Step-Down Converter with DCR Sense
5mΩ
V
IN
6V TO 24V
22µF
50V
10µF
1µF
D1
INTV
CC
TG
M1
M2
100Ω
10nF
100Ω
10nF
1µF
0.1µF
LTC3883
I
BOOST
SW
IN_SNS
0.56µH
V
IN_SNS
BG
1.4k
1µF
3Ω
PGND
V
V
IN
DD25
10µF
10k
10k
10k
10k
10k
10k
10k
5k
PGOOD
SDA
20k
24.9k
10k
20k
FREQ_CFG
PMBus
INTERFACE
12.7k
9.09k
23.2k
17.8k
SCL
ALERT
RUN
V
OUT_CFG
*PGOOD PIN HAS VARIABLE LATENCY.
DO NOT USE FOR SEQUENCING
1.4k
0.22µF
V
TRIM_CFG
SHARE_CLK
ASEL
+
I
GPIO
SENSE
–
I
V
V
SENSE
V
V
1.8V
20A
DD33
OUT
SYNC
WP
+
SENSE
–
SENSE
+
C
V
OUT
TSNS
DD25
530µF
V
I
TH
DD33
MMBT3906
GND
2200pF
4.99k
1.0µF
3883 TA02
1.0µF
100pF
C
M1: INFINEON BSC050N03LSG
: 330μH SANYO 4TPF330ML,
2× 100µF AVX 12106D107KAT2A
D1: CENTRAL CMDSH-3TR
OUT
L: VISHAY IHLP-4040DZ-11 0.56µH M2: INFINEON BSC011N03LSI
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LTC3815
6A Monolithic Synchronous DC/DC Step-Down Converter
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2.25V ≤ V ≤ 5.5V, 0.4V ≤ V ≤ 0.72V , Programmable V
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25% with 0.1% Resolution, Up to 3MHz Operation with 13-bit ADC
This product has a license from PowerOne, Inc. related to digital power technology as set forth in U.S. Patent 7000125 and other related patents owned
by PowerOne, Inc. This license does not extend to standalone power supply products.
3883fe
LT 0118 REV E • PRINTED IN USA
www.linear.com/LTC3883
114
ꢀANALOG DEVICES, INC. 2015
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