LTC3557EUF-TRPBF_技术文档

LTC3557/LTC3557-1

USB Power Manager with

Li-Ion Charger and Three

Step-Down Regulators

FEATURES

DESCRIPTION

The LTC^®3557/LTC3557-1 is a highly integrated power

management and battery charger IC for single cell Li-Ion/

Polymer battery applications. It includes a PowerPath^TM

manager with automatic load prioritization, a battery

charger, an ideal diode and numerous internal protection

features. Designed speciﬁcally for USB applications, the

LTC3557/LTC3557-1 power manager automatically limits

input current to a maximum of either 100mA or 500mA

for USB applications or 1A for wall adapter powered

applications. Battery charge current is automatically

reduced such that the sum of the load current and the

charge current does not exceed the programmed input

current limit. The LTC3557/LTC3557-1 also includes three

adjustable synchronous step-down switching regulators

and a high voltage buck regulator output controller with

Bat-Track that allows efﬁcient charging from supplies as

high as 38V. The LTC3557/LTC3557-1 is available in a low

proﬁle 4mm × 4mm × 0.75mm 28-pin QFN package.

■

Seamless Transition Between Input Power Sources:

Li-Ion Battery, USB, 5V Wall Adapter or High

Voltage Buck Regulator with Bat-Track^TM

200mΩ Internal Ideal Diode Plus Optional External

■

Ideal Diode Controller Provides Low Loss Power

Path When Input Current is Limited or Unavailable

■

Triple Adjustable High Efﬁciency Step-Down

Switching Regulators (600mA, 400mA, 400mA I

)

OUT

Pin Selectable Burst Mode^®Operation

■

Full Featured Li-Ion/Polymer Battery Charger

1.5A Maximum Charge Current with Thermal Limiting

Battery Float Voltage:

4.2V (LTC3557)

4.1V (LTC3557-1)

Low Proﬁle 4mm × 4mm 28-Pin QFN Package

■

APPLICATIONS

■

HDD-Based MP3 Players

, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology

Corporation. Bat-Track and PowerPath are trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

■

PDA, PMP, PND/GPS

■

USB-Based Handheld Products

Protected by U.S. Patents, including 6522118, 6700364. Other patents pending.

TYPICAL APPLICATION

Input and Battery Current vs Load Current

HV SUPPLY

HIGH VOLTAGE

BUCK DC/DC

8V TO 38V

(TRANSIENTS

TO 60V)

600

R

= 2k

PROG

CLPROG

I

= 2k

IN

500

400

300

200

100

0

100mA/500mA

1000mA

USB OR

I

V

LOAD

OUT

5V ADAPTER

0V

CC/CV

CHARGER

I

BAT

(CHARGING)

CHARGE

+

SINGLE CELL

Li-Ion

NTC

LTC3557/LTC3557-1

ALWAYS ON LDO

3.3V/25mA

I

BAT

(DISCHARGING)

400

500

WALL = 0V

100

0.8V to 3.6V/600mA

0.8V to 3.6V/400mA

–100

TRIPLE HIGH EFFICIENCY

STEP-DOWN

600

0

200

300

(mA)

RST

SWITCHING REGULATORS

I

LOAD

35571 TA01b

35571 TA01a

35571fc

1

LTC3557/LTC3557-1

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Notes 1-4)

V

, V , V , V

BUS OUT IN1 IN2

t < 1ms and Duty Cycle < 1% .................. −0.3V to 7V

TOP VIEW

Steady State............................................. −0.3V to 6V

28 27 26 25 24 23 22

BAT, NTC, CHRG, WALL, V ,

C

ILIM0

ILIM1

1

2

3

4

5

6

7

21 GATE

MODE, FB1, FB2, FB3, RST2........................ −0.3V to 6V

PROG

NTC

20

19

18

17

16

15

EN1, EN2, EN3 .............................. −0.3V to V

+ 0.3V

OUT

CC

WALL

ILIM0, ILIM1, PROG ....................... −0.3V to V + 0.3V

LDO3V3

SW1

V

29

NTC

I

, I

, I .........................................................2A

VBUS VOUT BAT

SW1

SW2 SW3

RST2 CHRG ACPR

SW3

.....................................................................850mA

V

IN2

IN1

FB1

SW2

, I

............................................................600mA

, I

.................................................75mA

8

9

10 11 12 13 14

UF PACKAGE

, I

..........................................................2mA

CLPROG PROG

Maximum Operating Junction Temperature .......... 110°C

Operating Ambient Temperature Range ...−40°C to 85°C

Storage Temperature Range...................−65°C to 125°C

28-LEAD (4mm s 4mm) PLASTIC QFN

T

= 110°C, θ = 37°C/W

JMAX

JA

EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

LTC3557EUF#PBF

LTC3557EUF-1#PBF

TAPE AND REEL

PART MARKING

3557

PACKAGE DESCRIPTION

28-Lead (4mm × 4mm) Plastic QFN

TEMPERATURE RANGE

−40°C to 85°C

LTC3557EUF#TRPBF

LTC3557EUF-1#TRPBF

35571

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

POWER MANAGER ELECTRICAL CHARACTERISTICS

The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at T_A= 25°C.

V_BUS= 5V, V_BAT= 3.8V, ILIM0 = ILIM1 = 5V, WALL = EN1 = EN2 = EN3 = 0V, R_PROG= 2k, R_CLPROG= 2.1k.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input Power Supply

V

Input Supply Voltage

4.35

5.5

V

BUS

I

Total Input Current (Note 5)

ILIM0 = 0V, ILIM1 = 0V (1x Mode)

ILIM0 = 5V, ILIM1 = 5V (5x Mode)

ILIM0 = 5V, ILIM1 = 0V (10x Mode)

80

450

900

90

475

950

100

500

1000

mA

BUS(LIM)

●

I

Input Quiescent Current

1x, 5x, 10x Modes

ILIM0 = 0V, ILIM1 = 5V (Suspend Mode)

0.35

0.05

mA

BUSQ

0.1

h

Ratio of Measured V

Current to CLPROG 1x, 5x, 10x Modes

BUS

1000

mA/mA

CLPROG

Program Current

V

CLPROG Servo Voltage in Current Limit

1x Mode

5x Mode

10x Mode

0.2

1.0

2.0

V

CLPROG

UVLO

V

BUS

Undervoltage Lockout

Rising Threshold

Falling Threshold

3.8

3.7

3.9

V

3.5

35571fc

2

LTC3557/LTC3557-1

POWER MANAGER ELECTRICAL CHARACTERISTICS

The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at T_A= 25°C.

V_BUS= 5V, V_BAT= 3.8V, ILIM0 = ILIM1 = 5V, WALL = EN1 = EN2 = EN3 = 0V, R_PROG= 2k, R_CLPROG= 2.1k.

SYMBOL

PARAMETER

to V Differential Undervoltage

OUT

CONDITIONS

MIN

TYP

MAX

UNITS

V

Rising Threshold

Falling Threshold

50

−50

100

mV

DUVLO

BUS

Lockout

R

Input Current Limit Power FET

0.2

Ω

ON_LIM

On-Resistance (Between V

and V

)

OUT

BUS

Battery Charger

V

FLOAT

V

BAT

Regulated Output Voltage

LTC3557

4.179

4.165

4.079

4.065

4.200

4.100

4.221

4.235

4.121

4.135

V

LTC3557, 0°C ≤ T ≤ 85°C

A

LTC3557-1

LTC3557-1, 0°C ≤ T ≤ 85°C

A

●

I

Constant Current Mode Charge Current

R

= 1k, Input Current Limit = 2A

= 2k, Input Current Limit = 1A

= 5k, Input Current Limit = 400mA

950

465

180

1000

500

1050

535

mA

CHG

PROG

200

220

Battery Drain Current

V

BUS

V

BUS

> V

, Charger Off, I = 0μA

OUT

6

55

27

100

μA

BAT

UVLO

= 0V, I

= 0μA (Ideal Diode Mode)

OUT

V

PROG Pin Servo Voltage

PROG Pin Servo Voltage in Trickle Charge

1.000

0.100

V

PROG

PROG(TRKL)

BAT < V

TRKL

h

Ratio of I to PROG Pin Current

1000

50

mA/mA

mA

PROG

TRKL

BAT

I

Trickle Charge Current

BAT < V

40

60

TRKL

V

Trickle Charge Rising Threshold

Trickle Charge Falling Threshold

BAT Rising

BAT Falling

2.85

2.75

3.0

V

TRKL

2.5

−75

3.2

Recharge Battery Threshold Voltage

Safety Timer Termination Period

Threshold Voltage Relative to V

mV

Hour

ΔV

−100

4

−115

4.8

FLOAT

RECHRG

t

Timer Starts when BAT = V

– 50mV

TERM

BADBAT

FLOAT

t

Bad Battery Termination Time

BAT < V

0.4

0.5

0.1

200

0.6

Hour

TRKL

h

C/10

End-of-Charge Indication Current Ratio

(Note 6)

0.085

0.115

mA/mA

mΩ

R

Battery Charger Power FET On-Resistance

ON(CHG)

(Between V

and BAT)

OUT

T

Junction Temperature in Constant

Temperature Mode

110

°C

LIM

NTC

V

I

Cold Temperature Fault Threshold Voltage

Hot Temperature Fault Threshold Voltage

NTC Disable Threshold Voltage

NTC Leakage Current

Rising NTC Voltage

Hysteresis

75

34

76

77

36

2.2

50

%V

COLD

HOT

DIS

VNTC

1.3

Falling NTC Voltage

Hysteresis

35

1.3

%V

VNTC

●

Falling NTC Voltage

Hysteresis

1.2

−50

1.7

50

%V

VNTC

mV

NTC = V

= 5V

nA

NTC

BUS

Ideal Diode

V

Forward Voltage Detection

Diode On-Resistance, Dropout

Diode Current Limit

I

= 10mA

= 1A

5

15

200

3.6

25

mV

mΩ

A

FWD

OUT

R

DROPOUT

MAX

OUT

I

(Note 7)

Always On 3.3V Supply

V

Regulated Output Voltage

0mA < I

< 25mA

3.1

3.3

24

3.5

V

Ω

LDO3V3

R

Open-Loop Output Resistance

Closed-Loop Output Resistance

BAT = 3.0V, V

= 0V

OL(LDO3V3)

CL(LDO3V3)

BUS

3.2

35571fc

3

LTC3557/LTC3557-1

POWER MANAGER ELECTRICAL CHARACTERISTICS

The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at T_A= 25°C.

V_BUS= 5V, V_BAT= 3.8V, ILIM0 = ILIM1 = 5V, WALL = EN1 = EN2 = EN3 = 0V, R_PROG= 2k, R_CLPROG= 2.1k.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Wall Adapter

V

ACPR

ACPR Pin Output High Voltage

ACPR Pin Output Low Voltage

I

= 1mA

V

OUT

0

V

OUT

− 0.3

ACPR

0.3

V

Absolute Wall Input Threshold Voltage

Differential Wall Input Threshold Voltage

Wall Operating Quiescent Current

WALL Rising

WALL Falling

4.3

3.2

4.45

V

W

3.1

0

25

75

mV

ΔV

WALL − BAT Falling

WALL − BAT Rising

W

150

0.4

I

440

μA

I

+ I

, I = 0mA,

VOUT BAT

OUT

QWALL

WALL

WALL = V

= 5V

Logic (I

, I

and CHRG)

LIM0 LIM1

V

Input Low Voltage

ILIM0, ILIM1

V

IL

IH

Input High Voltage

1.2

I

Static Pull-Down Current

CHRG Pin Output Low Voltage

CHRG Pin Input Current

ILIM0, ILIM1; V = 1V

2

0.15

0

μA

V

PD

V

I

= 10mA

0.4

1

CHRG

I

BAT = 4.5V, CHRG = 5V

μA

SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS

The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at T_A= 25°C.

V_OUT= V_IN1= V_IN2= 3.8V, MODE = EN1 = EN2 = EN3 = 0V.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Step-Down Switching Regulators 1, 2 and 3

●

V

, V

Input Supply Voltage

(Note 9)

2.7

2.5

5.5

2.9

V

IN1 IN2

UVL0

V

OUT

V

OUT

Falling

Rising

V

and V Connected to V Through Low

OUT

2.7

2.8

V

OUT

IN1

IN2

Impedance. Switching Regulators are Disabled

Below V UVLO

OUT

f

Oscillator Frequency

Input Low Voltage

1.91

1.2

2.25

2.59

0.4

MHz

V

OSC

V

MODE, EN1, EN2, EN3

IL

IH

Input High Voltage

V

I

Static Pull-Down Current

MODE, EN1, EN2, EN3 (V = 1V)

1

μA

PD

Step-Down Switching Regulator 1

I

Pulse-Skip Mode Input Current (Note 10)

Burst Mode Input Current (Note 10)

Shutdown Input Current

I

= 0, EN1 = 3.8V, MODE = 0V

= 0, EN1 = MODE = 3.8V

= 0, EN1 = 0V, FB1 = 0V

220

35

μA

VIN1

OUT

50

1

0.01

1200

μA

I

Peak PMOS Current Limit

EN1 = 3.8V, MODE = 0V or 3.8V (Note 7)

900

1500

mA

LIM1

●

V

I

Feedback Voltage

EN1 = 3.8V, MODE = 0V

EN1 = MODE = 3.8V

0.78

0.8

0.82

V

FB1

0.824

FB1 Input Current (Note 10)

Maximum Duty Cycle

EN1 = 3.8V

0.05

μA

%

−0.05

FB1

D1

FB1 = 0V, EN1 = 3.8V

EN1 = 3.8V

100

R

of PMOS

of NMOS

0.3

0.4

10

Ω

P1

DS(ON)

EN1 = 3.8V

Ω

N1

SW1 Pull-Down in Shutdown

EN1 = 0V

kΩ

SW1(PD)

35571fc

4

LTC3557/LTC3557-1

SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS

The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at T_A= 25°C.

V_OUT= V_IN1= V_IN2= 3.8V, MODE = EN1 = EN2 = EN3 = 0V.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Step-Down Switching Regulator 2

I

Pulse-Skip Mode Input Current (Note 10)

Burst Mode Input Current (Note 10)

Shutdown Input Current

I

= 0, EN2 = 3.8V, MODE = 0V

= 0, EN2 = MODE = 3.8V

= 0, EN2 = 0V, FB2 = 0V

220

35

μA

VIN2

OUT

50

1

0.01

800

μA

I

Peak PMOS Current Limit

EN2 = 3.8V, MODE = 0V or 3.8V (Note 7)

600

1000

mA

LIM2

●

V

I

Feedback Voltage

EN2 = 3.8V, MODE = 0V

EN2 = MODE = 3.8V

0.78

0.8

0.82

V

FB2

0.824

FB2 Input Current (Note 10)

Maximum Duty Cycle

EN2 = 3.8V

0.05

μA

%

−0.05

FB2

D2

FB2 = 0V, EN2 = 3.8V

EN2 = 3.8V

100

R

of PMOS

of NMOS

0.6

10

Ω

P2

DS(ON)

DS(0N)

EN2 = 3.8V

Ω

N2

SW2 Pull-Down in Shutdown

EN2 = 0V

kΩ

V

SW2(PD)

RST2

V

Power-On RST2 Pin Output Low Voltage

Power-On RST2 Pin Input Current (Note 10)

Power-On RST2 Pin Threshold

I

= 1mA, FB2 = 0V, EN2 = 3.8V

= 5.5V, EN2 = 3.8V

0.1

0.35

1

RST2

I

V

μA

%

RST2

V

(Note 8)

−8

TH(RST2)

t

Power-On RST2 Pin Delay

From RST2 Threshold to RST2 Hi-Z

230

ms

RST2

Step-Down Switching Regulator 3

I

Pulse-Skip Mode Input Current (Note 10)

Burst Mode Input Current (Note 10)

Shutdown Input current

I

= 0, EN3 = 3.8V, MODE = 0V

= 0, EN3 = MODE = 3.8V

= 0, EN3 = 0V, FB3 = 0V

220

35

μA

VIN2

OUT

50

1

0.01

800

μA

I

Peak PMOS Current Limt

EN3 = 3.8V, MODE = 0V or 3.8V (Note 7)

600

1000

mA

LIM3

●

V

I

Feedback Voltage

EN3 = 3.8V, MODE = 0V

EN3 = MODE = 3.8V

0.78

0.8

0.82

V

FB3

0.824

FB3 Input Current (Note 10)

Maximum Duty Cycle

EN3 = 3.8V

0.05

μA

%

−0.05

FB3

D3

FB3 = 0V, EN3 = 3.8V

EN3 = 3.8V

100

R

of PMOS

of NMOS

0.6

10

Ω

P3

DS(ON)

EN3 = 3.8V

Ω

N3

SW3 Pull-Down in Shutdown

EN3 = 0V

kΩ

SW3(PD)

Note 1. Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 5. Total input current is the sum of quiescent current, I

, and

BUSQ

measured current given by V

/R

• (h

+ 1)

CLPROG CLPROG

CLPROG

Note 6. h

is expressed as a fraction of measured full charge current

C/10

with indicated PROG resistor.

Note 2. The LTC3557/LTC3557-1 is guaranteed to meet performance

speciﬁcations from 0°C to 85°C. Speciﬁcations over the −40°C to 85°C

operating temperature range are assured by design, characterization and

correlation with statistical process controls.

Note 7. The current limit features of this part are intended to protect the

IC from short term or intermittent fault conditions. Continuous operation

above the maximum speciﬁed pin current rating may result in device

degradation or failure.

Note 3. This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperatures will exceed 110°C when overtemperature protection is

active. Continuous operation above the speciﬁed maximum operating

junction temperature may result in device degradation or failure.

Note 8. RST2 threshold is expressed as a percentage difference from the

FB2 regulation voltage. The threshold is measured for FB2 rising.

Note 9. V

not in UVLO.

OUT

Note 10. FB high, not switching.

Note 4. V is the greater of V , V

or BAT.

CC

BUS OUT

35571fc

5

LTC3557/LTC3557-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C unless otherwise speciﬁed}

Input Supply Current

vs Temperature

Input Supply Current

Battery Drain Current

vs Temperature

vs Temperature (Suspend Mode)

0.20

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

0.02

0

0.10

0.08

0.06

0.04

0.02

0

0.8

V

BUS

= 5V

V

= 5V

BUS

3 BUCKS ENABLED

2 BUCKS ENABLED

1x MODE

0.7

0.6

0.5

0.4

0.3

0.2

0.1

1 BUCK ENABLED

N0 BUCKS ENABLED

V

= 3.8V

BAT

MODE = 3.8V

0

–50 –25

0

50

75 100 125

–50

–25

0

25

50

75 100 125

25

–25

0

50

75 100 125

–50

25

TEMPERATURE (°C)

35571 G03

35571 G02

35571 G01

Input Current Limit

vs Temperature

Charge Current vs Temperature

(Thermal Regulation)

Input R_ONvs Temperature

1200

1100

1000

900

800

700

600

500

400

300

200

100

0

300

280

260

240

220

180

160

140

120

100

0

600

500

400

300

V

= 5V

CLPROG

I

= 400mA

BUS

OUT

R

= 2.1k

10x MODE

V

BUS

= 4.5V

V

BUS

= 5V

5x MODE

V

BUS

= 5.5V

200

100

0

V

= 5V

BUS

1x MODE

10x MODE

= 2k

R

PROG

–50

0

25

50

75 100 125

–25

–50

0

25

50

75 100 125

–25

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

TEMPERATURE (°C)

35571 G04

35571 G05

35571 G06

Battery Current and Voltage

vs Time (LTC3557)

Battery Regulation (Float)

Voltage vs Temperature

V_FLOATLoad Regulation

4.22

4.20

4.18

4.16

4.14

4.12

4.10

4.08

4.06

600

500

400

300

200

100

0

6

5

4

3

2

1

0

4.22

4.20

4.18

4.16

I

= 2mA

LTC3557

V

= 5V

BAT

BUS

LTC3557

10x MODE

CHRG

V

BAT

4.14

4.12

SAFETY

TIMER

LTC3557-1

1450mAhr

CELL

TERMINATION

LTC3557-1

4.10

4.08

4.06

C/10

V

= 5V

BUS

PROG

R

= 2k

I

BAT

CLPROG

200

400

800

50

TEMPERATURE (°C)

125

0

2

3

4

5

6

0

1000

–50

0

25

75 100

1

600

(mA)

–25

TIME (HOUR)

I

BAT

35571 G07

35571 G08

35571 G09

35571fc

6

LTC3557/LTC3557-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C unless otherwise speciﬁed}

Forward Voltage

vs Ideal Diode Current

(with Si2333DS External FET)

Forward Voltage vs Ideal Diode

Current (No External FET)

I_BATvs V_BAT

600

500

400

300

200

100

0

40

35

30

25

0.25

0.20

0.15

0.10

V

T

= 0V

V

A

= 3.8V

= 0V

BUS

A

BAT

BUS

= 25°C

V

= 3.2V

BAT

T

V

= 3.6V

BAT

V

BAT

= 4.2V

20

15

10

5

V

= 5V

BUS

0.05

0

10x MODE

R

= 2k

CLPROG

PROG

= 2k

0

0.2

0.4

I

0.8

0

1.0

2.0

2.8

3.2

(V)

3.6

4.0

4.4

0.6

(A)

2.4

0

0.4

0.6

(A)

0.8

1.0

1.2

0.2

V

BAT

I

BAT

35571 G12

35571 G10

35571 G11

Input Connect Waveform

Input Disconnect Waveform

Switching from 1x to 5x Mode

V

BUS

5V/DIV

BUS

5V/DIV

ILIM0/ILIM1

5V/DIV

V

OUT

5V/DIV

I

BUS

0.5A/DIV

I

BAT

0.5A/DIV

BAT

0.5A/DIV

35571 G25

35571 G26

35571 G27

V

= 3.75V

1ms/DIV

V

= 3.75V

1ms/DIV

V

= 3.75V

= 50mA

1ms/DIV

BAT

OUT

BAT

OUT

BAT

OUT

I

= 100mA

I

= 100mA

I

R

= 2k

R

= 2k

R

= 2k

CLPROG

= 2k

PROG

Switching from Suspend Mode

to 5x Mode

WALL Connect Waveform

WALL Disconnect Waveform

ILIM0

5V/DIV

WALL

5V/DIV

WALL

5V/DIV

V

OUT

5V/DIV

V

OUT

5V/DIV

I

WALL

0.5A/DIV

WALL

I

BUS

0.5A/DIV

I

BAT

0.5A/DIV

35571 G28

35571 G29

35571 G30

V

= 3.75V

100μs/DIV

V

= 3.75V

1ms/DIV

V

= 3.75V

1ms/DIV

BAT

OUT

BAT

OUT

BAT

OUT

I

= 100mA

I

= 100mA

I

= 100mA

R

= 2k

R

= 2k

R

= 2k

PROG

CLPROG

PROG

= 2k

PROG

ILIM1 = 5V

35571fc

7

LTC3557/LTC3557-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C unless otherwise speciﬁed}

Oscillator Frequency

vs Temperature

Step-Down Switching Regulator 1

3.3V Output Efﬁciency vs I_OUT1

Step-Down Switching Regulator 2

1.2V Output Efﬁciency vs I_OUT2

2.5

2.4

2.3

2.2

2.1

2.0

1.9

1.8

1.7

1.6

1.5

100

90

100

90

Burst Mode

OPERATION

Burst Mode

OPERATION

V

= 3.8V

= 5V

80

IN

80

V

IN

70

60

50

60

50

PULSE SKIP

40

30

20

10

0

40

30

20

10

0

V

IN

= 2.9V

V

IN

= 2.7V

V

OUT1

= 3.3V

V

= 1.2V

OUT2

V

IN1

= 3.8V

= 5V

V

= 3.8V

= 5V

IN1

IN2

V

–50

0

25

50

75 100 125

–25

0.01

0.1

1

I

10

100

1000

0.01

0.1

1

I

10

100

1000

TEMPERATURE (°C)

(mA)

OUT1

OUT2

35571 G14

35571 G15

35571 G13

Step-Down Switching

Regulator Short-Circuit Current

vs Temperature

Step-Down Switching Regulator

Pulse Skip Supply Current vs V_INX

Step-Down Switching Regulator 3

1.8V Output Efﬁciency vs I_OUT3

100

90

400

350

1200

V

= 1.2V

= 0mA

OUTX

I

1100

1000

Burst Mode

OPERATION

80

110°C

600mA BUCK

400mA BUCK

70

300

250

900

800

700

600

500

60

50

PULSE SKIP

75°C

25°C

40

30

20

10

0

200

150

100

–45°C

V

OUT3

= 1.8V

V

= 3.8V

= 5V

IN3

400

2.5

3.0

3.5

V

4.0

(V)

4.5

5.0

–25

0

50

75 100 125

0.01

0.1

1

I

10

100

1000

–50

25

(mA)

TEMPERATURE (°C)

INX

OUT3

35571 G16

35571 G17

35571 G18

Step-Down Switching Regulator

Output Transient (MODE = 1)

Step-Down Switching Regulator

Output Transient (MODE = 0)

Step-Down Switching Regulator

Switch Impedance vs Temperature

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

V

INX

= 3.2V

V

OUT2

50mV/DIV

(AC)

50mV/DIV

(AC)

400mA

PMOS

400mA

NMOS

V

OUT3

50mV/DIV

(AC)

50mV/DIV

(AC)

600mA PMOS

600mA NMOS

300mA

I

OUT2

5mA

35571 G1

35571 G2

V

I

= 1.2V

= 1.8V

50μs/DIV

V

I

= 1.2V

= 1.8V

50μs/DIV

OUT2

OUT3

OUT2

OUT3

= 16mA

= 100mA

0

–50 –25

0

25

125

50

75 100

TEMPERATURE (°C)

35571 G21

35571fc

8

LTC3557/LTC3557-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C unless otherwise speciﬁed}

600mA Step-Down Switching

Regulator Feedback Voltage

vs Output Current

400mA Step-Down Switching

Regulator Feedback Voltage

vs Output Current

Step-Down Switching Regulator

Start-Up Waveform

0.85

0.84

0.83

0.82

0.81

0.80

0.79

0.78

0.77

0.76

0.75

0.85

0.84

0.83

0.82

0.81

0.80

0.79

0.78

0.77

0.76

0.75

V

OUT2

50mV/DIV(AC)

Burst Mode

OPERATION

Burst Mode

OPERATION

V

OUT1

1V/DIV

0V

PULSE SKIP

I

PULSE SKIP

L1

200mA/DIV

0mA

EN1

35571 G24

V

= 1.2V

100μs/DIV

OUT2

3.8V

5V

3.8V

5V

I

= 50mA

MODE = 1

R

= 8Ω

OUT1

0.1

1

10

100

1000

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

35571 G22

35571 G23

PIN FUNCTIONS

ILIM0,ILIM1(Pins1,2):InputCurrentControlPins.ILIM0

andILIM1controltheinputcurrentlimit. SeeTable1. Both

pinsarepulledlowbyaweakcurrentsink.

MODE (Pin 8): Low Power Mode Enable. When this pin is

pulled high, the three step-down switching regulators are

settolowpowerBurstModeoperation.

EN1 (Pin 9): Logic Input Enables Step-Down Switching

WALL (Pin 3): Wall Adapter Present Input. Pulling this pin

Regulator1.

above 4.3V will disconnect the power path from V

to

BUS

V

. TheACPRpinwillalsobepulledlowtoindicatethata

OUT

EN2 (Pin 10): Logic Input Enables Step-Down Switching

Regulator2.

walladapterhasbeendetected.

LDO3V3 (Pin 4): Always On 3.3V LDO Output. The

EN3 (Pin 11): Logic Input Enables Step-Down Switching

LDO3V3 pin provides a regulated, always-on 3.3V supply

Regulator3.

voltage. This pin gets its power from V . It may be used

OUT

FB3 (Pin 12): Feedback Input for Step-Down Switching

Regulator3.Thispinservostoaﬁxedvoltageof0.8Vwhen

thecontrolloopiscomplete.

for light loads such as a real-time clock or housekeeping

microprocessor. A 1μF capacitor is required from LDO3V3

to ground if it will be called upon to deliver current. If

the LDO3V3 output is not used it should be disabled by

FB2 (Pin 13): Feedback Input for Step-Down Switching

Regulator2.Thispinservostoaﬁxedvoltageof0.8Vwhen

thecontrolloopiscomplete.

connecting it to V

.

OUT

SW1 (Pin 5): Power Transmission (Switch) Pin for

Step-DownSwitchingRegulator1.

RST2(Pin14):Thisisanopen-drainoutputwhichindicates

thatstep-downswitchingregulator2hassettledtoitsﬁnal

value. It can be used as a power on reset for the primary

microprocessor or to enable the other buck regulators for

supplysequencing.

V

(Pin 6): Power Input for Step-Down Switching

IN1

Regulator1.ThispinwillgenerallybeconnectedtoV

.

OUT

FB1 (Pin 7): Feedback Input for Step-Down Switching

Regulator1.Thispinservostoaﬁxedvoltageof0.8Vwhen

thecontrolloopiscomplete.

SW2 (Pin 15): Power Transmission (Switch) Pin for

Step-DownSwitchingRegulator2.

35571fc

9

LTC3557/LTC3557-1

PIN FUNCTIONS

V

(Pin16):PowerInputforStep-DownSwitchingRegu-

exceeds the allotted input current from V

or if the V

BUS

IN2

BUS

lators2and3.ThispinwillgenerallybeconnectedtoV

.

power source is removed. V

should be bypassed with

OUT

a low impedance multilayer ceramic capacitor. The total

capacitance on V should maintain a minimum of 5μF

SW3 (Pin 17): Power Transmission (Switch) Pin for

OUT

Step-DownSwitchingRegulator3.

overoperatingvoltageandtemperature.

V

(Pin18):OutputBiasVoltageforNTC.Aresistorfrom

NTC

V

(Pin 24): USB Input Voltage. V

will usually be

BUS

thispintotheNTCpinwillbiastheNTCthermistor.

connectedtotheUSBportofacomputeroraDCoutputwall

NTC(Pin19):TheNTCpinconnectstoabattery’sthermistor

todetermineifthebatteryistoohotortoocoldtocharge.If

thebattery’stemperatureisoutofrange,chargingispaused

until it drops back into range. A low drift bias resistor is

adapter. V

multilayerceramiccapacitor.

should be bypassed with a low impedance

BUS

ACPR (Pin 25): Wall Adapter Present Output (Active

Low). A low on this pin indicates that the wall adapter

input comparator has had its input pulled above its input

threshold(typically4.3V). Thispincanbeusedtodrivethe

gateofanexternalP-channelMOSFETtoprovidepowerto

requiredfromV toNTCandathermistorisrequiredfrom

NTC

NTC to ground. If the NTC function is not desired, the NTC

pinshouldbegrounded.

PROG (Pin 20): Charge Current Program and Charge

Current Monitor Pin. Connecting a resistor from PROG to

groundprogramsthechargecurrent:

V

fromapowersourceotherthanaUSBport.

OUT

V (Pin26):HighVoltageBuckRegulatorControlPin.This

C

pin can be used to drive the V pin of an approved external

C

1000V

I_CHG(A)=

highvoltagebuckswitchingregulator.AnexternalP-channel

MOSFET is required to provide power to V

with its gate

R_PROG

OUT

tiedtotheACPRpin.TheV pinisdesignedtoworkwiththe

C

LT^®3480,LT3481andLT3505.

If sufﬁcient input power is available in constant current

mode, this pin servos to 1V. The voltage on this pin always

representstheactualchargecurrent.

CLPROG(Pin27):InputCurrentProgramandInputCurrent

MonitorPin.AresistorfromCLPROGtogrounddetermines

GATE (Pin 21): Ideal Diode Gate Connection. This pin

controlsthegateofanoptionalexternalP-channelMOSFET

transistorusedtosupplementtheinternalidealdiode. The

source of the P-channel MOSFET should be connected

the upper limit of the current drawn from the V

BUS

(i.e., the input current limit). A precise fraction of the input

current, h , is sent to the CLPROG pin. The input

CLPROG

PowerPath delivers current until the CLPROG pin reaches

to V

and the drain should be connected to BAT. It is

2.0V (10x Mode), 1.0V (5x Mode) or 0.2V (1x Mode).

OUT

important to maintain high impedance on this pin and

minimizeallleakagepaths.

Therefore,thecurrentdrawnfromV willbelimitedtoan

BUS

amountgivenbyh

andR

.InUSBapplications

CLPROG

theresistorR

shouldbesettonolessthan2.1k.

CLPROG

BAT (Pin 22): Single Cell Li-Ion Battery Pin. Depending on

availablepowerandload,aLi-IonbatteryonBATwilleither

CHRG (Pin 28): Open-Drain Charge Status Output. The

CHRG pin indicates the status of the battery charger.

Four possible states are represented by CHRG: charging,

not charging (i.e., ﬂoat charge current less than 1/10th

programmedchargecurrent),unresponsivebattery(i.e.,its

voltageremainsbelow2.8Vafter1/2hourofcharging)and

battery temperature out of range. CHRG requires a pull-up

resistorand/orLEDtoprovideindication.

deliversystempowertoV

throughtheidealdiodeorbe

OUT

chargedfromthebatterycharger.

V

(Pin23):OutputVoltageofthePowerPathController

OUT

and Input Voltage of the Battery Charger. The majority of

the portable product should be powered from V . The

OUT

LTC3557/LTC3557-1 will partition the available power

between the external load on V

and the internal battery

OUT

charger. Priority is given to the external load and any extra

power is used to charge the battery. An ideal diode from

Exposed Pad (Pin 29): Ground. The exposed package pad

is ground and must be soldered to the PC board for proper

BAT to V

ensures that V

is powered even if the load

functionalityandformaximumheattransfer.

OUT

35571fc

10

LTC3557/LTC3557-1

BLOCK DIAGRAM

3

25

ACPR

26

WALL

V

C

WALL

DETECT

V

C

CONTROL

V

BUS

OUT

24

23

21

+

–

GATE

IDEAL

DIODE

CC/CV

CHARGER

INPUT

CURRENT

LIMIT

CLPROG

27

–

+

15mV

BAT

22

20

PROG

LDO3V3

3.3V

LDO

4

6

V

IN1

V

NTC

BATTERY

18

19

TEMP

600mA, 2.25MHz

NTC

MONITOR

BUCK REGULATOR

OSC

EN

REF

SW1

FB1

CHRG

5

28

CHARGE

STATUS

MODE

7

V

IN2

16

ILIM0

ILIM1

1

2

ILIM

LOGIC

400mA, 2.25MHz

BUCK REGULATOR

OSC

EN1

SW2

FB2

9

15

13

EN2

EN

LOGIC

10

11

8

EN

EN3

MODE

RST2

14

400mA, 2.25MHz

BUCK REGULATOR

OSC

SW3

FB3

17

12

EN

MODE

GND

29

35571 BD

35571fc

11

LTC3557/LTC3557-1

OPERATION

Introduction

The LTC3557/LTC3557-1 has the unique ability to use

the output, which is powered by an external supply, to

charge the battery while providing power to the load. A

comparator on the WALL pin is conﬁgured to detect the

presence of the wall adapter and shut off the connection

The LTC3557/LTC3557-1 is a highly integrated power

management IC that includes a PowerPath controller,

battery charger, an ideal diode, an always-on LDO, three

synchronous step-down switching regulators as well as

to the USB. This prevents reverse conduction from V

OUT

a buck regulator V controller. Designed speciﬁcally for

C

to V

when a wall adapter is present.

BUS

USB applications, the PowerPath controller incorporates

a precision input current limit which communicates with

the battery charger to ensure that input current never

violates the USB speciﬁcations.

The LTC3557/LTC3557-1 provides a V output pin which

C

can be used to drive the V pin of an external high voltage

C

buck switching regulator such as the LT3480, LT3481, or

LT3505 to provide power to the V

pin. The V control

OUT

C

The ideal diode from BAT to V

guarantees that ample

OUT

circuitry adjusts the regulation point of the switching

regulator to a small voltage above the BAT pin voltage.

This control method provides a high input voltage, high

efﬁciency battery charger and PowerPath function.

powerisalwaysavailabletoV evenifthereisinsufﬁcient

or absent power at V

.

BUS

The LTC3557/LTC3557-1 also has the ability to receive

power from a wall adapter or other non-current-limited

power source. Such a power supply can be connected

An “always on” LDO provides a regulated 3.3V from V

.

OUT

This LDO will be on at all times and can be used to supply

up to 25mA.

to the V

pin of the LTC3557/LTC3557-1 through an

OUT

external device such as a power Schottky or FET as shown

in Figure 1.

FROM AC ADAPTER (OR HIGH VOLTAGE BUCK OUTPUT)

26

V

C

OPTIONAL CONTROL

FOR HIGH VOLTAGE BUCK REGS

LT3480, LT3481 OR LT3505

4.3V

(RISING)

3.2V

–

+

(FALLING)

WALL

ACPR

3

25

+

–

75mV (RISING)

25mV (FALLING)

+

–

FROM

USB

ENABLE

V

BUS

V

OUT

24

23

21

SYSTEM

LOAD

USB CURRENT LIMIT

IDEAL

DIODE

OPTIONAL

EXTERNAL

IDEAL DIODE

PMOS

+

–

GATE

CONSTANT CURRENT

CONSTANT VOLTAGE

BATTERY CHARGER

–

+

15mV

BAT

22

+

Li-Ion

35571 F01

Figure 1. Simpliﬁed PowerPath Block Diagram

35571fc

12

LTC3557/LTC3557-1

OPERATION

TheLTC3557/LTC3557-1includesthree2.25MHzconstant

frequency current mode step-down switching regulators

providing 400mA, 400mA and 600mA each. All step-

down switching regulators can be programmed for a

minimumoutputvoltageof0.8Vandcanbeusedtopower

a microcontroller core, microcontroller I/O, memory or

other logic circuitry. All step-down switching regulators

support 100% duty cycle operation and are capable of

operating in Burst Mode operation for highest efﬁciencies

at light loads (Burst Mode operation is pin selectable). No

external compensation components are required for the

switching regulators.

The input current limit is programmed by the ILIM0 and

ILIM1 pins. The LTC3557/LTC3557-1 can be conﬁgured to

limitinputcurrenttooneofseveralpossiblesettingsaswell

as be deactivated (USB Suspend). The input current limit

willbesetbytheappropriateservovoltageandtheresistor

on CLPROG according to the following expression:

0.2V

R_CLPROG

I_VBUS= I_BUSQ

+

• h_CLPROG1x Mode

(

)

1V

R_CLPROG

• h_CLPROG5x Mode

(

)

2V

R_CLPROG

USB PowerPath Controller

• h_CLPROG10x Mode

(

)

The input current limit and charge control circuits of the

LTC3557/LTC3557-1 are designed to limit input current

as well as control battery charge current as a function of

Underworst-caseconditions,theUSBspeciﬁcationwillnot

be violated with an R resistor of greater than 2.1k.

CLPROG

I

. V

drives the combination of the external load,

VOUT OUT

Table 1 shows the available settings for the ILIM0 and

ILIM1 pins:

the three step-down switching regulators, always on 3.3V

LDO and the battery charger.

Table 1: Controlled Input Current Limit

If the combined load does not exceed the programmed

ILIM1

ILIM0

I

BUS(LIM)

inputcurrentlimit,V

willbeconnectedtoV

through

OUT

BUS

0

1

0

1

0

1

100mA (1x)

1A (10x)

an internal 200mΩ P-channel MOSFET.

If the combined load at V exceeds the programmed

OUT

Suspend

inputcurrentlimit,thebatterychargerwillreduceitscharge

current by the amount necessary to enable the external

load to be satisﬁed while maintaining the programmed

input current. Even if the battery charge current is set to

exceedtheallowableUSBcurrent,theaverageinputcurrent

USB speciﬁcation will not be violated. Furthermore, load

500mA (5x)

Notice that when ILIM0 is high and ILIM1 is low, the input

current limit is set to a higher current limit for increased

charging and current availability at V . This mode is

OUT

typically used when there is power available from a wall

current at V

will always be prioritized and only excess

OUT

adapter.

available current will be used to charge the battery.

Ideal Diode from BAT to V

ThecurrentoutoftheCLPROGpinisafraction(1/h

)

OUT

CLPROG

of the V

current. When a programming resistor is con-

BUS

TheLTC3557/LTC3557-1hasaninternalidealdiodeaswell

as a controller for an optional external ideal diode. Both

the internal and the external ideal diodes respond quickly

nected from CLPROG to GND, the voltage on CLPROG

represents the input current:

whenever V

drops below BAT.

V_CLPROG

R_CLPROG

OUT

I_VBUS= I_BUSQ

+

•h_CLPROG

If the load increases beyond the input current limit, ad-

ditional current will be pulled from the battery via the

ideal diodes. Furthermore, if power to V

where I

and h

are given in the Electrical

CLPROG

BUSQ

Characteristics.

(USB) or

BUS

V

(external wall power or high voltage regulator) is

OUT

removed, then all of the application power will be provided

35571fc

13

LTC3557/LTC3557-1

OPERATION

by the battery via the ideal diodes. The ideal diodes are

2. The WALL pin voltage falls below 3.2V.

fast enough to keep V

from dropping with just the

OUT

Each of these thresholds is suitably ﬁltered in time to

prevent transient glitches on the WALL pin from falsely

triggering an event.

recommended output capacitor. The ideal diode consists

of a precision ampliﬁer that enables an on-chip P-channel

MOSFET whenever the voltage at V

is approximately

OUT

SeetheApplicationsInformationsectionforanexplanation

of high voltage buck regulator control using the V pin.

15mV (V ) below the voltage at BAT. The resistance of

FWD

the internal ideal diode is approximately 200mΩ. If this is

sufﬁcientfortheapplication,thennoexternalcomponents

are necessary. However, if more conductance is needed,

an external P-channel MOSFET can be added from BAT

C

Suspend Mode

When ILIM0 is pulled low and ILIM1 is pulled high the

LTC3557/LTC3557-1 enters Suspend mode to comply

with the USB speciﬁcation. In this mode, the power path

to V

.

OUT

TheGATEpinoftheLTC3557/LTC3557-1drivesthegateof

the external P-channel MOSFET for automatic ideal diode

control. The source of the MOSFET should be connected

between V

and V

BUS

is put in a high impedance state to

BUS

reduce the V

OUT

input current to 50μA. If no other power

source is available to drive WALL and V , the system

OUT

to V

and the drain should be connected to BAT. Capable

OUT

loadconnectedtoV issuppliedthroughtheidealdiodes

OUT

of driving a 1nF load, the GATE pin can control an external

connectedtoBAT.IfanexternalpowersourcedrivesWALL

P-channel MOSFET having extremely low on-resistance.

and V

such that V

< V , the Suspend mode V

OUT BUS BUS

OUT

input current can be as high as 200μA.

Using the WALL Pin to Detect the Presence of an

External Power Source

3.3V Always-On Supply

The WALL input pin can be used to identify the presence

of an external power source (particularly one that is not

The LTC3557/LTC3557-1 includes an ultralow quiescent

currentlowdropoutregulatorthatisalwayspowered.This

LDOcanbeusedtoprovidepowertoasystempushbutton

controller or standby microcontroller. Designed to deliver

up to 25mA, the always-on LDO requires a 1μF MLCC

bypass capacitor for compensation. The LDO is powered

subject to a ﬁxed current limit like the USB V

input).

BUS

Typically, such a power supply would be a 5V wall adapter

output or the low voltage output of a high voltage buck

regulator (speciﬁcally, LT3480, LT3481 or LT3505). When

the wall adapter output (or buck regulator output) is con-

nected directly to the WALL pin, and the voltage exceeds

from V , and therefore will enter dropout at loads less

OUT

than 25mA as V

not used, it should be disabled by connecting it to V

falls near 3.3V. If the LDO3V3 output is

OUT

the WALL pin threshold, the USB power path (from V

BUS

.

OUT

to V ) will be disconnected. Furthermore, the ACPR pin

OUT

will be pulled low. In order for the presence of an external

power supply to be acknowledged, both of the following

conditions must be satisﬁed:

V

Undervoltage Lockout (UVLO)

BUS

An internal undervoltage lockout circuit monitors V

and keeps the input current limit circuitry off until V

BUS

1. The WALL pin voltage must exceed approximately

4.3V.

rises above the rising UVLO threshold (3.8V) and at least

50mV above V . Hysteresis on the UVLO turns off the

OUT

2. The WALL pin voltage must exceed 75mV above the

BAT pin voltage.

inputcurrentlimitifV

dropsbelow3.7Vor50mVbelow

BUS

V

OUT

. When this happens, system power at V

will be

OUT

drawn from the battery via the ideal diode. To minimize the

possibility of oscillation in and out of UVLO when using

resistive input supplies, the input current limit is reduced

The input power path (between V

and V ) is

OUT

BUS

re-enabled and the ACPR pin is pulled high when either

of the following conditions is met:

as V

drops below 4.45V typical.

BUS

1. The WALL pin voltage falls to within 25mV of the BAT

pin voltage.

35571fc

14

LTC3557/LTC3557-1

OPERATION

Battery Charger

battery is always topped off, a charge cycle will automati-

cally begin when the battery voltage falls below V

RECHRG

TheLTC3557/LTC3557-1includesaconstantcurrent/con-

stant voltage battery charger with automatic recharge,

automatic termination by safety timer, low voltage trickle

charging, bad cell detection and thermistor sensor input

for out of temperature charge pausing.

(typically 4.1V for the LTC3557 or 4V for LTC3557-1). In

the event that the safety timer is running when the battery

voltage falls below V

, the timer will reset back to

RECHRG

zero. To prevent brief excursions below V

from re-

RECHRG

setting the safety timer, the battery voltage must be below

formorethan1.3ms. Thechargecycleandsafety

When a battery charge cycle begins, the battery charger

ﬁrst determines if the battery is deeply discharged. If the

batteryvoltageisbelowV

V

RECHRG

timerwillalsorestartiftheV

UVLOcycleslowandthen

BUS

,typically2.85V,anautomatic

high (e.g., V , is removed and then replaced).

TRKL

BUS

trickle charge feature sets the battery charge current to

10% of the programmed value. If the low voltage persists

for more than 1/2 hour, the battery charger automatically

terminates and indicates via the CHRG pin that the battery

was unresponsive.

Charge Current

The charge current is programmed using a single resistor

from PROG to ground. 1/1000th of the battery charge

current is delivered to PROG which will attempt to servo

to1.000V. Thus, thebatterychargecurrentwilltrytoreach

1000 times the current in the PROG pin. The program

resistor and the charge current are calculated using the

following equations:

Oncethebatteryvoltageisabove2.85V,thebatterycharger

begins charging in full power constant current mode. The

current delivered to the battery will try to reach 1000V/

R

PROG

. Depending on available input power and external

load conditions, the battery charger may or may not be

able to charge at the full programmed rate. The external

load will always be prioritized over the battery charge

current. The USB current limit programming will always

be observed and only additional current will be available

to charge the battery. When system loads are light, battery

charge current will be maximized.

1000V

I_CHG

1000V

R_PROG

=

, I_CHG=

Ineithertheconstantcurrentorconstantvoltagecharging

modes, the PROG pin voltage will be proportional to the

actual charge current delivered to the battery. Therefore,

the actual charge current can be determined at any

time by monitoring the PROG pin voltage and using the

following equation:

Charge Termination

The battery charger has a built-in safety timer. When the

battery voltage approaches the ﬂoat voltage (4.2V for

LTC3557or4.1VforLTC3557-1),thechargecurrentbegins

to decrease as the LTC3557/LTC3557-1 enters constant

voltage mode. Once the battery charger detects that it

has entered constant voltage mode, the four hour safety

timer is started. After the safety timer expires, charging

of the battery will terminate and no more current will be

delivered.

V_PROG

R_PROG

I_BAT

=

•1000

In many cases, the actual battery charge current, I , will

BAT

belowerthanI

duetolimitedinputcurrentavailableand

CHG

prioritization with the system load drawn from V

.

OUT

Thermal Regulation

To prevent thermal damage to the IC or surrounding

components, an internal thermal feedback loop will

automatically decrease the programmed charge current

if the die temperature rises to approximately 110°C.

Thermal regulation protects the LTC3557/LTC3557-1

from excessive temperature due to high power operation

Automatic Recharge

After the battery charger terminates, it will remain off

drawing only microamperes of current from the battery.

If the portable product remains in this state long enough,

thebatterywilleventuallyselfdischarge.Toensurethatthe

35571fc

15

LTC3557/LTC3557-1

OPERATION

or high ambient thermal conditions and allows the user

to push the limits of the power handling capability with a

given circuit board design without risk of damaging the

LTC3557/LTC3557-1 or external components. The beneﬁt

of the LTC3557/LTC3557-1 thermal regulation loop is that

charge current can be set according to actual conditions

rather than worst-case conditions with the assurance that

the battery charger will automatically reduce the current

in worst-case conditions.

own unique “blink” rate for human recognition as well as

two unique duty cycles for machine recognition.

Table 2: illustrates the four possible states of the CHRG

pin when the battery charger is active.

Table 2: CHRG Output Pin

MODULATION

(BLINK)

STATUS

FREQUENCY

0Hz

FREQUENCY

DUTY CYCLE

100%

Charging

0Hz (Lo-Z)

I

< C/10

0Hz

0Hz (Hi-Z)

0%

BAT

Charge Status Indication

NTC Fault

Bad Battery

35kHz

1.5Hz at 50%

6.1Hz at 50%

6.25% or 93.75%

12.5% or 87.5%

The CHRG pin indicates the status of the battery charger.

Four possible states are represented by CHRG which

include charging, not charging, unresponsive battery and

battery temperature out of range.

An NTC fault is represented by a 35kHz pulse train whose

duty cycle toggles between 6.25% and 93.75% at a 1.5Hz

rate. A human will easily recognize the 1.5Hz rate as a

“slow” blinking which indicates the out-of-range battery

temperaturewhileamicroprocessorwillbeabletodecode

either the 6.25% or 93.75% duty cycles as an NTC fault.

The signal at the CHRG pin can be easily recognized as

one of the above four states by either a human or a mi-

croprocessor. An open-drain output, the CHRG pin can

drive an indicator LED through a current limiting resistor

for human interfacing or simply a pull-up resistor for

microprocessor interfacing.

Ifabatteryisfoundtobeunresponsivetocharging(i.e.,its

voltage remains below V

, typically 2.8V, for 1/2 hour),

TRKL

the CHRG pin gives the battery fault indication. For this

fault, a human would easily recognize the frantic 6.1Hz

“fast” blink of the LED while a microprocessor would be

able to decode either the 12.5% or 87.5% duty cycles as

a bad battery fault. Note that the LTC3557/LTC3557-1 is

a 3-terminal PowerPath product where system load is

always prioritized over battery charging. Due to excessive

system load, there may not be sufﬁcient power to charge

the battery beyond the trickle charge threshold voltage

within the bad battery timeout period. In this case, the

battery charger will falsely indicate a bad battery. System

software may then reduce the load and reset the battery

charger to try again.

To make the CHRG pin easily recognized by both humans

and microprocessors, the pin is either a DC signal of

ON for charging, OFF for not charging, or it is switched

at high frequency (35kHz) to indicate the two possible

faults, unresponsive battery, and battery temperature

out of range.

When charging begins, CHRG is pulled low and remains

low for the duration of a normal charge cycle. When charg-

ing is complete, i.e., the charger enters constant voltage

mode and the charge current has dropped to one-tenth

of the programmed value, the CHRG pin is released (high

impedance). The CHRG pin does not respond to the C/10

threshold if the LTC3557/LTC3557-1 is in input current

limit. This prevents false end of charge indications due to

insufﬁcient power available to the battery charger. If a fault

occurs,thepinisswitchedat35kHz.Whileswitching,itsduty

cycle is modulated between a high and low value at a very

low frequency. The low and high duty cycles are disparate

enough to make an LED appear to be on or off thus giving

the appearance of “blinking”. Each of the two faults has its

Although very improbable, it is possible that a duty cycle

reading could be taken at the bright-dim transition (low

duty cycle to high duty cycle). When this happens the

duty cycle reading will be precisely 50%. If the duty cycle

reading is 50%, system software should disqualify it and

take a new duty cycle reading.

35571fc

16

LTC3557/LTC3557-1

OPERATION

NTC Thermistor

AsingleMODEpinsetsallstep-downswitchingregulators

in Burst Mode or pulse-skip mode operation, while each

regulator is enabled individually through their respective

enable pins (EN1, EN2 and EN3). It is recommended that

Thebatterytemperatureismeasuredbyplacinganegative

temperature coefﬁcient (NTC) thermistor close to the bat-

tery pack. The NTC circuitry is shown in Figure 8. To use

this feature connect the NTC thermistor, R , between

the NTC pin and ground and a bias resistor, R

thestep-downswitchingregulatorinputsupplies(V and

IN1

NTC

V

) be connected to the system supply pin (V ). This

IN2

OUT

, from

NOM

allows the undervoltage lock out circuit on the V

OUT

V

to NTC. R

should be a 1% resistor with a value

NTC

NOM

(V UVLO)todisablethestep-downswitchingregulators

OUT

equal to the value of the chosen NTC thermistor at 25°C

(R25).A100kthermistorisrecommendedsincethermistor

current is not measured by the LTC3557/LTC3557-1 and

will have to be considered for USB compliance.

when the V

voltage drops below V

UVLO threshold.

OUT

Ifdrivingthestep-downswitchingregulatorinputsupplies

from a voltage other than V the regulators should

OUT

not be operated outside the speciﬁed operating range as

operation is not guaranteed beyond this range.

The LTC3557/LTC3557-1 will pause charging when the

resistance of the NTC thermistor drops to 0.54 times the

value of R25 or approximately 54k (for a Vishay “Curve 1”

thermistor,thiscorrespondstoapproximately40°C).Ifthe

battery charger is in constant voltage (ﬂoat) mode, the

safety timer also pauses until the thermistor indicates a

return to a valid temperature. As the temperature drops,

the resistance of the NTC thermistor rises. The LTC3557/

LTC3557-1 is also designed to pause charging when the

valueoftheNTCthermistorincreasesto3.25timesthevalue

of R25. For a Vishay “Curve 1” thermistor this resistance,

325k, correspondstoapproximately0°C. Thehotandcold

comparators each have approximately 3°C of hysteresis

to prevent oscillation about the trip point. Grounding the

NTC pin disables all NTC functionality.

Step-Down Switching Regulator Output Voltage

Programming

Figure 2 shows the step-down switching regulator

application circuit. The full-scale output voltage for each

step-down switching regulator is programmed using a

resistor divider from the step-down switching regulator

output connected to the feedback pins (FB1, FB2 and

FB3) such that:

R1

R2

⎛

⎞

⎠

V_OUTx= 0.8V •

+ 1

⎜

⎝

⎟

Typical values for R1 are in the range of 40k to 1M. The

capacitorC cancelsthepolecreatedbyfeedbackresistors

FB

General Purpose Step-Down Switching Regulators

and the input capacitance of the FB pin and also helps

to improve transient response for output voltages much

greater than 0.8V. A variety of capacitor sizes can be used

TheLTC3557/LTC3557-1includesthree2.25MHzconstant

frequency current mode step-down switching regulators

providing400mA,400mAand600mAeach.Allstep-down

switching regulators can be programmed for a minimum

output voltage of 0.8V and can be used to power a micro-

controllercore,microcontrollerI/O,memoryorotherlogic

circuitry.Allstep-downswitchingregulatorssupport100%

duty cycle operation (low dropout mode) when the input

voltage drops very close to the output voltage and are also

capableofBurstModeoperationforhighestefﬁcienciesat

light loads (Burst Mode operation is pin selectable). The

step-down switching regulators also include soft-start to

limitinrushcurrentwhenpoweringon,short-circuitcurrent

protection,andswitchnodeslewlimitingcircuitrytoreduce

EMI radiation. No external compensation components are

required for the switching regulators.

for C but a value of 10pF is recommended for most

FB

applications.Experimentationwithcapacitorsizesbetween

2pF and 22pF may yield improved transient response.

V

IN

EN

MP

L

SWx

FBx

PWM

CONTROL

V

OUTx

MODE

C

OUT

MN

C

R1

FB

0.8V

R2

GND

35571 F02

Figure 2. Buck Converter Application Circuit

35571fc

17

LTC3557/LTC3557-1

OPERATION

Step-Down Switching Regulator RST2 Operation

continuously. When operating continuously, regulation

and low noise output voltage are maintained, but input

operating current will increase to a few milliamps.

The RST2 pin is an open-drain output used to indicate that

step-down switching regulator 2 has been enabled and

has reached its ﬁnal voltage. A 230ms delay is included

from the time switching regulator 2 reaches 92% of its

regulationvaluetoallowasystemcontrollerampletimeto

reset itself. RST2 may be used as a power-on reset to the

microprocessor powered by regulator 2 or may be used to

enable regulators 1 and/or 3 for supply sequencing. RST2

is an open-drain output and requires a pull-up resistor to

the output voltage of regulator 2 or another appropriate

power source.

In Burst Mode operation, the step-down switching regula-

tors automatically switch between ﬁxed frequency PWM

operation and hysteretic control as a function of the load

current. At light loads the step-down switching regulators

control the inductor current directly and use a hysteretic

control loop to minimize both noise and switching losses.

WhileoperatinginBurstModeoperation,theoutputcapaci-

torischargedtoavoltageslightlyhigherthantheregulation

point. The step-down switching regulator then goes into

sleep mode, during which the output capacitor provides

the load current. In sleep mode, most of the switching

regulator’s circuitry is powered down, helping conserve

battery power. When the output voltage drops below a

pre-determined value, the step-down switching regulator

circuitryispoweredonandanotherburstcyclebegins.The

sleeptimedecreasesastheloadcurrentincreases.Beyond

a certain load current point (about 1/4 rated output load

current) the step-down switching regulators will switch to

a low noise constant frequency PWM mode of operation,

much the same as pulse-skip operation at high loads. For

applications that can tolerate some output ripple at low

output currents, Burst Mode operation provides better

efﬁciency than pulse-skip at light loads.

Step-Down Switching Regulator Operating Modes

The step-down switching regulators include two possible

operating modes to meet the noise/power needs of a

variety of applications.

In pulse-skip mode, an internal latch is set at the start of

every cycle, which turns on the main P-channel MOSFET

switch.Duringeachcycle,acurrentcomparatorcompares

thepeakinductorcurrenttotheoutputofanerrorampliﬁer.

The output of the current comparator resets the internal

latch,whichcausesthemainP-channelMOSFETswitchto

turn off and the N-channel MOSFET synchronous rectiﬁer

to turn on. The N-channel MOSFET synchronous rectiﬁer

turns off at the end of the 2.25MHz cycle or if the current

through the N-channel MOSFET synchronous rectiﬁer

drops to zero. Using this method of operation, the error

ampliﬁer adjusts the peak inductor current to deliver the

required output power. All necessary compensation is

internaltothestep-downswitchingregulatorrequiringonly

asingleceramicoutputcapacitorforstability.Atlightloads

in pulse-skip mode, the inductor current may reach zero

on each pulse which will turn off the N-channel MOSFET

synchronous rectiﬁer. In this case, the switch node (SW1,

SW2 or SW3) goes high impedance and the switch node

voltage will “ring”. This is discontinuous operation, and is

normalbehaviorforaswitchingregulator.Atverylightloads

in pulse-skip mode, the step-down switching regulators

will automatically skip pulses as needed to maintain

Thestep-downswitchingregulatorsallowmodetransition

on-the-ﬂy, providing seamless transition between modes

even under load. This allows the user to switch back and

forth between modes to reduce output ripple or increase

low current efﬁciency as needed. Burst Mode operation is

set by driving the MODE pin high, while pulse-skip mode

is achieved by driving the MODE pin low.

Step-Down Switching Regulator in Shutdown

The step-down switching regulators are in shutdown

when not enabled for operation. In shutdown all circuitry

inthestep-downswitchingregulatorisdisconnectedfrom

the switching regulator input supply leaving only a few

nanoamps of leakage current. The step-down switching

regulatoroutputsareindividuallypulledtogroundthrough

a 10k resistor on the switch pin (SW1, SW2 or SW3) when

in shutdown.

output regulation. At high duty cycle (V

> V /2) it is

OUTX

INX

possible for the inductor current to reverse at light loads

causing the stepped down switching regulator to operate

35571fc

18

LTC3557/LTC3557-1

OPERATION

Step-down Switching Regulator Dropout Operation

outside the speciﬁed operating range as operation is not

guaranteed beyond this range.

It is possible for a step-down switching regulator’s input

voltagetoapproachitsprogrammedoutputvoltage(e.g.,a

battery voltage of 3.4V with a programmed output voltage

of 3.3V). When this happens, the PMOS switch duty cycle

increasesuntilitisturnedoncontinuouslyat100%.Inthis

dropoutcondition,therespectiveoutputvoltageequalsthe

regulator’s input voltage minus the voltage drops across

the internal P-channel MOSFET and the inductor.

Step-Down Switching Regulator Inductor Selection

Many different sizes and shapes of inductors are avail-

able from numerous manufacturers. Choosing the right

inductor from such a large selection of devices can be

overwhelming, but following a few basic guidelines will

make the selection process much simpler.

The step-down converters are designed to work with

inductors in the range of 2.2μH to 10μH. For most

applications a 4.7μH inductor is suggested for step-down

switching regulators providing up to 400mA of output

currentwhilea3.3μHinductorissuggestedforstep-down

switching regulators providing up to 600mA. Larger value

inductors reduce ripple current, which improves output

ripple voltage. Lower value inductors result in higher

ripple current and improved transient response time,

but will reduce the available output current. To maximize

efﬁciency, choose an inductor with a low DC resistance.

For a 1.2V output, efﬁciency is reduced about 2% for

100mΩ series resistance at 400mA load current, and

about 2% for 300mΩ series resistance at 100mA load

current. Choose an inductor with a DC current rating at

least 1.5 times larger than the maximum load current to

ensure that the inductor does not saturate during normal

operation. If output short circuit is a possible condition,

the inductor should be rated to handle the maximum peak

current speciﬁed for the step-down converters.

Step-Down Switching Regulator Soft-Start Operation

Soft-startisaccomplishedbygraduallyincreasingthepeak

inductor current for each step-down switching regulator

overa500ꢀsperiod.Thisallowseachoutputtoriseslowly,

helping minimize inrush current required to charge up the

switching regulator output capacitor. A soft-start cycle

occurs whenever a given switching regulator is enabled,

or after a fault condition has occurred (thermal shutdown

or UVLO). A soft-start cycle is not triggered by changing

operating modes. This allows seamless output transition

when actively changing between operating modes.

Step-Down Switching Regulator Switching

Slew Rate Control

The step-down switching regulators contain new patent-

pending circuitry to limit the slew rate of the switch node

(SW1, SW2 and SW3). This new circuitry is designed to

transition the switch node over a period of a couple nano-

seconds,signiﬁcantlyreducingradiatedEMIandconducted

supply noise while maintaining high efﬁciency.

Differentcorematerialsandshapeswillchangethesize/cur-

rent and price/current relationship of an inductor. Toroid

or shielded pot cores in ferrite or Permalloy materials are

small and don’t radiate much energy, but generally cost

more than powdered iron core inductors with similar

electrical characteristics. Inductors that are very thin or

have a very small volume typically have much higher

core and DCR losses, and will not give the best efﬁciency.

The choice of which style inductor to use often depends

more on the price vs size, performance, and any radiated

EMI requirements than on what the step-down switching

regulators requires to operate.

Step-Down Switching Regulator Low Supply Operation

An undervoltage lockout (UVLO) circuit on V

shuts

OUT

downthestep-downswitchingregulatorswhenV drops

OUT

below about 2.7V. It is recommended that the step-down

switching regulators input supplies be connected to

the power path output (V ). This UVLO prevents the

OUT

step-down switching regulators’ from operating at low

supply voltages where loss of regulation or other un-

desirable operation may occur. If driving the step-down

switching regulator input supplies from a voltage other

than the V

pin, the regulators should not be operate

OUT

35571fc

19

LTC3557/LTC3557-1

OPERATION

The inductor value also has an effect on Burst Mode

operation. Lower inductor values will cause Burst Mode

switching frequency to increase.

switching regulator outputs. For good transient response

and stability the output capacitor for step-down switching

regulators should retain at least 4ꢀF of capacitance over

operating temperature and bias voltage. Each switching

regulator input supply should be bypassed with a 2.2ꢀF

capacitor. Consult with capacitor manufacturers for

detailed information on their selection and speciﬁcations

of ceramic capacitors. Many manufacturers now offer

very thin (<1mm tall) ceramic capacitors ideal for use in

height-restricted designs. Table 4 shows a list of several

ceramic capacitor manufacturers.

Table 3 shows several inductors that work well with the

step-down switching regulators. These inductors offer a

good compromise in current rating, DCR and physical

size. Consult each manufacturer for detailed information

on their entire selection of inductors.

Step-Down Switching Regulator Input/Output

Capacitor Selection

Table 4. Ceramic Capacitor Manufacturers

LowESR(equivalentseriesresistance)ceramiccapacitors

should be used at both step-down switching regulator

outputs as well as at each step-down switching regulator

input supply. Only X5R or X7R ceramic capacitors should

be used because they retain their capacitance over wider

voltage and temperature ranges than other ceramic types.

A 10ꢀF output capacitor is sufﬁcient for the step-down

AVX

www.avxcorp.com

www.murata.com

www.t-yuden.com

www.vishay.com

www.tdk.com

Murata

Taiyo Yuden

Vishay Siliconix

TDK

Table 3. Recommended Inductors for Step-Down Switching Regulators

SIZE in mm

(L × W × H)

INDUCTOR TYPE

L (μH)

MAX I (A)

MAX DCR (Ω)

MANUFACTURER

DC

DE2818C

4.7

3.3

1.25

1.45

0.072

0.053

Toko

www.toko.com

3.0 × 2.8 × 1.8

D312C

4.7

3.3

0.79

0.90

0.24

0.20

3.6 × 3.6 × 1.2

DE2812C

4.7

3.3

1.2

1.4

0.13*

0.105*

3.0 × 2.8 × 1.2

CDRH3D16

CDRH2D11

4.7

3.3

0.9

1.1

0.11

Sumida

www.sumida.com

4.0 × 4.0 × 1.8

3.2 × 3.2 × 1.2

0.085

4.7

3.3

0.5

0.6

0.17

0.123

CLS4D09

SD3118

4.7

0.75

0.19

4.9 × 4.9 × 1.0

4.7

3.3

1.3

1.59

0.162

0.113

Cooper

www.cooperet.com

3.1 × 3.1 × 1.8

SD3112

SD12

4.7

3.3

0.8

0.246

0.165

3.1 × 3.1 × 1.2

5.2 × 5.2 × 1.2

0.97

4.7

3.3

1.29

1.42

0.117*

0.104*

SD10

4.7

3.3

1.08

1.31

0.153*

0.108*

5.2 × 5.2 × 1.0

LPS3015

4.7

3.3

1.1

1.3

0.2

0.13

Coil Craft

www.coilcraft.com

3.0 × 3.0 × 1.5

*Typical DCR

35571fc

20

LTC3557/LTC3557-1

APPLICATIONS INFORMATION

External HV Buck Control Through the V Pin

compensation components are required on the V node.

C

The voltage at the V

pin is regulated to the larger of

OUT

The WALL, ACPR and V pins can be used in conjunction

C

(BAT + 300mV) or 3.6V as shown in Figures 6 and 7. The

feedback network of the high voltage regulator should be

settogenerateanoutputvoltagehigherthan4.4V(besure

to include the output voltage tolerance of the buck regula-

with an external high voltage buck regulator such as the

LT^®3480, LT3481 or LT3505 to provide power directly

to the V

pin through a power P-channel MOSFET as

OUT

shown in Figures 3-5 (consult the factory for a complete

list of approved high voltage buck regulators). When the

tor). The V control of the LTC3557 overdrives the local

C

V control of the external high voltage buck. Therefore,

C

WALL pin voltage exceeds 4.3V, V pin control circuitry

C

once the V control is enabled, the output voltage is set

C

is enabled and drives the V pin of the LT3480, LT3481 or

C

independent of the buck regulator feedback network.

LT3505. The V pin control circuitry is designed so that no

C

HV

IN

4

2

3

8V TO 38V

(TRANSIENTS

TO 60V)

V

BOOST

LT3480

IN

0.47μF

6.8μH

68nF

150k

4.7μF

5

RUN/SS SW

R

T

10

DFLS240L

499k

40.2k

22μF

1

8

7

6

NC

BD

FB

100k

GND

V

C

11

9

LT3480

Si2333DS

UP TO

2A

HIGH VOLTAGE

BUCK CIRCUITRY

V

OUT

26

3

25

C

OUT

V

WALL ACPR

C

23

21

22

V

OUT

GATE

BAT

LTC3557

LTC3557-1

Si2333DS

(OPT)

BAT

+

Li-Ion

35571 F03

Figure 3. LT3480 Buck Control Using V_C(800kHz Switching)

4

2

HV

IN

8V TO 34V

V

BOOST

LT3481

RUN/SS SW

IN

0.47μF

68nF

150k

4.7μF

6.8μH

5

3

7

10

DFLS240L

R

BIAS

549k

200k

T

60.4k

22μF

1

8

BD

FB

C

6

NC

GND

11

V

9

LT3481

Si2333DS

UP TO

2A

HIGH VOLTAGE

BUCK CIRCUITRY

V

OUT

26

3

25

C

OUT

V

WALL ACPR

C

23

V

OUT

LTC3557

LTC3557-1

21

Si2333DS

(OPT)

GATE

22

BAT

+

Li-Ion

35571 F04

Figure 4. LT3481 Buck Control Using V_C(800kHz Switching)

35571fc

21

LTC3557/LTC3557-1

APPLICATIONS INFORMATION

1N4148

3

1

2

HV

IN

V

BOOST

SW

IN

8V TO 36V

0.1μF

68nF

20k

150k

1μF

LT3505

6.8μH

4

SHDN

49.9k

10.0k

BZT52C16T

MBRM140

10μF

806k

6

R

7

T

FB

C

GND

5, 9

V

8

LT3505

Si2333DS

UP TO

1.2A

HIGH VOLTAGE

BUCK CIRCUITRY

V

OUT

26

3

25

C

OUT

V

WALL ACPR

C

23

21

22

V

OUT

GATE

BAT

LTC3557

LTC3557-1

Si2333DS

(OPT)

BAT

+

Li-Ion

35571 F05

Figure 5. LT3505 Buck Control Using V_C(2.2MHz Switching with Frequency Foldback)

5.0

4.5

4.0

3.5

3.0

2.5

This technique provides a signiﬁcant efﬁciency advantage

over the use of a 5V buck to drive the battery charger. With

a simple 5V buck output driving V , battery charger

OUT

efﬁciency is approximately:

V_BAT

5V

η_CHARGER= η_BUCK

•

I

= 0.0A

= 0.75A

= 1.5A

O

where η

is the efﬁciency of the high voltage buck

BUCK

regulatorand5Vistheoutputvoltageofthebuckregulator.

With a typical buck efﬁciency of 87% and a typical battery

voltage of 3.8V, the total battery charger efﬁciency is

approximately 66%. Assuming a 1A charge current, this

works out to nearly 2W of power dissipation just to charge

the battery!

BAT

3.5

4

2.5

3

4.5

35571 F06

BAT (V)

Figure 6. LTC3557 V_OUTVoltage vs Battery Voltage

with the LT3480

5.0

4.5

4.0

3.5

3.0

With the V control technique, battery charger efﬁciency

C

is approximately:

V_BAT

0.3V + V_BAT

η_CHARGER= η_BUCK

•

With the same assumptions as above, the total battery

charger efﬁciency is approximately 81%. This example

works out to just 900mW of power dissipation. For

applications, component selection and board layout

information beyond those listed here please refer to the

respective LT3480, LT3481 or LT3505 data sheet.

I

= 0.0A

= 0.6A

O

BAT

2.5

3

3.5

4

4.5

35571 F07

BAT (V)

Figure 7. LTC3557-1V_OUTVoltage vs Battery Voltage

with the LT3505

35571fc

22

LTC3557/LTC3557-1

APPLICATIONS INFORMATION

Alternate NTC Thermistors and Biasing

for the hot threshold and 0.765 • V

for the cold

VNTC

threshold.

The LTC3557/LTC3557-1 provides temperature qualiﬁed

charging if a grounded thermistor and a bias resistor

are connected to NTC. By using a bias resistor whose

value is equal to the room temperature resistance of

the thermistor (R25) the upper and lower temperatures

are pre-programmed to approximately 40°C and 0°C,

respectively (assuming a Vishay “Curve 1” thermistor).

Therefore, the hot trip point is set when:

R_NTC|HOT

• V_VNTC= 0.349 • V_VNTC

R_NOM+R_NTC|HOT

and the cold trip point is set when:

R_NTC|COLD

The upper and lower temperature thresholds can be

adjusted by either a modiﬁcation of the bias resistor value

or by adding a second adjustment resistor to the circuit.

If only the bias resistor is adjusted, then either the upper

or the lower threshold can be modiﬁed but not both. The

other trip point will be determined by the characteristics

of the thermistor. Using the bias resistor in addition to

an adjustment resistor, both the upper and the lower

temperaturetrippointscanbeindependentlyprogrammed

withtheconstraintthatthedifferencebetweentheupperand

lower temperature thresholds cannot decrease. Examples

of each technique are given below.

• V_VNTC= 0.765 • V_VNTC

R_NOM+R_NTC|COLD

SolvingtheseequationsforR

in the following:

andR

results

NTC|COLD

NTC|HOT

R

= 0.536 • R

NTC|HOT

NOM

and

R

= 3.25 • R

NTC|COLD

NOM

By setting R

equal to R25, the above equations result

NOM

= 0.536 and r

in r

= 3.25. Referencing these ratios

HOT

COLD

to the Vishay Resistance-Temperature Curve 1 chart gives

a hot trip point of about 40°C and a cold trip point of about

0°C. The difference between the hot and cold trip points

is approximately 40°C.

NTC thermistors have temperature characteristics which

areindicatedonresistance-temperatureconversiontables.

TheVishay-DalethermistorNTHS0603N011-N1003F,used

in the following examples, has a nominal value of 100k

and follows the Vishay “Curve 1” resistance-temperature

characteristic.

By using a bias resistor, R

, different in value from

NOM

R25, the hot and cold trip points can be moved in either

direction.Thetemperaturespanwillchangesomewhatdue

to the non-linear behavior of the thermistor. The following

equations can be used to easily calculate a new value for

the bias resistor:

In the explanation below, the following notation is used.

R25 = Value of the Thermistor at 25°C

R

= Value of thermistor at the cold trip point

= Value of the thermistor at the hot trip

NTC|COLD

r_HOT

0.536

NTC|HOT

point

R_NOM

=

•R25

r_COLD

3.25

r

= Ratio of R

to R25

COLD

NTC|COLD

R_NOM

•R25

= Ratio of R

to R25

HOT

NTC|HOT

where r

and r

are the resistance ratios at the

R

NOM

= Primary thermistor bias resistor (see Figure 8)

HOT

COLD

desired hotandcoldtrippoints.Notethattheseequations

are linked. Therefore, only one of the two trip points can

be chosen, the other is determined by the default ratios

designed in the IC. Consider an example where a 60°C

hot trip point is desired.

R1 = Optional temperature range adjustment resistor

(see Figure 9)

The trip points for the LTC3557/LTC3557-1’s temperature

qualiﬁcation are internally programmed at 0.349 • V

VNTC

35571fc

23

LTC3557/LTC3557-1

APPLICATIONS INFORMATION

From the Vishay Curve 1 R-T characteristics, r

is

the nearest 1% value is 12.7k. The ﬁnal solution is shown

in Figure 9 and results in an upper trip point of 45°C and

a lower trip point of 0°C.

HOT

0.2488 at 60°C. Using the above equation, R

should

NOM

, the cold trip

be set to 46.4k. With this value of R

NOM

point is about 16°C. Notice that the span is now 44°C

rather than the previous 40°C. This is due to the decrease

in “temperature gain” of the thermistor as absolute

temperature increases.

Battery Charger Stability Considerations

TheLTC3557/LTC3557-1’sbatterychargercontainsbotha

constant voltage and a constant current control loop. The

constant voltage loop is stable without any compensation

when a battery is connected with low impedance leads.

Excessive lead length, however, may add enough series

inductancetorequireabypasscapacitorofatleast1μFfrom

BAT to GND. Furthermore, a 4.7μF capacitor in series with

a 0.2Ω to 1Ω resistor from BAT to GND is required to keep

ripple voltage low when the battery is disconnected.

The upper and lower temperature trip points can be

independently programmed by using an additional bias

resistor as shown in Figure 9. The following formulas can

be used to compute the values of R

and R1:

NOM

r_COLD–r_HOT

R_NOM

=

•R25

2.714

R1= 0.536 •R_NOM–r_HOT•R25

High value, low ESR multilayer ceramic chip capacitors

reduce the constant voltage loop phase margin, possibly

resulting in instability. Ceramic capacitors up to 22μF may

beusedinparallelwithabattery,butlargerceramicsshould

be decoupled with 0.2Ω to 1Ω of series resistance.

For example, to set the trip points to 0°C and 45°C with

a Vishay Curve 1 thermistor choose

3.266 – 0.4368

R_NOM

=

• 100k = 104.2k

In constant current mode, the PROG pin is in the feedback

loop rather than the battery voltage. Because of the

additional pole created by any PROG pin capacitance,

capacitance on this pin must be kept to a minimum. With

2.714

the nearest 1% value is 105k.

R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k

V

NTC

NTC BLOCK

18

0.765 • V

VNTC

R

NOM

–

+

–

+

100k

105k

TOO_COLD

TOO_HOT

TOO_COLD

TOO_HOT

NTC

19

R

100k

R1

12.7k

NTC

–

+

–

+

0.349 • V

VNTC

R

NTC

100k

+

–

+

–

NTC_ENABLE

0.017 • V

VNTC

35571 F08

35571 F09

Figure 8. Typical NTC Thermistor Circuit

Figure 9. NTC Thermistor Circuit with Additional Bias Resistor

35571fc

24

LTC3557/LTC3557-1

APPLICATIONS INFORMATION

It is not necessary to perform any worst-case power

dissipation scenarios because the LTC3557/LTC3557-1

will automatically reduce the charge current to maintain

the die temperature at approximately 110°C. However, the

approximate ambient temperature at which the thermal

feedback begins to protect the IC is:

no additional capacitance on the PROG pin, the battery

charger is stable with program resistor values as high

as 25k. However, additional capacitance on this node

reduces the maximum allowed program resistor. The pole

frequency at the PROG pin should be kept above 100kHz.

Therefore, if the PROG pin has a parasitic capacitance,

C

, the following equation should be used to calculate

PROG

T = 110°C – P • θ

JA

A

D

the maximum resistance value for R

:

PROG

Example: Consider the LTC3557/LTC3557-1 operating

from a wall adapter with 5V (V ) providing 1A (I

1

)

BAT

OUT

R_PROG

≤

2π • 100kHz • C_PROG

to charge a Li-Ion battery at 3.3V (BAT). Also assume

= P = P = 0.05W, so the total power

P

D(SW1)

dissipation is:

D(SW2)

D(SW3)

Printed Circuit Board Power Dissipation

Considerations

P = (5V – 3.3V) • 1A + 0.15W = 1.85W

D

In order to be able to deliver maximum charge current

under all conditions, it is critical that the Exposed Pad on

thebacksideoftheLTC3557/LTC3557-1packageissoldered

to a ground plane on the board. Correctly soldered to a

The ambient temperature above which the LTC3557/

LTC3557-1 will begin to reduce the 1A charge current, is

approximately:

2

T = 110°C – 1.85W • 37°C/W = 42°C

A

2500mm ground plane on a double-sided 1oz copper

board, the LTC3557/LTC3557-1 has a thermal resistance

The LTC3557/LTC3557-1 can be used above 42°C, but the

chargecurrentwillbereducedbelow1A.Thechargecurrent

at a given ambient temperature can be approximated by:

(θ ) of approximately 37°C/W. Failure to make good

JA

thermal contact between the Exposed Pad on the backside

of the package and an adequately sized ground plane will

result in thermal resistances far greater than 37°C/W.

110°C – T_A

P_D=

θ_JA

The conditions that cause the LTC3557/LTC3557-1 to

reduce charge current due to the thermal protection

feedback can be approximated by considering the power

dissipated in the part. For high charge currents and a wall

= V

(

– BAT •I_BAT+P_D(SW1)+P_D(SW2)+P_D(SW3)

)

OUT

thus:

adapter applied to V , the LTC3557/LTC3557-1 power

OUT

dissipation is approximately:

110°C – T_A

−P_D(SW1)–P_D(SW2)–P_D(SW3)

θ_JA

P = (V

– BAT) • I + P

+ P

D

OUT

BAT

D(SW1)

D(SW2) D(SW3)

I_BAT

=

V_OUT– BAT

where, P is the total power dissipated, V

is the supply

D

OUT

voltage, BAT is the battery voltage and I is the battery

BAT

Consider the above example with an ambient temperature of

55°C. The charge current will be reduced to approximately:

chargecurrent.P

isthepowerlossbythestep-down

switching regulators. The power loss for a step-down

D(SWx)

110°C – 55°C

− 0.15W

switching regulator can be calculated as follows:

37°C/W

P

= (OUTx • I ) • (100 – Eff)/100

OUT

D(SWx)

I_BAT

=

5V – 3.3V

where OUTx is the programmed output voltage, I

is

OUT

1.49W – 0.15W

1.7V

the load current and Eff is the % efﬁciency which can be

measured or looked up on an efﬁciency graph for the

programmed output voltage.

= 786mA

35571fc

25

LTC3557/LTC3557-1

APPLICATIONS INFORMATION

If an external buck switching regulator controlled by the

3. The switching power traces connecting SW1, SW2 and

SW3 to their respective inductors should be minimized

to reduce radiated EMI and parasitic coupling. Due to

thelargevoltageswingoftheswitchingnodes,sensitive

nodes such as the feedback nodes (FB1, FB2 and FB3)

should be kept far away or shielded from the switching

nodes or poor performance could result.

LTC3557/LTC3557-1 V pin is used instead of a 5V wall

C

adapter we see a signiﬁcant reduction in power dissipated

by the LTC3557/LTC3557-1. This is because the external

buck switching regulator will drive the PowerPath output

(V ) to about 3.6V with the battery at 3.3V. If you go

OUT

through the example above and substitute 3.6V for V

OUT

we see that thermal regulation does not kick in until about

93°C. Thus, the external regulator not only allows higher

charging currents, but lower power dissipation means a

cooler running application.

4. Connectionsbetweenthestep-downswitchingregulator

inductorsandtheirrespectiveoutputcapacitorsshould

bekeptasshortaspossible. TheGNDsideoftheoutput

capacitorsshouldconnectdirectlytothethermalground

plane of the part.

Printed Circuit Board Layout Considerations

5. Keep the feedback pin traces (FB1, FB2 and FB3) as

short as possible. Minimize any parasitic capacitance

between the feedback traces and any switching node

(i.e., SW1, SW2, SW3 and logic signals). If necessary

shield the feedback nodes with a GND trace

When laying out the printed circuit board, the following

list should be followed to ensure proper operation of the

LTC3557/LTC3557-1:

1. TheExposedPadofthepackage(Pin29)shouldconnect

directlytoalargegroundplanetominimizethermaland

electrical impedance.

6) Connections between the LTC3557/LTC3557-1

power path pins (V

and V ) and their respective

BUS

OUT

2. Thetraceconnectingthestep-downswitchingregulator

input supply pins (V and V ) and their respective

decoupling capacitors should be kept as short as pos-

sible. The GND side of these capacitors should connect

directly to the ground plane of the part. V

IN1

IN2

decoupling capacitors should be kept as short as

possible. The GND side of these capacitors should

connect directly to the ground plane of the part. These

capacitors provide the AC current to the internal power

MOSFETs and their drivers. It’s important to minimize

inductance from these capacitors to the pins of the

should be

OUT

decoupled with a 10μF or greater ceramic capacitor as

close as possible to the LTC3557/LTC3557-1.

LTC3557/LTC3557-1. Connect V and V to V

IN1

IN2

OUT

through a short low impedance trace.

35571fc

26

LTC3557/LTC3557-1

TYPICAL APPLICATION

HV

IN

OPTIONAL HIGH VOLTAGE

4

5

2

3

8V TO 38V

(TRANSIENTS

TO 60V)

V

BOOST

SW

BUCK INPUT

IN

0.47μF

68nF

150k

4.7μF

LT3480

6.8μH

RUN/SS

10

R

DFLS240L

T

499k

40.2k

22μF

6

7

1

8

NC

SYNC

PG

BD

FB

100k

GND

V

C

11

9

Si2333DS

26

3

25

V

OUT

10μF

V

WALL ACPR

C

USB OR

5V WALL

ADAPTER

24

23

6

V

BUS

V

OUT

2.2μF

10μF

510Ω

BV

IN1

IN2

2.2μF

2.1k

2k

16

27

20

CLPROG BV

28

21

22

4

PROG

CHRG

GATE

Si2333DS

(OPT)

100k

18

19

BAT

V

NTC

BAT

3.3V

+

100k

NTC

Li-Ion

25mA

LDO3V3

NTC

ALWAYS ON

1μF

LTC3557/

LTC3557-1

3.3μH

4.7μH

V

OUT1

5

1

2

SW1

3.3V

ILIM0

600mA

10pF 1.02M

10pF 806k

10μF

ILIM1

EN1

324k

649k

7

9

FB1

PMIC

CONTROL

10

11

8

EN2

V

OUT3

17

SW3

1.8V

EN3

400mA

MODE

12

14

FB3

RST2

100k

4.7μH

V

OUT2

15

13

SW2

FB2

1.2V

400mA

10pF 232k

10μF

464k

GND

29

35571 TA02

35571fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

27

LTC3557/LTC3557-1

PACKAGE DESCRIPTION

UF Package

28-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1721 Rev A)

PIN 1 NOTCH

R = 0.20 TYP

OR 0.35 s 45o

CHAMFER

BOTTOM VIEW—EXPOSED PAD

R = 0.115

0.75 p 0.05

4.00 p 0.10

TYP

(4 SIDES)

R = 0.05

TYP

27 28

0.70 p 0.05

0.40 p 0.05

PIN 1

TOP MARK

(NOTE 6)

1

2

2.64 p 0.10

(4-SIDES)

PACKAGE

OUTLINE

0.20 p 0.05

0.40 BSC

(UF28) QFN 0106 REVA

0.200 REF

0.20 p 0.05

0.40 BSC

0.00 – 0.05

DED SOLDER PAD PITCH AND DIMENSIONS

R MASK TO AREAS THAT ARE NOT SOLDERED

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

S NOT A JEDEC PACKAGE OUTLINE

NOT TO SCALE

SIONS ARE IN MILLIMETERS

RELATED PARTS

PART NUMBER

Power Management

LTC3455

DESCRIPTION

COMMENTS

Dual DC/DC Converter with USB Power Management and Efﬁciency >96%, Accurate USB Current Limiting (500mA/100mA),

Li-Ion Battery Charger

4mm × 4mm 24-Pin QFN Package

LTC3456

LTC3555

2-Cell Multi-Output DC/DC Converter with USB Power

Manager

Seamless Transition Between 2-Cell Battery, USB and AC Wall Adapter

Input Power Sources, QFN Package

Switching USB Power Manager with Li-Ion/Polymer

Charger, Triple Synchronous Buck Converter + LDO

Complete Multifunction PMIC: Switch Mode Power Manager and Three

Buck Regulators + LDO, Charge Current Programmable up to 1.5A from

Wall Adapter Input, Thermal Regulation Synchronous Buck Converters

Efﬁciency: >95%, ADJ Outputs: 0.8V to 3.6V at 400mA/400mA/1A

Bat-Track Adaptive Output Control, 200mΩ Ideal Diode, 4mm × 5mm

28-Pin QFN Package

LTC3559

Linear USB Li-Ion/Polymer Battery Charger with Dual

Synchronous Buck Converter

Adjustable Synchronous Buck Converters, Efﬁciency: >90%, Outputs:

Down to 0.8V at 400mA for each, Charge Current Programmable up to

950mA, USB Compatible, 3mm × 3mm 16-Pin QFN Package

Battery Chargers

LTC4055

USB Power Controller and Battery Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 200mΩ Ideal Diode, 4mm × 4mm 16-Pin QFN Package

LTC4066

LTC4085

USB Power Controller and Li-Ion Battery Charger with

Low Loss Ideal Diode

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 50mΩ Ideal Diode, 4mm × 4mm 24-Pin QFN Package

USB Power Manager with Ideal Diode Controller and

Li-Ion Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm

14-Pin DFN Package

LTC4088

High Efﬁciency USB Power Manager and Battery Charger Maximizes Available Power from USB Port, Bat-Track, “Instant On”

Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ

Option, 3.3V/25mA Always On LDO, 4mm × 3mm 14-Pin DFN Package

LTC4089/LTC4089-5 USB Power Manager with Ideal Diode Controller and

High Efﬁciency Li-Ion Battery Charger

1.2A Charger, 6V to 36V (40V

), 200mΩ Ideal Diode with 50mΩ

MAX

Option, 6mm × 3mm 22-Pin DFN Package

35571fc

LT 0808 REV C • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

28

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3557EUF-TRPBF
厂家：	Linear
描述：	USB Power Manager with Li-Ion Charger and Three Step-Down Regulators 与锂离子电池充电器和3个降压型稳压器的USB电源管理器稳压器电池
文件：	总28页 (文件大小：312K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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