LTC3426ES6#TRM [Linear]
LTC3426 - 1.2MHz Step-Up DC/DC Converter in SOT-23; Package: SOT; Pins: 6; Temperature Range: -40°C to 85°C;
| 型号： | LTC3426ES6#TRM |
| 厂家： | 
Linear |
| 描述： | LTC3426 - 1.2MHz Step-Up DC/DC Converter in SOT-23; Package: SOT; Pins: 6; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总12页 (文件大小：163K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3426
1.2MHz Step-Up DC/DC
Converter in SOT-23
U
FEATURES
DESCRIPTIO
The LTC®3426 step-up switching regulator generates an
output voltage of up to 5.5V from an input voltage as low
as 1.6V. Ideal for applications where space is limited, it
switches at 1.2MHz, allowing the use of tiny, low cost and
low profile external components. Its internal 2A, 100mΩ
NMOS switch provides high efficiency even at heavy load,
while the constant frequency, current mode architecture
resultsinlow,predictableoutputnoisethatiseasytofilter.
■
Internal 2A MOSFET Switch
■
1.2MHz Switching Frequency
■
Integrated Soft-Start
Low 1.6V VIN Operation
■
■
Low RDS(ON) Switch: 100mΩ at 5V Output
■
Delivers 5V at 800mA from a 3.3V Input
■
Delivers 3.3V at 800mA from a 2.5V Input
■
Uses Small, Low Profile External Components
Low Profile (1mm) SOT-23 (ThinSOTTM) Package
■
Antiringing circuitry reduces EMI concerns by damping
the inductor while in discontinuous mode, and internal
soft-starteasesinrushcurrentworries. Internalfrequency
compensation is designed to accommodate ceramic out-
putcapacitors,furtherreducingnoise.Thedevicefeatures
very low shutdown current of 0.5µA.
U
APPLICATIO S
■
White LED Driver Supply
■
Local 3.3V or 5V Supply
■
Battery Back-Up
The LTC3426 is available in the 6-lead SOT-23 package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 6498466, 6611131
U
TYPICAL APPLICATIO
3.3V to 5V Boost Converter
Efficiency
100
2.2µH
V
V
= 3.3V
OUT
IN
V
IN
95
90
85
= 5V
3.3V
SW
V
OUT
V
V
5V
IN
OUT
80
75
800mA
10µF
LTC3426
SHDN
GND
22µF
OFF ON
FB
70
65
60
55
50
3426 TA01
1
10
100
1000
LOAD CURRENT (mA)
3426 TA01b
3426fa
1
LTC3426
W W W
U
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
VIN Voltage ................................................. –0.3V to 6V
SW Voltage .................................................. –0.3V to 6V
SHDN, FB Voltage ....................................... –0.3V to 6V
VOUT ........................................................... –0.3V to 6V
Operating Temperature Range (Note 2) .. –40°C to 85°C
Storage Temperature Range ................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
TOP VIEW
SW 1
GND 2
FB 3
6 V
5 V
IN
OUT
4 SHDN
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
TJMAX = 125°C, θJA = 165°C/W, θJC = 102°C/W
ORDER PART NUMBER
S6 PART NUMBER
LTAJT
LTC3426ES6
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
U
CO VERTER CHARACTERISTICS
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V = 1.8V, V
= 3.3V, unless otherwise specified.
A
IN
OUT
PARAMETER
CONDITIONS
MIN
1.6
TYP
MAX
UNITS
V
Input Voltage Range
Output Voltage Adjust Range
Feedback Voltage
SHDN = V
IN
2.25
1.173
5
1.247
0.1
V
●
1.22
V
Feedback Input Current
Quiescent Current (Shutdown)
Quiescent Current
V
V
= 1.23V
µA
µA
µA
µA
FB
= 0V, Not Including Switch Leakage
1
SHDN
SHDN = V , Not Switching
600
0.2
1000
10
IN
Switch Leakage
V
SW
= 5V
Switch On Resistance
V
OUT
V
OUT
= 3.3V
= 5V
0.11
0.10
Ω
Ω
Current Limit
●
●
2
80
0.85
1
2.3
85
A
%
Maximum Duty Cycle
Switching Frequency
SHDN Input High
SHDN Input Low
SHDN Input Current
V
= 1.15V
FB
1.2
1.5
MHz
V
0.4
1
V
SHDN = 5.5V
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3426 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature are assured by design, characterization and correlation with
statistical process controls.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
3426fa
2
LTC3426
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency
vs Temperature
Efficiency vs V
I vs V
OUT(MAX) IN
IN
1.3
1.1
0.9
0.7
100
98
96
94
92
90
88
86
84
82
80
1.40
1.3
FIGURE 1 CIRCUIT
FIGURE 1 CIRCUIT
T
I
= 25°C
T
= 25°C
A
A
OUT
OUT
L = 2.2µH
= 150mA
= 5V
V
C
= 5V
LOAD
V
OUT
OUT
= 22µF
C
= 22µF
L = 2.2µH
1.2
1.1
0.5
0.3
1.0
1.8
2.2
3
3.4
3.8
4.2
1.8
2.6
3
3.4
3.8
4.2
2.6
2.2
–50 –30 –10 10
30
50
70
90
V
IN
(V)
V
(V)
IN
TEMPERATURE (°C)
LT1108 • TPC12
3426 G03
3426 G01
R
vs Temperature
FB Pin Voltage
Switching Waveforms
DS(ON)
1.25
1.24
1.23
1.22
1.21
1.20
1.19
0.15
0.14
0.13
0.12
0.11
0.10
0.09
0.08
0.07
0.06
0.05
V
OUT
500mV/DIV
V
OUT
= 2.5V
SW
2V/DIV
V
OUT
= 5V
I
L
V
OUT
= 3.3V
200mA/DIV
3426 G06
V
V
C
= 1.8V
100ns/DIV
IN
= 3.3V
OUT
OUT
= 22µF
L = 2.5µH
–50
0
25
50
75
100
–25
–50
–25
25
50
75
100
0
TEMPERATURE (°C)
TEMPERATURE (°C)
3426 G05
3426 G04
V
OUT
Transient Response
SW Pin Antiringing Operation
V
OUT
500mV/DIV
SW
1V/DIV
500mA
I
OUT
250mA
200mA/DIV
I
L
50mA/DIV
I
L
500mA/DIV
3426 G08
3426 G07
V
= 1.8V
40µs/DIV
V
V
= 1.8V
100ns/DIV
IN
IN
OUT
V
C
= 3.3V
= 3.3V
OUT
OUT
= 22µF
L = 2.5µH
3426fa
3
LTC3426
U
U
U
PI FU CTIO S
SW(Pin1):SwitchPin.ConnectinductorbetweenSWand
SHDN (Pin 4): Logic Controlled Shutdown Input.
SHDN = High: Normal free running operation
SHDN = Low: Shutdown, quiescent current < 1µA
VIN. A Schottky diode is connected between SW and VOUT
.
Keep these PCB trace lengths as short and wide as
possible to reduce EMI and voltage overshoot. If the
inductor current falls to zero, an internal 100Ω antiringing
switch is connected from SW to VIN to minimize EMI.
Typically, SHDN should be connected to VIN through a 1M
pull-up resistor.
GND (Pin 2): Signal and Power Ground. Provide a short
directPCBpathbetweenGNDandthe(–)sideoftheoutput
capacitor(s).
VOUT (Pin 5): Output Voltage Sense Input. The NMOS
switch gate drive is derived from the greater of VOUT and
VIN.
FB (Pin 3): Feedback Input to the gm Error Amplifier.
Connect resistor divider tap to this pin. The output voltage
can be adjusted from 2.5V to 5V by:
VIN (Pin 6): Input Supply. Must be locally bypassed.
R1
R2
⎛
⎝
⎞
⎟
⎠
VOUT = 1.22 • 1+
⎜
W
BLOCK DIAGRA
V
OUT
5
V
IN
SW
1
6
COMPARATOR
1.22V
REFERENCE
+
–
A1
–
PWM LOGIC
AND DRIVER
R
C
A2
+
C
C
3
FB
+
–
V
OUT
0.02Ω
Σ
R1 (EXTERNAL)
FB
RAMP
GENERATOR
R2 (EXTERNAL)
SHDN
4
1.2MHz
OSCILLATOR
SHUTDOWN AND
SOFT-START
2
3426 F01
GND
Figure 1
3426fa
4
LTC3426
U
OPERATIO
The LTC3426 is a monolithic 1.2MHz boost converter
housed in a 6-lead SOT-23 package. The device features
fixed frequency, current mode PWM control for excellent
line and load regulation. The low RDS(ON) NMOS switch
enables the device to maintain high efficiency over a wide
range of load current. Operation of the feedback loop
which sets the peak inductor current to keep the output in
regulationcanbebestunderstoodbyreferringtotheBlock
Diagram in Figure 1. At the start of each clock cycle a latch
in the PWM logic is set and the NMOS switch is turned on.
The sum of a voltage proportional to the switch current
and a slope compensating voltage ramp is fed to the
positive input to the PWM comparator. When this voltage
exceeds either a voltage proportional to the 2A current
limit or the PWM control voltage, the latch in the PWM
logic is reset and NMOS switch is turned off. The PWM
control voltage at the output of the error amplifier is the
amplified and compensated difference between the feed-
back voltage on the FB pin and the internal reference
voltage of 1.22V. If the control voltage increases, more
currentisdeliveredtotheoutput.Whenthecontrolvoltage
exceeds the ILIMIT reference voltage, the peak current is
limitedtoaminimumof2A. Thecurrentlimithelpsprotect
the LTC3426 internal switch and external components
connected to it. If the control voltage decreases, less
current is delivered to the output. During load transients
control voltage may decrease to the point where no
switching occurs until the feedback voltage drops below
the reference. The LTC3426 has an integrated soft-start
feature which slowly ramps up the feedback control node
from 0V. The soft-start is initiated when SHDN is pulled
high.
W U U
U
APPLICATIO S I FOR ATIO
Setting the Output Voltage
to reduce the I2R power losses, and must be able to
handle the peak inductor current without saturating.
The output voltage, VOUT, is set by a resistive divider from
VOUT to ground. The divider tap is tied to the FB pin. VOUT
is set by the formula:
Several inductor manufacturers are listed in Table 1.
Table 1. Inductor Manufacturers
TDK
www.tdk.com
www.sumida.com
www.murata.com
R1
R2
⎛
⎝
⎞
⎟
⎠
Sumida
Murata
VOUT = 1.22 • 1+
⎜
Inductor Selection
Output and Input Capacitor Selection
The LTC3426 can utilize small surface mount inductors
due to its 1.2MHz switching frequency. A 1.5µH or 2.2µH
inductor will be the best choice for most LTC3426 appli-
cations. Larger values of inductance will allow greater
output current capability by reducing the inductor ripple
current. Increasing the inductance above 3.3µH will in-
crease component size while providing little improve-
ment in output current capability. The inductor current
ripple is typically set for 20% to 40% of the maximum
inductor current (IP). High frequency ferrite core inductor
materialsreducefrequencydependentpowerlossescom-
pared to cheaper powdered iron types, improving effi-
ciency.TheinductorshouldhavelowDCR(DCresistance)
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints. A
15µF to 30µF output capacitor is sufficient for most
applications. X5R and X7R dielectric materials are pre-
ferred for their ability to maintain capacitance over wide
voltage and temperature ranges.
Low ESR input capacitors reduce input switching noise
and reduce the peak current drawn from the input supply.
It follows that ceramic capacitors are also a good choice
for input decoupling and should be located as close as
3426fa
5
LTC3426
W U U
U
APPLICATIO S I FOR ATIO
possible to the device. A 10µF input capacitor is sufficient
for most applications. Table 2 shows a list of several
ceramic capacitor manufacturers. Consult the manufac-
turers for detailed information in their entire selection of
ceramic parts.
PCB Layout Guidelines
ThehighspeedoperationoftheLTC3426demandscareful
attention to board layout. You will not get advertised
performance with careless layout. Figure 2 shows the
recommended component placement. A large ground pin
copper area will help to lower the chip temperature.
Table 2. Ceramic Capacitor Manufacturers
Taiyo Yuden
Murata
www.t-yuden.com
www.murata.com
TDK
www.component.tdk.com
V
IN
Diode Selection
1
2
3
SW
V
6
5
4
IN
ASchottkydiodeisrecommendedforusewiththeLTC3426.
Use of a low forward voltage diode such as the ON
Semiconductor MBRA210LT3 is recommended. A Schot-
tky diode rated at 2A is recommended for use with the
LTC3426.
GND
V
OUT
FB SHDN
V
OUT
3426 F02
Figure 2. Recommended Component Placement
for Single Layer Board
3426fa
6
LTC3426
U
TYPICAL APPLICATIO S
Efficiency
L1
2.2µH
100
95
D1
V
IN
3.3V
90
SW
85
V
OUT
V
V
5V
IN
LTC3426
SHDN
GND
OUT
80
75
R1
95.3k
1%
800mA
C1
C2
10µF
22µF
OFF ON
FB
70
65
60
55
50
R2
30.9k
1%
C1: TAIYO YUDEN X5R JMK212BJ475ML
C2: TAIYO YUDEN X5R JMK316BJ226ML
D1: ON SEMICONDUCTOR MBRA210LT3
L1: COILCRAFT D03316P-222
3426 TA02a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA02b
Efficiency
L1
100
90
80
70
60
50
D1
1.5µH
V
IN
1.8V
SW
V
OUT
V
V
2.5V
IN
OUT
R1
64.9k
1%
800mA
C1
LTC3426
SHDN
GND
10µF
C2
22µF
OFF ON
FB
R2
61.9k
1%
C1: TDK C1608X5R0J106M
C2: TAIYO YUDEN JMK316BJ226ML
D1: ON SEMICONDUCTOR MBRM120LT3
L1: TDK RLF7030T-1R5N6R1
3426 TA03a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA03b
3426fa
7
LTC3426
U
TYPICAL APPLICATIO S
Efficiency
100
95
L1
2.2µH
D1
V
IN
3V TO 4.2V
90
V
IN
= 4.2V
SW
85
V
OUT
V
V
5V
IN
OUT
80
75
R1
95.3k
1%
750mA AT 3V
V
= 3V
C1
IN
LTC3426
SHDN
GND
10µF
C2
22µF
70
65
60
55
50
OFF ON
FB
R2
30.9k
1%
C1: TDK C1608X5R0J475M
C2: TAIYO YUDEN JMK316BJ226ML
D1: ON SEMICONDUCTOR MBR120VLSFT1
L1: SUMIDA CDRH4D28-2R2 2
3426 TA04a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA04b
Efficiency
100
90
80
70
60
50
L1
D1
2.5µH
V
IN
2.5V
SW
V
OUT
V
V
3.3V
IN
OUT
R1
75k
1%
800mA
C1
LTC3426
SHDN
GND
10µF
C2
22µF
OFF ON
FB
R2
44.2k
1%
C1: TDK C1608X5R0J106
C2: TAIYO YUDEN JMK316BJ266
D1: ON SEMICONDUCTOR MBRM120LT3
L1: SUMIDA CDRH5D28-2R5 2
3426 TA05a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA05b
3426fa
8
LTC3426
U
TYPICAL APPLICATIO S
Efficiency
100
90
80
70
60
50
L1
D1
1.5µH
V
IN
1.8V
SW
V
OUT
V
V
3.3V
IN
OUT
R1
75k
1%
540mA
C1
LTC3426
SHDN
GND
10µF
C2
22µF
OFF ON
FB
R2
44.2k
1%
C1: TDK C1608X5R0J106M
C2: TAIYO YUDEN JMK316BJ226ML
D1: ON SEMICONDUCTOR MBRM120LT3
L1: TDK RLF7030T-1R5N6R1
3426 TA06a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA06b
Efficiency
90
80
70
60
50
40
L1
D1
2.2µH
V
IN
1.8V
SW
V
OUT
V
V
5V
IN
LTC3426
SHDN
GND
OUT
R1
95.3k
1%
400mA
C1
10µF
C2
22µF
OFF ON
FB
R2
30.9k
1%
C1: TDK C1608X5R0J475M
C2: TAIYO YUDEN JMK316BJ226ML
D1: ON SEMICONDUCTOR MBR120VLSFT1
L1: SUMIDA CDRH4D28-2R2 2
3426 TA07a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA07b
3426fa
9
LTC3426
U
TYPICAL APPLICATIO S
Efficiency
100
90
80
70
60
50
L1
D1
2.5µH
V
IN
2.5V
SW
V
OUT
V
V
5V
IN
OUT
R1
95.3k
1%
550mA
C1
LTC3426
SHDN
GND
10µF
C2
22µF
OFF ON
FB
R2
30.9k
1%
C1: TDK C1608X5R0J106
C2: TAIYO YUDEN JMK316BJ266
D1: ON SEMICONDUCTOR MBRM120LT3
L1: SUMIDA CDRH5D28-2R5
3426 TA08a
1
10
100
1000
LOAD CURRENT (mA)
3426 TA08b
3426fa
10
LTC3426
U
PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636 Rev B)
2.90 BSC
(NOTE 4)
0.62
MAX
0.95
REF
1.22 REF
1.4 MIN
1.50 – 1.75
(NOTE 4)
2.80 BSC
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3426fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC3426
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with Schottky and PNP Disconnect
3426fa
LT 0307 REV A • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
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© LINEAR TECHNOLOGY CORPORATION 2004
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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