LTC3406ES5-1.2 [Linear]
1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT; 为1.5MHz , 600mA同步降压型稳压器采用ThinSOT型号: | LTC3406ES5-1.2 |
厂家: | Linear |
描述: | 1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT |
文件: | 总12页 (文件大小:232K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3406-1.2
1.5MHz, 600mA
Synchronous Step-Down
Regulator in ThinSOT
U
FEATURES
DESCRIPTIO
The LTC®3406-1.2 is a high efficiency monolithic syn-
chronous buck regulator using a constant frequency,
current mode architecture. Supply current during opera-
tion with only 20µA drops <1µA in shutdown. The 2.5V to
5.5V input voltage range makes the LTC3406-1.2 ideally
suitedforsingleLi-Ionbattery-poweredapplications.100%
duty cycle provides low dropout operation, extending
battery life in portable systems. PWM pulse skipping
modeoperationprovidesverylowoutputripplevoltagefor
noise sensitive applications.
■
High Efficiency: Up to 90%
■
Very Low Quiescent Current: Only 20µA
■
600mA Output Current at VIN = 3V
■
2.5V to 5.5V Input Voltage Range
■
1.5MHz Constant Frequency Operation
■
No Schottky Diode Required
■
Shutdown Mode Draws <1µA Supply Current
■
Current Mode Operation for Excellent Line and
Load Transient Response
■
Overtemperature Protected
Low Profile (1mm) ThinSOTTM Package
■
Switching frequency is internally set at 1.5MHz, allowing
the use of small surface mount inductors and capacitors.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. The
LTC3406-1.2 is available in a low profile (1mm) ThinSOT
package.
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APPLICATIO S
■
Cellular Telephones
■
Personal Information Appliances
■
Wireless and DSL Modems
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. ThinSOT is a trademark of Linear
Technology Corporation. Protected by U.S. Patents including 5481178, 6580258, 6304066,
6127815, 6498466, 6611131.
■
Digital Still Cameras
■
MP3 Players
■
Portable Instruments
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TYPICAL APPLICATIO
Efficiency and Power Loss
100
90
80
70
60
50
40
30
20
10
0
1
High Efficiency Step-Down Converter
EFFICIENCY
2.2µH
0.1
V
V
IN
OUT
V
SW
LTC3406-1.2
RUN
IN
2.7V TO 5.5V
C
1.2V
C
OUT
IN
10µF 600mA
4.7µF
CER
0.01
CER
V
OUT
340612 TA01a
POWER LOSS
0.001
0.0001
0.00001
GND
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
0.1
1000
1
10
100
LOAD CURRENT (mA)
340612 TA01b
340612f
1
LTC3406-1.2
W W
U W
U W
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ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
Input Supply Voltage .................................. –0.3V to 6V
RUN, VOUT Voltages................................... –0.3V to VIN
SW Voltage (DC) ......................... –0.3V to (VIN + 0.3V)
P-Channel Switch Source Current (DC) ............. 800mA
N-Channel Switch Sink Current (DC) ................. 800mA
Peak SW Sink and Source Current (VIN = 3V)........ 1.3A
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Notes 3, 5) ...................... 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
TOP VIEW
NUMBER
RUN 1
GND 2
SW 3
5 V
4 V
OUT
IN
LTC3406ES5-1.2
S5 PART MARKING
LTBMQ
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
TJMAX = 125°C, θJA = 250°C/ W, θJC = 90°C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The ● denotes specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
= 100mA
MIN
1.164
2.5
TYP
1.2
6.25
0.04
1
MAX
1.236
10
UNITS
V
Regulated Output Voltage
Output Overvoltage Lockout
Output Voltage Line Regulation
Peak Inductor Current
I
●
●
V
%
OUT
OUT
∆V
∆V
∆V
= V
– V
OVL
OVL
OVL OUT
V
V
= 2.5V to 5.5V
0.4
%/V
A
OUT
IN
IN
I
= 3V, V
= 1.08V, Duty Cycle < 35%
0.75
2.5
1.25
PK
OUT
V
V
Output Voltage Load Regulation
Input Voltage Range
0.5
%
LOADREG
IN
●
●
5.5
V
I
Input DC Bias Current
Active Mode
Sleep Mode
(Note 4)
S
V
V
V
= 1.08V, I
= 1.236V, I
= 0A
= 0A
300
20
0.1
400
35
1
µA
µA
µA
OUT
OUT
RUN
LOAD
LOAD
Shutdown
= 0V, V = 5.5V
IN
f
Oscillator Frequency
V
V
= 1.2V
= 0V
1.2
0.3
1.5
210
1.8
MHz
kHz
OSC
OUT
OUT
R
R
R
R
of P-Channel FET
of N-Channel FET
I
I
= 100mA
0.4
0.35
±0.01
1
0.5
0.45
±1
Ω
Ω
PFET
NFET
LSW
DS(ON)
SW
SW
= –100mA
DS(ON)
I
SW Leakage
V
= 0V, V = 0V or 5V, V = 5V
µA
V
RUN
SW
IN
V
RUN Threshold
RUN Leakage Current
●
●
1.5
±1
RUN
RUN
I
±0.01
µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 2: The LTC3406E-1.2 is guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
LTC3406-1.2: T = T + (P )(250°C/W)
J
A
D
340612f
2
LTC3406-1.2
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1)
TA = 25°C unless otherwise specified.
Reference Voltage vs
Temperature
Efficiency vs Input Voltage
Efficiency and Power Loss
100
95
90
85
80
75
70
1.228
1.218
1.208
1.198
1.188
1.178
1.168
100
90
80
70
60
50
40
V
IN
= 3.6V
I
= 100mA
OUT
I
= 10mA
OUT
V
IN
V
IN
V
IN
= 2.7V
= 3.6V
= 4.2V
I
= 600mA
OUT
3
2
4
5
6
–50 –25
0
25
50
TEMPERATURE (°C)
75
100 125
0.1
1000
1
10
(mA)
100
INPUT VOLTAGE (V)
I
LOAD
340612 G03
340612 G01
340612 GO2
Oscillator Frequency vs
Temperature
Oscillator Frequency vs
Supply Voltage
Output Voltage vs Load Current
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.225
1.215
1.205
1.195
1.185
1.175
T
= 25°C
V
= 3.6V
A
IN
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
2
3
4
5
6
0
700
9001000
800
100 200 300 400 500 600
SUPPLY VOLTAGE (V)
LOAD CURRENT (mA)
340612 G05
340612 G06
340612 G04
RDS(ON) vs Input Voltage
RDS(ON) vs Temperature
Supply Current vs Supply Voltage
50
45
40
35
30
25
20
15
10
5
0.7
0.6
0.7
0.6
I
= 0A
T
= 25°C
LOAD
A
V
= 2.7V
IN
V
= 3.6V
IN
V
= 4.2V
IN
0.5
0.4
0.3
0.2
0.1
0.5
0.4
0.3
0.2
0.1
MAIN
SWITCH
SYNCHRONOUS
SWITCH
MAIN SWITCH
SYNCHRONOUS SWITCH
0
0
0
50
TEMPERATURE (°C)
100 125
2
3
4
6
–50 –25
0
25
75
5
5
7
0
1
2
3
4
6
SUPPLY VOLTAGE (V)
INPUT VOLTAGE (V)
340612 G08
340612 G09
340612 G07
340612f
3
LTC3406-1.2
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1)
Supply Current vs Temperature
Switch Leakage vs Temperature
50
300
250
200
150
V
I
= 3.6V
= 0A
V
= 5.5V
IN
LOAD
IN
RUN = 0V
45
40
35
30
25
20
15
10
5
100
50
0
MAIN SWITCH
SYNCHRONOUS SWITCH
0
50
75 100 125
–50 –25
25
50
TEMPERATURE (°C)
75
100 125
–50
0
25
0
–25
TEMPERATURE (°C)
340612 G10
340612 G11
Discontinuous Operation
Switch Leakage vs Input Voltage
120
100
80
60
40
20
0
RUN = 0V
A
T
= 25°C
SW
2V/DIV
SYNCHRONOUS
SWITCH
V
OUT
50mV/DIV
AC COUPLED
MAIN
SWITCH
I
L
200mA/DIV
3406B12 G13
4µs/DIV
V
LOAD
= 3.6V
IN
I
= 25mA
0
2
3
4
5
6
1
INPUT VOLTAGE (V)
340612 G12
(From Figure 1a Except for the Resistive Divider Resistor Values)
Load Step
Load Step
RUN
V
OUT
2V/DIV
100mV/DIV
AC COUPLED
V
OUT
1V/DIV
I
LOAD
500mA/DIV
I
L
I
L
500mA/DIV
500mA/DIV
340612 G15
340612 G14
20µs/DIV
= 25mA TO 600mA
LOAD
40µs/DIV
= 100mA TO 600mA
V = 3.6V
IN
V
LOAD
= 3.6V
IN
I
I
340612f
4
LTC3406-1.2
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values)
Load Step
Load Step
V
V
OUT
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
I
I
LOAD
LOAD
500mA/DIV
500mA/DIV
I
L
I
L
500mA/DIV
500mA/DIV
340612 G17
340612 G16
20µs/DIV
= 200mA TO 600mA
20µs/DIV
V
I
= 3.6V
LOAD
V
I
= 3.6V
LOAD
IN
IN
= 100mA TO 600mA
U
U
U
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
VIN (Pin 4): Main Supply Pin. Must be closely decoupled
to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.
VOUT (Pin 5): Output Voltage Feedback Pin. An internal
resistive divider divides the output voltage down for com-
parison to the internal reference voltage.
GND (Pin 2): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
U
U
W
FU CTIO AL DIAGRA
SLOPE
COMP
OSC
0.65V
OSC
V
4
IN
FREQ
–
+
SHIFT
V
OUT
5
+
–
5Ω
0.8V
+
–
60k
I
COMP
EA
FB
Q
Q
S
R
120k
SWITCHING
LOGIC
AND
RS LATCH
ANTI-
SHOOT-
THRU
V
IN
BLANKING
CIRCUIT
–
OV
SW
3
OVDET
+
RUN
1
0.8V + ∆V
OVL
0.8V REF
+
–
SHUTDOWN
I
RCMP
2
GND
3406B12 BD
340612f
5
LTC3406-1.2
U
OPERATIO
(Refer to Functional Diagram)
2.2µH*
turning the main switch off and keeping it off until the fault
is removed.
V
IN
4
V
OUT
3
2.7V
TO 5.5V
1.2V
V
SW
LTC3406-1.2
RUN
IN
†
C
C
**
OUT
600mA
IN
10µF
4.7µF
CER
CER
Burst Mode Operation
1
5
340612 F01
V
OUT
GND
2
The LTC3406-1.2 is capable of Burst Mode operation in
which the internal power MOSFETs operate intermittently
based on load demand.
*MURATA LQH3C2R2M24
**TAIYO YUDEN JMK212BJ475MG
†TAIYO YUDEN JMK316BJ106ML
In Burst Mode operation, the peak current of the inductor
is set to approximately 200mA regardless of the output
load. Each burst event can last from a few cycles at light
loads to almost continuously cycling with short sleep
intervalsatmoderateloads.Inbetweentheseburstevents,
thepowerMOSFETsandanyunneededcircuitryareturned
off, reducing the quiescent current to 20µA. In this sleep
state, the load current is being supplied solely from the
output capacitor. As the output voltage droops, the EA
amplifier’s output rises above the sleep threshold signal-
ingtheBURSTcomparatortotripandturnthetopMOSFET
on. This process repeats at a rate that is dependent on the
load demand.
Figure 1. Typical Application
Main Control Loop
The LTC3406-1.2 uses a constant frequency, current
mode step-down architecture. Both the main (P-channel
MOSFET)andsynchronous(N-channelMOSFET)switches
are internal. During normal operation, the internal top
power MOSFET is turned on each cycle when the oscillator
sets the RS latch, and turned off when the current com-
parator, ICOMP, resets the RS latch. The peak inductor
current at which ICOMP resets the RS latch, is controlled by
the output of error amplifier EA. When the load current
increases, it causes a slight decrease in the feedback
voltage, FB, relative to the 0.8V reference, which in turn
causes the EA amplifier’s output voltage to increase until
the average inductor current matches the new load cur-
rent. While the top MOSFET is off, the bottom MOSFET is
turnedonuntileithertheinductorcurrentstartstoreverse,
as indicated by the current reversal comparator IRCMP, or
the beginning of the next clock cycle. The comparator
OVDET guards against transient overshoots >6.25% by
Short-Circuit Protection
Whentheoutputisshortedtoground, thefrequencyofthe
oscillator is reduced to about 210kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the in-
ductorcurrenthasmoretimetodecay, therebypreventing
runaway. The oscillator’s frequency will progressively
increase to 1.5MHz when VOUT rises above 0V.
340612f
6
LTC3406-1.2
W U U
APPLICATIO S I FOR ATIO
U
The basic LTC3406-1.2 application circuit is shown in
Figure 1. External component selection is driven by the
load requirement and begins with the selection of L fol-
Table 1. Representative Surface Mount Inductors
PART
NUMBER
VALUE
(µH)
DCR
MAX DC
SIZE
3
(Ω MAX) CURRENT (A) W × L × H (mm )
Sumida
CDRH3D16
1.5
2.2
3.3
4.7
0.043
0.075
0.110
0.162
1.55
1.20
1.10
0.90
3.8 × 3.8 × 1.8
lowed by CIN and COUT
.
Inductor Selection
For most applications, the value of the inductor will fall in
the range of 1µH to 4.7µH. Its value is chosen based on the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
currents. Higher VIN or VOUT also increases the ripple
currentasshowninequation1. Areasonablestartingpoint
for setting ripple current is ∆IL = 240mA (40% of 600mA).
Sumida
CMD4D06
2.2
3.3
4.7
0.116
0.174
0.216
0.950
0.770
0.750
3.5 × 4.3 × 0.8
Panasonic
ELT5KT
3.3
4.7
0.17
0.20
1.00
0.95
4.5 × 5.4 × 1.2
2.5 × 3.2 × 2.0
Murata
LQH3C
1.0
2.2
4.7
0.060
0.097
0.150
1.00
0.79
0.65
⎛
VOUT
V
IN
⎞
1
∆IL =
VOUT 1−
CIN and COUT Selection
⎜
⎟
(1)
f L
( )( )
⎝
⎠
Incontinuousmode,thesourcecurrentofthetopMOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductorshouldbeenoughformostapplications(600mA
+ 120mA). For better efficiency, choose a low DC-resis-
tance inductor.
1/2
]
V
V − V
OUT
(
)
[
OUT IN
CIN requiredIRMS ≅ IOMAX
V
IN
Inductor Core Selection
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monlyusedfordesignbecauseevensignificantdeviations
do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based on
2000hoursoflife.Thismakesitadvisabletofurtherderate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufac-
turer if there is any question.
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don’t radiate much energy, but gener-
ally cost more than powdered iron core inductors with
similarelectricalcharacteristics. Thechoiceofwhichstyle
inductor to use often depends more on the price vs size
requirements and any radiated field/EMI requirements
than on what the LTC3406-1.2 requires to operate. Table
1 shows some typical surface mount inductors that work
well in LTC3406-1.2 applications.
The selection of COUT is driven by the required effective
series resistance (ESR).
340612f
7
LTC3406-1.2
W U U
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APPLICATIO S I FOR ATIO
Typically, once the ESR requirement for COUT has been
met, the RMS current rating generally far exceeds the
IRIPPLE(P-P) requirement.Theoutputripple∆VOUT isdeter-
mined by:
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
⎛
1
⎞
Efficiency Considerations
∆VOUT ≅ ∆I ESR +
⎜
⎟
L
⎝
8fCOUT
⎠
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage.
Efficiency = 100% – (L1 + L2 + L3 + ...)
Aluminum electrolytic and dry tantalum capacitors are
bothavailableinsurfacemountconfigurations.Inthecase
oftantalum,itiscriticalthatthecapacitorsaresurgetested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3406-1.2 circuits: VIN quiescent current and
I2R losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 2.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
forswitchingregulatorapplications.BecausetheLTC3406-
1.2’scontrolloopdoesnotdependontheoutputcapacitor’s
ESR for stable operation, ceramic capacitors can be used
freely to achieve very low output ripple and small circuit
size.
1
0.1
0.01
0.001
0.0001
However, care must be taken when ceramic capacitors are
usedattheinputandtheoutput.Whenaceramiccapacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at VIN, large enough
to damage the part.
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
0.00001
0.1
1
10
100
1000
LOAD CURRENT (mA)
340612 F02
Figure 2. Power Loss vs Load Current
340612f
8
LTC3406-1.2
W U U
APPLICATIO S I FOR ATIO
U
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from VIN to ground. The resulting
dQ/dtisthecurrentoutofVINthatistypicallylargerthan
To avoid the LTC3406-1.2 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
the DC bias current. In continuous mode, IGATECHG
=
f(QT + QB) where QT and QB are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to VIN and thus
their effects will be more pronounced at higher supply
voltages.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
As an example, consider the LTC3406-1.2 with an input
voltage of 2.7V, a load current of 600mA and an ambient
temperature of 70°C. From the typical performance graph
of switch resistance, the RDS(ON) at 70°C is approximately
0.52Ω for the P-channel switch and 0.42Ω for the
N-channel switch. Using equation (2) to find the series
resistance looking into the SW pin gives:
RSW = 0.52Ω(0.44) + 0.42Ω(0.56) = 0.46Ω
Therefore, power dissipated by the part is:
PD = ILOAD2 • RSW = 165.6mW
(2)
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
beobtainedfromtheTypicalPerformanceCharateristics
curves. Thus, to obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
For the SOT-23 package, the θJA is 250°C/W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.1656)(250) = 111.4°C
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RSW).
Thermal Considerations
In most applications the LTC3406-1.2 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3406-1.2 is running at high ambient tem-
peraturewithlowsupplyvoltage,theheatdissipatedmay
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 150°C,
both power switches will be turned off and the SW node
will become high impedance.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
340612f
9
LTC3406-1.2
W U U
U
APPLICATIO S I FOR ATIO
The regulator loop then acts to return VOUT to its steady-
state value. During this recovery time VOUT can be moni-
toredforovershootorringingthatwouldindicateastability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
Design Example
As a design example, assume the LTC3406-1.2 is used in
a single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.6A but most of the time it will be in
standbymode, requiringonly2mA. Efficiencyatbothlow
and high load currents is important. With this informa-
tion we can calculate L using equation (1),
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
1
⎛
1.2V⎞
V ⎠
IN
L =
1.2V 1−
⎜
⎟
(3)
f ∆I
( )(
⎝
)
L
Substituting VIN = 4.2V, ∆IL = 240mA and f = 1.5MHz in
equation (3) gives:
1.2V
1.5MHz(240mA)
1.2V
4.2V
⎛
⎜
⎝
⎞
⎟
⎠
L =
1−
= 2.38µH
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3406-1.2. These items are also illustrated graphically
in Figures 3 and 4. Check the following in your layout:
A 2.2µH inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2Ω series resistance.
CIN will require an RMS current rating of at least 0.3A ≅
ILOAD(MAX)/2 at temperature and COUT will require an ESR
of less than 0.25Ω. In most cases, a ceramic capacitor will
satisfy this requirement.
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
3. Keepthe(–)platesofCIN andCOUT ascloseaspossible.
VIA TO V
OUT
V
IN
VIA TO V
IN
1
RUN
LTC3406-1.2
PIN 1
2
3
5
4
GND
V
OUT
–
+
LTC3406-1.2
V
C
V
OUT
OUT
OUT
SW
V
IN
SW
L1
L1
C
IN
V
IN
C
OUT
C
IN
340612 F03
GND
BOLD LINES INDICATE HIGH CURRENT PATHS
340612 F04
Figure 4. LTC3406-1.2 Suggested Layout
Figure 3. LTC3406-1.2 Layout Diagram
340612f
10
LTC3406-1.2
U
TYPICAL APPLICATIO S
Single Li-Ion 1.2V/600mA Regulator for Lowest Profile, ≤1mm High
†
2.2µH
4
3
V
V
OUT
1.2V
IN
V
SW
IN
2.7V TO 4.2V
C
**
IN
C
*
LTC3406-1.2
RUN
OUT1
4.7µF
1
10µF
CER
CER
5
V
OUT
GND
340612 TA02
2
*MURATA GRM219R60JI06KE19B
**AVX06036D475MAT
†
FDK MIPW3226D2R2M
LTC3406-1.2 Efficiency
Load Step
100
90
80
70
60
50
40
30
20
10
0
V
OUT
100mV/DIV
AC COUPLED
I
LOAD
500mA/DIV
I
L
500mA/DIV
340612 TA04
V
V
V
= 2.7V
= 3.6V
= 4.2V
20µs/DIV
IN
IN
IN
V
LOAD
= 3.6V
IN
I
= 20mA TO 600mA
0.1
1
10
100
1000
LOAD (mA)
340612 TA03
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.09 – 0.20
(NOTE 3)
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
S5 TSOT-23 0302
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
340612f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC3406-1.2
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
90% Efficiency, V = 3.6V to 25V, V
LT1616
500mA (I ), 1.4MHz, High Efficiency Step-Down
= 1.25V, I = 1.9mA,
Q
OUT
IN
OUT
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
LT1676
450mA (I ), 100kHz, High Efficiency Step-Down
DC/DC Converter
90% Efficiency, V = 7.4V to 60V, V
= 1.24V, I = 3.2mA,
Q
OUT
IN
OUT
I
= 2.5µA, S8 Package
SD
LTC1701/LT1701B
LT1776
750mA (I ), 1MHz, High Efficiency Step-Down
DC/DC Converter
90% Efficiency, V = 2.5V to 5V, V
= 1.25V, I = 135µA,
OUT Q
OUT
IN
I
= <1µA, ThinSOT Package
SD
500mA (I ), 200kHz, High Efficiency Step-Down
90% Efficiency, V = 7.4V to 40V, V
= 1.24V, I = 3.2mA,
Q
OUT
IN
OUT
OUT
DC/DC Converter
I
= 30µA, N8, S8 Packages
SD
LTC1877
600mA (I ), 550kHz, Synchronous Step-Down
95% Efficiency, V = 2.7V to 10V, V
= 0.8V, I = 10µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, MS8 Package
SD
LTC1878
600mA (I ), 550kHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V = 2.7V to 6V, V
= 0.8V, I = 10µA,
OUT Q
OUT
IN
I
= <1µA, MS8 Package
SD
LTC1879
1.2A (I ), 550kHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V = 2.7V to 10V, V
= 0.8V, I = 15µA,
OUT
IN
OUT
Q
I
= <1µA, TSSOP-16 Package
SD
LTC3403
600mA (I ), 1.5MHz, Synchronous Step-Down
DC/DC Converter with Bypass Transistor
96% Efficiency, V = 2.5V to 5.5V, V = Dynamically Adjustable,
OUT
I = 20µA, I = <1µA, DFN Package
Q SD
OUT
IN
LTC3404
600mA (I ), 1.4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V = 2.7V to 6V, V
= 0.8V, I = 10µA,
OUT Q
OUT
IN
I
= <1µA, MS8 Package
SD
LTC3405/LTC3405A
LTC3406
300mA (I ), 1.5MHz, Synchronous Step-Down
DC/DC Converter
96% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 20µA,
Q
OUT
IN
OUT
OUT
OUT
OUT
OUT
I
= <1µA, ThinSOT Package
SD
600mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
= 0.6V, I = 20µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
LTC3411
1.25A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 60µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, MS Package
SD
LTC3412
2.5A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 60µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, TSSOP-16E Package
SD
LTC3440
600mA (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V = 2.5V to 5.5V, V
= 2.5V, I = 25µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, MS Package
SD
340612f
LT/TP 0105 1K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
©LINEAR TECHNOLOGY CORPORATION 2005
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