LTC2912CTS8-1#TR [Linear]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, PLASTIC, MO-193, TSOT-23, 8 PIN, Power Management Circuit;
| 型号： | LTC2912CTS8-1#TR |
| 厂家： | 
Linear |
| 描述： | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, PLASTIC, MO-193, TSOT-23, 8 PIN, Power Management Circuit 电源电路 电源管理电路 监视器 光电二极管 |
| 文件： | 总12页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC2912
Single UV/OV
Voltage Monitor
FEATURES
DESCRIPTION
TheLTC®2912voltagemonitorisdesignedtodetectpower
supply undervoltage and overvoltage events. The VL and
VH monitor inputs include filtering to reject brief glitches,
thereby ensuring reliable reset operation without false or
noisytriggering.Anadjustabletimerdefinesthedurationof
theovervoltageandundervoltageresetoutputswhichfunc-
tion independently. While the LTC2912 operates directly
■
Monitors Single Voltage
■
Adjustable UV and OV Trip Values
■
Guaranteed Threshold Accuracy: ±±1.5
■
Power Supply Glitch Immunity
■
Adjustable Reset Timeout with Timeout Disable
■
29μA Quiescent Current
■
Open-Drain OV and UV Outputs
■
Guaranteed OV and UV for V ≥ 1V
from 2.3V to 6V supplies, an internal V shunt regulator
CC
CC
Available in 8-Lead ThinSOTTM and (3mm × 2mm)
■
coupled with low supply current demand allows operation
DFN Packages
from higher voltages such as 12V, 24V or 48V.
Three output configurations are available: the LTC2912-
1 has a latch control for the OV output; the LTC2912-2
has an OV and UV output disable feature for margining
applications; the LTC2912-3 is identical to the LTC2912-1
but with a noninverting, OV output.
APPLICATIONS
■
Desktop and Notebook Computers
Network Servers
■
■
Core, I/O Voltage Monitors
TheLTC2912providesaprecise,versatile,space-conscious
micropower solution for voltage monitoring.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Single OV/UV Supply Monitor, 313V ±±ꢀ5 Tolerance
Reset Time-Out Period vs Capacitance
10000
3.3V
POWER
SUPPLY
0.1μF
1000
100
27.4k
1k
V
CC
SYSTEM
VH
VL
OV
UV
LTC2912-1
4.53k
10
1
LATCH
GND
TMR
2912 TA01a
22nF
0.1
1
10
100
(nF)
1000
TIMEOUT = 200ms
TMR PIN CAPACITANCE, C
TMR
2912 G08
2912fa
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LTC2912
(Note ±)
ABSOLUTE MAXIMUM RATINGS
Terminal Voltages
Operating Temperature Range
LTC2912C ................................................ 0°C to 70°C
LTC2912I.............................................. –40°C to 85°C
LTC2912H .......................................... –40°C to 125°C
Storage Temperature Range
V
(Note 3)............................................. –0.3V to 6V
CC
OV, UV, OV ............................................ –0.3V to 16V
TMR..........................................–0.3V to (V + 0.3V)
CC
VH, VL, LATCH, DIS.............................. –0.3V to 7.5V
TSOT.................................................. –65°C to 125°C
DFN.................................................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
Terminal Currents
I
....................................................................10mA
VCC
UV OV OV
I , I , I ........................................................10mA
TSOT................................................................. 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
TOP VIEW
V
1
2
3
4
8
7
6
5
LATCH
UV
CC
LATCH 1
UV 2
OV 3
8 V
CC
7 VH
6 VL
5 TMR
VH
VL
9
OV
TMR
GND
GND 4
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
T
= 150°C, θ = 195°C/W
JA
JMAX
T
JMAX
= 150°C, θ = 76°C/W
JA
EXPOSED PAD (PIN 9) IS GND, CONNECTION TO PCB OPTIONAL
ORDER PART NUMBER
TS8 PART MARKING*
ORDER PART NUMBER
DDB PART MARKING*
LTC2912CTS8-1
LTC2912ITS8-1
LTC2912HTS8-1
LTCJW
LTCJW
LTCJW
LTC2912CDDB-1
LCJZ
LTC2912IDDB-1
LTC2912HDDB-1
LCJZ
LCJZ
TOP VIEW
TOP VIEW
V
1
2
3
4
8
7
6
5
DIS
UV
CC
DIS 1
UV 2
OV 3
8 V
CC
7 VH
6 VL
5 TMR
VH
VL
9
OV
TMR
GND
GND 4
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
T
= 150°C, θ = 195°C/W
JA
JMAX
T
JMAX
= 150°C, θ = 76°C/W
JA
EXPOSED PAD (PIN 9) IS GND, CONNECTION TO PCB OPTIONAL
ORDER PART NUMBER
TS8 PART MARKING*
ORDER PART NUMBER
DDB PART MARKING*
LTC2912CTS8-2
LTC2912ITS8-2
LTC2912HTS8-2
LTCJX
LTCJX
LTCJX
LTC2912CDDB-2
LCKB
LTC2912IDDB-2
LTC2912HDDB-2
LCKB
LCKB
TOP VIEW
TOP VIEW
V
1
2
3
4
8
7
6
5
LATCH
UV
CC
LATCH 1
UV 2
OV 3
8 V
CC
7 VH
6 VL
5 TMR
VH
VL
9
OV
TMR
GND
GND 4
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
T
= 150°C, θ = 195°C/W
JA
JMAX
T
JMAX
= 150°C, θ = 76°C/W
JA
EXPOSED PAD (PIN 9) IS GND, CONNECTION TO PCB OPTIONAL
ORDER PART NUMBER
TS8 PART MARKING*
ORDER PART NUMBER
DDB PART MARKING*
LTC2912CTS8-3
LTC2912ITS8-3
LTC2912HTS8-3
LTCJY
LTCJY
LTCJY
LTC2912CDDB-3
LCKC
LTC2912IDDB-3
LTC2912HDDB-3
LCKC
LCKC
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container.
2912fa
2
LTC2912
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 2.°C1 VCC = 313V, VL = ꢀ14.V, VH = ꢀ1..V, LATCH = VCC unless otherwise
noted1 (Note 2)
SYMBOL
PARAMETER
CONDITIONS
= 5mA
MIN
6.2
TYP
6.6
MAX
7.2
UNITS
V
●
●
●
●
●
●
●
●
●
●
V
V
Shunt Regulator Voltage
I
CC
SHUNT
CC
–40°C < T < 125°
6.2
6.6
7.3
V
A
ΔV
SHUNT
V
Shunt Regulator Load Regulation
I
CC
= 2mA to 10mA
200
300
mV
V
CC
V
V
V
Supply Voltage (Note 3)
2.3
V
SHUNT
CC
Minimum V Output Valid
DIS = 0V
1
V
CCR(MIN)
CC(UVLO)
CC
Supply Undervoltage Lockout
Supply Undervoltage Lockout Hysteresis
Supply Current
DIS = 0V, V Rising
1.9
5
2
2.1
50
V
CC
ΔV
CC(UVHYST)
DIS = 0V
25
mV
μA
mV
μs
I
CC
V
= 2.3V to 6V
29
70
CC
Hn
V
UOT
Undervoltage/Overvoltage Threshold
492
50
500
125
508
500
t
Undervoltage/Overvoltage Threshold to
Output Delay
V
= V
– 5mV or V = V
+ 5mV
UOT
UOD
UOT
Ln
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
I
VH, VL Input Current
15
30
nA
nA
ms
ms
V
VHL
–40°C < T < 125°
A
t
UV/OV Time-Out Period
C
TMR
= 1nF
6
6
8.5
8.5
12.5
14
UOTO
–40°C < T < 125°
A
V
V
OV Latch Clear Input High
OV Latch Clear Input Low
LATCH Input Current
DIS Input Current
1.2
LATCH(VIH)
LATCH(VIL)
LATCH
0.8
1
V
I
I
V
V
> 0.5V
μA
μA
V
LATCH
> 0.5V
DIS
1
2
3.3
DIS
V
V
DIS Input High
1.2
DIS(VIH)
DIS(VIL)
TMR(UP)
DIS Input Low
0.8
–2.8
–2.8
2.8
V
I
TMR Pull-Up Current
V
TMR
= 0V
–1.3
–1.2
1.3
–2.1
–2.1
2.1
μA
μA
μA
μA
mV
V
–40°C < T < 125°
A
I
TMR Pull-Down Current
V
TMR
= 1.6V
TMR(DOWN)
–40°C < T < 125°
1.2
2.1
2.8
A
V
Timer Disable Voltage
Referenced to V
–180
1
–270
TMR(DIS)
CC
V
V
Output Voltage High UV/OV/OV
Output Voltage Low UV/OV/OV
V
= 2.3V, I
= –1μA
UV/OV
OH
OL
CC
●
●
V
V
= 2.3V, I
= 2.5mA
UV/OV
0.10
0.01
0.30
0.15
V
V
CC
CC
= 1V, I = 100μA
UV
Note ±: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: V maximum pin voltage is limited by input current. Since the
CC
V
CC
pin has an internal 6.5V shunt regulator, a low impedance supply that
exceeds 6V may exceed the rated terminal current. Operation from higher
voltage supplies requires a series dropping resistor. See Applications
Information.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
2912fa
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LTC2912
TIMING DIAGRAMS
VH Monitor Timing
VL Monitor Timing
V
V
UOT
VH
VL
UOT
t
t
t
t
UOTO
UOD
UOTO
UOD
UV
1V
OV
1V
2912 TD01
2912 TD02
VH Monitor Timing (TMR Pin Strapped to VCC
)
VL Monitor Timing (TMR Pin Strapped to VCC
)
V
UOT
VH
V
UOT
VL
t
t
UOD
t
t
UOD
UOD
UOD
UV
1V
OV
1V
2912 TD03
2912 TD04
TYPICAL PERFORMANCE CHARACTERISTICS
Input Threshold Voltage
vs Temperature
VCC Shunt Voltage
vs Temperature
Supply Current vs Temperature
6.8
6.7
6.6
6.5
6.4
6.3
6.2
0.505
0.504
0.503
0.502
0.501
0.500
0.499
0.498
0.497
0.496
0.495
45
40
35
10mA
V
= 5V
CC
5mA
2mA
V
= 3.3V
CC
30
25
20
15
1mA
V
= 2.3V
CC
200μA
50
–50
0
25
75
100
–25
–50
–25
25
50
75
100
–50 –25
0
25
50
75
100
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
2912 G03
2912 G01
2912 G02
Typical Transient Duration vs
Comparator Overdrive
VCC Shunt Voltage vs ICC
UV Output Voltage vs VCC
6.75
6.65
6.55
6.45
6.35
6.25
0.8
0.6
0.4
0.2
0
700
600
500
400
300
200
100
50
V
CC
RESET OCCURS
ABOVE CURVE
UV WITH
10k PULL-UP
–40°C
V
= 6V
CC
UV WITHOUT
PULL-UP
25°C
85°C
V
= 2.3V
CC
0
0.2
0.4
0.6
0.8
1
–2
0
2
4
6
8
10
12
0.1
1
10
100
I
(mA)
SUPPLY VOLTAGE, V (V)
COMPARATOR OVERDRIVE PAST THRESHOLD (%)
CC
CC
2912 G05
2912 G06
2912 G04
2912fa
4
LTC2912
TYPICAL PERFORMANCE CHARACTERISTICS
Reset Time-Out Period
vs Capacitance
UV Output Voltage vs VCC
UV, ISINK vs VCC
5
4
3
2
1
0
5
4
3
2
1
0
10000
1000
100
VH = 0.55V
VH = 0.45V
SEL = V
SEL = V
CC
CC
UV AT 150mV
UV AT 50mV
10
1
0
1
2
3
4
5
0
1
2
3
4
5
0.1
1
10
100
(nF)
1000
TMR PIN CAPACITANCE, C
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
CC
TMR
CC
2912 G08
2912 G07
2912 G09
UV/OV, Voltage Output Low
vs Output Sink Current
Reset Timeout Period
vs Temperature
12
1.0
0.8
0.6
0.4
C
= 1nF
TMR
85°C
25°C
11
10
9
–40°C
8
0.2
0
7
6
–50
0
25
50
75
100
–25
0
10
15
(mA)
20
25
30
5
TEMPERATURE (°C)
I
UV/OV
2912 G11
1912 G10
PIN FUNCTIONS
(DFN/TSOT Packages)
DIS (Pin 8/Pin ±, LTC29±2-2): Output Disable Input.
Disables the OV and UV output pins. When DIS is pulled
high, the OV and UV pins are not asserted except during a
UVLO condition. Pin has a weak (2μA) internal pull-down
to GND. Leave pin open if unused.
is cleared. While held high, OV/OV has a similar delay and
output characteristic as UV.
OV (Pin 6/Pin 3, LTC29±2-±, LTC29±2-2): Overvoltage
Logic Output. Asserts low when the VL input voltage is
above threshold. Latched low (LTC2912-1). Held low for
programmeddelaytimeafterVLinputisvalid(LTC2912-2).
Exposed Pad (Pin 9, DDB Package): Exposed Pad may
be left open or connected to device ground.
Pinhasaweakpull-uptoV andmaybepulledaboveV
CC
CC
using an external pull-up. Leave pin open if unused.
GND (Pin ./Pin 4): Device Ground.
LATCH (Pin 8/Pin ±, LTC29±2-±, LTC29±2-3): OV/OV
Latch Clear/Bypass Input. When pulled high, OV/OV latch
2912fa
5
LTC2912
PIN FUNCTIONS
(DFN/TSOT Packages)
V
(Pin ±/Pin 8): Supply Voltage. Bypass this pin to
OV (Pin 6/Pin 3, LTC29±2-3): Overvoltage Logic Output.
CC
GND with a 0.1μF (or greater) capacitor. Operates as a
direct supply input for voltages up to 6V. Operates as a
shunt regulator for supply voltages greater than 6V and
should have a resistance between the pin and the supply
to limit input current to no greater than 10mA. When used
without a current-limiting resistance, pin voltage must
not exceed 6V.
Asserts high with a weak internal pull-up to V when the
CC
VL input is above threshold. Latches high. May be pulled
above V using an external pull-up. Leave pin open if
CC
unused.
TMR (Pin 4/Pin .): Reset Delay Timer. Attach an external
capacitor (C
) of at least 10pF to GND to set a reset
TMR
delay time of 9ms/nF. A 1nF capacitor will generate an
VH (Pin 2/Pin 7): Voltage High Input. When the voltage
8.5ms reset delay time. Tie pin to V to bypass timer.
CC
on this pin is below 0.5V, an undervoltage condition is
UV (Pin 7/Pin 2): Undervoltage Logic Output. Asserts low
when the VH input voltage is below threshold. Held low for
a programmed delay time after the VH input is valid. Pin
triggered. Tie pin to V if unused.
CC
VL (Pin 3/Pin 6): Voltage Low Input. When the voltage on
thispinisabove0.5V,anovervoltageconditionistriggered.
Tie pin to GND if unused.
has a weak pull-up to V and may be pulled above V
CC
CC
using an external pull-up. Leave pin open if unused.
BLOCK DIAGRAM
1
4
V
CC
TMR
V
CC
400k
OSCILLATOR
UV
VH
–
+
7
2
UV PULSE
GENERATOR
DISABLE
UVLO
+
–
2V
V
V
CC
CC
UVLO
400k
OV PULSE
–
+
LTC2912-1
LTC2912-2
GENERATOR
OV/OV
VL
6
3
5
DISABLE
0.5V
GND
LTC2912-3
OV LATCH
CLEAR/BYPASS
LATCH
+
–
8
8
1V
LTC2912-1, LTC2912-3
–
+
1V
DIS
2μA
LTC2912-2
2912 BD
2912fa
6
LTC2912
APPLICATIONS INFORMATION
Voltage Monitoring
21 Choose R to obtain the desired UV trip point
B
The LTC2912 is a low power voltage monitoring circuit
with an undervoltage and an overvoltage input. A timeout
period that holds OV and UV asserted after a fault has
cleared is adjustable using an external capacitor and may
beexternallydisabled.Whenconfiguredtomonitoraposi-
Once R is known, R is chosen to set the desired trip
A
B
point for the undervoltage monitor.
Vn
VUV
0.5V
In
RB =
•
–RA
(2)
tive voltage V using the 3-resistor circuit configuration
n
31 Choose R to complete the design
C
shown in Figure 1, VH will be connected to the high side
tap of the resistive divider and VL will be connected to the
low side tap of the resistive divider.
Once R and R are known, R is determined by:
A
B
C
Vn
In
RC =
–RA –RB
(3)
3-Step Design Procedure
The following 3-step design procedure allows selecting
appropriate resistances to obtain the desired UV and OV
trip points for the voltage monitor circuit in Figure 1.
If any of the variables V , I , V or V change, then each
n
n
UV
OV
step must be recalculated.
For supply monitoring, V is the desired nominal operat-
Voltage Monitor Example
n
ing voltage, I is the desired nominal current through the
n
A typical voltage monitor application is shown in Figure 2.
The monitored voltage is a 5V 10% supply. Nominal cur-
rent in the resistive divider is 10μA.
resistive divider, V is the desired overvoltage trip point
OV
and V is the desired undervoltage trip point.
UV
±1 Choose R to obtain the desired OV trip point
A
1. Find R to set the OV trip point of the monitor.
A
R is chosen to set the desired trip point for the
A
0.5V 5V
10µA 5.5V
overvoltage monitor.
RA =
•
≈ 45.3k
Vn
VOV
0.5V
In
RA =
•
(1)
2. Find R to set the UV trip point of the monitor.
B
0.5V 5V
10µA 4.5V
RB =
•
– 45.3k ≅ 10.2k
V
n
LTC2912
VH
R
C
3. Determine R to complete the design.
C
–
+
UV
OV
5V
10µA
RC =
– 45.3k − 10.2k ≈ 442k
+
–
R
0.5V
B
V1
5V 10%
V
CC
5V
–
+
R
C
VL
V
CC
442k
VH1
LTC2912-1
VL1 UV
OV
R
R
B
10.2k
A
2912 F01
R
A
GND
45.3k
Figure ±1 3-Resistor Positive UV/OV Monitoring Configuration
2912 F02
Figure 21 Typical Supply Monitor
2912fa
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LTC2912
APPLICATIONS INFORMATION
Power-Up/Power-Down
The two extreme conditions, with a relative accuracy of
1.5% and resistance accuracy of 1%, result in:
AssoonasV reaches1Vduringpowerup, theUVoutput
CC
asserts low and the OV output weakly pulls to V .
CC
ꢀ
ꢃ
ꢅ
RC • 0.99
V
UV(MIN) = 0.5V • 0.985 • 1+
ꢂ
The LTC2912 is guaranteed to assert UV low, OV high
R + R • 1.01
(
)
ꢁ
ꢄ
A
B
(LTC2912-1, LTC2912-2) and OV low (LTC2912-3) under
conditions of low V , down to V = 1V. Above V = 2V
and
CC
CC
CC
(2.1V maximum), the VH and VL inputs take control.
ꢀ
ꢂ
ꢁ
ꢃ
RC • 1.01
Once the VH input and V become valid an internal timer
V
UV(MAX) = 0.5V • 1.015 • 1+
CC
ꢅ
R + R • 0.99
(
)
ꢄ
A
B
is started. After an adjustable delay time, UV weakly pulls
high.
RC
RA + RB
For a desired trip point of 4.5V,
= 8
Threshold Accuracy
Resetthresholdaccuracyisimportantinasupply-sensitive
system.Ideally,suchasystemresetsonlyifsupplyvoltages
fall outside the exact thresholds for a specified margin.
Both LTC2912 inputs have a relative threshold accuracy
of 1.5% over the full operating temperature range.
Therefore,
ꢀ
ꢁ
ꢂ
ꢃ
0.99
1.01
VUV(MIN) = 0.5V • 0.985 • 1+ 8
= 4.354V
= 4.650V
and
For example, when the LTC2912 is programmed to moni-
tor a 5V input with a 10% tolerance, the desired UV trip
point is 4.5V. Because of the 1.5% relative accuracy of
the LTC2912, the UV trip point can be anywhere between
4.433V and 4.567V which is 4.5V 1.5%.
ꢀ
ꢁ
ꢂ
ꢃ
1.01
0.99
VUV(MAX) = 0.5V • 1.015 • 1+ 8
Glitch Immunity
In any supervisory application, noise riding on the moni-
tored DC voltage causes spurious resets. To solve this
problem without adding hysteresis, which causes a new
error term in the trip voltage, the LTC2912 lowpass filters
the output of the first stage comparator at each input. This
filter integrates the output of the comparator before as-
serting the UV or OV logic. A transient at the input of the
comparator of sufficient magnitude and duration triggers
the output logic. The Typical Performance Characteristics
show a graph of the Transient Duration vs Comparator
Overdrive.
Likewise, the accuracy of the resistances chosen for R ,
A
R and R can affect the UV and OV trip points as well.
B
C
Using the example just given, if the resistances used to
set the UV trip point have 1% accuracy, the UV trip range
is between 4.354V and 4.650V. This is illustrated in the
following calculations.
The UV trip point is given as:
ꢀ
ꢃ
RC
RA + R
V
UV = 0.5V 1+
ꢂ
ꢅ
ꢁ
B ꢄ
UV/OV Timing
TheLTC2912hasanadjustabletimeoutperiod(t
)that
UOTO
holds OV, OV or UV asserted after each fault has cleared.
This delay assures a minimum reset pulse width allowing
settling time for the monitored voltage after it has entered
the “valid” region of operation.
2912fa
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LTC2912
APPLICATIONS INFORMATION
have a resistance R between the supply and the V pin
When the VH input drops below its designed threshold,
the UV pin asserts low. When the input recovers above
its designed threshold, the UV output timer starts. If the
input remains above the designed threshold when the
timer finishes, the UV pin weakly pulls high. However, if
the input falls below its designed threshold during this
timeout period, the timer resets and restarts when the
input is above the designed threshold. The OV and OV
outputs behave as the UV output when LATCH is high
(LTC2912-1, LTC2912-3).
Z
CC
to limit the current to no greater than 10mA.
Whenchoosingthisresistancevalue,selectanappropriate
locationontheI-VcurveshownintheTypicalPerformance
Characteristics to accommodate any variations in V due
CC
to changes in current through R .
Z
UV, OV and OV Output Characteristics
The DC characteristics of the UV, OV and 0V pull-up and
pull-down strength are shown in the Typical Performance
Characteristics. Each pin has a weak internal pull-up to
Selecting the UV/OV Timing Capacitor
V
CC
and a strong pull-down to ground. This arrangement
The UV and OV timeout period (t ) for the LTC2912
UOTO
allows these pins to have open-drain behavior while pos-
sessing several other beneficial characteristics. The weak
pull-up eliminates the need for an external pull-up resistor
when the rise time on the pin is not critical. On the other
hand, the open-drain configuration allows for wired-OR
connections, and is useful when more than one signal
is adjustable to accommodate a variety of applications.
Connecting a capacitor, C , between the TMR pin and
TMR
ground sets the timeout period. The value of capacitor
needed for a particular timeout period is:
–9
C
= t
• 115 • 10 [F/s]
TMR
UOTO
needs to pull down on the output. V of 1V guarantees
CC
The Reset Timeout Period vs Capacitance graph found in
theTypicalPerformanceCharacteristicsshowsthedesired
delay time as a function of the value of the timer capacitor
that must be used. The TMR pin must have a minimum
a maximum V = 0.15V at UV.
OL
AtV =1V,theweakpull-upcurrentonOVisbarelyturned
CC
on. Therefore, an external pull-up resistor of no more than
100kisrecommendedontheOVpinifthestateandpull-up
10pF load or be tied to V . For long timeout periods, the
CC
strength of the OV pin is crucial at very low V .
only limitation is the availability of a large value capaci-
tor with low leakage. Capacitor leakage current must not
exceedtheminimumTMRchargingcurrentof1.3μA.Tying
CC
Note however, by adding an external pull-up resistor, the
pull-up strength on the OV pin is increased. Therefore, if
it is connected in a wired-OR connection, the pull-down
strength of any single device must accommodate this
additional pull-up strength.
the TMR pin to V bypasses the timeout period.
CC
Undervoltage Lockout
When V falls below 2V, the LTC2912 asserts an
CC
Output Rise and Fall Time Estimation
undervoltagelockout(UVLO)condition. DuringUVLO, UV
is asserted and pulled low while OV and OV are cleared
The UV, OV and OV outputs have strong pull-down capa-
bility. The following formula estimates the output fall time
(90% to 10%) for a particular external load capacitance
and blocked from asserting. When V rises above 2V, UV
CC
follows the same timing procedure as an undervoltage
condition on the VH input.
(C
):
LOAD
t
≈ 2.2 • R • C
PD LOAD
Shunt Regulator
FALL
where R is the on-resistance of the internal pull-down
The LTC2912 has an internal shunt regulator. The V pin
PD
CC
transistor, typically 50Ω at V > 1V and at room tem-
operatesasadirectsupplyinputforvoltagesupto6V.Under
CC
perature (25°C). C
is the external load capacitance
this condition, the quiescent current of the device remains
LOAD
on the pin. Assuming a 150pF load capacitance, the fall
time is 16.5ns.
below a maximum of 70μA. For V voltages higher than
CC
6V, the device operates as a shunt regulator and should
2912fa
9
LTC2912
APPLICATIONS INFORMATION
The rise time on the UV, OV and 0V pins is limited by a
similar timeout period at the output. If LATCH is pulled
low while the timeout period is active, the OV and OV pins
latch as before.
400k pull-up resistance to V . A similar formula esti-
CC
mates the output rise time (10% to 90%) at the UV, OV
and OV pins:
Disable (LTC29±2-2)
t
≈ 2.2 • R • C
PU LOAD
RISE
The LTC2912-2 allows disabling the UV and OV outputs
via the DIS pin. Pulling DIS high forces both outputs to
remain weakly pulled high, regardless of any faults that
occur on the inputs. However, if a UVLO condition oc-
curs, UV asserts and pulls low, but the timeout function
is bypassed. UV pulls high as soon as the UVLO condition
is cleared.
where R is the pull-up resistance.
PU
OV/OV Latch (LTC29±2-±, LTC29±2-3)
With the LATCH pin held low, the OV pin latches low
(LTC2912-1) and the OV pin latches high (LTC2912-3)
when an OV condition is detected. The latch is cleared
by raising the LATCH pin high. If an OV condition clears
while LATCH is held high, the latch is bypassed and the
OV and OV pins behave the same as the UV pin with a
DIS has a weak 2μA (typical) internal pull-down current
guaranteeing normal operation with the pin left open.
TYPICAL APPLICATIONS
Dual UV/OV Supply Monitor, 313V ±±ꢀ5 Tolerance
48V Supply Monitor (<±±ꢀ5 = Powergood)
3.3V
48V
POWER
SUPPLY
POWER
SUPPLY
C
BYP
0.1μF
R
Z
C
BYP
0.1μF
200k
1
R
PG
30k
R
C
V
27.4k
1
CC
2
6
7
SYSTEM
R
C
VH
VL
OV
UV
V
37.4M
CC
2
3
6
7
R
B
LTC2912-1
VH
VL
OV
UV
1k
3
R
B
LTC2912-2
80.6k
R
A
4.53k
8
POWERGOOD
LED
R
A
357k
LATCH
TMR
4
8
GND
2912 TA02
DIS
TMR
5
GND
C
TMR
22nF
TIMEOUT = 200ms
5
4
C
TMR
10nF
TIMEOUT = 85ms
2912 TA03
Dual UV Supply Monitor, 313V, 21.V, ±ꢀ5 Tolerance
3.3V
POWER
SUPPLIES
2.5V
C
0.1μF
BYP
R
UV
10k
R
OV
10k
1
4
R
B1
54.9k
SYSTEM
V
H
TMR
OV
CC
2
6
7
V
R
A1
11k
LTC2912-2
UV
R
B2
39.2k
3
8
V
DIS
L
R
A2
11k
GND
5
2912 TA04
2912fa
10
LTC2912
PACKAGE DESCRIPTION
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
0.61 ±0.05
(2 SIDES)
R = 0.115
0.40 ± 0.10
3.00 ±0.10
(2 SIDES)
TYP
5
R = 0.05
TYP
8
0.70 ±0.05
2.55 ±0.05
1.15 ±0.05
2.00 ±0.10
PIN 1 BAR
TOP MARK
PIN 1
(2 SIDES)
R = 0.20 OR
0.25 × 45°
CHAMFER
(SEE NOTE 6)
PACKAGE
OUTLINE
0.56 ± 0.05
(2 SIDES)
4
1
(DDB8) DFN 0905 REV B
0.25 ± 0.05
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
0.50 BSC
2.20 ±0.05
2.15 ±0.05
(2 SIDES)
(2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
BOTTOM VIEW—EXPOSED PAD
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
0.52
MAX
0.65
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.95 BSC
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
2912fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC2912
TYPICAL APPLICATION
Single UV/OV Supply Monitor with 313V ±±ꢀ5
12V
POWER
SUPPLY
Q1
3.3V
0.1μF
10k
27.4k
1k
SYSTEM
V
CC
VH
VL
OV
LTC2912-3
UV
4.53k
LATCH
TMR
GND
2912 TA05
22nF
TIMEOUT = 200ms
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTC690
LTC694-3.3
LTC699
5V Supply Monitor, Watchdog Timer and Battery Backup
3.3V Supply Monitor, Watchdog Timer and Battery Backup
5V Supply Monitor and Watchdog Timer
4.65 Threshold
2.9V Threshold
4.65 Threshold
LTC1232
5V Supply Monitor, Watchdog Timer and Push-Button Reset 4.37V/4.62V Threshold
LTC1326/
LTC1326-2.5
Micropower Precision Triple Supply Monitor for 5V/2.5V, 3.3V 4.725V, 3.118V, 1V Threshold ( 0.75%)
and ADJ
LTC1536
Precision Triple Supply Monitor for PCI Applications
Meets PCI tFAIL Timing Specifications
LTC1726-2.5/
LTC1726-5
Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and ADJ Adjustable RESET and Watchdog Time-Outs
LTC1728-1.8/
LTC1728-3.3
LTC1985-1.8
LTC2900
Micropower Triple Supply Monitor with Open-Drain Reset
5-Lead SOT-23 Package
5-Lead SOT-23 Package
Adjustable RESET, 10-Lead MSOP and 3mm × 3mm
10-Lead DFN Package
Micropower Triple Supply Monitor with Open-Drain Reset
Programmable Quad Supply Monitor
LTC2901
LTC2902
Programmable Quad Supply Monitor
Programmable Quad Supply Monitor
Adjustable RESET and Watchdog Timer, 16-Lead SSOP Package
Adjustable RESET and Tolerance, 16-Lead SSOP Package,
Margining Functions
LTC2903
LTC2904
LTC2905
LTC2906
LTC2907
LTC2908
LTC2909
Precision Quad Supply Monitor
3-State Programmable Precision Dual Supply Monitor
3-State Programmable Precision Dual Supply Monitor
Precision Dual Supply Monitor 1-Selectable and 1 Adjustable Separate VCC Pin, RST/RST Outputs
Precision Dual Supply Monitor 1-Selectable and 1 Adjustable Separate VCC, Adjustable Reset Timer
6-Lead TSOT-23 Package, Ultralow Voltage Reset
Adjustable Tolerance, 8-Lead TSOT-23 Package
Adjustable RESET and Tolerance, 8-Lead TSOT-23 Package
Precision Six Supply Monitor (Four Fixed & 2 Adjustable)
Prevision Dual Input UV, OV and Negative Voltage Monitor
8-Lead TSOT-23 and DFN Packages
Separate VCC Pin, Adjustable Reset Timer, 8-Lead TSOT-23 and
DFN Packages
LTC2913
LTC2914
Dual UV/OV Voltage Monitor
Separate VCC Pin, Two Inputs, Adjustable Reset Timer, 10-Lead
MSOP and DFN Packages
Separate VCC Pin, Four inputs, Up To Two Negative Monitors,
Adjustable Reset Timer, 16-Lead TSSOP and DFN Packages
Quad UV/OV Positive/Negative Voltage Monitor
2912fa
LT 1007 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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