LTC2379HMS-18#TRPBF [Linear]
LTC2379-18 - 18-Bit, 1.6Msps, Low Power SAR ADC with 101dB SNR; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C;型号: | LTC2379HMS-18#TRPBF |
厂家: | Linear |
描述: | LTC2379-18 - 18-Bit, 1.6Msps, Low Power SAR ADC with 101dB SNR; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C 光电二极管 转换器 |
文件: | 总26页 (文件大小:550K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC2379-18
18-Bit, 1.6Msps, Low Power
SAR ADC with 101.2dB SNR
FEATURES
DESCRIPTION
The LTC®2379-18 is a low noise, low power, high speed
18-bit successive approximation register (SAR) ADC.
Operating from a 2.5V supply, the LTC2379-18 has a
n
1.6Msps Throughput Rate
n
2ꢀSꢁ INꢀ ꢂMaꢃx
n
Guaranteed 18-ꢁit No Missing Codes
n
ꢀow Power: 18mW at 1.6Msps, 18µW at 1.6ksps
V
REF
fully differential input range with V ranging from
REF
n
101.2dꢁ SNR ꢂtypx at f = 2kHz
2.5V to 5.1V. The LTC2379-18 consumes only 18mW and
achieves 2LSBINLmaximum,nomissingcodesat18bits
with 101.2dB SNR.
IN
IN
n
–120dꢁ THD ꢂtypx at f = 2kHz
n
Digital Gain Compression ꢂDGCx
n
Guaranteed Operation to 125°C
The LTC2379-18 has a high speed SPI-compatible serial
interface that supports 1.8V, 2.5V, 3.3V and 5V logic
while also featuring a daisy-chain mode. The fast 1.6Msps
throughput with no cycle latency makes the LTC2379-18
ideally suited for a wide variety of high speed applications.
Aninternaloscillatorsetstheconversiontime,easingexter-
nal timing considerations. The LTC2379-18 automatically
powers down between conversions, leading to reduced
power dissipation that scales with the sampling rate.
n
2.5V Supply
n
Fully Differential Input Range V
REF
n
n
n
n
n
n
V
Input Range from 2.5V to 5.1V
REF
No Pipeline Delay, No Cycle Latency
1.8V to 5V I/O Voltages
SPI-Compatible Serial I/O with Daisy-Chain Mode
Internal Conversion Clock
16-Lead MSOP and 4mm × 3mm DFN Packages
The LTC2379-18 features a unique digital gain compres-
sion(DGC)function,whicheliminatesthedriveramplifier’s
negative supply while preserving the full resolution of the
ADC. When enabled, the ADC performs a digital scaling
APPLICATIONS
n
Medical Imaging
n
High Speed Data Acquisition
n
Portable or Compact Instrumentation
Industrial Process Control
Low Power Battery-Operated Instrumentation
ATE
function that maps zero-scale code from 0V to 0.1 • V
REF
n
and full-scale code from V
to 0.9 • V . For a typical
REF
REF
n
reference voltage of 5V, the full-scale input range is now
0.5V to 4.5V, which provides adequate headroom for
powering the driving amplifier from a single 5.5V supply.
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 7705765.
TYPICAL APPLICATION
32k Point FFT fS = 1.6Msps, fIN = 2kHz
0
2.5V 1.8V TO 5V
10µF
SNR = 101.2dB
–20
–40
THD = –120dB
SINAD = 101.1dB
SFDR = 121dB
0.1µF
–60
V
OV
DD
CHAIN
RDL/SDI
SDO
SCK
BUSY
CNV
DD
3300pF
3300pF
3300pF
V
V
REF
20Ω
20Ω
+
–
–80
IN
+
–
0V
–100
–120
–140
–160
–180
LTC2379-18
REF
IN
SAMPLE CLOCK
0V
V
REF/DGC
REF
GND
REF
237918 TA01
2.5V TO 5.1V
47µF
(X5R, 0805 SIZE)
0
100 200 300 400 500 600 700 800
FREQUENCY (kHz)
237918 TA02
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For more information www.linear.com/LTC2379-18
LTC2379-18
ABSOLUTE MAXIMUM RATINGS
ꢂNotes 1, 2x
Supply Voltage (V )...............................................2.8V
Digital Output Voltage
DD
Supply Voltage (OV )................................................6V
(Note 3)........................... (GND –0.3V) to (OV + 0.3V)
DD
DD
Reference Input (REF).................................................6V
Power Dissipation.............................................. 500mW
Operating Temperature Range
LTC2379C................................................ 0°C to 70°C
LTC2379I .............................................–40°C to 85°C
LTC2379H.......................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Analog Input Voltage (Note 3)
+
–
IN , IN ......................... (GND –0.3V) to (REF + 0.3V)
REF/DGC Input (Note 3).... (GND –0.3V) to (REF + 0.3V)
Digital Input Voltage
(Note 3)........................... (GND –0.3V) to (OV + 0.3V)
DD
PIN CONFIGURATION
TOP VIEW
CHAIN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
OV
TOP VIEW
V
DD
DD
CHAIN 1
16 GND
GND
SDO
V
2
15 OV
DD
DD
+
GND 3
14 SDO
13 SCK
17
GND
IN
SCK
+
–
IN
IN
4
5
–
IN
RDL/SDI
BUSY
GND
12 RDL/SDI
11 BUSY
10 GND
GND
REF
GND 6
REF 7
REF/DGC 8
9
CNV
REF/DGC
CNV
MS PACKAGE
16-LEAD PLASTIC MSOP
DE PACKAGE
T
= 150°C, θ = 110°C/W
16-LEAD (4mm × 3mm) PLASTIC DFN
JMAX
JA
T
= 150°C, θ = 40°C/W
JA
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
http://www.linear.com/product/ꢀTC2379-18#orderinfo
ORDER INFORMATION
ꢀEAD FREE FINISH
TAPE AND REEꢀ
PART MARKING*
PACKAGE DESCRIPTION
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
LTC2379CMS-18#PBF
LTC2379IMS-18#PBF
LTC2379HMS-18#PBF
LTC2379CDE-18#PBF
LTC2379IDE-18#PBF
LTC2379CMS-18#TRPBF 237918
LTC2379IMS-18#TRPBF 237918
LTC2379HMS-18#TRPBF 237918
LTC2379CDE-18#TRPBF 23798
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
16-Lead (4mm × 3mm) Plastic DFN
16-Lead (4mm × 3mm) Plastic DFN
LTC2379IDE-18#TRPBF
23798
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
237918fb
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For more information www.linear.com/LTC2379-18
LTC2379-18
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ
V +
PARAMETER
CONDITIONS
(Note 5)
MIN
–0.05
–0.05
TYP
MAX
UNITS
+
l
l
l
l
Absolute Input Range (IN )
V
V
+ 0.05
V
V
V
V
IN
REF
REF
–
V
–
Absolute Input Range (IN )
(Note 5)
+ 0.05
IN
V + – V – Input Differential Voltage Range
V
IN
= V + – V –
–V
+V
REF
IN
IN
IN
IN
REF
V
CM
Common-Mode Input Range
V
/2–
V /2
REF
V
/2+
REF
REF
0.1
0.1
l
I
Analog Input Leakage Current
Analog Input Capacitance
1
µA
IN
C
Sample Mode
Hold Mode
45
5
pF
pF
IN
CMRR
Input Common Mode Rejection Ratio
f
IN
= 800kHz
86
dB
CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ PARAMETER
CONDITIONS
MIN
18
TYP
MAX
UNITS
Bits
l
l
Resolution
No Missing Codes
18
Bits
Transition Noise
0.8
0.8
0.2
0
LSB
RMS
l
l
l
INL
Integral Linearity Error
Differential Linearity Error
Bipolar Zero-Scale Error
Bipolar Zero-Scale Error Drift
Bipolar Full-Scale Error
Bipolar Full-Scale Error Drift
(Note 6)
(Note 7)
(Note 7)
–2
–0.9
–9
2
0.9
9
LSB
DNL
BZE
LSB
LSB
3
mLSB/°C
LSB
l
FSE
–40
7
40
0.05
ppm/°C
DYNAMIC ACCURACY The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C and AIN = –1dꢁFS. ꢂNotes 4, 8x
SYMꢁOꢀ PARAMETER
CONDITIONS
MIN
97.5
96.8
TYP
101
101
MAX
UNITS
dB
l
l
SINAD
SNR
Signal-to-(Noise + Distortion) Ratio
f
IN
f
IN
= 2kHz, V = 5V
REF
= 2kHz, V = 5V, (H-Grade)
dB
REF
l
l
l
Signal-to-Noise Ratio
f
IN
f
IN
f
IN
= 2kHz, V = 5V
98.1
96.3
92.3
101.2
99
96
dB
dB
dB
REF
= 2kHz, V = 5V, REF/DGC = GND
REF
= 2kHz, V = 2.5V
REF
l
l
l
f
IN
f
IN
f
IN
= 2kHz, V = 5V, (H-Grade)
97.7
95.8
92
101.2
99
96
dB
dB
dB
REF
= 2kHz, V = 5V, REF/DGC = GND, (H-Grade)
REF
= 2kHz, V = 2.5V, (H-Grade)
REF
l
l
l
THD
Total Harmonic Distortion
f
IN
f
IN
f
IN
= 2kHz, V = 5V
–120
–119
–107
–106
–103
–99.6
dB
dB
dB
REF
= 2kHz, V = 5V, REF/DGC = GND
REF
= 2kHz, V = 2.5V
REF
l
l
l
f
IN
f
IN
f
IN
= 2kHz, V = 5V, (H-Grade)
–120
–119
–107
–104
–100
–99.4
dB
dB
dB
REF
= 2kHz, V = 5V, REF/DGC = GND, (H-Grade)
REF
= 2kHz, V = 2.5V, (H-Grade)
REF
SFDR
Spurious Free Dynamic Range
–3dB Input Bandwidth
Aperture Delay
f
= 2kHz, V = 5V
122
34
dB
MHz
ps
IN
REF
500
4
Aperture Jitter
ps
Transient Response
Full-Scale Step
200
ns
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For more information www.linear.com/LTC2379-18
LTC2379-18
REFERENCE INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ
PARAMETER
CONDITIONS
(Note 5)
MIN
TYP
MAX
5.1
UNITS
l
l
l
l
V
Reference Voltage
2.5
V
mA
V
REF
REF
I
Reference Input Current
High Level Input Voltage REF/DGC Pin
Low Level Input Voltage REF/DGC Pin
(Note 9)
1
1.3
V
IHDGC
V
ILDGC
0.8V
REF
0.2V
V
REF
DIGITAL INPUTS AND DIGITAL OUTPUTS The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
l
l
l
V
V
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
0.8 • OV
IH
IL
DD
0.2 • OV
10
V
DD
I
V
= 0V to OV
DD
–10
µA
pF
IN
IN
C
V
V
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage Current
Output Source Current
Output Sink Current
5
IN
l
l
l
I = –500µA
O
OV – 0.2
DD
V
OH
OL
I = 500µA
O
0.2
10
V
I
I
I
V
V
V
= 0V to OV
DD
–10
µA
mA
mA
OZ
OUT
OUT
OUT
= 0V
= OV
–10
10
SOURCE
SINK
DD
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ
PARAMETER
Supply Voltage
Supply Voltage
CONDITIONS
MIN
2.375
1.71
TYP
MAX
2.625
5.25
8.6
UNITS
l
l
l
V
DD
2.5
V
V
OV
DD
I
I
I
I
Supply Current
Supply Current
Power Down Mode
Power Down Mode
1.6Msps Sample Rate
7.2
0.7
0.9
0.9
mA
mA
µA
VDD
OVDD
PD
1.6Msps Sample Rate (C = 20pF)
L
+ I
+ I
l
l
Conversion Done (I
Conversion Done (I
+ I )
REF
90
140
VDD
VDD
OVDD
OVDD
REF
+ I , H-Grade)
µA
PD
P
Power Dissipation
Power Down Mode
Power Down Mode
1.6Msps Sample Rate
18
2.25
2.25
21.5
225
315
mW
µW
µW
D
Conversion Done (I
Conversion Done (I
+ I
+ I
+ I )
REF
REF
VDD
VDD
OVDD
OVDD
+ I , H-Grade)
ADC TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ
PARAMETER
CONDITIONS
MIN
TYP
MAX
1.6
UNITS
Msps
ns
l
l
l
l
l
l
l
l
l
l
f
t
t
t
t
t
t
t
t
t
Maximum Sampling Frequency
Conversion Time
SMPL
CONV
ACQ
360
200
625
20
412
Acquisition Time
t
= t
– t
– t (Note 10)
BUSYLH
ns
ACQ
CYC
CONV
Time Between Conversions
CNV High Time
ns
CYC
ns
CNVH
BUSYLH
CNVL
QUIET
SCK
C = 20pF
L
13
ns
CNV↑ to BUSY Delay
Minimum Low Time for CNV
SCK Quiet Time from CNV↑
SCK Period
(Note 11)
(Note 10)
20
20
10
4
ns
ns
(Notes 11, 12)
ns
SCK High Time
ns
SCKH
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For more information www.linear.com/LTC2379-18
LTC2379-18
ADC TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. ꢂNote 4x
SYMꢁOꢀ
PARAMETER
CONDITIONS
MIN
4
TYP
MAX
UNITS
ns
l
l
l
l
l
l
l
l
l
t
t
t
t
t
t
t
t
t
SCK Low Time
SCKL
(Note 11)
(Note 11)
4
ns
SDI Setup Time From SCK↑
SDI Hold Time From SCK↑
SCK Period in Chain Mode
SDO Data Valid Delay from SCK↑
SDO Data Remains Valid Delay from SCK↑
SDO Data Valid Delay from BUSY↓
Bus Enable Time After RDL↓
Bus Relinquish Time After RDL↑
SSDISCK
HSDISCK
SCKCH
DSDO
1
ns
t
= t
+ t (Note 11)
DSDO
13.5
ns
SCKCH
SSDISCK
C = 20pF (Note 11)
L
9.5
ns
C = 20pF (Note 10)
L
1
ns
HSDO
C = 20pF (Note 10)
L
5
ns
DSDOBUSYL
EN
(Note 11)
(Note 11)
16
13
ns
ns
DIS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may effect device
reliability and lifetime.
Note 7: Bipolar zero-scale error is the offset voltage measured from
–0.5LSB when the output code flickers between 00 0000 0000 0000 0000
and 11 1111 1111 1111 1111. Full-scale bipolar error is the worst-case of
–FS or +FS untrimmed deviation from ideal first and last code transitions
and includes the effect of offset error.
Note 2: All voltage values are with respect to ground.
Note 8: All specifications in dB are referred to a full-scale 5V input with a
5V reference voltage.
Note 3: When these pin voltages are taken below ground or above REFor
OV , they will be clamped by internal diodes. This product can handle
DD
input currents up to 100mA below ground or above REFor OV without
latch-up.
Note 9: f
= 1.6MHz, I varies proportionately with sample rate.
DD
SMPL REF
Note 10: Guaranteed by design, not subject to test.
Note 11: Parameter tested and guaranteed at OV = 1.71V, OV = 2.5V
Note 4: V = 2.5V, OV = 2.5V, REF = 5V, V = 2.5V, f
= 1.6MHz,
DD
DD
CM
SMPL
DD
DD
REF/DGC = V
.
REF
and OV = 5.25V.
DD
Note 5: Recommended operating conditions.
Note 12: t
of 10ns maximum allows a shift clock frequency up to
SCK
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
100MHz for rising capture.
0.8*OV
DD
t
WIDTH
0.2*OV
DD
50%
50%
t
t
DELAY
DELAY
237918 F01
0.8*OV
0.8*OV
0.2*OV
DD
DD
DD
0.2*OV
DD
Figure 1. Voltage ꢀevels for Timing Specifications
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For more information www.linear.com/LTC2379-18
LTC2379-18
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VDD = 2.5V, OVDD = 2.5V, VCM = 2.5V,
REF = 5V, fSMPꢀ = 1.6Msps, unless otherwise noted.
Integral Nonlinearity
vs Output Code
Differential Nonlinearity
vs Output Code
DC Histogram
70000
60000
50000
40000
30000
20000
10000
0
2.0
1.5
1.0
0.8
σ = 0.8
0.6
1.0
0.4
0.5
0.2
0.0
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
–0.5
–1.0
–1.5
–2.0
–131072 –65536
0
65536
131072
–131072 –65536
0
65536
131072
–2
–1
0
1
2
3
OUTPUT CODE
OUTPUT CODE
CODE
237918 G01
237918 G02
237918 G03
THD, Harmonics
32k Point FFT fS = 1.6Msps,
fIN = 2kHz
vs Input Frequency
SNR, SINAD vs Input Frequency
0
–20
105
100
95
–80
–90
SNR = 101.2dB
THD = –120dB
SINAD = 101.1dB
SFDR = 121dB
–40
SNR
–60
–100
–110
–120
–130
–140
THD
2ND
–80
SINAD
–100
–120
–140
–160
–180
90
85
3RD
80
0
100 200 300 400 500 600 700 800
0
25 50 75 100 125 150 175 200
0
25 50 75 100 125 150 175 200
FREQUENCY (kHz)
FREQUENCY (kHz)
FREQUENCY (kHz)
237918 G05
237918 G06
237918 G04
SNR, SINAD vs Input level,
fIN = 2kHz
SNR, SINAD vs Reference
Voltage, fIN = 2kHz
THD, Harmonics vs Reference
Voltage, fIN = 2kHz
102
101
100
99
102.0
101.5
101.0
100.5
100.0
–100
–105
–110
–115
–120
–125
–130
–135
–140
SNR
SINAD
THD
SNR
3RD
SINAD
98
2ND
97
96
95
2.5
3.0
3.5
4.0
4.5
5.0
–40
–30
–20
–10
0
2.5
3.0
3.5
4.0
4.5
5.0
REFERENCE VOLTAGE (V)
INPUT LEVEL (dB)
REFERENCE VOLTAGE (V)
237918 G16
237918 G07
237918 G17
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For more information www.linear.com/LTC2379-18
LTC2379-18
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VDD = 2.5V, OVDD = 2.5V, VCM = 2.5V,
REF = 5V, fSMPꢀ = 1.6Msps, unless otherwise noted.
SNR, SINAD vs Temperature,
fIN = 2kHz
THD, Harmonics vs Temperature,
fIN = 2kHz
INꢀ/DNꢀ vs Temperature
103
102
101
100
99
–110
–115
–120
–125
–130
–135
2
1
SNR
SINAD
MAX INL
THD
MAX DNL
3RD
0
MIN DNL
MIN INL
98
2ND
–1
97
96
–2
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
237918 G08
237918 G09
237918 G10
Supply Current vs Temperature
Full-Scale Error vs Temperature
Offset Error vs Temperature
2.0
1.5
8
7
6
5
4
3
2
1
0
8
6
I
VDD
–FS
1.0
4
0.5
2
0
0
–0.5
–1.0
–1.5
–2.0
–2
–4
–6
–8
I
REF
+FS
I
OVDD
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
237918 G12
237918 G13
237918 G11
Reference Current vs
Reference Voltage
Shutdown Current vs Temperature
CMRR vs Input Frequency
45
40
35
30
25
20
15
10
5
100
95
90
85
80
75
70
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I
+ I
+ I
VDD OVDD REF
0
2.5
3.0
3.5
4.0
4.5
5.0
0
200
400
600
800
–55 –35 –15
5
25 45 65 85 105 125
REFERENCE VOLTAGE (V)
FREQUENCY (kHz)
TEMPERATURE (°C)
237918 G14
237918 G15
237918 G18
237918fb
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For more information www.linear.com/LTC2379-18
LTC2379-18
PIN FUNCTIONS
CHAIN ꢂPin 1x: Chain Mode Selector Pin. When low, the
LTC2379-18 operates in normal mode and the RDL/SDI
input pin functions to enable or disable SDO. When high,
the LTC2379-18 operates in chain mode and the RDL/SDI
pin functions as SDI, the daisy-chain serial data input.
ꢁUSY ꢂPin 11x: BUSY Indicator. Goes high at the start of
a new conversion and returns low when the conversion
has finished. Logic levels are determined by 0V .
DD
RDꢀ/SDI ꢂPin 12x: When CHAIN is low, the part is in nor-
mal mode and the pin is treated as a bus enabling input.
When CHAIN is high, the part is in chain mode and the
pin is treated as a serial data input pin where data from
another ADC in the daisy chain is input. Logic levels are
Logic levels are determined by 0V .
DD
V
ꢂPin 2x: 2.5V Power Supply. The range of V is
DD
DD
2.375Vto2.625V. BypassV toGNDwitha10µFceramic
DD
capacitor.
determined by 0V .
DD
GND ꢂPins 3, 6, 10 and 16x: Ground.
SCKꢂPin13x:SerialDataClockInput.WhenSDOisenabled,
the conversion result or daisy-chain data from another
ADC is shifted out on the rising edges of this clock MSB
+
–
IN , IN ꢂPins 4, 5x: Positive and Negative Differential
Analog Inputs.
first. Logic levels are determined by 0V .
DD
REF ꢂPin 7x: Reference Input. The range of REF is 2.5V
to 5.1V. This pin is referred to the GND pin and should be
decoupledcloselytothepinwitha 47µFceramiccapacitor
(X5R, 0805 size).
SDOꢂPin14x:SerialDataOutput. Theconversionresultor
daisy-chain data is output on this pin on each rising edge
of SCK MSB first. The output data is in 2’s complement
format. Logic levels are determined by 0V .
DD
REF/DGCꢂPin8x:WhentiedtoREF,digitalgaincompression
is disabled and the LTC2379-18 defines full-scale accord-
OV ꢂPin 15x: I/O Interface Digital Power. The range of
DD
OV is 1.71V to 5.25V. This supply is nominally set to
DD
ing to the V
analog input range. When tied to GND,
REF
the same supply as the host interface (1.8V, 2.5V, 3.3V,
digital gain compression is enabled and the LTC2379-18
or 5V). Bypass OV to GND with a 0.1µF capacitor.
DD
defines full-scale with inputs that swing between 10% and
90% of the V analog input range.
GND ꢂEꢃposed Pad Pin 17 – DFN Package Onlyx: Ground.
Exposedpadmustbesoldereddirectlytothegroundplane.
REF
CNV ꢂPin 9x: Convert Input. A rising edge on this input
powers up the part and initiates a new conversion. Logic
levels are determined by 0V .
DD
FUNCTIONAL BLOCK DIAGRAM
V
= 2.5V
DD
OV = 1.8V to 5V
DD
REF = 5V
LTC2379-18
CHAIN
SDO
RDL/SDI
SCK
+
+
IN
SPI
PORT
18-BIT SAMPLING ADC
–
–
IN
CNV
BUSY
REF/DGC
CONTROL LOGIC
GND
237918 BD01
237918fb
8
For more information www.linear.com/LTC2379-18
LTC2379-18
TIMING DIAGRAM
Conversion Timing Using the Serial Interface
CHAIN, RDL/SDI = 0
CNV
POWER-DOWN AND ACQUIRE
CONVERT
BUSY
SCK
D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SDO
237918 TD02
237918fb
9
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
OVERVIEW
TRANSFER FUNCTION
The LTC2379-18 is a low noise, low power, high speed
18-bit successive approximation register (SAR) ADC.
Operating from a single 2.5V supply, the LTC2379-18
The LTC2379-18 digitizes the full-scale voltage of 2 × REF
18
into 2 levels, resulting in an LSB size of 38µV with
REF = 5V. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
supports a large and flexible V fully differential input
REF
range with V
ranging from 2.5V to 5.1V, making it
REF
ideal for high performance applications which require a
wide dynamic range. The LTC2379-18 achieves 2LSB
INL max, no missing codes at 18 bits and 101.2dB SNR.
011...111
BIPOLAR
011...110
ZERO
000...001
000...000
111...111
111...110
Fast 1.6Msps throughput with no cycle latency makes
the LTC2379-18 ideally suited for a wide variety of high
speed applications. An internal oscillator sets the con-
version time, easing external timing considerations. The
LTC2379-18 dissipates only 18mW at 1.6Msps, while an
auto power-down feature is provided to further reduce
power dissipation during inactive periods.
100...001
FSR = +FS – –FS
1LSB = FSR/262144
100...000
–1 0V
LSB
INPUT VOLTAGE (V)
1
–FSR/2
FSR/2 – 1LSB
LSB
237918 F02
The LTC2379-18 features a unique digital gain compres-
sion(DGC)function,whicheliminatesthedriveramplifier’s
negative supply while preserving the full resolution of the
ADC. When enabled, the ADC performs a digital scaling
Figure 2. ꢀTC2379-18 Transfer Function
ANAꢀOG INPUT
function that maps zero-scale code from 0V to 0.1 • V
The analog inputs of the LTC2379-18 are fully differential
in order to maximize the signal swing that can be digitized.
Theanaloginputscanbemodeledbytheequivalentcircuit
shown in Figure 3. The diodes at the input provide ESD
protection. In the acquisition phase, each input sees ap-
REF
and full-scale code from V
to 0.9 • V . For a typical
REF
REF
reference voltage of 5V, the full-scale input range is now
0.5V to 4.5V, which provides adequate headroom for
powering the driving amplifier from a single 5.5V supply.
proximately 45pF (C ) from the sampling CDAC in series
IN
with 40Ω (R ) from the on-resistance of the sampling
ON
CONVERTER OPERATION
switch. Any unwanted signal that is common to both
inputs will be reduced by the common mode rejection of
the ADC. The inputs draw a current spike while charging
The LTC2379-18 operates in two phases. During the ac-
quisition phase, the charge redistribution capacitor D/A
+
–
the C capacitors during acquisition. During conversion,
the analog inputs draw only a small leakage current.
converter (CDAC) is connected to the IN and IN pins to
sample the differential analog input voltage. A rising edge
ontheCNVpininitiatesaconversion.Duringtheconversion
phase, the 18-bit CDAC is sequenced through a succes-
sive approximation algorithm, effectively comparing the
sampled input with binary-weighted fractions of the refer-
IN
REF
C
45pF
IN
R
40Ω
ON
+
IN
IN
ence voltage (e.g. V /2, V /4 … V /262144) using
REF
REF
REF
BIAS
VOLTAGE
the differential comparator. At the end of conversion, the
CDAC output approximates the sampled analog input. The
ADC control logic then prepares the 18-bit digital output
code for serial transfer.
REF
C
45pF
IN
R
40Ω
ON
–
237918 F03
Figure 3. The Equivalent Circuit for the
Differential Analog Input of the ꢀTC2379-18
237918fb
10
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
INPUT DRIVE CIRCUITS
Highqualitycapacitorsandresistorsshouldbeusedinthe
RCfilterssincethesecomponentscanadddistortion.NPO
and silver mica type dielectric capacitors have excellent
linearity. Carbon surface mount resistors can generate
distortion from self heating and from damage that may
occurduringsoldering.Metalfilmsurfacemountresistors
are much less susceptible to both problems.
A low impedance source can directly drive the high im-
pedance inputs of the LTC2379-18 without gain error. A
high impedance source should be buffered to minimize
settling time during acquisition and to optimize the dis-
tortion performance of the ADC. Minimizing settling time
is important even for DC inputs, because the ADC inputs
draw a current spike when entering acquisition.
Single-Ended-to-Differential Conversion
For best performance, a buffer amplifier should be used
to drive the analog inputs of the LTC2379-18. The ampli-
fier provides low output impedance, which produces fast
settling of the analog signal during the acquisition phase.
It also provides isolation between the signal source and
the current spike the ADC inputs draw.
Forsingle-endedinputsignals,asingle-endedtodifferential
conversion circuit must be used to produce a differential
signal at the inputs of the LTC2379-18. The LT6350 ADC
driver is recommended for performing single-ended-to-
differential conversions. The LT6350 is flexible and may
be configured to convert single-ended signals of various
amplitudes to the 5V differential input range of the
LTC2379-18. The LT6350 is also available in H-grade to
complement the extended temperature operation of the
LTC2379-18 up to 125°C.
Input Filtering
The noise and distortion of the buffer amplifier and signal
sourcemustbeconsideredsincetheyaddtotheADCnoise
and distortion. Noisy input signals should be filtered prior
to the buffer amplifier input with an appropriate filter to
minimizenoise.Thesimple1-poleRClowpassfilter(LPF1)
shown in Figure 4 is sufficient for many applications.
Figure 5a shows the LT6350 being used to convert a 0V
to 5V single-ended input signal. In this case, the first
amplifierisconfiguredasaunitygainbufferandthesingle-
ended input signal directly drives the high-impedance
input of the amplifier. As shown in the FFT of Figure 5b,
the LT6350 drives the LTC2379-18 to near full datasheet
performance.
LPF2
3300pF
SINGLE-ENDED-
20Ω
LPF1
INPUT SIGNAL
+
–
IN
500Ω
3300pF
The LT6350 can also be used to buffer and convert large
true bipolar signals which swing below ground to the 5V
differential input range of the LTC2379-18 in order to
maximize the signal swing that can be digitized. Figure 6a
shows the LT6350 being used to convert a 10V true bi-
polar signal for use by the LTC2379-18. In this case, the
first amplifier in the LT6350 is configured as an inverting
amplifier stage, which acts to attenuate and level shift the
inputsignaltothe0Vto5VinputrangeoftheLTC2379-18.
In the inverting amplifier configuration, the single-ended
input signal source no longer directly drives a high imped-
ance input of the first amplifier. The input impedance is
LTC2379-18
6600pF
IN
20Ω
237918 F04
SINGLE-ENDED- 3300pF
TO-DIFFERENTIAL
DRIVER
BW = 48kHz
BW = 800kHz
Figure 4. Input Signal Chain
Another filter network consisting of LPF2 should be used
between the buffer and ADC input to both minimize the
noisecontributionofthebufferandtohelpminimizedistur-
bances reflected into the buffer from sampling transients.
Long RC time constants at the analog inputs will slow
down the settling of the analog inputs. Therefore, LPF2
requires a wider bandwidth than LPF1. A buffer amplifier
with a low noise density must be selected to minimize
degradation of the SNR.
instead set by resistor R . R must be chosen carefully
IN IN
based on the source impedance of the signal source.
Higher values of R tend to degrade both the noise and
IN
distortion of the LT6350 and LTC2379-18 as a system.
237918fb
11
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
V
CM
LT6350
5V
0V
OUT1
4
5V
0V
R2 = 499Ω
R
R
INT
INT
200pF
8
1
+
–
LT6350
5V
0V
OUT1
OUT2
4
5
5V
0V
–
+
R
INT
R
INT
8
+
–
OUT2
5
10µF
R4 = 402Ω
R3 = 2k
2
5V
0V
–
+
+
–
V
= V /2
REF
CM
1
2
237918 F05a
10V
0V
–10V
R
= 2k
R1 = 499Ω
IN
+
–
V
= V /2
REF
CM
Figure 5a. ꢀT6350 Converting a 0V-5V Single-Ended
Signal to a 5V Differential Input Signal
220pF
237918 F06a
Figure 6a. ꢀT6350 Converting a 10V Single-Ended Signal
to a 5V Differential Input Signal
0
SNR = 101dB
–20
–40
THD = –111.5dB
SINAD = 100.8dB
SFDR = 114.5dB
0
SNR = 100.8dB
–20
–40
THD = –99.3dB
SINAD = 97.8dB
SFDR = 101.2dB
–60
–80
–60
–100
–120
–140
–160
–180
–80
–100
–120
–140
–160
–180
0
100 200 300 400 500 600 700 800
FREQUENCY (kHz)
237918 F05b
0
100 200 300 400 500 600 700 800
Figure 5b. 32k Point FFT Plot with fIN = 2kHz
for Circuit Shown in Figure 5a
FREQUENCY (kHz)
237918 F06b
Figure 6b. 32k Point FFT Plot with fIN = 2kHz
for Circuit Shown in Figure 6a
R1, R2, R3 and R4 must be selected in relation to R to
IN
achievethedesiredattenuationandtomaintainabalanced
input impedance in the first amplifier. Table 1 shows the
5V
LT6203
5V
0V
3
2
+
–
resulting SNR and THD for several values of R , R1, R2,
IN
1
7
0V
R3 and R4 in this configuration. Figure 6b shows the re-
sulting FFT when using the LT6350 as shown in Figure 6a.
5V
0V
5V
0V
5
6
+
–
Table 1. SNR, THD vs RIN for 10V Single-Ended Input Signal.
R
R1
ꢂΩx
R2
ꢂΩx
R3
ꢂΩx
R4
ꢂΩx
SNR
ꢂdꢁx
THD
ꢂdꢁx
IN
ꢂΩx
237918 F07
2k
499
499
2k
402
2k
100.8
100.5
94.8
–99
–94
–96
Figure 7. ꢀT6203 ꢁuffering a Fully Differential Signal Source
10k
100k
2.49k
24.9k
2.49k
24.9k
10k
100k
20k
Digital Gain Compression
The LTC2379-18 offers a digital gain compression (DGC)
feature which defines the full-scale input swing to be be-
Fully Differential Inputs
tween 10% and 90% of the V analog input range. To
REF
To achieve the full distortion performance of the
LTC2379-18,alowdistortionfullydifferentialsignalsource
driven through the LT6203 configured as two unity gain
buffers as shown in Figure 7 can be used to get the full
data sheet THD specification of –120dB.
enable digital gain compression, bring the REF/DGC pin
low. This feature allows the LT6350 to be powered off of
a single +5.5V supply since each input swings between
0.5V and 4.5V as shown in Figure 8. Needing only one
237918fb
12
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
5V
many applications. With its small size, low power and
highaccuracy,theLTC6655-5isparticularlywellsuitedfor
use with the LTC2379-18. The LTC6655-5 offers 0.025%
(max) initial accuracy and 2ppm/°C (max) temperature
coefficientforhighprecisionapplications.TheLTC6655-5
is fully specified over the H-grade temperature range and
complements the extended temperature operation of the
LTC2379-18 up to 125°C. We recommend bypassing the
LTC6655-5 with a 47µF ceramic capacitor (X5R, 0805
size) close to the REF pin.
4.5V
0.5V
0V
237918 F08
Figure 8. Input Swing of the ꢀTC2379 with Gain
Compression Enabled
positive supply to power the LT6350 results in additional
power savings for the entire system.
TheREFpinoftheLTC2379-18drawscharge(Q
)from
CONV
Figure 9a shows how to configure the LT6350 to accept a
10V true bipolar input signal and attenuate and level shift
the signal to the reduced input range of the LTC2379-18
when digital gain compression is enabled. Figure 9b
shows an FFT plot with the LTC2379-18 being driven by
the LT6350 with digital gain compression enabled.
the 47µF bypass capacitor during each conversion cycle.
The reference replenishes this charge with a DC current,
I
I
= Q
/t . The DC current draw of the REF pin,
REF
REF
CONV CYC
, depends on the sampling rate and output code. If
the LTC2379-18 is used to continuously sample a signal
at a constant rate, the LTC6655-5 will keep the deviation
of the reference voltage over the entire code span to less
than 0.5LSBs.
ADC REFERENCE
The LTC2379-18 requires an external reference to define
its input range. A low noise, low temperature drift refer-
ence is critical to achieving the full datasheet performance
of the ADC. Linear Technology offers a portfolio of high
performance references designed to meet the needs of
When idling, the REF pin on the LTC2379-18 draws only
a small leakage current (< 1µA). In applications where a
burst of samples is taken after idling for long periods as
shown in Figure 10, I quickly goes from approximately
REF
5.5V
V
V
V
LTC6655-5
IN
0
–20
OUT_F
OUT_S
SNR = 99dB
5V
THD = –95dB
SINAD = 94.6dB
SFDR = 96.3dB
1k
–40
47µF
V
CM
–60
4.5V
0.5V
2.5V
1k
10µF
3
+
–80
V
3300pF
LT6350
OUT1
OUT2
6.04k
4.32k
REF
V
4
DD
LTC2379-18
REF/DGC
–100
–120
–140
–160
–180
+
–
20Ω
IN
IN
R
R
INT
8
+
–
INT
10µF
R
3300pF
20Ω
–
+
5
6
1
4.5V
2
–
237918 F09a
V
3300pF
10V
0V
–10V
= 15k
3.01k
IN
0
100 200 300 400 500 600 700 800
0.5V
V
CM
FREQUENCY (kHz)
237918 F09b
Figure 9a. ꢀT6350 Configured to Accept a 10V Input Signal While Running Off of a
Single 5.5V Supply When Digital Gain Compression Is Enabled in the ꢀTC2379-18
Figure 9b. 32k Point FFT Plot
with fIN = 2kHz for Circuit Shown
in Figure 9a
CNV
IDLE
PERIOD
IDLE
PERIOD
237918 F10
Figure 10. CNV Waveform Showing ꢁurst Sampling
237918fb
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For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
0µA to a maximum of 1.3mA at 1.6Msps. This step in DC
currentdrawtriggersatransientresponseinthereference
that must be considered since any deviation in the refer-
ence output voltage will affect the accuracy of the output
code. In applications where the transient response of the
reference is important, the fast settling LTC6655-5 refer-
ence is also recommended.
Signal-to-Noise Ratio ꢂSNRx
The signal-to-noise ratio (SNR) is the ratio between the
RMS amplitude of the fundamental input frequency and
the RMS amplitude of all other frequency components
except the first five harmonics and DC. Figure 11 shows
that the LTC2379-18 achieves a typical SNR of 101.2dB
at a 1.6MHz sampling rate with a 2kHz input.
DYNAMIC PERFORMANCE
Total Harmonic Distortion ꢂTHDx
Fast Fourier Transform (FFT) techniques are used to test
the ADC’s frequency response, distortion and noise at the
rated throughput. By applying a low distortion sine wave
and analyzing the digital output using an FFT algorithm,
the ADC’s spectral content can be examined for frequen-
cies outside the fundamental. The LTC2379-18 provides
guaranteed tested limits for both AC distortion and noise
measurements.
TotalHarmonicDistortion(THD)istheratiooftheRMSsum
ofallharmonicsoftheinputsignaltothefundamentalitself.
The out-of-band harmonics alias into the frequency band
between DC and half the sampling frequency (f
THD is expressed as:
/2).
SMPL
V22 + V32 + V42 +…+ VN2
THD=20log
V1
Signal-to-Noise and Distortion Ratio ꢂSINADx
where V1 is the RMS amplitude of the fundamental fre-
quencyandV2throughV aretheamplitudesofthesecond
N
The signal-to-noise and distortion ratio (SINAD) is the
ratiobetweentheRMSamplitudeofthefundamentalinput
frequency and the RMS amplitude of all other frequency
components at the A/D output. The output is band-limited
tofrequenciesfromaboveDCandbelowhalfthesampling
frequency. Figure11showsthattheLTC2379-18achieves
a typical SINAD of 101dB at a 1.6MHz sampling rate with
a 2kHz input.
through Nth harmonics.
POWER CONSIDERATIONS
The LTC2379-18 provides two power supply pins: the
2.5V power supply (V ), and the digital input/output
DD
interface power supply (OV ). The flexible OV supply
DD
DD
allows the LTC2379-18 to communicate with any digital
logic operating between 1.8V and 5V, including 2.5V and
3.3V systems.
0
SNR = 101.2dB
–20
–40
THD = –120dB
SINAD = 101.1dB
SFDR = 121dB
Power Supply Sequencing
–60
The LTC2379-18 does not have any specific power supply
sequencing requirements. Care should be taken to adhere
to the maximum voltage relationships described in the
Absolute Maximum Ratings section. The LTC2379-18
has a power-on-reset (POR) circuit that will reset the
LTC2379-18 at initial power-up or whenever the power
supply voltage drops below 1V. Once the supply voltage
re-enters the nominal supply voltage range, the POR will
–80
–100
–120
–140
–160
–180
0
100 200 300 400 500 600 700 800
FREQUENCY (kHz)
237918 F11
Figure 11. 32k Point FFT with fIN = 2kHz of the ꢀTC2379-18
237918fb
14
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
reinitialize the ADC. No conversions should be initiated
until 20µs after a POR event to ensure the reinitialization
period has ended. Any conversions initiated before this
time will produce invalid results.
LTC2379-18remainspowered-downforalargerfractionof
the conversion cycle (t ) at lower sample rates, thereby
CYC
reducing the average power dissipation which scales with
the sampling rate as shown in Figure 12.
TIMING AND CONTROꢀ
CNV Timing
DIGITAꢀ INTERFACE
The LTC2379-18 has a serial digital interface. The flexible
OV supplyallowstheLTC2379-18tocommunicatewith
DD
The LTC2379-18 conversion is controlled by CNV. A ris-
ing edge on CNV will start a conversion and power up
the LTC2379-18. Once a conversion has been initiated,
it cannot be restarted until the conversion is complete.
For optimum performance, CNV should be driven by a
clean low jitter signal. Converter status is indicated by the
BUSY output which remains high while the conversion is
in progress. To ensure that no errors occur in the digitized
results, any additional transitions on CNV should occur
within 40ns from the start of the conversion or after the
conversion has been completed. Once the conversion has
completed, the LTC2379-18 powers down and begins
acquiring the input signal.
any digital logic operating between 1.8V and 5V, including
2.5V and 3.3V systems.
The serial output data is clocked out on the SDO pin when
anexternalclockisappliedtotheSCKpinifSDOisenabled.
Clocking out the data after the conversion will yield the
best performance. With a shift clock frequency of at least
100MHz,a1.6Mspsthroughputisstillachieved.Theserial
output data changes state on the rising edge of SCK and
can be captured on the falling edge or next rising edge of
SCK. D17 remains valid till the first rising edge of SCK.
The serial interface on the LTC2379-18 is simple and
straightforwardtouse.Thefollowingsectionsdescribethe
operationoftheLTC2379-18. Severalmodesareprovided
depending on whether a single or multiple ADCs share the
SPI bus or are daisy chained.
Internal Conversion Clock
The LTC2379-18 has an internal clock that is trimmed to
achieveamaximumconversiontimeof412ns.Withamin-
imum acquisition time of 200ns, throughput performance
of1.6Mspsisguaranteedwithoutanyexternaladjustments.
8
7
6
I
VDD
5
4
3
2
1
0
Auto Power-Down
The LTC2379-18 automatically powers down after a
conversion has been completed and powers up once a
new conversion is initiated on the rising edge of CNV.
During power down, data from the last conversion can
be clocked out. To minimize power dissipation during
power down, disable SDO and turn off SCK. The auto
power-down feature will reduce the power dissipation of
the LTC2379-18 as the sampling frequency is reduced.
Since power is consumed only during a conversion, the
I
REF
I
OVDD
0
200 400 600 800 1000 1200 1400 1600
SAMPLING RATE (kHz)
237918 F12
Figure 12. Power Supply Current of the ꢀTC2379-18
Versus Sampling Rate
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15
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
Normal Mode, Single Device
Figure 13 shows a single LTC2379-18 operated in normal
mode with CHAIN and RDL/SDI tied to ground. With RDL/
SDI grounded, SDO is enabled and the MSB(D17) of the
new conversion data is available at the falling edge of
BUSY.ThisisthesimplestwaytooperatetheLTC2379-18.
When CHAIN = 0, the LTC2379-18 operates in normal
mode. In normal mode, RDL/SDI enables or disables the
serial data output pin SDO. If RDL/SDI is high, SDO is in
high impedance. If RDL/SDI is low, SDO is driven.
CONVERT
DIGITAL HOST
IRQ
CNV
CHAIN
BUSY
LTC2379-18
SCK
RDL/SDI
SDO
DATA IN
CLK
238018 F13a
POWER-DOWN
AND ACQUIRE
CONVERT
POWER-DOWN AND ACQUIRE
CONVERT
CHAIN = 0
RDL/SDI = 0
t
CYC
t
CNVH
t
CNVL
CNV
t
= t
– t
– t
ACQ CYC CONV BUSYLH
t
t
CONV
ACQ
BUSY
t
SCK
t
BUSYLH
t
t
QUIET
SCKH
1
2
3
16
17
18
SCK
SDO
t
t
SCKL
HSDO
t
t
DSDO
DSDOBUSYL
D17
D16
D15
D1
D0
237918 F13
Figure 13. Using a Single ꢀTC2379-18 in Normal Mode
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For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
Normal Mode, Multiple Devices
Since SDO is shared, the RDL/SDI input of each ADC must
be used to allow only one LTC2379-18 to drive SDO at a
timeinordertoavoidbusconflicts. AsshowninFigure14,
the RDL/SDI inputs idle high and are individually brought
low to read data out of each device between conversions.
When RDL/SDI is brought low, the MSB of the selected
device is output onto SDO.
Figure 14 shows multiple LTC2379-18 devices operating
in normal mode (CHAIN = 0) sharing CNV, SCK and SDO.
By sharing CNV, SCK and SDO, the number of required
signals to operate multiple ADCs in parallel is reduced.
RDL
RDL
B
A
CONVERT
CNV
CNV
CHAIN
BUSY
SDO
IRQ
CHAIN
LTC2379-18
B
LTC2379-18
A
DIGITAL HOST
SDO
RDL/SDI
RDL/SDI
SCK
SCK
DATA IN
CLK
237918 F15
POWER-DOWN
AND ACQUIRE
CONVERT
CONVERT
POWER-DOWN AND ACQUIRE
CHAIN = 0
t
CNVL
CNV
t
CONV
BUSY
t
BUSYLH
RDL/SDI
A
B
RDL/SDI
t
SCK
t
t
QUIET
SCKH
19
SCK
SDO
1
2
3
16
17
18
20
21
34
35
36
t
t
SCKL
HSDO
t
t
DSDO
DIS
t
EN
Hi-Z
Hi-Z
Hi-Z
D17
A
D16
D15
D1
A
D0
D17
D16
D15
D1
B
D0
B
A
A
A
B
B
B
237918 F14
Figure 14. Normal Mode With Multiple Devices Sharing CNV, SCK and SDO
237918fb
17
For more information www.linear.com/LTC2379-18
LTC2379-18
APPLICATIONS INFORMATION
Chain Mode, Multiple Devices
This is useful for applications where hardware constraints
may limit the numberoflines needed to interface toa large
number of converters. Figure 15 shows an example with
two daisy-chained devices. The MSB of converter A will
appear at SDO of converter B after 18 SCK cycles. The
MSB of converter A is clocked in at the SDI/RDL pin of
converter B on the rising edge of the first SCK.
When CHAIN = OV , the LTC2379-18 operates in chain
DD
mode.Inchainmode,SDOisalwaysenabledandRDL/SDI
serves as the serial data input pin (SDI) where daisy-chain
data output from another ADC can be input.
CONVERT
OV
OV
DD
DD
CNV
CNV
CHAIN
CHAIN
DIGITAL HOST
LTC2379-18
LTC2379-18
RDL/SDI
SDO
RDL/SDI
BUSY
SDO
IRQ
A
B
DATA IN
SCK
SCK
CLK
237918 F15a
POWER-DOWN
AND ACQUIRE
CONVERT
POWER-DOWN AND ACQUIRE
CONVERT
CHAIN = OV
DD
RDL/SDI = 0
A
t
CYC
t
CNVL
CNV
BUSY
t
CONV
t
BUSYLH
SCK
t
SCKCH
t
t
QUIET
SCKH
1
2
3
16
17
18
19
20
34
35
36
t
SCKL
t
t
HSDO
SSDISCK
t
t
DSDO
HSDISCK
SDO = RDL/SDI
A
B
D17
D16
D16
D15
D1
D0
D0
A
A
A
A
A
t
DSDOBUSYL
D17
D15
D1
B
D17
D16
D1
A
D0
A
SDO
B
B
B
B
A
A
B
237918 F15
Figure 15. Chain Mode Timing Diagram
237918fb
18
For more information www.linear.com/LTC2379-18
LTC2379-18
BOARD LAYOUT
To obtain the best performance from the LTC2379-18
a printed circuit board is recommended. Layout for the
printed circuit board (PCB) should ensure the digital and
analog signal lines are separated as much as possible. In
particular,careshouldbetakennottorunanydigitalclocks
orsignalsalongsideanalogsignalsorunderneaththeADC.
Recommended ꢀayout
ThefollowingisanexampleofarecommendedPCBlayout.
A single solid ground plane is used. Bypass capacitors to
the supplies are placed as close as possible to the supply
pins. Low impedance common returns for these bypass
capacitors are essential to the low noise operation of the
ADC. The analog input traces are screened by ground.
For more details and information refer to DC1783A, the
evaluation kit for the LTC2379-18.
Partial Top Silkscreen
237918fb
19
For more information www.linear.com/LTC2379-18
LTC2379-18
BOARD LAYOUT
Partial ꢀayer 1 Component Side
Partial ꢀayer 2 Ground Plane
237918fb
20
For more information www.linear.com/LTC2379-18
LTC2379-18
BOARD LAYOUT
Partial ꢀayer 3 PWR Plane
Partial ꢀayer 4 ꢁottom ꢀayer
237918fb
21
For more information www.linear.com/LTC2379-18
LTC2379-18
BOARD LAYOUT
Partial Schematic of Demoboard
D G C R E F /
R E F
8
7
1 5
2
1
G N D
D D
D D
V
G N D 1 6
O V
G N D
1 0
G N D
6
3
3
2
1
3
2
1
237918fb
22
For more information www.linear.com/LTC2379-18
LTC2379-18
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/ꢀTC2379-18#packaging for the most recent package drawings.
DE Package
16-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-ꢀ732 Rev Ø)
0.70 0.05
3.30 0.05
ꢀ.70 0.05
3.60 0.05
2.20 0.05
PACKAGE
OUTLINE
0.25 0.05
0.45 BSC
3.ꢀ5 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.ꢀꢀ5
TYP
0.40 0.ꢀ0
4.00 0.ꢀ0
(2 SIDES)
9
ꢀ6
R = 0.05
TYP
3.30 0.ꢀ0
3.00 0.ꢀ0
(2 SIDES)
ꢀ.70 0.ꢀ0
PIN ꢀ NOTCH
R = 0.20 OR
0.35 × 45°
PIN ꢀ
TOP MARK
(SEE NOTE 6)
CHAMFER
(DEꢀ6) DFN 0806 REV Ø
8
ꢀ
0.23 0.05
0.45 BSC
0.75 0.05
0.200 REF
3.ꢀ5 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
ꢀ. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
237918fb
23
For more information www.linear.com/LTC2379-18
LTC2379-18
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/ꢀTC2379-18#packaging for the most recent package drawings.
MS Package
16-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1669 Rev A)
0.889 ±0.127
(.035 ±.005)
5.10
3.20 – 3.45
(.201)
(.126 – .136)
MIN
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.50
(.0197)
BSC
0.305 ±0.038
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
REF
16151413121110
9
RECOMMENDED SOLDER PAD LAYOUT
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
DETAIL “A”
0.254
4.90 ±0.152
(.193 ±.006)
(.010)
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS16) 0213 REV A
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
237918fb
24
For more information www.linear.com/LTC2379-18
LTC2379-18
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMꢁER
A
09/11
2
3, 4
5
Updated θ in DE Pin Configuration.
Updated specifications in Electrical Characteristics Dynamic Accuracy and Power Requirements sections.
JA
Updated Note 4.
7, 15
18
Replaced Graphs G13 and Figure 12.
Updated Figure 15.
26
Updated Related Parts.
B
09/16 Updated graphs G01, G02 and G03.
6
237918fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LTC2379-18
TYPICAL APPLICATION
ꢀT6350 Configured to Accept a 10V Input Signal While Running Off of a Single 5.5V Supply When
Digital Gain Compression Is Enabled in the ꢀTC2379-18
5.5V
V
V
V
LTC6655-5
IN
OUT_F
OUT_S
5V
1k
1k
47µF
V
CM
4.5V
2.5V
10µF
3
+
V
3300pF
LT6350
OUT1
OUT2
0.5V
6.04k
4.32k
REF
V
DD
4
+
–
20Ω
IN
IN
R
INT
R
INT
8
+
–
LTC2379-18
REF/DGC
10µF
R
3300pF
20Ω
–
+
5
6
1
4.5V
2
–
237918 TA03
V
3300pF
10V
0V
= 15k
3.01k
IN
0.5V
V
CM
–10V
RELATED PARTS
PART NUMꢁER
DESCRIPTION
COMMENTS
ADCs
LTC2378-18/LTC2377-
18/LTC2376-18
18-Bit, 1Msps/500ksps/250ksps Serial, Low Power ADC 2.5V Supply, Differential Input, 102dB SNR, 5V Input Range, DGC,
MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2380-16/LTC2378-
16/LTC2377-16/
LTC2376-16
16-Bit, 2Msps/1Msps/500ksps/250ksps Serial, Low
Power ADC
2.5V Supply, Differential Input, 96.2dB/97dB SNR, 5V Input Range,
DGC, MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2383-16/LTC2382-
16/LTC2381-16
16-Bit, 1Msps/500ksps/250ksps Serial, Low Power ADC 2.5V Supply, Differential Input, 92dB SNR, 2.5V Input Range, Pin
Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages
LTC2393-16/LTC2392-
16/LTC2391-16
16-Bit, 1Msps/500ksps/250ksps Parallel/Serial ADC
5V Supply, Differential Input, 94dB SNR, 4.096V Input Range, Pin
Compatible Family in 7mm × 7mm LQFP-48 and QFN-48 Packages
LTC2355-14/LTC2356-14 14-Bit, 3.5Msps Serial ADC
3.3V Supply, 1-Channel, Unipolar/Bipolar, 18mW, MSOP-10 Package
DACS
LTC2757
18-Bit, Single Parallel I
SoftSpan™ DAC
1LSB INL/DNL, Software-Selectable Ranges, 7mm × 7mm LQFP-
48 Package
OUT
LTC2641
16-Bit/14-Bit/12-Bit Single Serial V
DACs
1LSB INL/DNL, MSOP-8 Package, 0V to 5V Output
OUT
LTC2630
12-Bit/10-Bit/8-Bit Single V
DACs
SC70 6-Pin Package, Internal Reference, 1LSB INL (12 Bits)
OUT
REFERENCES
LTC6655
Precision Low Drift Low Noise Buffered Reference
Precision Low Drift Low Noise Buffered Reference
5V/2.5V, 5ppm/°C, 0.25ppm Peak-to-Peak Noise, MSOP-8 Package
5V/2.5V, 5ppm/°C, 2.1ppm Peak-to-Peak Noise, MSOP-8 Package
LTC6652
AMPꢀIFIERS
LT6350
Low Noise Single-Ended-to-Differential ADC Driver
Rail-to-Rail Input and Outputs, 240ns, 0.01% Settling Time
LT6200/LT6200-5/
LT6200-10
165MHz/800MHz/1.6GHz Op Amp with
Unity Gain/AV = 5/AV = 10
Low Noise Voltage: 0.95nV/√Hz (100kHz), Low Distortion: –80dB at
1MHz, TSOT23-6 Package
LT6202/LT6203
Single/Dual 100MHz Rail-to-Rail Input/Output Noise Low 1.9nV√Hz, 3mA Maximum, 100MHz Gain Bandwidth
Power Amplifiers
LTC1992
Low Power, Fully Differential Input/Output Amplifier/
Driver Family
1mA Supply Current
237918fb
LT 0916 REV B • PRINTED IN USA
26 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC2379-18
●
●
LINEAR TECHNOLOGY CORPORATION 2011
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