LTC1598CG [Linear]
8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converter; 8通道，微功耗采样12位串行I / OA / D转换器
| 型号： | LTC1598CG |
| 厂家： | 
Linear |
| 描述： | 8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converter |
| 文件： | 总12页 (文件大小：138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Fina l Ele c tric a l Sp e c ific a tio ns
LTC1598
8-Cha nne l, Mic ro p o we r
Sa m p ling 12-Bit Se ria l
I/ O A/ D Co nve rte r
Aug ust 1996
U
FEATURES
DESCRIPTION
12-Bit Resolution
Auto Shutdown to 1nA
Low Supply Current: 320µA Typ
Guaranteed ±3/4LSB Max DNL
Single Supply 5V Operation
8-Channel Multiplexer
Separate MUX Output and ADC Input Pins
MUX and ADC May Be Controlled Separately
The LTC®1598 is an 8-channel, 5V micropower, 12-bit
sampling A/D converter. It typically draws only 320µA
of supply current when converting and automatically
powers down to typically 1nA between conversions. The
LTC1598 is available in a 24-pin SSOP package and
operates on a 5V supply. The 12-bit, switched-capacitor,
successive approximation ADC includes an 8-channel
MUX and a sample-and-hold.
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■
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Sampling Rate: 16.8ksps
I/O Compatible with SPI, MICROWIRE , etc.
24-Pin SSOP Package
On-chip serial ports allow efficient data transfer to a wide
rangeofmicroprocessors andmicrocontrollers overthree
or four wires. This, coupled with micropower consump-
tion, makes remote location possible and facilitates trans-
mitting data through isolation barriers.
TM
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U
APPLICATIONS
■
Pen Screen Digitizing
Battery-Operated Systems
Remote Data Acquisition
Isolated Data Acquisition
Battery Monitoring
Temperature Measurement
The circuit can be used in ratiometric applications or with
an external reference. The high impedance analog inputs
and the ability to operate with reduced spans (to 1.5V full
scale) allow direct connection to sensors and transducers
in many applications, eliminating the need for gain stages.
■
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, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
U
TYPICAL APPLICATION
Supply Current vs Sample Rate
24µW, 8-Channel, 12-Bit ADC Samples at 200Hz and Runs Off a 5V Supply
1000
100
10
OPTIONAL
ADC FILTER
T
= 25°C
= 5V
= 5V
A
V
CC
5V
V
1k
REF
CLK
1µF
f
= 320kHz
18
17
16
V
15, 19
1µF
V
MUXOUT
ADCIN
REF
CC
20 CH0
21 CH1
22 CH2
23 CH3
24 CH4
SERIAL DATA LINK
MICROWIRE AND
SPI COMPATABLE
10
6
CS ADC
CS MUX
CLK
ANALOG
INPUTS
0V TO 5V
RANGE
5, 14
7
12-BIT
SAMPLING
ADC
8-CHANNEL
MUX
+
MPU
D
IN
1
2
3
CH5
CH6
CH7
11
D
OUT
–
1
0.1
1
10
100
12
13
SAMPLE FREQUENCY (kHz)
NC
NC
1598 TA02
8
COM
GND
4, 9
LTC1598 • TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofits circuits as describedhereinwillnotinfringeonexistingpatentrights.
1
LTC1598
ABSOLUTE MAXIMUM RATINGS
W W
U W
U
W U
PACKAGE/ORDER INFORMATION
(Notes 1, 2)
TOP VIEW
ORDER PART
NUMBER
Supply Voltage (V ) to GND................................... 12V
CC
1
2
CH4
CH3
CH2
CH1
CH0
24
23
22
21
20
19
18
17
16
15
14
13
CH5
CH6
Voltage
Analog Reference .................... –0.3V to (V + 0.3V)
CC
LTC1598CG
LTC1598IG
3
CH7
Analog Inputs .......................... –0.3V to (V + 0.3V)
CC
4
GND
Digital Inputs .........................................–0.3V to 12V
5
CLK
Digital Output .......................... –0.3V to (V + 0.3V)
CC
6
V
CC
CS MUX
Power Dissipation.............................................. 500mW
Operating Temperature Range
LTC1598CG ............................................. 0°C to 70°C
LTC1598IG ........................................ –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
7
MUX OUT
ADC IN
D
IN
8
COM
GND
9
V
REF
10
11
12
V
CC
CS ADC
CLK
NC
D
OUT
NC
G PACKAGE
24-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 110°C/ W
Consult factory for Military grade parts.
W W U
U
U
U
RECOM ENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
4.5
(Note 4)
60
TYP
MAX
5.5
UNITS
V
Supply Voltage (Note 3)
Clock Frequency
Total Cycle Time
V
kHz
µs
CC
f
V
= 5V
320
CLK
CC
t
t
t
t
t
t
t
t
f
= 320kHz
V = 5V
CC
CYC
CLK
Hold Time, D After CLK↑
150
1
ns
hDI
IN
Setup Time CS↓ Before First CLK↑ (See Operating Sequence)
V
CC
= 5V
µs
suCS
Setup Time, D Stable Before CLK↑
V = 5V
CC
400
1
ns
suDI
IN
CLK High Time
V
CC
= 5V
µs
WHCLK
WLCLK
WHCS
WLCS
CLK Low Time
V
CC
= 5V
1
µs
CS High Time Between Data Transfer Cycles
CS Low Time During Data Transfer
f
= 320kHz
= 320kHz
16
µs
CLK
f
44
µs
CLK
U
U W
(Note 5)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
LTC1598CG
LTC1598IG
TYP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
V
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
●
●
●
●
●
12
12
(Note 6)
±3
± 3/4
±3
±3
±1
±3
±8
Gain Error
±8
REF Input Range
(Notes 7, 8)
(Notes 7, 8)
1.5V to V + 0.05V
CC
Analog Input Range
–0.05V to V + 0.05V
V
CC
MUX Channel Input Leakage Current Channel On or Off (Note 9)
●
●
●
±200
±200
±1
±200
±200
±1
nA
MUX OUT Leakage Current
All Channels Off
nA
ADC IN Input Leakage Current
µA
2
LTC1598
U W
DYNAMIC ACCURACY
(Note 5) fSMPL = 16.8kHz
SYMBOL
S/(N + D)
THD
PARAMETER
CONDITIONS
MIN
TYP
71
MAX
UNITS
dB
Signal-to-Noise Plus Distortion Ratio
Total Harmonic Distortion (Up to 5th Harmonic)
Spurious-Free Dynamic Range
1kHz Input Signal
1kHz Input Signal
1kHz Input Signal
1kHz Input Signal
–78
80
dB
SFDR
dB
Peak Harmonic or Spurious Noise
–80
dB
U
(Note 5)
DIGITAL AND DC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
IH
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Voltage
V
= 5.25V
= 4.75V
CC
●
●
●
●
2.6
CC
V
IL
V
0.8
2.5
V
I
IH
V
IN
= V
CC
µA
µA
I
IL
V
IN
= 0V
–2.5
V
OH
V
CC
= 4.75V, I = 10µA
●
●
4.0
2.4
4.64
4.62
V
V
O
V
CC
= 4.75V, I = 360µA
O
V
Low Level Output Voltage
Hi-Z Output Leakage
V
= 4.75V, I = 1.6mA
●
●
0.4
V
µA
OL
CC
O
I
OZ
CS = High
= 0V
±3
I
Output Source Current
Output Sink Current
V
–25
45
mA
mA
SOURCE
OUT
I
V
= V
SINK
OUT CC
R
REF
Reference Input Resistance
CS = V
5000
55
MΩ
kΩ
IH
CS = V
IL
I
Reference Current
Supply Current
CS = V
●
0.001
90
90
2.5
µA
µA
µA
REF
CC
t
t
≥ 760µs, f ≤ 25kHz
CLK
≥ 60µs, f ≤ 320kHz
CYC
CYC
●
●
140
CLK
I
CC
CS = V , CLK = V , D = V
CC
0.001
320
320
±5
µA
µA
µA
CC
CC IN
t
t
≥ 760µs, f ≤ 25kHz
CLK
≥ 60µs, f ≤ 320kHz
CYC
CYC
●
640
CLK
(Note 5)
AC CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
CLK Cycles
kHz
t
Analog Input Sample Time
Maximum Sampling Frequency
See Operating Sequence 1
See Operating Sequence 1
1.5
SMPL
f
●
16.8
SMPL(MAX)
t
t
t
t
t
t
t
t
t
t
Conversion Time
See Operating Sequence 1
See Test Circuits
12
250
135
75
CLK Cycles
CONV
dDO
dis
Delay Time, CLK↓ to D
Data Valid
●
●
●
600
300
200
ns
ns
ns
ns
ns
ns
ns
ns
ns
OUT
Delay Time, CS↑ to D
Hi-Z
See Test Circuits
OUT
Delay Time, CLK↓ to D
Enabled
See Test Circuits
en
OUT
Time Output Data Remains Valid After CLK↓
C
LOAD
= 100pF
230
50
hDO
f
D
OUT
Fall Time
See Test Circuits
●
●
●
●
●
150
150
700
300
D
OUT
Rise Time
See Test Circuits
50
r
Enable Turn-On Time
Enable Turn-Off Time
Break-Before-Make Interval
Input Capacitance
See Operating Sequence 1
See Operating Sequence 2
260
100
160
ON
OFF
OPEN
35
C
Analog Inputs On-Channel
Off-Channel
Digital Input
20
5
5
pF
pF
pF
IN
3
LTC1598
AC CHARACTERISTICS
The
●
denotes specifications which apply over the full operating
Note 6: Linearity error is specified between the actual end points of the
A/D transfer curve.
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
Note 7: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
of a device may be impaired.
below GND or one diode drop above V . This spec allows 50mV forward
CC
Note 2: All voltage values are with respect to GND.
bias of either diode for 4.5V ≤ V ≤ 5.5V. This means that as long as the
CC
Note 3: This device is specified at 5V. Consult factory for 3V
specified devices.
reference or analog input does not exceed the supply voltage by more than
50mV, the output code will be correct. To achieve an absolute 0V to 5V
input voltage range, it will therefore require a minimum supply voltage of
4.950V over initial tolerance, temperature variations and loading.
Note 4: Increased leakage currents at elevated temperatures cause the S/H
to droop, therefore it is recommended that f = 200kHz at 85°C,
CLK
f
≥ 120kHz at 70°C and f ≥ 1kHz at 25°C.
CLK
CLK
Note 8: Recommended operating condition.
Note 5: V = 5V, V = 5V and CLK = 320kHz unless otherwise specified.
CC
REF
Note 9: Channel leakage current is measured after the channel selection.
U
U
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PIN FUNCTIONS
CH5 (Pin 1): Analog Multiplexer Input.
CH6 (Pin 2): Analog Multiplexer Input.
CH7 (Pin 3): Analog Multiplexer Input.
DOUT (Pin 11): Digital Data Output. The A/D conversion
result is shifted out of this output.
NC (Pin 12): No Connection.
NC (Pin 13): No Connection.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
CLK (Pin 14): Shift Clock. This input should be tied to Pin 5.
CLK(Pin5):ShiftClock. This clocksynchronizes theserial
data transfer to both MUX and ADC. It also determines the
conversion speed of the ADC.
VCC (Pin 15): Power Supply Voltage. This pin provides
power to the A/D Converter. It must be bypassed directly
to the analog ground plane.
CS MUX (Pin 6): MUX Chip Select Input. A logic high on
VREF (Pin 16): Reference Input. The reference input de-
this input allows the MUX to receive a channel address. A fines the span of the ADC.
logic low enables the selected MUX channel and connects
ADC IN (Pin 17): ADC Input. This input is the positive
analog input to the ADC. Connect this pin to MUX OUT for
normal operation.
it to the MUX OUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CS ADC.
D (Pin 7): Digital Data Input. The multiplexer address is
shifted into this input.
IN
MUX OUT (Pin 18): MUX Output. This pin is the output of
the multiplexer. Tie to ADC IN for normal operation.
COM (Pin 8): Negative Analog Input. This input is the
negative analog input to the ADC and must be free of noise
with respect to GND.
V (Pin 19): Power Supply Voltage. This pin should be
tied to Pin 15.
CC
CH0 (Pin 20): Analog Multiplexer Input.
CH1 (Pin 21): Analog Multiplexer Input.
CH2 (Pin 22): Analog Multiplexer Input.
CH3 (Pin 23): Analog Multiplexer Input.
CH4 (Pin 24): Analog Multiplexer Input.
GND (Pin 9): Analog Ground. GND should be tied directly
to an analog ground plane.
CS ADC (Pin 10): ADC Chip Select Input. A logic high on
this input deselects and powers down the ADC and three-
states DOUT. A logic low on this input enables the ADC to
sample the selected channel and start the conversion. For
normal operation drive this pin in parallel with CS MUX.
4
LTC1598
TEST CIRCUITS
Load Circuit for tdDO, tr and tf
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
1.4V
V
OH
D
OUT
V
OL
3k
D
OUT
TEST POINT
t
t
1598 TC02
r
f
100pF
1598 TC01
Voltage Waveforms for ten
Voltage Waveforms for DOUT Delay Times, tdDO
LTC1598
CLK
CS ADC
CLK
V
IL
t
dDO
V
OH
1
2
D
OUT
V
OL
1598 TC03
B11
D
OUT
V
OL
t
en
1598 TC06
Voltage Waveforms for tdis
Load Circuit for tdis and ten
V
IH
CS
TEST POINT
D
OUT
V
t
WAVEFORM 2, t
90%
10%
CC dis
en
3k
WAVEFORM 1
(SEE NOTE 1)
D
OUT
t
t
WAVEFORM 1
dis
dis
100pF
D
OUT
WAVEFORM 2
(SEE NOTE 2)
1598 TC04
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
1598 TC05
5
LTC1598
U
W
U U
APPLICATIONS INFORMATION
INPUT DATA WORD
ANALOG CONSIDERATIONS
Grounding
The LTC1598 uses its Chip Select and D pins to select
IN
one of its eight channels as shown in the operating
sequence figures and Table 1. For this discussion we will
assumethatCSMUXandCSADCaretiedtogetherandwill
refer to them as simply, CS.
The LTC1598 should be used with an analog ground plane
and single-point grounding techniques. To achieve the
optimum performance use a printed circuit board. The
Ground pins (Pins 4 and 9) should be tied directly to the
ground plane with minimum lead length.
When CS is high, the input data on the D pin is latched
IN
into the 4-bit shift register on the rising edge of the clock.
The input data word consists of an “EN” bit and a string of
three bits for channel selection. If the “EN” bit is logic high
as illustrated in Operating Sequence 1, it enables the
selected channel. To ensure correct operation, the CS
mustbepulledlowbeforethenextrisingedgeoftheclock.
More than four input bits can be sent to the ADC without
problems. The channel will be determined by the last four
bits clocked in before CS falls.
Bypassing
For good performance, the LTC1598 VCC and VREF pins
must be free of noise and ripple. Any changes in the V
CC
and V
voltages with respect to ground during the
REF
conversion cycle can induce errors or noise in the output
code. Bypass the V and VREF pins directly to the analog
ground plane with minimum of 0.1µF capacitors and lead
lengths as short as possible.
CC
Once the CS is pulled low, all channels are simulta-
neously switched off to ensure a break-before-make
interval. After a delay of tON, the selected channel is
switched on, allowing signal transmission. The selected
channelremains on,untilthenextfallingedgeofCS.After
a delay of tOFF, it terminates the analog signal transmis-
sion and switches to the next selected channel. If the
“EN” bit is logic low, as illustrated in Operating Sequence
2, it disables all channels. Table 1 shows the various bit
combinations for channel selection.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1598 have
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem. But if
large source resistances are used, or if slow settling op
amps drive the inputs, take care to ensure the transients
caused by the current spikes settle completely before the
conversion begins.
Table 1. Logic Table for Channel Selection
CHANNEL STATUS
EN
0
D2
X
0
D1
X
0
DO
X
0
All Off
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
1
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
6
LTC1598
U
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APPLICATIONS INFORMATION
Operating Sequence 1
Example: (CH2, GND)
t
CYC
CS MUX = CS ADC = CS
t
suCS
CLK
EN
D1
D
IN
DON’T CARE
D0
D2
NULL
BIT
HI-Z
HI-Z
D
OUT
B3 B2 B1 B0
B11 B10 B9 B8 B7 B6 B5 B4
t
SMPL
t
CONV
CH0 TO
CH7
t
ON
ADC IN =
MUX OUT
COM = GND
1598 TD01
Operating Sequence 2
Example: (ALL Channels Off)
t
CYC
CS MUX = CS ADC = CS
CLK
t
suCS
EN
D1
D
IN
DON’T CARE
D0
D2
NULL
BIT
HI-Z
HI-Z
D
OUT
DUMMY CONVERSION
t
CONV
CH0 TO
CH7
t
OFF
ADC IN =
MUX OUT
COM = GND
1598 TD02
7
LTC1598
U
TYPICAL APPLICATIONS
Microprocessor Interfaces
Motorola SPI (MC68HC05)
TheLTC1598caninterfacedirectly(withoutexternalhard- TheMC68HC05has beenchosenas anexampleofanMPU
ware) to most popular microprocessors’ (MPU) synchro- withadedicatedserialport. This MPUtransfers dataMSB-
TM
nous serial formats including MICROWIRE , SPI and first and in 8-bit increments. The D word sent to the data
IN
QSPI. If an MPU without a dedicated serial port is used, register starts the SPI process. With three 8-bit transfers
then three of the MPU’s parallel port lines can be pro- the A/D result is read into the MPU. The second 8-bit
grammed to form the serial link to the LTC1598. Included transfer clocks B11 through B7 of the A/D conversion
here is one serial interface example.
result into the processor. The third 8-bit transfer clocks
the remaining bits B6 through B0 into the MPU. ANDing
the second byte with 1FHEX clears the three most signifi-
cant bits and ANDing the third byte with FEHEX clears the
least significant bit. Shifting the data to the right by one bit
results in a right justified word.
MICROWIRE is a trademark of National Semiconductor Corp.
MC68HC05 CODE
LDA #$52 Configuration data for serial peripheral
control register (Interrupts disabled, output
enabled, master, Norm = 0, Ph = 0, Clk/16)
STA $0A
Load configuration data into location $0A (SPCR)
LDA #$FF Configuration data for I/O ports
(all bits are set as outputs)
STA $04
STA $05
STA $06
Load configuration data into Port A DDR ($04)
Load configuration data into Port B DDR ($05)
Load configuration data into Port C DDR ($06)
LDA #$08 Put D word for LTC1598 into Accumulator
IN
(CH0 with respect to GND)
STA $50
Load D word into memory location $50
IN
START BSET 0,$02 Bit 0 Port C ($02) goes high (CS goes high)
LDA $50
STA $0C
Load D word at $50 into Accumulator
IN
Load D word into SPI data register ($0C) and
IN
start clocking data
LOOP1 TST $0B
Test status of SPIF bit in SPI status register ($0B)
BPL LOOP1 Loop if not done with transfer to previous
instruction
BCLR 0,$02 Bit 0 Port C ($02) goes low (CS goes low)
LDA $0C
STA $0C
Load contents of SPI data register into Accumulator
Start next SPI cycle
LOOP2 TST $0B
Test status of SPIF
BPL LOOP2 Loop if not done
LDA $0C
STA $0C
Load contents of SPI data register into Accumulator
Start next SPI cycle
AND #$IF Clear 3 MSBs of first D word
OUT
STA $00
LOOP3 TST $0B
Load Port A ($00) with MSBs
Test status of SPIF
BPL LOOP3 Loop if not done
LDA $0C
Load contents of SPI data register into Accumulator
AND #$FE Clear LSB of second D word
OUT
STA $01
Load Port B ($01) with LSBs
JMP START Go back to start and repeat program
8
LTC1598
U
TYPICAL APPLICATIONS
Data Exchange Between LTC1598 and MC68HC05
CS MUX
= CS ADC
= CS
CLK
EN D2 D1 DO
DON'T CARE
D
IN
D
OUT
B11 B10 B9 B8 B7
B6
B5 B4 B3 B2 B1 B0 B1 B2
MPU
TRANSMIT
WORD
0
?
0
?
0
?
0
EN D2 D1 D0
X
?
X
?
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
BYTE 2
BYTE 1
BYTE 3
B2 B1 B0
BYTE 3
MPU
RECEIVED
WORD
?
?
?
?
?
B11 B10 B9 B8 B7
BYTE 2
B6 B5 B4
B3
B1
BYTE 1
1598 TA03
Hardware and Software Interface to Motorola MC68HC05
D
FROM LTC1598 STORED IN MC68HC05 RAM
OUT
MSB
C0
MC68HC05
CS MUX
CS ADC
0
B11 B10
B8
B7
0
BYTE 1
BYTE 2
0
0
B9
B1
#00
#01
ANALOG
INPUTS
SCK
LTC1598 CLK
LSB
B0
D
IN
MOSI
MISO
B6
B5
B4
B2
B3
D
OUT
1598 TA04
9
LTC1598
U
TYPICAL APPLICATIONS
MULTICHANNEL A/D USES A SINGLE ANTIALIASING
FILTER
This circuit demonstrates how the LTC1598’s indepen-
dent analog multiplexer can simplify design of a 12-bit
dataacquisitionsystem.Alleightchannels areMUXedinto
a single 1kHz, fourth-order Sallen-Key antialiasing filter,
which is designed for single-supply operation. Since the
LTC1598’s data converter accepts inputs from ground to
the positive supply, rail-to-rail op amps were chosen for
thefiltertomaximizedynamicrange.TheLT1368dualrail-
to-rail op amp is designed to operate with 0.1µF load
capacitors (C1 and C2). These capacitors provide fre-
quency compensation for the amplifiers and help reduce
the amplifier’s output impedance and improve supply
rejection at high frequencies. The filter contributes less
than 1LSB of error due to offsets and bias currents. The
filter’s noise and distortion are less than –72dB for a
100Hz, 2VP-P offset sine input.
The combined MUX and A/D errors result in an integral
nonlinearity error of ±3LSB (maximum) and a differential
nonlinearity error of ±3/4LSB (maximum). The typical
signal-to-noise plus distortion ratio is 71dB, with approxi-
mately –78dB of total harmonic distortion. The LTC1598
is programmed through a 4-wire serial interface that is
compatable with MICROWIRE, SPI and QSPI. Maximum
serial clock speed is 320kHz, which corresponds to a
16.8kHz sampling rate.
The complete circuit consumes approximately 800µA
from a single 5V supply.
Simple Data Acquisition System Takes Advantage of the LTC1598’s
MUXOUT/ADCIN Pins-to-Filter Analog Signals Prior to A/D Conversion
5V
ANALOG INPUTS
0V TO 5V
1
2
24
CH4
0.015µF
CH5
CH6
CH7
GND
CLK
RANGE
1µF
23
CH3
7.5k
7.5k
3
22
21
20
19
18
17
16
15
14
13
+
–
CH2
CH1
CH0
1/2
LT1368
4
0.03µF
C2
0.1µF
5
LTC1598
5V
6
CS MUX
V
CC
7
1µF
D
IN
MUXOUT
ADCIN
8
COM
7.5k
7.5k
9
GND
V
REF
+
10
11
12
1/2
LT1368
0.015µF
0.03µF
CS ADC
V
CC
C1
D
OUT
CLK
NC
–
0.1µF
NC
DATA OUT
DATA IN
LTC1598 • TA05
CHIP SELECT
CLOCK
10
LTC1598
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
G Package
24-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.318 – 0.328*
(8.07 – 8.33)
24 23 22 21 20 19 18 17 16 15 14
13
0.301 – 0.311
(7.65 – 7.90)
5
7
8
1
2
3
4
6
9 10 11 12
0.205 – 0.212**
(5.20 – 5.38)
0.068 – 0.078
(1.73 – 1.99)
0° – 8°
0.0256
(0.65)
BSC
0.005 – 0.009
(0.13 – 0.22)
0.022 – 0.037
(0.55 – 0.95)
0.002 – 0.008
(0.05 – 0.21)
0.010 – 0.015
(0.25 – 0.38)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
G24 SSOP 0595
11
LTC1598
TYPICAL APPLICATION
U
Digitally Linearized Platinum RTD Signal Conditioner
5V
OUT
+15V
LT1027
+
10µF
500k
400°C TRIM
12.5k*
12k*
+15V
+15V
A2
+
A1
LT1101
A=10
–
+
1k
CH5
CH6
CH7
GND
CLK
CH4
CH3
CH2
CH1
CH0
LT1006
–
1k*
Rplat.
30.1k**
1µF
LTC1598
CS MUX
V
CC
D
IN
MUX OUT
ADC IN
10µF
TANTALUM
COM
* TRW-IRC MAR-6 RESISTOR – 0.1%
GND
V
REF
** 1% FILM RESISTOR
Rplat. = 1kΩ AT 0°C – ROSEMOUNT #118MF
CS ADC
V
3.92M**
500k
CC
D
OUT
NC
CLK
NC
ZERO°C TRIM
TO/FROM
MC68HC05
LTC1598 TA06
RELATED PARTS
PART NUMBER
LTC1096/LTC1098
LTC1096L/LTC1098L
LTC1196/LTC1198
LTC1282
DESCRIPTION
COMMENTS
8-Pin SO, Micropower 8-Bit ADC
Low Power, Small Size, Low Cost
Low Power, Small Size, Low Cost
Low Power, Small Size, Low Cost
8-Pin SO, 2.65V Micropower 8-Bit ADC
8-Pin SO, 1Msps 8-Bit ADC
3V High Speed Parallel 12-Bit ADC
8-Pin SO, 3V, Micropower
140ksps, Complete with V , CLK, Sample-and-Hold
REF
LTC1285/LTC1288
LTC1289
1- or 2-Channel, Auto Shutdown
8-Channel 12-Bit Serial I/O
Multiplexed 3V, 1A, 12-Bit ADC
4-Channel, 5V Micropower 12-Bit ADC
4-Channel, 3V Micropower 12-Bit ADC
LTC1594
Low Power, Small Size, Low Cost
Low Power, Small Size, Low Cost
LTC1594L
LT/GP 0896 5K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1996
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