LTC1530CS8-2.8_技术文档

LTC1530

High Power Synchronous

Switching Regulator Controller

U

FEATURES

DESCRIPTIO

The LTC^®1530 is a high power synchronous switching

regulator controller optimized for 5V to 1.3V-3.5V output

applications.Itssynchronousswitchingarchitecturedrives

two external N-channel MOSFET devices to provide high

efficiency. The LTC1530 contains a precision trimmed

reference and feedback system that provides worst-case

output voltage regulation of ±2% over temperature, load

current and line voltage shifts. Current limit circuitry

senses the output current through the on-resistance of

the topside N-channel MOSFET, providing an adjustable

current limit without requiring an external low value sense

resistor.

■

High Power Buck Converter from 5V or 3.3V

Main Power

■

Adjustable Current Limit in S0-8 with

Topside FET R_DS(ON)Sensing

■

No External Sense Resistor Required

■

Hiccup Mode Current Limit Protection

■

Adjustable, Fixed 1.9V, 2.5V, 2.8V and 3.3V Output

■

All N-Channel MOSFET Synchronous Driver

■

Excellent Output Regulation: ±2% over Line, Load

and Temperature Variations

■

High Efficiency: Over 95% Possible

■

Fast Transient Response

■

Fixed 300kHz Frequency Operation

The LTC1530 includes a fixed frequency PWM oscillator

that free runs at 300kHz, providing greater than 90%

efficiency in converter designs from 1A to 20A of output

current. Shutdown mode drops the LTC1530 supply cur-

rent to 45µA.

■

Internal Soft-Start Circuit

■

Quiescent Current: 1mA, 45µA in Shutdown

U

APPLICATIO S

Power Supply for Pentium^®II, AMD-K6^®-2, SPARC,

■

The LTC1530 is specified for commercial and industrial

temperature ranges and is available in the S0-8 package.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Pentium is a registered trademark of Intel Corp.

AMD-K6 is a registered trademark of Advanced Micro Devices, Inc.

ALPHA and PA-RISC Microprocessors

■

High Power 5V to 1.3V-3.5V Regulators

U

TYPICAL APPLICATIO

V

IN

Efficiency vs Load Current

5V

100

MBR0530T1 MBR0530T1

90

+

C

**

IN

0.1µF

+

80

70

60

50

40

30

20

10

0

2.7k

1200µF

× 4

10µF

20Ω

0.22µF

†

L

O

PV

I

Q1*

Q2*

G1

CC

MAX

2µH

V

3.3V

14A

OUT

I

FB

COMP

††

+

C

O

330µF

× 7

C1

150pF

R

C

10k

LTC1530-3.3

G2

1530 F01a

C

0.022µF

V

OUT

GND

T

= 25°C

A

†

COILTRONICS CTX02-13198

OR PANASONIC ETQP6F2R5HA

AVX TPSE337M006R0100

* SILICONIX SUD50N03-10

** SANYO 10MV1200GX

COILTRONICS (561) 241-7876

0

0.3

2

4

6

8

10

12

14

††

LOAD CURRENT (A)

1530 F01b

Figure 1. Single 5V to 3.3V Supply

1

LTC1530

W W U W

U W

U

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

ORDER PART

NUMBER

Supply Voltage

PV_CC........................................................................ 14V

Input Voltage

TOP VIEW

LTC1530CS8

PV

1

2

3

4

8

7

6

5

G1

G2

CC

I

_FB(Note 2) ............................................... PV_CC+ 0.3V

LTC1530CS8-1.9

LTC1530CS8-2.5

LTC1530CS8-2.8

LTC1530CS8-3.3

LTC1530IS8

GND

I_MAX........................................................ –0.3V to 14V

I_FBInput Current (Notes 2,3) ............................ –100mA

Operating Ambient Temperature Range

*V

/

SENSE

I

FB

V

OUT

I

COMP

MAX

S8 PACKAGE

8-LEAD PLASTIC SO

LTC1530C ............................................... 0°C to 70°C

LTC1530I............................................ –40°C to 85°C

Maximum Junction Temperature

LTC1530C, LTC1530I ...................................... 125°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

LTC1530IS8-1.9

LTC1530IS8-2.5

LTC1530IS8-2.8

LTC1530IS8-3.3

T_JMAX= 125°C, θ_JA= 130°C/ W

*V_OUTFOR FIXED VOLTAGE VERSIONS

S8 PART MARKING

530I28

530I33

153028

153033

1530I

530I19

530I25

1530

153019

153025

Consult factory for Military grade parts.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications that apply over the full operating temperature

range, otherwise specifications are at 0°C ≤ T_A≤ 70°C. PV_CC= 12V unless otherwise noted. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Internal Feedback Voltage

LTC1530CS8 (Note 4)

1.223

1.216

1.235

1.247

1.254

V

SENSE

OUT

●

V

Output Voltage

LTC1530CS8-1.9 (Note 4)

LTC1530CS8-2.5 (Note 4)

LTC1530CS8-2.8 (Note 4)

LTC1530CS8-3.3 (Note 4)

(Note 5)

1.881

1.871

1.9

1.919

1.929

V

2.475

2.462

2.5

2.525

2.538

V

2.772

2.758

2.8

2.828

2.842

V

3.267

3.250

3.3

3.333

3.350

V

●

g

Error Amplifier Transconductance

1.6

2

2.6

millimho

mERR

The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at –40°C ≤ T_A≤ 85°C.

PV_CC= 12V unless otherwise noted. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

(Note 6)

MIN

TYP

MAX

13.2

3.75

UNITS

PV

CC

Supply Voltage

●

V

Undervoltage Lockout Voltage

Internal Feedback Voltage

(Note 7)

3.5

UVLO

SENSE

LTC1530IS8 (Note 4)

1.223

1.210

1.235

1.247

1.260

V

2

LTC1530

ELECTRICAL CHARACTERISTICS

The ● denotes specifications that apply over the full operating temperature

range, otherwise specifications are at –40°C ≤ T_A≤ 85°C. PV_CC= 12V unless otherwise noted. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Output Voltage

LTC1530IS8-1.9 (Note 4)

1.881

1.862

1.9

1.919

1.938

V

OUT

●

LTC1530IS8-2.5 (Note 4)

LTC1530IS8-2.8 (Note 4)

LTC1530IS8-3.3 (Note 4)

2.475

2.450

2.5

2.525

2.550

V

2.772

2.744

2.8

2.828

2.856

V

3.267

3.234

3.3

3.333

3.366

V

∆V

Output Load Regulation

Output Line Regulation

I

= 0 to 14A

OUT

–5

±1

15

mV

OUT

V

= 4.75V to 5.25V, I

= 0

OUT

IN

I

f

Operating Supply Current

Quiescent Current

Figure 3, V = 0V (Note 8)

mA

PVCC

FB

Figure 3, COMP = 0.5V, V = 5V

●

1.0

45

1.4

80

mA

FB

Shutdown Supply Current

Internal Oscillator Frequency

Oscillator Valley Voltage

Oscillator Peak Voltage

Figure 3, COMP = 0 (Note 9)

Figure 4

µA

250

300

2.5

3.5

54

350

kHz

V

OSC

V

at 0% Duty Cycle

at Max Duty Cycle

COMP

V

G

Error Amplifier Open-Loop DC Gain

Error Amplifier Transconductance

(Note 5)

●

40

dB

ERR

mERR

MAX

g

1.6

2

2.8

millimho

I

Sink Current

V

= 5V

170

120

200

230

300

µA

MAX

IMAX

●

I

Sink Current Tempco

V

= 5V

3300

180

0.4

ppm/°C

mV

MAX

IMAX

V

Shutdown Threshold Voltage

Internal Soft-Start Slew Rate

Figure 4, Measured at COMP Pin (Note 9)

100

SHDN

SR

SS

Figure 4, COMP Pulls High, V = 0V

V/ms

FB

(Notes 9, 10)

t

Internal Soft-Start Wake-Up Time

Driver Rise and Fall Time

Driver Nonoverlap Time

Figure 4, COMP Pulls High to G1↑ (Note 10)

3.5

90

ms

ns

%

SS

t , t

Figure 4

●

140

r

f

t

30

81

100

86

NOL

DC

Maximum G1 Duty Cycle

MAX

Note 6: The total voltage from the PV pin to the GND pin must be ≥8V

for the current limit protection circuit to be active.

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

CC

Note 7: G1 and G2 begin to switch once PV is ≥ the undervoltage

lockout threshold voltage.

Note 2: If I is taken below GND, it is clamped by an internal diode. This

pin handles input currents ≤ 100mA below GND without latch-up. In the

CC

FB

positive direction, it is not clamped to PV

.

Note 8: Supply current in normal operation is dominated by the current

needed to charge and discharge the external FET gates. This current varies

with the LTC1530 operating frequency, supply voltage and the external

FETs used.

CC

Note 3: All currents into device pins are positive; all currents out of device

pins are negative. All voltages are referenced to ground unless otherwise

specified.

Note 9: The LTC1530 enters shutdown if COMP is pulled low.

Note 4: The LTC1530 is tested in an op amp feedback loop which

regulates V

or V

based on V

= 2V for the error amplifier.

Note 10: Slew rate is measured at the COMP pin on the transition from

SENSE

OUT

COMP

shutdown to active mode.

Note 5: The Open-loop DC gain and transconductance from the V pin to

FB

the COMP pin are G

and g

respectively. For fixed output voltage

ERR

mERR

versions, the actual open-loop DC gain and transconductance are G

ERR

and g

multiplied by the ratio 1.235/V

.

mERR

OUT

3

LTC1530

TYPICAL PERFOR A CE CHARACTERISTICS

U W

Efficiency vs Load Current

Load Regulation

LTC1530 V_SENSEvs Temperature

100

90

80

70

60

50

40

30

20

10

0

1.260

1.255

1.250

1.245

1.240

1.235

1.230

1.225

1.220

1.215

1.210

2.510

2.508

2.506

2.504

2.502

2.500

2.498

2.496

2.494

2.492

2.490

T

= 25°C

A

REFER TO FIGURE 2

T

= 25°C

A

REFER TO FIGURE 10

0

1

2

3

4

5

6

0

0.3

2

4

6

8

10

12

14

–55 –35 –15

5

25 45 65 85 105 125

LOAD CURRENT (A)

OUTPUT CURRENT (A)

TEMPERATURE (°C)

1530 G02

1530 G01

1530 G03

LTC1530-2.5 V_OUTvs Temperature

LTC1530-2.8 V_OUTvs Temperature

LTC1530-1.9 V_OUTvs Temperature

2.55

2.54

2.53

2.52

2.51

2.50

2.49

2.48

2.47

2.46

2.45

1.930

1.925

1.920

1.915

1.910

1.905

1.900

1.895

1.890

1.885

1.880

1.875

1.870

2.85

2.84

2.83

2.82

2.81

2.80

2.79

2.78

2.77

2.76

2.75

2.74

–55 –35 –15

5

25 45 65 85 105 125

85

105 125

–55 –35 –15

5

25 45 65

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

1530 G04

1530 G05

1530 G06

Undervoltage Lockout Threshold

Voltage vs Temperature

Error Amplifier Transconductance

vs Temperature

LTC1530-3.3 V_OUTvs Temperature

2.8

2.6

2.4

2.2

2.0

1.8

1.6

4.5

4.3

4.1

3.9

3.7

3.5

3.3

3.1

2.9

2.7

2.5

2.3

3.36

3.35

3.34

3.33

3.32

3.31

3.30

3.29

3.28

3.27

3.26

3.25

3.24

3.23

–55 –35 –15

5

25 45 65 85 105 125

85 105

125

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

–55 –35 –15

5

25 45 65

TEMPERATURE (°C)

1530 G09

1530 G06

1530 G08

4

LTC1530

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Error Amplifier Open-Loop Gain

vs Temperature

Oscillator Frequency

vs Temperature

Maximum G1 Duty Cycle

vs Ambient Temperature

60

55

50

45

40

350

340

330

320

310

300

290

280

270

260

250

92

90

88

86

84

82

80

78

PV = 12V

CC

OSC

f

= 300kHz

G1, G2

CAPACITANCE

= 1000pF

2200pF

3300pF

5500pF

7700pF

THERMAL SHUTDOWN OCCURS

BEYOND THESE POINTS

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

AMBIENT TEMPERATURE (°C)

1530 G10

1530 G11

1530 G12

PV_CCSupply Current

vs Gate Capacitance

PV_CCShutdown Supply Current

vs Temperature

I_MAXSink Current vs Temperature

300

280

260

240

220

200

180

160

140

120

80

75

70

65

60

55

50

45

40

35

30

70

60

50

40

30

20

10

0

PV = 12V

A

GATE CAPACITANCE = C = C

CC

= 25°C

PV = 12V

CC

PV = 12V

CC

T

G1, G2 ARE NOT SWITCHING

G1

G2

1

2

3

4

5

7

8

85

105 125

–55 –35 –15

5

25 45 65 85 105 125

0

6

–55 –35 –15

5

25 45 65

TEMPERATURE (°C)

GATE CAPACITANCE (nF)

1530 G13

1530 G14

1530 G15

Shutdown Threshold Voltage

vs Temperature

Output Overcurrent Protection

Transient Response

250

200

150

100

50

3.0

2.5

2.0

1.5

1.0

0.5

0

PV = 12V

CC

MEASURED AT

COMP PIN

50mV/DIV

2A/DIV

PV = 12V

CC

T

= 25°C

A

REFER TO

FIGURE 2

SHORT-CIRCUIT

CURRENT

50µs/DIV

1530 G18

0

–55 –35 –15

5

25 45 65 85 105 125

0

1

2

3

4

5

6

7

8

9

10

TEMPERATURE (°C)

OUTPUT CURRENT (A)

1530 G16

1530 G17

5

LTC1530

U

PI FU CTIO S

COMP to compensate the feedback loop for optimum

transient response. To shut down the LTC1530, pull this

pin below 0.1V with an open-collector or open-drain

transistor. Supply current is typically reduced to 45µA in

shutdown. An internal 4µA pullup ensures start-up.

PV_CC(Pin 1): Power Supply for G1, G2 and Logic. PV_CC

must connect to a potential of at least V_IN+ V_GS(ON)Q1. If

V_IN= 5V, generate PV_CCusing a simple charge pump

connected to the switching node between Q1 and Q2 (see

Figure 1) or connect PV_CCto a 12V supply. Bypass PV_CC

properly or erratic operation will result. A low ESR 10µF

capacitor or larger bypass capacitor along with a 0.1µF

surface mount ceramic capacitor in parallel is recom-

mended from PV_CCdirectly to GND to minimize switching

ripple. Switching ripple should be ≤100mV at the PV_CC

pin.

I_MAX(Pin 5): Current Limit Threshold. Current limit is set

by the voltage drop across an external resistor connected

between the drain of Q1 and I_MAX. This voltage is com-

pared with the voltage across the R_DS(ON)of the high side

MOSFET. The LTC1530 contains a 200µA internal pull-

down at I_MAXto set current limit. This 200µA current

source has a positive temperature coefficient to provide

first order correction for the temperature coefficient of the

GND (Pin 2): Power and Logic Ground. GND is connected

to the internal gate drive circuitry and the feedback cir-

cuitry. To obtain good output voltage regulation, use

proper ground techniques between the LTC1530 GND and

bottom-side FET source and the negative terminal of the

outputcapacitor.SeetheApplicationsInformationsection

for more details on PCB layout techniques.

external N-channel MOSFET’s R_DS(ON)

.

I_FB(Pin 6): Current Limit Sense Pin. Connect I_FBto the

switching node between Q1’s source and Q2’s drain. If I_FB

drops below I_MAXwith G1 on, the LTC1530 enters current

limit. Underthiscondition, theinternalsoft-startcapacitor

is discharged and COMP is pulled low slowly. Duty cycle

is reduced and output power is limited. The current limit

circuitry is only activated if PV_CC≥ 8V. This action eases

start-up considerations as PV_CCis ramping up because

the MOSFET’s R_DS(ON)can be significantly higher than

what is measured under normal operating conditions. The

current limit circuit is disabled by floating I_MAXand short-

ing I_FBto PV_CC.

V_SENSE/V_OUT(Pin3):FeedbackVoltagePin.Fortheadjust-

able LTC1530, use an external resistor divider to set the

required output voltage. Connect the tap point of the

resistor divider network to V_SENSEand the top of the

divider network to the output voltage. For fixed output

voltage versions of the LTC1530, the resistor divider is

internal and the top of the resistor divider network is

brought out to V_OUT. In general, the resistor divider

network for each fixed output voltage version sinks ap-

proximately 30µA. Connect V_OUTto the output voltage

eitherattheoutputcapacitorsorattheactualpointofload.

V_SENSE/V_OUTis sensitive to switching noise injected into

the pin. Isolate high current switching traces from this pin

and its PCB trace.

G2(Pin7):GateDrivefortheLowSideN-ChannelMOSFET,

Q2. This output swings from PV_CCto GND. It is always low

if G1 is high or if the output is disabled. To prevent

undershoot during a soft-start cycle, G2 is held low until

G1 first transitions high.

G1(Pin8):GateDrivefortheTopsideN-ChannelMOSFET,

Q1. This output swings from PV_CCto GND. It is always low

if G2 is high or if the output is disabled.

COMP (Pin 4): External Compensation. The COMP pin is

connectedtotheerroramplifieroutputandtheinputofthe

PWM comparator. An RC + C network is typically used at

6

LTC1530

W

BLOCK DIAGRA

DISDR

LOGIC AND

THERMAL SHUTDOWN

1

PV

CC

INTERNAL

OSCILLATOR

POWER DOWN

G1

G2

8

7

I

COMP

–

+

PWM

4

COMP

I

SS

M

SS

FIXED V

R1

R2

OUT

C

SS

1.9V

2.5V

2.8V

3.3V

23.4k

44.4k

54.9k

68.4k

43.2k

40.8k

g

m

= 2millimho

ERR

MIN

MAX

+

–

FB

3

V

SENSE

V

– 3%

V + 3%

REF

R1

FB

3

V

OUT

I

6

–

R2

FB

FOR FIXED

VOLTAGE

VERSIONS

CC

+

5

MAX

I

MAX

V

REF

– 3%

+ 3%

V

REF

/2

+

HCL

MONO

MHCL

V

REF

V

LVC

REF

V

–

/2

REF

1530 BD

TEST CIRCUITS

V

IN

PV

CC

5V

12V

+

C

***

IN

PV

12V

10µF

CC

1200µF

× 2

+

750Ω

0.1µF

10µF

0.1µF

PV

I

CC

FB

NC

V

PV

G1

CC

Q1

L *

O

I

G1

MAX

Si4410DY

2.4µH

COMP

V

2.5V

6A

I

100Ω

OUT

MAX

G2

I

COMP

LTC1530-2.5

LTC1530

FB

C1

100pF

C **

O

330µF

× 8

Q2

Si4410DY

R

C

G2

8.2k

V

/V

FB

SENSE OUT

1530 F02

V

OUT

C

0.01µF

GND

*SUMIDA CDRH127-2R4

**AVX TPSE337M006R0100

***SANYO 10MV1200GX

1530 F03

Figure 3

Figure 2

7

LTC1530

TEST CIRCUITS

PV

CC

12V

t

r

t

f

+

90%

50%

10%

90%

50%

10%

0.1µF

10µF

PV

CC

G1

G2

I

G1 RISE/FALL

FB

COMP

G1

3300pF

t

SS

t

NOL

LTC1530

50%

COMP

G2 RISE/FALL

V

GND

OUT

1530 F04b

1530 F04a

Figure 4

W U U

U

APPLICATIO S I FOR ATIO

sawtooth waveform to generate the PWM signal. The

PWMsignaldrivestheexternalMOSFETsattheG1andG2

pins. TheresultingchoppedwaveformisfilteredbyL_Oand

C_OUTwhich closes the loop. Loop frequency compensa-

tion is typically accomplished with an external RC + C

network at the COMP pin, which is the output node of the

transconductance error amplifier.

OVERVIEW

The LTC1530 is a voltage feedback, synchronous switch-

ing regulator controller (see Block Diagram) designed for

use in high power, low voltage step-down (buck) convert-

ers. It includes an on-chip soft-start capacitor, a PWM

generator,aprecisionreferencetrimmedto±1%,twohigh

power MOSFET gate drivers and all the necessary feed-

back and control circuitry to form a complete switching

regulator circuit running at 300kHz.

MIN, MAX Feedback Loops

Two additional comparators in the feedback loop provide

high speed fault correction in situations where the error

amplifier cannot respond quickly enough. MIN compares

the feedback signal to a voltage 3% below the internal

reference. If the signal is below the comparator threshold,

the MIN comparator overrides the error amplifier and

forces the loop to maximum duty cycle, typically 86%.

Similarly, the MAX comparator forces the output to 0%

duty cycle if the feedback signal is greater than 3% above

the internal reference. To prevent these two comparators

from triggering due to noise, the MIN and MAX compara-

tors’ response times are deliberately delayed by two to

three microseconds. These comparators help prevent

extremeoutputperturbationswithfastoutputloadcurrent

transients, while allowing the main feedback loop to be

optimally compensated for stability.

The LTC1530 includes a current limit sensing circuit that

uses the topside external N-channel power MOSFET as a

current sensing element, eliminating the need for an

external sense resistor. If the current comparator, CC,

detectsanovercurrentcondition,thedutycycleisreduced

by discharging the internal soft-start capacitor through a

voltage-controlled current source. Under severe over-

loads or output short-circuit conditions, the soft-start

capacitor is pulled to ground and a start-up cycle is

initiated. If the short circuit or overload persists, the chip

repeats soft-start cycles and prevents damage to external

components.

THEORY OF OPERATION

Primary Feedback Loop

Thermal Shutdown

The LTC1530 compares the output voltage with the inter-

nal reference at the error amplifier inputs. The error

amplifier outputs an error signal to the PWM comparator.

This signal is compared to the fixed frequency oscillator

TheLTC1530hasathermalprotectioncircuitthatdisables

both internal gate drivers if activated. G1 and G2 are held

low and the LTC1530 supply current drops to about 1mA.

8

LTC1530

W U U

APPLICATIO S I FOR ATIO

U

Typically, thermal shutdown is activated if the LTC1530’s

junction temperature exceeds 150°C. G1 and G2 resume

switching when the junction temperature drops below

100°C.

By using the R_DS(ON)of Q1 to measure output current, the

current limit circuit eliminates the sense resistor that

would otherwise be required. This minimizes the number

ofcomponentsinthehighcurrentpowerpath. Thecurrent

limit circuitry is not designed to be highly accurate. It is

primarily meant to prevent damage to the power supply

circuitry during fault conditions. The exact current level

where current limiting takes effect will vary from unit to

unit as the R_DS(ON)of Q1 varies.

Soft-Start and Current Limit

UnlikeotherPWMparts, theLTC1530includesanon-chip

soft-start capacitor that is used during start-up and cur-

rent limit operation. On power-up, an internal 4µA pull-up

at COMP brings the LTC1530 out of shutdown mode. An

internal current source then charges the internal C_SS

capacitor. The COMP pin is clamped to one V_GSabove the

voltage on C_SSduring start-up. This prevents the error

amplifier from forcing the loop to maximum duty cycle.

The LTC1530 operates at low duty cycle as the COMP pin

voltage increases above about 2.4V. The slew rate of the

soft-start capacitor is typically 0.4V/ms. As the voltage on

C_SScontinuestoincrease,M_SSeventuallyturnsoffandthe

error amplifier regulates the output. The MIN comparator

is disabled if soft-start is active to prevent an override of

the soft-start function.

Figure 5a illustrates the basic connections for the current

limit circuitry. For a given current limit level, the external

resistor from I_MAXto V_INis determined by:

I

(

R

)

LMAX DS(ON)Q1

R

=

IMAX

I

IMAX

where,

=I

I

RIPPLE

I

+

LMAX LOAD

2

I

= Maximum load current

LOAD

I

= Inductor ripple current

RIPPLE

The LTC1530 includes another feedback loop to control

operation in current limit. Before each falling edge of G1,

the current comparator, CC, samples and holds the volt-

age drop across external MOSFET Q1 with the LTC1530’s

I_FBpin. CC compares the voltage at I_FBto the voltage at the

I_MAXpin. As peak current rises, the voltage across the

R_DS(ON)of Q1 increases. If the voltage at I_FBdrops below

I_MAX, indicating that Q1’s drain current has exceeded the

maximum desired level, CC pulls current out of C_SS. Duty

cycle decreases and the output current is controlled. The

CCcomparatorpullscurrentoutofC_SSinproportiontothe

voltage difference between I_FBand I_MAX. Under minor

overload conditions, the voltage at C_SSfalls gradually,

creating a time delay before current limit activates. Very

short, mild overloads may not affect the output voltage at

all. Significant overload conditions allow the voltage on

C_SSto reach a steady state and the output remains at a

reduced voltage until the overload is removed. Serious

overloads generate a large overdrive and allow CC to pull

the C_SSvoltage down quickly, thus preventing damage to

the external components.

V − V

V

(

)(

)

IN

OUT OUT

=

f

L

V

IN

(

)( )(

OSC

)

O

f

= LTC1530 oscillator frequency = 300kHz

OSC

L = Inductor value

O

R

= On-resistance of Q1 at I

= 200µA sink current

DS(ON)Q1

LMAX

I

IMAX

V

IN

+

LTC1530

C

IN

R

IMAX

I

MAX

+

–

Q1

Q2

G1

20Ω

200µA

CC

I

FB

L

O

V

OUT

+

OUT

G2

1530 F05

Figure 5a. Current Limit Setting (Use Kelvin-Sense

Connections Directly at the Drain and Source of Q1)

9

LTC1530

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U

APPLICATIO S I FOR ATIO

Figure 5b is derived based on the condition that

5500

R

≥ 500Ω

IMAX

I

= I

+ I

/2

= 0.05Ω

LMAX LOAD RIPPLE

I

_LMAX= I_LOAD+ I_RIPPLE/2. Therefore, it only provides the

4500

3500

2500

1500

500

minimum R_IMAXvalue. It must be understood that during

the initial power-up phase (V_OUT= 0V), the initial start-up

0.04Ω

0.03Ω

Q1 R

DS(ON)

I_LMAXcan be much higher than the steady state condition

I_LMAX. Therefore, R_IMAXmustbeselectedwiththestart-up

I_LMAXin mind. In general, high output capacitance com-

bined with a low value inductor increases the start-up

0.02Ω

0.01Ω

I_LMAX. Figures 6a and 6b plot the start-up I_LMAXvs output

capacitance and inductance for unloaded and loaded con-

ditions with the current limit circuit disabled. Figures 6a

and 6b are provided as examples. Actual I_LMAXunder

start-up conditions must be measured for any application

circuit so that R_IMAXcan be properly chosen.

0

2

4

6

8

I

10 12 14 16 18 20

(A)

LMAX

1530 F05b

Figure 5b. Minimum Required R_IMAXvs I_LMAX

Inorderforthecurrentlimitcircuittooperateproperlyand

toobtainareasonablyaccuratecurrentlimitthreshold,the

I_MAXand I_FBpins must be Kelvin sensed at Q1’s drain and

source pins. A 0.1µF decoupling capacitor can also be

connected across R_IMAXto filter switching noise. In addi-

tion, LTC recommends that the voltage drop across the

R_IMAXresistor be set to ≥100mV. Otherwise, noise spikes

or ringing at Q1’s source can cause the actual current limit

to be greater than the desired current limit set point.

25

T

= 25°C

A

V

I

= 5V

IN

= 0A

20

15

10

5

LOAD

L = 1.2µH

L = 4.7µH

L = 2.4µH

0

MOSFET Gate Drive

0

4

6

8

10

12

2

OUTPUT CAPACITANCE (mF)

The PV_CCsupply must be greater than the input supply

voltage, V_IN, by at least one power MOSFET V_GS(ON)for

efficient operation. This higher voltage can be supplied

with a separate supply, or it can be generated using a

simple charge pump as shown in Figure 7. The 86%

maximum duty cycle ensures sufficient off-time to refresh

the charge pump during each cycle.

1530 F06a

Figure 6a. Start-Up I_LMAXvs Output Capacitance

30

T

= 25°C

A

V

= 5V

IN

25

20

15

10

5

I

= 10A

LOAD

L = 2.4µH

AsPV_CCispoweredupfrom0V,theLTC1530undervoltage

lockout circuit prevents G1 and G2 from pulling high until

PV_CCreaches about 3.5V. To prevent Q1’s high R_DS(ON)

from triggering the current limit comparator while PV_CCis

slewing, the current limit circuit is disabled until PV_CCis

≥8V. In addition, on start-up or recovery from thermal

shutdown, the driver logic is designed to hold G2 low until

G1 first goes high.

L = 1.2µH

L = 4.7µH

0

4

6

8

10

12

2

OUTPUT CAPACITANCE (mF)

1530 F06b

Figure 6b. Start-Up I_LMAXvs Output Capacitance

10

LTC1530

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APPLICATIO S I FOR ATIO

U

OPTIONAL FOR

> 6.5V

V

IN

MBR0530T1 MBR0530T1

MOSFET whose R_DS(ON)is rated at V_GS= 4.5V does not

necessarily have a logic level MOSFET GATE threshold

voltage. LogiclevelFETsaretherecommendedchoicefor

5V-only systems. Logic level FETs can be fully enhanced

with a doubler charge pump and will operate at maximum

efficiency. Note that doubler charge pump designs run-

ning from supplies higher than 6.5V should include a

Zener diode clamp at PV_CCto prevent transients from

exceeding the absolute maximum rating of the pin.

V

IN

+

13V

1N5243B

C

10µF

IN

PV

0.22µF

CC

G1

G2

Q1

L

O

V

OUT

+

C

O

Q2

LTC1530

After the MOSFET threshold voltage is selected, choose

theR_DS(ON)basedontheinputvoltage, theoutputvoltage,

allowable power dissipation and maximum output cur-

rent. In a typical LTC1530 buck converter circuit, operat-

ing in continuous mode, the average inductor current is

equaltotheoutputloadcurrent.Thiscurrentflowsthrough

either Q1 or Q2 with the power dissipation split up accord-

ing to the duty cycle:

1530 F07

Figure 7. Doubling Charge Pump

Power MOSFETs

Two N-channel power MOSFETs are required for synchro-

nous LTC1530 circuits. They should be selected based

primarily on threshold voltage and on-resistance consid-

erations. Thermal dissipation is often a secondary con-

cern in high efficiency designs. The required MOSFET

threshold should be determined based on the available

power supply voltages and/or the complexity of the gate

drive charge pump scheme. In 5V input designs where a

12V supply is used to power PV_CC, standard MOSFETs

with R_DS(ON)specified at V_GS= 5V or 6V can be used with

good results. The current drawn from the 12V supply

varies with the MOSFETs used and the LTC1530’s operat-

ing frequency, but is generally less than 50mA.

V

OUT

DC(Q1) =

IN

V − V

(

)

IN

OUT

V

OUT

DC(Q2) = 1−

=

V

IN

The R_DS(ON)required for a given conduction loss can now

be calculated by rearranging the relation P = I²R.

P_MAX(Q1)

R_DS(ON)Q1

=

2

DC(Q ) I

1

LTC1530 applications that use a 5V V_INvoltage and a

doubling charge pump to generate PV_CCdo not provide

enough gate drive voltage to fully enhance standard

power MOSFETs. Under this condition, the effective

MOSFET R_DS(ON)may be quite high, raising the dissipa-

tion in the FETs and reducing efficiency. In addition,

power supply start-up problems can occur with standard

power MOSFETs. These start-up problems can occur for

two reasons. First, if the MOSFET is not fully enhanced,

the higher effective R_DS(ON)causes the LTC1530 to acti-

vate current limit at a much lower level than the desired

trip point. Second, standard MOSFETs have higher GATE

threshold voltages than logic level MOSFETs, thereby

increasing the PV_CCvoltage required to turn them on. A

MAX

[

]

V

P_MAX(Q1)

(

IN

)

[

]

=

2

I_MAX

V_OUT

(

)

P_MAX(Q2)

R_DS(ON)Q2

2

DC(Q ) I

2

MAX

[

]

V

P_MAX(Q2)

)

[

(

IN

]

=

2

I_MAX

V − V_OUT

(

IN

)

11

LTC1530

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APPLICATIO S I FOR ATIO

IRF7413(bothinSO-8)orSiliconixSUD50N03orMotorola

MTD20N03HDL (both in DPAK) are small footprint sur-

facemountdeviceswithR_DS(ON)valuesbelow0.03Ωat5V

of V_GSthat work well in LTC1530 circuits. With higher

output voltages, the R_DS(ON)of Q1 may need to be signifi-

cantly lower than that for Q2. These conditions can often

be met by paralleling two MOSFETs for Q1 and using a

single device for Q2. Using a higher P_MAXvalue in the

R_DS(ON)calculations generally decreases the MOSFET

cost and the circuit efficiency and increases the MOSFET

heat sink requirements.

P_MAXshould be calculated based primarily on required

efficiency or allowable thermal dissipation. A high effi-

ciency buck converter designed for the PentiumII with 5V

input and a 2.8V, 11.2A output might allow no more than

4%efficiencylossatfullloadforeachMOSFET. Assuming

roughly 90% efficiency at this current level, this gives a

P

_MAXvalue of:

(2.8)(11.2A/0.9)(0.04) = 1.39W per FET

and a required R_DS(ON)of:

5V 1.39W

(

)

In most LTC1530 applications, R_DS(ON)is used as the

current sensing element. MOSFET R_DS(ON)has a positive

temperaturecoefficient. Therefore, theLTC1530I_MAXsink

current is designed with a positive 3300ppm/°C tempera-

ture coefficient. The positive tempco of I_MAXprovides first

order correction for current limit vs temperature. There-

fore, current limit does not have to be set to an increased

level at room temperature to guarantee a desired output

current at elevated temperatures.

R

=

= 0.020Ω

DS(ON)Q1

2

2.8V 11.2A

5V 1.39W

(

)

R

= 0.025Ω

DS(ON)Q2

2

5V − 2.8V 11.2A

(

)

Note that while the required R_DS(ON)values suggest large

MOSFETs, the power dissipation numbers are only 1.39W

per device or less—large TO-220 packages and heat

sinks are not necessarily required in high efficiency appli-

cations. Siliconix Si4410DY or International Rectifier

Table 1 highlights a variety of power MOSFETs that are

suitable for use in LTC1530 applications.

Table 1. Recommended MOSFETs for LTC1530 Applications

RDS(ON)

TYPICAL INPUT

CAPACITANCE

Ciss (pF)

AT 25

°C

RATED CURRENT

(A)

θ

T

JMAX

(°C)

JC

MANUFACTURER

PART NO.

PACKAGE

(

Ω)

(

°C/W)

Siliconix

SUD50N03-10

TO-252

0.019

0.020

0.035

15A at 25°C

10A at 100°C

3200

2700

880

1.8

175

150

Siliconix

Si4410DY

SO-8

DPAK

SO-8

10A at 25°C

8A at 75°C

—

ON Semiconductor

MTD20N03HDL

20A at 25°C

16A at 100°C

1.67

Fairchild

FDS6680

0.01

11.5A at 25°C

2070

4025

25

150

2

ON Semiconductor

MTB75N03HDL*

D PAK

0.0075

75A at 25°C

1.0

59A at 100°C

2

IR

IRL3103S

IRLZ44

D PAK

0.014

0.028

0.037

56A at 25°C

40A at 100°C

1600

3300

1750

1.8

1.0

175

150

IR

TO-220

50A at 25°C

36A at 100°C

Fuji

2SK1388

TO-220

35A at 25°C

2.08

Note: Please refer to the manufacturer’s data sheet for testing conditions and detailed information.

*Users must consider the power dissipation and thermal effects in the LTC1530 if driving external MOSFETs with high values of input capacitance.

Refer to the PV Supply Current vs GATE Capacitance in the Typical Performance Characteristics section.

CC

12

LTC1530

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APPLICATIO S I FOR ATIO

U

Inductor Selection

Solving this equation for a typical 5V to 2.8V application

with a 2µH inductor, ripple current is:

TheinductorisoftenthelargestcomponentinanLTC1530

designandmustbechosencarefully. Choosetheinductor

value and type based on output slew rate requirements

and expected peak current. The required output slew rate

primarily controls the inductor value. The maximum rate

ofriseofinductorcurrentissetbytheinductor’svalue, the

input-to-output voltage differential and the LTC1530’s

maximum duty cycle. In a typical 5V input, 2.8V output

application, the maximum rise time will be:

2.2V 0.56

(

)(

)

= 2A

P-P

300kHz 2µH

(

)(

)

Peak inductor current at 11.2A load:

2A

2

11.2A +

= 12.2A

The ripple current should generally fall between 10% and

40% of the output current. The inductor must be able to

withstand this peak current without saturating, and the

copper resistance in the winding should be kept as low as

possible to minimize resistive power loss. Note that in

circuits not employing the current limit function, the

current in the inductor may rise above this maximum

under short circuit or fault conditions; the inductor should

be sized accordingly to withstand this additional current.

Inductorswithgradualsaturationcharacteristics(example:

powdered iron) are often the best choice.

V − V

1.85

L

A

µs

IN

OUT

DC

=

MAX

L

where L is the inductor value in µH. With proper frequency

compensation,thecombinationoftheinductorandoutput

capacitor values determine the transient recovery time. In

general, a smaller value inductor improves transient

response at the expense of ripple and inductor core

saturation rating. A 2µH inductor has a 0.9A/µs rise time

in this application, resulting in a 5.5µs delay in responding

to a 5A load current step. During this 5.5µs, the difference

between the inductor current and the output current is

made up by the output capacitor. This action causes a

temporary voltage droop at the output. To minimize this

effect, the inductor value should usually be in the 1µH to

5µH range for most 5V input LTC1530 circuits. Different

combinations of input and output voltages and expected

loads may require different values.

Input and Output Capacitors

A typical LTC1530 design places significant demands on

both the input and the output capacitors. During normal

steady load operation, a buck converter like the LTC1530

drawssquarewavesofcurrentfromtheinputsupplyatthe

switchingfrequency. Thepeakcurrentvalueisequaltothe

output load current plus 1/2 the peak-to-peak ripple cur-

rent. Most of this current is supplied by the input bypass

capacitor. The resulting RMS current flow in the input

capacitor heats it and causes premature capacitor failure

in extreme cases. Maximum RMS current occurs with

50% PWM duty cycle, giving an RMS current value equal

to I_OUT/2. A low ESR input capacitor with an adequate

ripple current rating must be used to ensure reliable

operation. Note that capacitor manufacturers’ ripple cur-

rentratingsareoftenbasedononly2000hours(3months)

lifetime at rated temperature. Further derating of the input

capacitor ripple current beyond the manufacturer’s speci-

fication is recommended to extend the useful life of the

circuit. Loweroperatingtemperaturehasthelargesteffect

on capacitor longevity.

Once the required inductor value is selected, choose the

inductor core type based on peak current and efficiency

requirements. Peak current in the inductor is equal to the

maximum output load current plus half of the peak-to-

peak inductor ripple current. Inductor ripple current is set

by the inductor’s value, the input voltage, the output

voltage and the operating frequency. If the efficiency is

high, ripple current is approximately equal to:

V − V

V

(

)(

)

IN

OUT OUT

I

=

RIPPLE

f

(

L

V

IN

)( )(

)

OSC

O

where

f_OSC= LTC1530 oscillator frequency

L_O= Inductor value

13

LTC1530

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U

APPLICATIO S I FOR ATIO

The output capacitor in a buck converter under steady

state conditions sees much less ripple current than the

input capacitor. Peak-to-peak current is equal to inductor

ripple current, usually 10% to 40% of the total load

current. Output capacitor duty places a premium not on

power dissipation but on ESR. During an output load

transient, the output capacitor must supply all of the

additional load current demanded by the load until the

LTC1530 adjusts the inductor current to the new value.

ESR in the output capacitor results in a step in the output

voltage equal to the ESR value multiplied by the change in

load current. An 11A load step with a 0.05Ω ESR output

capacitor results in a 550mV output voltage shift; this is

19.6% of the output voltage for a 2.8V supply! Because of

the strong relationship between output capacitor ESR and

output load transient response, choose the output capaci-

tor for ESR, not for capacitance value. A capacitor with

suitable ESR will usually have a larger capacitance value

than is needed to control steady-state output ripple.

output capacitor ESR to 0.014Ω. For low cost applica-

tions, the Sanyo MV-GX capacitor series can be used with

acceptable performance.

Feedback Loop Compensation

TheLTC1530voltagefeedbackloopiscompensatedatthe

COMP pin, which is the output node of the g_merror

amplifier. The feedback loop is generally compensated

with an RC + C network from COMP to GND as shown in

Figure 8a.

Loop stability is affected by the values of the inductor, the

output capacitor, the output capacitor ESR, the error

amplifier transconductance and the error amplifier com-

pensation network. The inductor and the output capacitor

create a double pole at the frequency:

1

f =

LC

C

2π L

(

)

OUT

O

Electrolytic capacitors rated for use in switching power

supplies with specified ripple current ratings and ESR can

be used effectively in LTC1530 applications. OS-CON

electrolytic capacitors from Sanyo and other manufactur-

ers give excellent performance and have a very high

performance/size ratio for electrolytic capacitors. Surface

mount applications can use either electrolytic or dry

tantalum capacitors. Tantalum capacitors must be surge

tested and specified for use in switching power supplies.

Low cost, generic tantalums are known to have very short

lives followed by explosive deaths in switching power

supply applications. AVX TPS series surface mount

devices are popular surge tested tantalum capacitors that

work well in LTC1530 applications.

The ESR of the output capacitor and the output capacitor

value form a zero at the frequency:

1

f

=

ESR

2π ESR C

( )(

)(

)

OUT

The compensation network used with the error amplifier

must provide enough phase margin at the 0dB crossover

frequency for the overall open-loop transfer function. The

zero and pole from the compensation network are:

1

f =

and f =

P

Z

2π R C

2π R C1

( )( )( )

C

A common way to lower ESR and raise ripple current

capabilityistoparallelseveralcapacitors.AtypicalLTC1530

application might exhibit 5A input ripple current. Sanyo

OS-CON capacitors, part number 10SA220M (220µF/

10V), feature 2.3A allowable ripple current at 85°C; three

in parallel at the input (to withstand the input ripple

current) meet the above requirements. Similarly, AVX

TPSE337M006R0100 (330µF/6V) capacitors have a rated

maximum ESR of 0.1Ω; seven in parallel lower the net

respectively. Figure 8b shows the Bode plot of the overall

transfer function.

The compensation values used in this design are based on

the following criteria, f_SW= 12f_CO, f_Z= f_LC, f_P= 5f_CO. At the

closed-loop frequency f_CO, the attenuation due to the LC

filter and the input resistor divider is compensated by the

gain of the PWM modulator and the gain of the error

amplifier (g_mERR)(R_C).

14

LTC1530

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APPLICATIO S I FOR ATIO

U

Although a mathematical approach to frequency compen-

sation can be used, the added complication of input and/

or output filters, unknown capacitor ESR, and gross

operating point changes with input voltage, load current

variations and frequency of operation all suggest a more

practical empirical method. This can be done by injecting

atransientcurrentattheloadandusinganRCnetworkbox

to iterate toward the final compensation values or by

obtaining the optimum loop response using a network

analyzer to find the actual loop poles and zeros.

tantalum capacitors for the output capacitor. The opti-

mumcomponentvaluesmightdeviatefromthesuggested

values slightly because of board layout and operating

condition differences.

Table 2. Suggested Compensation Network for a 5V Input

Application Using Multiple Paralleled 330µF AVX TPS Output

Capacitors for 2.5V Output

L (µH)

C

(µF)

R (kΩ)

C (µF)

C1 (pF)

1000

470

220

330

220

68

O

C

1

990

1.3

2.7

6.8

3.6

7.5

18

0.022

0.01

1

1980

4950

990

Table 2 shows the suggested compensation components

for 5V input applications based on the inductor and output

capacitor values. The values were calculated using mul-

tiple paralleled 330µF AVX TPS series surface mount

1

2.7

5.6

0.022

0.01

1980

4950

990

0.01

7.5

15

0.01

220

100

47

V

OUT

1980

4950

0.01

3

36

0.0047

LTC1530

An alternate output capacitor is the Sanyo MV-GX series.

Using multiple paralleled 1500µF Sanyo MV-GX capaci-

tors for the output capacitor, Table 3 shows the suggested

compensationcomponentsfor5Vinputapplicationsbased

on the inductor and output capacitor values.

COMP

4

–

ERR

+

R

C

C1

BG

C

1530 F08a

Table 3. Suggested Compensation Network for a 5V Input

Application Using Multiple Paralleled 1500µF SANYO MV-GX

Output Capacitors for 2.5V Output

Figure 8a. Compensation Pin Hook-Up

L (µH)

C

(µF)

R (kΩ)

C (µF)

C1 (pF)

470

330

220

150

100

68

O

C

1

4500

6000

9000

4500

6000

9000

4500

6000

9000

3

4

0.022

0.01

f

= LTC1530 SWITCHING FREQUENCY

= CLOSED-LOOP CROSSOVER FREQUENCY

SW

CO

1

6

f

Z

2.7

5.6

8.2

11

16

22

33

–20dB/DECADE

0.01

f

P

0.01

FREQUENCY

f

LC

f

ESR

0.01

47

f

CO

Note: For different values of V , multiply the R value by V /2.5 and

OUT

C

OUT

1530 F08b

multiply the C and C1 values by 2.5/V . This maintains the same

C

OUT

crossover frequency for the closed-loop transfer function.

Figure 8b. Bode Plot of the LTC1530 Overall

Transfer Function

15

LTC1530

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U

APPLICATIO S I FOR ATIO

Thermal Considerations

always practical due to physical constraints. Connect

the low side source to the input capacitor ground.

Connect the input and output capacitor to the ground

plane. Run a separate trace for the low side FET source

to the input capacitors. Do not tie this single point

groundinthetracerunbetweenthelowsideFETsource

and the input capacitor ground. This area of the ground

plane is very noisy.

Limit the LTC1530’s junction temperature to less than

125°C. The LTC1530’s SO-8 package is rated at 130°C/W

andcaremustbetakentoensurethattheworst-caseinput

voltage and gate drive load current requirements do not

cause excessive die temperatures. Short-circuit or fault

conditions may activate the internal thermal shutdown

circuit.

3. Locate the small signal resistor and capacitors used for

frequency compensation close to the COMP pin. Use a

separate ground trace for these components that ties

directly to the GND pin of the LTC1530. Do not connect

these components to the ground plane!

LAYOUT CONSIDERATIONS

When laying out the printed circuit board (PCB), the

following checklist should be used to ensure proper

operation of the LTC1530. These items are illustrated

graphically in the layout diagram of Figure 9. The thicker

lines show the high current power paths. Note that at 10A

current levels or above, current density in the PCB itself is

a serious concern. Traces carrying high current should be

as wide as possible. For example, a PCB fabricated with

2oz copper requires a minimum trace width of 0.15" to

carry 10A, and only if trace length is kept short.

4. Place the PV_CCdecoupling capacitor as close to the

LTC1530aspossible.The10µFbypasscapacitorshown

atPV_CChelpsprovideoptimumregulationperformance

by minimizing ripple at the PV_CCpin.

5. Connect the (+) plate of C_INas close as possible to the

drain of the upper MOSFET. LTC recommends an

additional 1µF low ESR ceramic capacitor between V_IN

and power ground.

1. In general, begin the layout with the location of the

powerdevices.Orientthepowercircuitrysothataclean

powerflowpathisachieved.Maximizeconductorwidths

but minimize conductor lengths. Keep high current

connections on one side of the PCB if possible. If not,

minimize the use of vias and keep the current density in

the vias to <1A/via, preferably <0.5A/via. After achiev-

ing a satisfactory power path layout, proceed with the

control circuitry layout. It is much easier to find routes

for the relatively small traces in the control circuits than

it is to find circuitous routes for high current paths.

6. TheV_SENSE/V_OUTpinisverysensitivetopickupfromthe

switching node. Care must be taken to isolate this pin

from capacitive coupling to the high current inductor

switching signals. A 0.1µF is recommended between

theV_OUTpinandtheGNDpindirectlyattheLTC1530for

fixed voltage versions. For the adjustable voltage ver-

sion, keep the resistor divider close to the LTC1530.

The bottom resistor’s ground connection should tie

directly to the LTC1530’s GND pin.

7. Kelvin sense I_MAXand I_FBat the drain and source pins

of Q1.

2. Tie the GND pin to the ground plane at a single point,

preferablyatafairlyquietpointinthecircuit,suchasthe

bottom of the output capacitors. However, this is not

8. Minimize the length of the gate lead connections.

16

LTC1530

W U U

APPLICATIO S I FOR ATIO

U

V

IN

BOLD LINES INDICATE

HIGH CURRENT PATHS

PV

CC

+

1

2

8

Q1

PV

C

G1

CC

IN

+

LTC1530

0.1µF

7

6

5

10µF

GND

G2

L

R

O

IFB

3

4

I

FB

V

OUT

V

OUT

R

IMAX

+

I

Q2

COMP

MAX

C

OUT

R

C

C1

0.1µF

C

1530 F09

Figure 9. LTC1530 Layout Diagram

V

IN

5V

2.7k

PV

12V

10µF

CC

+

0.1µF

1

5

C

**

IN

8

I

PV

MAX

Q1*

CC

G1

†

L

V

O

20Ω

OUT

6

7

3

4

1.9V TO 3.3V

14A

COMP

LTC1530

(SEE TABLE) G2

I

FB

C

O

C1

R

(SEE

TABLE)

C

Q2*

1530 F10

C

V

OUT

GND

2

(SEE TABLE)

†

* SILICONIX SUD50N03-10

** 3× SANYO 10MV1200GX OR

3× SANYO OS-CON 6SH330K

COILTRONICS CTX02-13198 (2µH) OR

PANASONIC ETQP6F2R5HA PCC-N6 (2.5µH)

DEVICE

OUTPUT CAPACITOR (C )

O

R

C

C1

C

LTC1530-3.3

7 X330µF

10k

15k

8.6k

13k

7.5k

11k

5.6k

8.2k

0.022µF

0.033µF

0.022µF

150pF

AVX TPSE337M006R0100

LTC1530-3.3

LTC1530-2.8

LTC1530-2.5

LTC1530-1.9

4 X1500µF

SANYO 6MV1500GX

7 X330µF

AVX TPSE337M006R0100

4 X1500µF

SANYO 6MV1500GX

7 X330µF

AVX TPSE337M006R0100

4 X1500µF

SANYO 6MV1500GX

7 X330µF

AVX TPSE337M006R0100

4 X1500µF

SANYO 6MV1500GX

100pF

150pF

100pF

220pF

120pF

220pF

1530 TA TBL

Figure 10. 5V to 1.9V-3.3V Synchronous Buck Converter

PV_CCIs Powered from 12V Supply

17

LTC1530

TYPICAL APPLICATIO S

U

5V to 1.9V-3.3V Synchronous Buck Converter

PV_CCIs Generated from Charge Pump

V

IN

5V

MBR0530T1 MBR0530T1

+

2.7k

C

**

0.1µF

10µF

IN

0.22µF

1

8

5

4

PV

CC

Q1*

Q2*

I

G1

MAX

†

L

O

V

20Ω

OUT

6

7

3

1.9V TO 3.3V

14A

COMP

LTC1530

(SEE TABLE) G2

I

FB

C

O

C1

(SEE

R

C

TABLE)

C

V

OUT

GND

2

(SEE TABLE)

†

* SILICONIX SUD50N03-10

** 3× SANYO 10MV1200GX OR

3× SANYO OS-CON 6SH330K

COILTRONICS CTX02-13198 (2µH) OR

PANASONIC ETQP6F2R5HA PCC-N6 (2.5µH)

1530 TA02

DEVICE

OUTPUT CAPACITOR (C )

O

R

C

C1

C

LTC1530-3.3

7 X330µF

10k

15k

8.6k

13k

7.5k

11k

5.6k

8.2k

0.022µF

0.033µF

0.022µF

150pF

100pF

150pF

100pF

220pF

120pF

220pF

AVX TPSE337M006R0100

LTC1530-3.3

LTC1530-2.8

LTC1530-2.5

LTC1530-1.9

4 X1500µF

SANYO 6MV1500GX

7 X330µF

AVX TPSE337M006R0100

4 X1500µF

SANYO 6MV1500GX

7 X330µF

AVX TPSE337M006R0100

4 X1500µF

SANYO 6MV1500GX

7 X330µF

AVX TPSE337M006R0100

4 X1500µF

SANYO 6MV1500GX

1530 TA TBL

5V to Dual Output (3.3V and 12V) Synchronous Buck Converter

V

IN

5V

LT1129CS8

OUT

V

OUT2

12V

IN

C4

22µF

35V

C4

33µF

20V

+

R3

8.25k

1%

0.4A

ADJ

D2

D1

MBR0530T1 MBR0530T1

R4

3.74k

1%

C

= 3× SANYO 10MV1200GX

IN

+

= 4× SANYO 6MV1500GX

OUT

+

C2

C

IN

R1

L1 = SUMIDA 6383-T018

C3

C5

0.22µF

0.1µF

2.7k

(PRI = 1µH, SEC = 26µH)

Q1, Q2 = SILICONIX SUD50N03-10

Q3 = SILICONIX Si4450DY

10µF

1

8

L1

5

I

4

PV

Q1

CC

G1

MAX

R2, 20Ω

6

7

3

Q3

COMP

I

FB

C1

220pF

V

3.3V

14A

OUT1

R

LTC1530-3.3

C

Q2

G2

4.7k

+

C

OUT

C

V

OUT

GND

0.022µF

1530 TA09

2

18

LTC1530

U

TYPICAL APPLICATIO S

LTC1530 3.3V to 1.8V, 14A Application

V

IN

3.3V

1

2

V

IN

+

5

4

–

+

3.3µF

10µF

C1

LTC1517-5

GND

0.22µF

C1

3

V

OUT

D2

MBRS120

D1

MBRS120

PV

CC

+

C

IN

1500µF

× 3

+

0.1µF

10µF

2.4k

Q1

SUD50N03

0.22µF

1

8

6

5

4

L1

2.5µH

PV

CC

I

G1

MAX

V

1.8V

14A

20Ω

OUT

COMP

LTC1530-ADJ

I

FB

C

C1

100pF

OUT

R

C

7

3

Q2

SUD50N03

1500µF

× 4

G2

13k

C

V

SENSE

GND

2

0.022µF

R2

1.24k

1%

R1

576Ω

1% L1 = PANASONIC ETQP6F2R5HA PCC-N6

C

= 3× SANYO 6MV1500GX

IN

OUT

1530 TA03

= 4× SANYO 6MV1500GX

Other Methods to Generate PV_CCSupply from 3.3V Input

D1

L1*

33µH

MBRS120T3

V

PV

IN

CC

3.3V

12V

+

68µF

20V

1µF

47µF

30Ω

2

1

I

V

LIM

IN

3

8

SW1

LT1107-12

SENSE

GND

5

SW2

4

D1

MBR0520

L1**

10µH

V

PV

IN

CC

3.3V

10V

+

10µF

20V

1µF

3.3µF

3

6

V

SHDN

IN

5

2

SW

FB

1

* SUMIDA CD54-330K OR

COILCRAFT DT3316-473

** SUMIDA CD43-100

LT1317

V

C

2.2M

300k

3000pF

33k

100pF

GND

4

1530 TA04

19

LTC1530

TYPICAL APPLICATIO S

U

LTC1530 High Efficiency Boost Converter

R5

L2

2.1µH

0.005Ω

5%

L1

V

IN

3.3V

1µH

V

5V

6A

OUT

C3

1µF

16V

R2

47k

C10

1µF

16V

+

C12

470µF

6V

C9

R4

360Ω

0.22µF

+

C18

330µF

10V

D3

+

C14

C16

330µF

10V

C13

1µF

16V

MBRS140T3

330µF

+

C11

470µF

6V

10V

16V

C15

330µF

10V

+

C17

Q2

D2

330µF

IRF7811

MBR0530T1

10V

D1

FMMD914

Q3

IRF7811

Q4

IRF7811

1

5

6

+

C2

1µF

16V

C1

10µF

16V

PV

I

CC MAX

FB

C8

4

7

COMP

G2

1µF

C4

100pF

Q1

FMMT3904

C5

0.022µF

R1

10k

16V

LTC1530

R7

8

3

1

5

–

G1

71.5k

1%

V

C1

IN

C7

0.22µF

16V

LTC1517-5

GND

1530 TA05a

V

2

3

4

+

SENSE

C1

R6

GND

R3

47k

23.2k

2

1%

V

OUT

C6

1µF

16V

L1 = COILCRAFT DO3316P-102

L2 = SUMIDA CEE125C-2R1

Efficiency vs Load Current

100

90

80

70

60

50

40

30

20

T

V

= 25°C

A

= 3.3V

IN

OUT

10

0

= 5V

0

1

3

4

5

6

2

LOAD CURRENT (A)

1530 TA05b

20

LTC1530

U

TYPICAL APPLICATIO S

LTC1530 5V to –5V Synchronous Inverter

V

IN

5V

+

C

IN

OPTIONAL

D1

MBR0530T1

R8

560Ω

1/2W

Z1

12V

+

R1

2.4k

C6

2.2µF

ZENER

1/2W

R9

680Ω

6

5

3

Q1

1/2

LTC1693-2

D2

MBR0530T1

4

Q3

2N7000

1

5

8

R10

R2

100Ω

+

PV

I

G1

C3

C4

CC MAX

V

–5V

5A

330Ω

OUT

Q2

6

10µF 0.1µF

I

FB

LTC1530-ADJ

D4

1N4148

7

3

R6

G2

L1

2.5µH

R7

4.7Ω

C

OUT

220Ω

+

4

D5

MBR0530T1

C5

1/6W

R11

1k

V

COMP

SENSE

2.2µF

GND

2

R

C

8

1

7

C1

1000pF

4.7k

1/2

C

C7

1000pF

C

2

LTC1693-2

0.22µF

1530 TA07a

R5

10k

R3

1k

D3

1N4148

C

, C

= 3× SANYO 10MV1200GX

IN OUT

L1 = PANASONIC ETQP6F2R5HA (PCC-N6)

Q1,Q2 = SILICONIX SUD50N03-10

C2

10µF

R4

3.09k

+

Efficiency vs Load Current

100

90

80

70

60

50

40

30

20

10

0

T

= 25°C

A

0

1

3

4

5

2

LOAD CURRENT (A)

0.1

1530 TA07b

21

LTC1530

U

TYPICAL APPLICATIO S

LTC1530 Synchronous SEPIC Converter

R

Q2

SENSE

C

FLY

L1A

0.02Ω

V

5V

4A

P-MOSFET

OUT

V

IN

•

4V TO 8V

1,2,3

7,8,9

4,5,6

+

R3

3.09k

C2

D2

1N4148

L1B

10µF

+

C

10,11,12

IN

C

OUT

Q1

N-MOSFET

•

R4

1k

R2

10k

R5

20Ω

R1

2.2k

D1

MBR0520

L2

10µH

R9

5.6Ω

+

C4

0.1µF

C8

4.7µF

C3

10µF

C9

4.7µF

6

1

5

+

6

C5

PV

I

V

CC MAX FB

IN

4.7µF

3

1

5

2

8

SW

FB

SHDN

G1

G2

LTC1693-3

7

8

C1

1000pF

LTC1530-ADJ

7

3

1

LT1317

3

R6

4

COMP

V

4

2.2M

SENSE

R

C

V

C

4.7k

GND

4

GND

2

C7

R7

300k

3000pF

C

0.22µF

C6

100pF

R8

33k

1530 TA08a

C

FLY

, C

= 3× SANYO 10MV1200GX

= 2× SANYO 16SA150MK

L2 = SUMIDA CD43-100

IN OUT

C

Q1 = SILICONIX N-MOSFET SI4420DY

Q2 = SILICONIX P-MOSFET SI4425DY

L1 = COILTRONIX CTX02-13198-1

(L1A = 1,2,3 → 7,8,9; L1B = 10,11,12 → 4,5,6)

R

= DALE LVR-3 3W

SENSE

Efficiency vs Load Current

100

T

= 25°C

A

90

80

70

60

50

40

30

20

10

0

V

IN

= 4V

V

= 8V

IN

0

0.5 1.0

2.5 3.0 3.5 4.0

1.5 2.0

LOAD CURRENT (A)

0.1

1530 TA08b

22

LTC1530

U

PACKAGE DESCRIPTION ^{Dimensions in inches (millimeters) unless otherwise noted.}

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.189 – 0.197*

(4.801 – 5.004)

7

5

8

6

0.150 – 0.157**

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

1

3

4

2

0.010 – 0.020

(0.254 – 0.508)

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0°– 8° TYP

0.016 – 0.050

(0.406 – 1.270)

0.050

(1.270)

BSC

0.014 – 0.019

(0.355 – 0.483)

TYP

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

SO8 1298

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

23

LTC1530

TYPICAL APPLICATION

U

LTC1530 –5V to 2.5V, 5A Inverting Polarity Converter

(OPTIONAL)

GND

MBRS130

R8

4.7Ω

Z1

1N4742A

MBRS130

+

C5

0.1µF

C4

10µF

R

SENSE

0.02Ω

C8

0.22µF

V

2.5V

5A

*

OUT

L1

2.5µH

C

OUT

+

1500µF

6.3V

R6

2k

R7

22Ω

C

IN

+

× 3

1500µF

6.3V

Q2

1

CC

5

6

I

FB

× 3

I

PV

MAX

C9

1µF

R1

1.5K

8

4

Z2

Q1

G1

COMP

Q3

R11

10k

BZX55C6V2

1/2W, 6.2V

R13

1k

2N3906

LTC1530-ADJ

7

R

Q5

2N3904

C

R10

1k

G2

5.6k

C1

1000pF

V

GND

Q4

2N3904

GND

2

SENSE

3

C

R2

1k

R9

10k

R12

40k

C10

1µF

0.1µF

HARD CURRENT LIMIT CIRCUIT

(OPTIONAL)

V

= –5V

IN

C

, C = 3× SANYO 6MV1500GX

L1 = PANASONIC ETQP6F2R5HA PCC-N6

Q1,Q2 = SILICONIX SUD50N03-10

IN OUT

1530 TA06

*FOR HIGHER OUTPUT VOLTAGE (EX 3.3V),

INCREASE R8 TO 20Ω AND INSTALL Z1

R

= DALE LVR-1, 1W

SENSE

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

LTC1266

Current Mode Step-Up/Down Switching Regulator Controller

Synchronous N- or P-Channel FETs,

Comparator/Low-Battery Detector

LTC1430A

LTC1553

High Power Step-Down Switching Regulator Controller

Synchronous N-Channel FETs, 3.3V to 2.5V Conversion

5-Bit Programmable Synchronous Switching Regulator

Controller for Pentium II Processor

Synchronous N-Channel FETs, Voltage Mode PV ≤ 20V,

CC

1.8V to 3.5V Output

LTC1628

LTC1629

Dual High Efficiency Low Noise Synchronous Step-Down

Switching Regulator

20A to 200A PolyPhase^TMSynchronous Controller

Constant Frequency, Standby 5V and 3.3V LDOs,

3.5V ≤ V ≤ 36V

IN

Expandable from 2-Phase to 12-Phase, Uses All

Surface Mount Components, No Heat Sink

LTC1702

LTC1709

No R

2-Phase Dual Synchronous Step-Down Controller

550kHz, No Sense Resistor

SENSE

2-Phase Synchronous Controller with 5-Bit VID

Current Mode, V to 36V, I

Up to 42A,

OUT

IN

V

from 1.3V to 3.5V

OUT

LTC1735

LTC1753

High Efficiency Synchronous Step-Down Switching Regulator

Drives Synchronous N-Channel FETs, V ≤ 36V

IN

5-Bit Programmable Synchronous Switching Regulator

Controller for Pentium II and Pentium III Processors

Synchronous N-Channel FETs, Voltage Mode PV ≤ 14V,

1.3V to 3.5V Output, VRM8.2 to VRM8.4

CC

LTC1772

LTC1873

SOT-23 Step-Down Controller

100% Duty Cycle, Up to 4A, 2.2V to 9.8V V

IN

Dual 550kHz 2-Phase Synchronous Controller with 5-Bit VID

Desktop VID Codes, I Up to 25A On Each Channel,

OUT

28-Lead SSOP

LTC1929

2-Phase Synchronous Controller

Up to 42A, Uses All Surface Mount Components,

No Heat Sink, 3.5V ≤ V ≤ 36V

IN

PolyPhase is a trademark of Linear Technology Corporation.

1530f LT/TP 0200 4K • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com

LINEAR TECHNOLOGY CORPORATION 1998


型号：	LTC1530CS8-2.8
厂家：	Linear
描述：	High Power Synchronous Switching Regulator Controller 高功率同步开关稳压控制器开关光电二极管控制器
文件：	总24页 (文件大小：291K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1530CS8-2.8 [Linear]

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