LTC1153C [Linear]
Auto-Reset Electronic Circuit Breaker; 自动复位电路断路器
| 型号： | LTC1153C |
| 厂家： | 
Linear |
| 描述： | Auto-Reset Electronic Circuit Breaker |
| 文件： | 总16页 (文件大小：342K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1153
Auto-Reset
Electronic Circuit Breaker
U
DESCRIPTIO
EATURE
S
F
■
■
■
■
■
■
■
■
■
■
Programmable Trip Delay: 15µs to >100ms
Programmable Trip Current: 1mA to >20A
Programmbale Auto-Reset Time: 1ms to >10 sec.
4.5V to 18V Supply Range
Drives Low RDS(ON) N-Channel MOSFETs
Status Output Indicates Fault Condition
Thermal Trip with PTC Thermistor
8µA IQ in Standby Mode
The LTC1153 electronic circuit breaker drives a low cost
N-channel MOSFET to interrupt power to a sensitive
electronic load in the event of an over-current condition.
The breaker remains tripped for a period of time set by an
external timing capacitor and then is automatically reset.
This cycle continues until the over-current condition is
removed, protecting both the sensitive load and the
MOSFET switch.
No External Charge Pump Capacitors
Available in 8-Pin SOIC
The trip current, trip delay time and auto-reset period are
programmable over a wide range to accommodate a
varietyofloadimpedances. Anactivehighshutdowninput
isalsoprovidedandinterfacesdirectlytoaPTCthermistor
for thermal circuit breaking. An open-drain output is
provided to report breaker status to the µP.
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PPLICATI
S
A
■
■
■
■
■
■
Power Bus Circuit Breaker
SCSI Termination Power Protection
Regulator Over-Current Protection
Battery Short-Circuit Protection
DC Motor Stall Protection
The LTC1153 is available in both 8-pin DIP and 8-pin SOIC
packages.
Sensitive System Power Interrupt
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O
TYPICAL APPLICATI
5V/1A Electronic Circuit Breaker with 1ms Trip Delay,
200ms Auto-Reset Period and 70°C Thermal Shutdown
Trip Delay Time
10
ON/OFF
R
R
C
= 0.1Ω
IN
VS
SEN
D
D
C
= 100k
*R
R
D
SEN
D
C
T
0.01µF
= 0.01µF
0.1Ω
100k
0.22µF
C
DS
G
T
Z5U
1
0.1
LTC1153
TO µP
IRLR024
STATUS
GND
51k
51k
SHUTDOWN
5V
SENSITIVE
5V LOAD
**70°C
PTC
0.01
ALL COMPONENTS SHOWN ARE SURFACE MOUNT.
IMS026 INTERNATIONAL MANUFACTURING SERVICE, INC. (401) 683-9700
RL2006-100-70-30-PT1 KEYSTONE CARBON COMPANY (814) 781-1591
1
10
CIRCUIT BREAKER CURRENT (A)
100
*
**
LTC1153 • TA02
LTC1153 • TA01
1
LTC1153
W W W
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ABSOLUTE AXI U RATI GS
Current (Any Pin).................................................. 50mA
Operating Temperature
LTC1153C .............................................. 0°C to 70°C
Storage Temperature Range ................. –65°c to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
Supply Voltage ........................................................ 22V
Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V)
Timing Capacitor Voltage... (VS + 0.3V) to (GND – 0.3V)
Gate Voltage ....................... (VS + 24V) to (GND – 0.3V)
Status Output Voltage.............................................. 15V
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/O
PACKAGE RDER I FOR ATIO
ORDER PART
ORDER PART
TOP VIEW
TOP VIEW
NUMBER
NUMBER
IN
TIMING CAP
STATUS
1
2
3
4
V
IN
TIMING CAP
STATUS
1
2
3
4
8
7
6
5
V
S
8
7
6
5
S
DRAIN SENSE
GATE
DRAIN SENSE
GATE
LTC1153CS8
LTC1153CN8
GND
SHUTDOWN
GND
SHUTDOWN
S8 PACKAGE
8-LEAD PLASTIC SOIC
N8 PACKAGE
8-LEAD PLASTIC DIP
LTC1154 • PO02
LTC1153 • PO01
S8 PART MARKING
1153
TJMAX = 100°C, θJA = 130°C/W (N8)
TJMAX = 100°C, θJA = 150°C/W
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, CT = 0.1µF, VSD = 0V unless otherwise noted.
LTC1153C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
18
UNITS
V
V
S
Supply Voltage
●
4.5
I
I
I
Quiescent Current OFF
Quiescent Current ON
Quiescent Current ON
Input High Voltage
Input Low Voltage
Input Current
V = 5V, V = 0V
8
20
µA
µA
µA
V
Q
Q
Q
S
IN
V = 5V, V = 5V
85
120
400
S
IN
V =12V, V = 5V
180
S
IN
V
V
●
●
●
2
INH
INL
0.8
V
I
0 < V < V
S
±1
µA
pF
IN
V
IN
C
Input Capacitance
5
IN
V
CT
Timing Capacitor Threshold Voltage
V = 5V
V = 12V
S
2.1
2.0
2.5
2.6
2.9
3.2
V
V
S
I
Timing Capacitor Current
V = 12V
3.0
2
4.2
6.0
µA
V
CT
S
V
V
Shutdown Input High Voltage
Shutdown Input Low Voltage
Shutdown Input Current
●
●
●
SDH
SDL
0.8
V
I
0V < V < V
S
±1
µA
SD
IN
V
Drain Sense Threshold Voltage
80
75
100
100
120
125
mV
mV
SEN
●
●
I
Drain Sense Input Current
0V < V
< V
±0.1
µA
SEN
SEN
S
2
LTC1153
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, CT = 0.1µF, VSD = 0V unless otherwise noted.
LTC1153C
SYMBOL
PARAMETER
CONDITIONS
V = 5V
MIN
TYP
MAX
UNITS
V
GATE
– V Gate Voltage Above Supply
●
●
●
6.0
7.5
15.0
7.0
8.3
18.0
9.0
15.0
25.0
V
V
V
S
S
V = 6V
S
V = 12V
S
V
Status Output Low Voltage
Status Output Leakage Current
Turn-ON Time
I
= 400µA
STAT
●
●
0.05
0.4
1
V
STAT
STAT
ON
I
t
V
= 12V
µA
STAT
V = 5V, C
Time for V
Time for V
= 1000pF
S
GATE
GATE
GATE
> V + 2V
30
100
110
450
300
1000
µs
µs
S
> V + 5V
S
V = 12V, C
= 1000pF
S
GATE
Time for V
Time for V
> V + 5V
20
50
80
160
200
500
µs
µs
GATE
GATE
S
> V + 10V
S
t
t
t
Turn-OFF Time
V = 5V, C
Time for V
= 1000pF
< 1V
OFF
TD
S
GATE
GATE
10
10
5
36
28
25
23
17
13
60
60
40
40
40
35
µs
µs
µs
µs
µs
µs
V = 12V, C
= 1000pF
S
GATE
Time for V
< 1V
GATE
Minimum Trip Delay
Shutdown Turn-OFF Time
V = 5V, C
Time for V
= 1000pF
< 1V
S
GATE
GATE
V = 12V, C
= 1000pF
S
GATE
Time for V
< 1V
5
GATE
V = 5V, C
Time for V
= 1000pF
< 1V
SD
S
GATE
GATE
V = 12V, C
= 1000pF
S
GATE
Time for V
< 1V
GATE
The
●
denotes specifications which apply over the operating temperature range.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
MOSFET Switch Gate Voltage
Supply Current ON
50
45
40
35
30
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
0
24
22
20
18
16
14
12
10
8
T
A
= 25°C
V
A
= 0V
IN
T
= 25°C
6
0
4
0
5
10
15
20
0
5
10
15
20
0
5
10
15
20
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1153 • TPC01
LTC1153 • TPC02
LTC1153 • TPC03
3
LTC1153
TYPICAL PERFOR A CE CHARACTERISTICS
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Input Threshold Voltage
Auto-Reset Period
Drain Sense Threshold Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
150
140
130
120
110
100
90
10
1
T
= 25°C
A
3.3µF
1µF
V
ON
0.33µF
V
OFF
0.1
0.1µF
80
70
0.033µF
60
50
0.01
0
5
10
15
20
10
SUPPLY VOLTAGE (V)
20
0
5
10
15
20
0
5
15
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1153 • TPC04
LTC1153 • TPC05
LTC1153 • TPC06
MOSFET Gate Turn-ON Time
MOSFET Gate Turn-OFF Time
Built-In Trip Delay
1000
900
800
700
600
500
400
300
200
100
0
50
45
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
C
GATE
= 1000pF
C
= 1000pF
C
= 1000pF
GATE
GATE
TIME FOR V
< 1V
TIME FOR V
< 1V
GATE
GATE
V
SEN
= V – 1V
S
NO EXTERNAL DELAY
V
GS
= 5V
V
= 2V
GS
0
0
10
SUPPLY VOLTAGE (V)
20
0
5
10
SUPPLY VOLTAGE (V)
15
20
0
5
10
SUPPLY VOLTAGE (V)
15
20
0
5
15
LTC1153 • TPC07
LTC1153 • TPC08
LTC1153 • TPC09
Standby Supply Current
Input ON Threshold Voltage
Supply Current ON
50
45
40
35
30
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
0
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.O
0.8
0.6
0.4
V
= 0V
V
IN
= 5V
IN
V
V
= 5V
S
S
= 18V
V
= 12V
= 5V
S
V
= 18V
S
V
S
V
= 5V
75 100 125
S
0
–50
0
25
50
–50
0
25
50
75 100 125
–50
–25
0
25
50
75 100 125
–25
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LTC1153 • TPC10
LTC1153 • TPC11
LTC1153 • TPC12
4
LTC1153
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Threshold Voltage
Auto-Reset Time*
MOSFET Gate Drive Current
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.O
0.8
0.6
0.4
1000
100
10
10
T
A
= 25°C
*SECONDS OF DELAY
PER µF C
T
V
= 18V
S
V
= 12V
= 5V
V
= 12V
S
S
V
1
S
V
V
= 5V
S
S
= 18V
V
S
= 18V
V
= 5V
S
1
0.1
0.1
–50
0
25
50
75 100 125
–25
–50 –25
0
125
25
50
75 100
0
4
8
12
16
20
TEMPERATURE (°C)
TEMPERATURE (°C)
GATE VOLTAGE ABOVE SUPPLY (V)
LTC1153 • TPC15
LTC1153 • TPC13
LTC1153 • TPC14
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PI FU CTIO S
impedance when driven above the rail (the equivalent of a
few hundred kΩ). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.
Input and Shutdown Pins
TheLTC1153inputpinisactivehighandactivatesallofthe
protection and charge pump circuitry when switched ON.
The shutdown pin is designed to break the circuit if a
secondary fault condition (over temperature, etc.) is de-
tected. The LTC1153 logic and shutdown inputs are high
impedance CMOS gates with ESD protection diodes to
ground and supply and therefore should not be forced
beyond the power supply rails. The shutdown pin should
be connected to ground when not in use.
Supply Pin
The supply pin of the LTC1153 serves two vital purposes.
The first is obvious: it powers the input, gate drive, regu-
lation and protection circuitry. The second purpose is less
obvious: it provides a Kelvin connection to the top of the
drain sense resistor for the internal 100mV reference.
Timing Capacitor Pin (Auto-Reset Timer)
The LTC1153 is designed to be continuously powered so
that the gate of the MOSFET is actively driven at all times.
If it is necessary to remove power from the supply pin and
then re-apply it, the input pin (or enable pin) should be
cycled a few milliseconds after the power is re-applied to
reset the input latch and protection circuitry. Also, the
input and enable pins should be isolated with 10k resistors
to limit the current flowing through the ESD protection
diodes to the supply pin.
The small capacitor charging current (4.2µA) produces
large delays with relatively small valued capacitors, but
care must be taken to ensure that this current is not
shunted to ground through a leaky capacitor or printed
circuit board trace. The timing capacitor voltage is sensed
by a high impedance CMOS comparator input with ESD
clamp diodes to ground and supply and therefore should
not be forced beyond the power supply rails. This pin can
be grounded if the auto-reset function is not used.
The supply pin of the LTC1153 should never be forced
below ground as this may result in permanent damage to
the device. A 300Ω resistor should be inserted in series
with the ground pin if negative supply voltage transients
are anticipated.
MOSFET Gate Drive Pin
TheMOSFETgatedrivepiniseitherdriventogroundwhen
the switch is turned OFF or driven above the supply rail
when the switch is turned ON. This pin is a relatively high
5
LTC1153
U
U
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PI FU CTIO S
Drain Sense Pin
during start-up. This trip delay can be set from a few
microseconds to many seconds. However, very long de-
laysmayputtheMOSFETswitchinriskofbeingdestroyed
byashort-circuitcondition. (seeApplicationsInformation
Section).
The drain sense pin is compared against the supply pin
voltage. If the voltage at this pin is more than 100mV
below the supply pin, the input latch will trip and the
MOSFET switch will be turned off.
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced beyond the
power supply rails.
Status Pin
The status pin is an open-drain output which is driven low
whenever the breaker is tripped. A 51k pull-up resistor
should be connected between this output and a logic
supply. The status pins of multiple LTC1153s can be OR’d
together if independent fault sensing is not required. No
connection is required to this pin when not in use.
Some loads, such as large supply capacitor, lamps, or
motors require high inrush currents. An RC time is added
between the sense resistor and the drain sense pin to
ensure that the drain sense circuitry does not false trigger
W
BLOCK DIAGRA
DRAIN
SENSE
ANALOG SECTION
V
S
SHUTDOWN
TTL-TO-CMOS
CONVERTER
10µs
DELAY
COMP
SHUTDOWN
GATE
LOW STANDBY
CURRENT
REGULATOR
100mV
REFERENCE
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
ANALOG DIGITAL
R
INPUT
LATCH
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATORS
INPUT
OSCILLATOR
AND CHARGE
PUMP
FAST/SLOW
GATE CHARGE
LOGIC
ONE
SHOT
S
GND
TIMER
CAP
AUTO-RESET
TIMER
FAULT DETECTION
AND STATUS
OUTPUT DRIVER
STATUS
LTC1153 • BD01
6
LTC1153
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TEST CIRCUIT
TI I G DIAGRA
5V
OVER-CURRENT
NOR-
MAL
SHUT-
DOWN
OFF NORMAL
(AUTO-CURRENT)
OFF
1
8
7
6
5
R
INPUT
IN
V
S
SEN
C
0.05Ω
P
INPUT
OUTPUT
STATUS
51k
0.01µF
*200µs
2
3
4
C
DS
G
T
R 100k
D
0.1µF
Z5U
LTC1153
IRLZ24
STATUS
GND
STATUS
OUTPUT
SD
S1
TIMING
CAP
SHUTDOWN
*90ms
10Ω 1Ω
SHUT-
DOWN
LTC1153 • TC01
LTC1153 • TD01
S1 CLOSED
S1 OPEN
*TIMES FOR COMPONENTS SHOWN IN TEST CIRCUIT
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LTC1153 OPERATIO
The LTC1153 is an electronic circuit breaker with built-in
MOSFET gate charge pump, over-current detection and
auto-reset circuitry. The LTC1153 consists of the follow-
ing functional blocks:
Internal Voltage Regulation
The output of the TTL-to-CMOS converter drives two
regulated supplies which power the low voltage CMOS
logicandanalogblocks.Theregulatoroutputsareisolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
TTL and CMOS Compatible Inputs
The LTC1153 input and shutdown input have been de-
signed to accommodate a wide range of logic families.
Both input thresholds are set at about 1.3V with approxi-
mately 100mV of hysteresis.
Gate Charge Pump
Gate drive for the MOSFET switch is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply volt-
age.Thechargepumpcapacitorsareincludedon-chipand
thereforenoexternalcomponentsarerequiredtogenerate
the gate drive.
A low standby current voltage regulator provides continu-
ous bias for the TTL-to-CMOS converter. The TTL-to-
CMOS converter output enables the rest of the circuitry. In
this way the power consumption is kept to a minimum in
the standby mode.
Auto-Reset Timer
Drain Current Sense
An external timing capacitor, CT, is ramped up by a small
current whenever a fault is detected, i.e., the switch
latched off. When the timing capacitor ramps up to ap-
proximately 2.5V, the switch is turned back on and the
timing capacitor discharged. If the circuit breaker output
isstillinanoverloadstate,thebreakerwilllatchoffandthis
cycle will continue until the fault condition is removed.
The LTC1153 is configured to sense the current flowing
into the drain of an N-channel MOSFET switch. An internal
100mV reference is compared to the drop across a sense
resistor (typically 0.002Ω to 0.10Ω) in series with the
drain lead. If the drop across this resistor exceeds the
internal 100mV threshold, the input latch is reset and the
gate is quickly discharged via a relatively large N-channel
transistor.
7
LTC1153
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LTC1153 OPERATIO
Controlled Gate Rise and Fall Times
Status Output Driver
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions in normal
operation. If a short-circuit or current overload condition
is encountered, the gate is discharged very quickly (typi-
cally a few microseconds) by a large N-channel transistor.
The status circuitry continuously monitors the input and
the gate charge control logic. The open-drain output is
driven low when the input is turned ON and the breaker is
latchedoff.Thestatuscircuitryisresetalongwiththeinput
latch when the auto-reset circuitry retries the breaker or
the input is cycled low.
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PPLICATI
S I FOR ATIO
A
12V
MOSFET and Load Protection
+
100µF
IN
V
S
0.036Ω
The LTC1153 protects the power MOSFET switch by
removing drive from the gate as soon as an over-current
condition is detected and breaking the circuit to the load.
Resistive and inductive loads can be protected with no
external time delay in series with the drain sense pin. High
inrush current loads, however, require that the trip delay
time be set long enough to start the load but short enough
to ensure the safety of the MOSFET.
C
DS
G
T
C
T
LTC1153
0.22µF
STATUS
GND
IRFZ24
15V
SD
R
LOAD
C
≤ 1µF
LOAD
12Ω
Resistive Loads
LTC1153 • F01
Loadsthatareprimarilyresistiveshouldbeprotectedwith
asshortadelayaspossibletominimizetheamountoftime
that the MOSFET switch or the load is subjected to an
overload condition. The drain sense circuitry has a built-
in trip delay of approximately 10µs to eliminate false
triggering by power supply or load transient conditions.
This delay is sufficient to “mask” short load current
transients and the starting of a small capacitor (<1µF) in
parallel with the load. The drain sense pin can therefore be
connected directly to the drain current sense resistor as
shown in Figure 1.
Figure 1. Protecting Resistive Loads
12V
+
100µF
IN
V
S
0.036Ω
C
DS
G
T
C
T
LTC1153
0.22µF
STATUS
GND
IRFZ24
15V
SD
12V, 1A
SOLENOID
1N5400
Inductive Loads
Loads that are primarily inductive, such as relays, sole-
noids and stepper motor windings should be protected
with as short a delay as possible to minimize the amount
of time that the MOSFET is subjected to an overload
condition. The built-in 10µs trip delay will ensure that the
breaker is not false-tripped by a supply or load transient.
No external delay components are required as shown in
Figure 2.
LTC1153 • F02
Figure 2. Protecting Inductive Loads
Large inductive loads (>0.1mH) may require diodes con-
nected directly across the inductor to safely divert the
stored energy to ground. Many inductive loads have these
diodes included. If not, a diode of the proper current rating
8
LTC1153
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PPLICATI
A
S I FOR ATIO
should be connected across the load, as shown in Figure
2, to safely divert the stored energy.
Using the values shown in Figure 3, the start-up current is
less than 100mA and does not false-trip the breaker.
Capacitive Loads
Lamp Loads
Large capacitive loads, such as complex electrical sys-
tems with large bypass capacitors, should be powered
using the circuit shown in Figure 3. The gate drive to the
power MOSFET switch is passed through an RC delay
network, R1 and C1, which greatly reduces the turn on
ramp rate of the switch. And since the MOSFET source
voltage follows the gate voltage, the load is powered
smoothly and slowly from ground. This dramatically re-
duces the start-up current flowing into the supply capaci-
tor/s which, in turn, reduces supply transients and allows
for slower activation of sensitive electrical loads. (Diode,
D1, provides a direct path for the LTC1153 protection
circuitry to quickly discharge the gate).
Theinrushcurrentcreatedbyalampduringturn-oncanbe
10 to 20 times greater than the rated operating current.
ThecircuitshowninFigure4shiftsthetripthresholdupby
a factor of 11:1 (to 30A) for 100ms while the bulb is turned
on. The trip threshold then drops down to 2.7A after the
inrush current has subsided.
12V
+
470µF
10k
0.036Ω
IN
V
S
100k
C
DS
G
T
C
T
VN2222LL
0.1µF
LTC1153
0.33µF
STATUS
GND
1M
SD
MTP3055EL
12V
+
9.1V
470µF
IN
V
S
0.036Ω
C
R
D
1OOk
D
12V/1A
BULB
0.01µF
C
DS
G
T
D1
1N4148
C
T
LTC1153
LTC1153 • F04
0.47µF
STATUS
GND
R1
1OOk
R2
Figure 4. Lamp Driver with Delayed Protection
1OOk
MTP3055E
OUT
SD
C1
Selecting RD and CD
0.33µF
15V
Figure 5 is a graph of normalized breaker trip time versus
breaker current. This graph is used to select the two delay
components, RD andCD, whichmakeupasimpleRCdelay
betweenthedrainsenseresistorandthedrainsenseinput.
+
C
LOAD
100µF
LTC1153 • F03
Figure 3. Powering Large Capacitive Loads
10
The RC network, RD and CD, in series with the drain sense
input should be set to trip based on the expected charac-
teristics of the load after start-up. With this circuit, it is
possible to power a large capacitive load and still react
quickly (10µs) to break the circuit if a short-circuit condi-
tion is encountered. The ramp rate at the output of the
switch as it lifts off ground is approximately:
1
0.1
0.01
dV/dt = (VGATE – VTH)/(R1 × C1)
1
10
100
Andthereforethecurrentflowingintothecapacitorduring
start-up is approximately:
BREAKER CURRENT (1 = SET CURRENT)
LTC1153 • F05
ISTART-UP = CLOAD × dV/dt
Figure 5. Trip Delay Time vs Breaker Current
9
LTC1153
PPLICATI
The Y axis of the graph is normalized to one RC time
constant. The X axis is normalized to the set current. (The
set current is defined as the current required to develop
100mV across the drain sense resistor).
O U
W
U
A
S I FOR ATIO
12V
5V
+
10µF
120k
10k
10k
IN
V
S
0.05Ω
C
T
5V
0.47µF
µP OR
CONTROL
LOGIC
C
T
DS
G
Note that the trip delay time is shorter for increasing levels
of MOSFET current. This ensures that the total energy
dissipated by the MOSFET is always within the bounds
established by the manufacturer for safe operation. (See
MOSFET data sheet for further S.O.A. information).
LTC1153
STATUS
GND
MTP12N06
15V
SD
LOAD
10k
300Ω
Using a Speed-Up Diode
LTC1153 • F07
Another way to reduce the trip delay time is to “bypass”
the delay resistor with a small signal diode as shown in
Figure 6. The diode will engage when the drop across the
drainsenseresistorexceedsabout0.7V,providingadirect
path to the sense pin and dramatically reducing the trip
delay time. The drain sense resistor value is selected to
limit the maximum DC breaker current to 4A.
Figure 7. Reverse Battery Protection
Current Limited Power Supplies
The LTC1153 requires at least 3.5V at the supply pin to
ensure proper operation. It is therefore necessary that the
supply to the LTC1153 be held higher than 3.5V at all
times,evenwhentheoutputoftheswitchisshortcircuited
toground.Theoutputvoltageofacurrentlimitedregulator
may drop very quickly during short-circuit and pull the
supply pin of the LTC1153 below 3.5V before the shut-
down circuitry has had time to respond and remove drive
from the gate of the power MOSFET. A supply filter should
be added as shown in Figure 8 which holds the supply pin
of the LTC1153 high long enough for the over-current
shutdown circuitry to respond and fully discharge the
gate, i.e., break the circuit.
12V
+
100µF
1N4148
IN
V
S
0.036Ω
0.01µF
1OOk
C
DS
G
T
C
T
LTC1153
0.22µF
STATUS
GND
IRF530
15V
SD
LOAD
LTC1153 • F06
5V/2A
REGULATOR
>7V
+
+
*20Ω
10µF
0.1Ω
100µF
Figure 6. Using a Speed-Up Diode
+
1N4148
100k
*47µF
IN
V
S
Reverse Battery Protection
0.1µF
The LTC1153 can be protected against reverse battery
conditions by connecting a resistor in series with the
ground lead as shown in Figure 7. The resistor limits the
supplycurrenttolessthan50mAwith–12Vapplied. Since
the LTC1153 draws very little current while in normal
operation, the drop across the ground resistor is minimal.
the 5V µP (or control logic) is protected by the 10k
resistors in series with the input and status pins.
C
T
DS
G
LTC1153
1µF
IRLR024
STATUS
GND
SHORT
CIRCUIT
SD
LTC1153 • F08
*SUPPLY FILTER COMPONENTS
Figure 8. Supply Filter for Current Limited Supplies
10
LTC1153
O U
W
U
PPLICATI
A
S I FOR ATIO
BecausetheLTC1153ismicropowerinboththestandby
and ON state, the voltage drop across the supply filter
is less than 2mV, and does not significantly alter the
accuracy of the 100mV drain sense threshold voltage.
Five volt linear regulators with small output capacitors
are the most difficult to protect as they can “switch”
from a voltage mode to a current limited mode very
quickly. Thelargeoutputcapacitorsonmanyswitching
regulators, on the other hand, may be able to hold the
supply pin of the LTC1153 above 3.5V sufficiently long
that this extra filtering is not required.
U
TYPICAL APPLICATIO S
Over-Voltage Circuit Breaker
Over-Temperature Circuit Breaker
4.75V TO 5.25V
12V
+
+
10µF
100µF
IN
V
S
IN
V
S
5V
5V
100Ω
51k
C
T
DS
G
C
T
DS
G
51k
0.47µF
LTC1153
5V
0.22µF
LTC1153
5.6V
IRLD024
STATUS
MTD3055E
STATUS
30k
GND
SD
GND
SD
12V
LOAD
5V
LOAD
*PTC
THERMISTOR
(100°C)
*RL3006-50-100-25-PT0 KEYSTONE
SWITCH IS SHUTDOWN WHEN V > 5.7V
S
LTC1153 • TA03
LTC1153 • TA05
24V to 28V Over-Temperature Circuit Breaker
with Bootstrapped Supply
24V to 28V Over-Temperature Circuit Breaker
24V TO 28V
24V TO 28V
+
+
100µF
3k
100µF
100k
+
+
IN
V
IN
V
S
S
18V
18V
10µF
10µF
6.2k
5V
5V
51k
C
DS
G
C
DS
G
T
T
51k
1N4148
0.47µF
LTC1153
0.47µF
LTC1153
STATUS
GND
MTP12N06
STATUS
GND
MTP15N06E
5V
30k
30k
SD
SD
5V
*PTC
*PTC
24V TO 28V
LOAD
24V TO 28V
LOAD
THERMISTOR
(100°C)
THERMISTOR
(100°C)
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK.
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK.
**BOOTSTRAPPING REDUCES I TO 60µA, I
LTC1153 • TA04
LTC1153 • TA06
= 1mA.
Q(ON)
Q(OFF)
11
LTC1153
U
O
TYPICAL APPLICATI S
12V Lamp Driver/Circuit Breaker
Relay Driver with Over-Current Protection
and Status Feedback
with Auto-Reset
12V
12V
+
+
100µF
470µF
2Ω 0.02Ω
10k
0.02Ω
IN
V
S
100k
10k
IN
V
S
5V
0.01µF
C
DS
G
T
1N4148
5V
0.33µF
VN2222LL
LTC1153
C
DS
G
T
1µF
MTD3055E
15V
STATUS
GND
LTC1153
0.1µF
1M
STATUS
GND
TO 12V
LOAD
SD
IRFZ34
SD
12V
1N4001
12V/2A
BULB
COIL CURRENT LIMITED TO 350mA
CONTACT CURRENT LIMITED TO 5A
LTC1153 • TA07
LTC1153 • TA08
SCSI Termination Power 1A Circuit Breaker with
Auto-Reset and Ramped Turn-On
1N5817
0.1Ω
MTD3055EL
4.25V/1A
5V
+
+
100µF
10µF
20Ω
10k
1N4148
+
ON/OFF
STATUS
IN
V
47µF
S
0.1µF
51k
1N4148
100k 100k
0.22µF
C
T
DS
G
0.47µF
Z5U
LTC1153
STATUS
GND
SD
LTC1153 • TA09
Logic Controlled Battery Switch with Reverse Battery Protection,
Ramped Turn-On and 10µA Standby Current
Si9956DY
0.05Ω
SWITCHED
BATTERY
+
+
4 TO 6
CELLS
47µF/16V
ON/OFF
IN
V
S
51k
1N4148
100k 100k
0.22µF
C
DS
G
T
0.47µF
LTC1153
STATUS
STATUS
GND
SD
LTC1153 • TA10
300Ω
12
LTC1153
U
O
TYPICAL APPLICATI S
“4 Cell-to-5V” Regulator with 2A Current Limit, Auto-Reset,
Ramped Turn-On and 10µA Standby Current
+
+
4-CELL
BATTERY
PACK
100µF
0.05Ω
ON/OFF
IN
V
S
51k
IRLR024
5V/1A
1N4148
100k 100k
0.22µF
C
DS
G
T
200pF
10k
0.47µF
LTC1153
1
STATUS
STATUS
GND
8
3
4
LT1431
7
SD
+
470µF
ESR < 0.5Ω
6
5
LTC1153 • TA11
12V Step-Up Regulator with Soft Start, Auto-Reset Circuit Breaker (Pre-Regulator),
Status Feedback and 10µA Standby Current
1N5820
50µH
0.02Ω
IRLZ24
12V/1A
5V
+
+
5
470µF
20Ω
330µF
100k
1N4148
10.72k
+
V
IN
1%
150µF
4
2
+
V
SW
ON/OFF
IN
V
47µF
S
LT1070
0.22µF
FB
51k
1N4148
100k 100k
V
C
1
GND
C
DS
G
T
3
1.24k
1%
0.47µF
Z5U
LTC1153
STATUS
STATUS
GND
1k
0.22µF
SD
1µF
LTC1153 • TA12
12V Step-Up Regulator with 1A Circuit Breaker (Post Regulator), Breaker Status
Feedback and Ramped Output
1N5820
50µH
(12V)
5V
+
+
5
150µF
330µF
0.1Ω
1N4148
10k
V
IN
10.72k
1%
4
2
V
SW
ON/OFF
STATUS
IN
VS
DS
G
LT1070
0.1µF
FB
51k
1N4148
V
C
1
GND
C
T
1.24k
1%
3
0.47µF
Z5U
LTC1153
100k 100k
STATUS
GND
IRF530
1k
1µF
12V
SD
12V/1A
+
47µF
16V
0.22µF
LTC1153 • TA13
13
LTC1153
TYPICAL APPLICATI S
U
O
Auto-Reset Circuit Breaker with Programmable (1-6) Number of
Retries Using Binary Counter
5V TO 18 V
+
100µF
0.1Ω
ON/OFF
IN
V
S
5V
11
LOAD
C
DS
1N4148
T
4
16
0.47µF
Z5U
LTC1153
V
CC
100k
100k
5
UP
STATUS
GND
G
IRF530
100k
12
7
CARRY
74C193
12V
SD
OUTPUT
Q
D
0.22µF
+
A
B
C
D
GND
47µF
15 1 10 9
8
14
FAULT
LTC1153 • TA14
INPUTS*
*SET WITH 3-BIT BINARY WORD = 7 – N
DC Motor Driver with Stall-Current Circuit Breaking (Auto-Reset),
Thermal Overload Shutdown and 10µA Standby Current
12V
+
470µF
0.02Ω
ON/OFF
IN
V
S
5V
0.1µF
100k
51k
C
DS
G
T
LTC1153
0.33µF
10k
2N2907
STATUS
GND
IRFZ34
12V
120k
240Ω
SD
MOTOR
FAULT
LED
*PTC
THERMISTOR
(100°C)
1N5400
M
*RL3006-50-100-25-PTO KEYSTONE
MOUNT ON MOTOR CHASIS OR MOSFET HEAT SINK
LTC1153 • TA15
14
LTC1153
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic Lead
0.400
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
8
1
7
6
5
0.065
(1.651)
TYP
0.250 ± 0.010
(6.350 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.025
–0.015
2
4
3
0.045 ± 0.015
(1.143 ± 0.381)
0.325
+0.635
8.255
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
N8 0392
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.228 – 0.244
0.150 – 0.157
(5.791 – 6.197)
(3.810 – 3.988)
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
0°– 8°
TYP
SO8 0392
1
3
4
2
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
15
LTC1153
U.S. Area Sales Offices
NORTHEAST REGION
Linear Technology Corporation
One Oxford Valley
CENTRAL REGION
Linear Technology Corporation
Chesapeake Square
NORTHWEST REGION
Linear Technology Corporation
782 Sycamore Dr.
2300 E. Lincoln Hwy.,Suite 306
Langhorne, PA 19047
Phone: (215) 757-8578
FAX: (215) 757-5631
229 Mitchell Court, Suite A-25
Addison, IL 60101
Phone: (708) 620-6910
FAX: (708) 620-6977
Milpitas, CA 95035
Phone: (408) 428-2050
FAX: (408) 432-6331
SOUTHEAST REGION
Linear Technology Corporation
17060 Dallas Parkway
Suite 208
SOUTHWEST REGION
Linear Technology Corporation
22141 Ventura Blvd.
Suite 206
Dallas, TX 75248
Phone: (214) 733-3071
FAX: (214) 380-5138
Woodland Hills, CA 91364
Phone: (818) 703-0835
FAX: (818) 703-0517
International Sales Offices
FRANCE
KOREA
TAIWAN
Linear Technology S.A.R.L.
Immeuble "Le Quartz"
58 Chemin de la Justice
92290 Chatenay Mallabry
France
Linear Technology Korea Branch
Namsong Building, #505
Itaewon-Dong 260-199
Yongsan-Ku, Seoul
Korea
Linear Technology Corporation
Rm. 801, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
Phone: 33-1-46316161
FAX: 33-1-46314613
Phone: 82-2-792-1617
FAX: 82-2-792-1619
GERMANY
SINGAPORE
UNITED KINGDOM
Linear Techonolgy GMBH
Untere Hauptstr. 9
D-8057 Eching
Linear Technology Pte. Ltd.
101 Boon Keng Road
#02-15 Kallang Ind. Estates
Singapore 1233
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Germany
Phone: 49-89-319741-0
FAX: 49-89-3194821
Phone: 65-293-5322
FAX: 65-292-0398
Phone: 44-276-677676
FAX: 44-276-64851
JAPAN
Linear Technology KK
5F YZ Building
4-4-12 Iidabashi Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010
World Headquarters
Linear Technology Corporation
1630 McCarthy Blvd.
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
10/92
LT/GP 1092 10K REV 0
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
16
●
●
LINEAR TECHNOLOGY CORPORATION 1992
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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