LT8362HMSE#PBF [Linear]
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| 型号： | LT8362HMSE#PBF |
| 厂家： | 
Linear |
| 描述： | 暂无描述 |
| 文件： | 总32页 (文件大小：2349K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT8362
Low I Boost/SEPIC/
Q
Inverting Converter
with 2A, 60V Switch
DESCRIPTION
The LT®8362 is a current mode DC/DC converter with a
60V, 2A switch operating from a 2.8V to 60V input. With
a unique single feedback pin architecture it is capable
of boost, SEPIC or inverting configurations. Burst Mode
operation consumes as low as 9µA quiescent current to
maintain high efficiency at very low output currents, while
keeping typical output ripple below 15mV.
FEATURES
n
Wide Input Voltage Range: 2.8V to 60V
n
Ultralow Quiescent Current and Low Ripple
Burst Mode® Operation: I = 9µA
2A, 60V Power Switch
Q
n
n
Positive or Negative Output Voltage Programming
with a Single Feedback Pin
n
Programmable Frequency (300kHz to 2MHz)
n
Synchronizable to an External Clock
An external compensation pin allows optimization of loop
bandwidth over a wide range of input and output volt-
ages and programmable switching frequencies between
300kHz and 2MHz. A SYNC/MODE pin allows synchroni-
zation to an external clock. It can also be used to select
between burst or pulse-skipping modes of operation with
or without Spread Spectrum Frequency Modulation for
low EMI. For increased efficiency, a BIAS pin can accept
n
Spread Spectrum Frequency Modulation for Low EMI
n
BIAS Pin for Higher Efficiency
n
Programmable Undervoltage Lockout (UVLO)
n
Thermally Enhanced 10-Lead 3mm × 3mm DFN and
16-Lead MSOP packages
APPLICATIONS
a second input to supply the INTV regulator. Additional
CC
n
Industrial and Automotive
features include frequency foldback and programmable
n
Telecom
soft-start to control inductor current during start-up.
n
Medical Diagnostic Equipment
Portable Electronics
The LT8362 is available in a thermally enhanced 10-lead
3mm × 3mm DFN package or a thermally enhanced
16-lead MSOP package with four pins removed.
n
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
2MHz, 48V Output Boost Converter
Efficiency and Power Loss
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8ꢀ
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6ꢀ
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3ꢀ
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2ꢀꢁ
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ꢀꢁ2
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ꢀꢁ8
ꢀꢁ6
ꢀꢁꢂ
ꢀꢁ2
ꢀ
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ꢁꢂꢃ
6.8μH
ꢀ
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2ꢅꢅꢆꢇ ꢇꢃ ꢀ ꢊ 8ꢀ
32ꢅꢆꢇ ꢇꢃ ꢀ ꢊ ꢋ2ꢀ
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8ꢀ ꢃꢄ 38ꢀ
ꢈꢉ
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ꢀꢁꢂꢃꢄ
ꢈꢉ
ꢀꢁ
ꢀ
ꢀꢁ
ꢁꢂ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄ
ꢀꢁ8362
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢄꢄ
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ꢀꢁ ꢀꢀ
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ꢀꢁꢂ ꢀ
ꢁ
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3ꢀꢁ8ꢂ
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ꢀ 2ꢁꢂ
ꢀꢁ
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2ꢀꢁ
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ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂ ꢀꢁ2 ꢀꢁ3 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ6 ꢀꢁꢂ ꢀꢁ8
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂꢃa
8362 ꢀꢁꢂꢃꢄ
8362fa
1
For more information www.linear.com/LT8362
LT8362
ABSOLUTE MAXIMUM RATINGS
(Note 1)
SW............................................................................ 60V FBX ........................................................................... 4V
V , EN/UVLO............................................................ 60V Operating Junction Temperature (Note 3)
IN
BIAS.......................................................................... 40V
EN/UVLO Pin Above V Pin, SYNC............................. 6V
INTV ...............................................................(Note 2) Storage Temperature Range ...................–65°C to 150°C
V ............................................................................... 4V
C
LT8362E, LT8362I...............................–40°C to 125°C
LT8362H.............................................–40°C to 150°C
IN
CC
PIN CONFIGURATION
ꢀꢁꢂ ꢃꢄꢅꢆ
ꢋꢉꢚ ꢇꢊꢃꢓ
ꢀ
3
ꢃꢄꢅꢆꢇꢈꢉ
ꢀ6 ꢏꢓꢀ
ꢀꢐ ꢏꢓ2
ꢅꢕꢛꢠꢃꢏꢁ
ꢌ
2
3
ꢘ
ꢙ
ꢌꢍ ꢓꢆ
ꢇ
ꢊꢄ
ꢀꢂ
ꢚꢛꢄꢖꢜ
ꢛꢄꢖ
ꢃ
ꢖ
8
ꢗ
6
ꢓꢚꢕꢉꢛꢜꢁꢇꢅ
ꢄꢕ
ꢌꢌ
ꢂꢋꢕꢇꢡ
ꢋꢕꢇ
ꢁ
6
ꢂ
8
ꢊꢄꢋꢇ
ꢀ2 ꢏꢔꢄꢌꢅꢕꢉꢖꢃ
ꢀꢀ ꢏꢏ
ꢄꢕꢀꢃ
ꢓꢓ
ꢌꢌ
ꢉꢉ
ꢄꢌ
ꢞꢄꢈꢓ
ꢝꢀ
ꢍꢊꢎꢏ
ꢇ
ꢌ
ꢀꢑ ꢗꢋ
ꢒ
ꢘꢍꢙ
ꢃ
ꢉ
ꢔꢞꢟ
ꢕꢏꢃ ꢚꢎꢌꢝꢎꢛꢃ
ꢇꢎꢗꢊꢎꢋꢊꢉꢄꢞ ꢕꢏꢃꢀ6 ꢟꢀ2ꢠ
ꢀ6ꢡꢈꢃꢎꢖ ꢚꢈꢎꢏꢋꢊꢌ ꢕꢏꢉꢚ
ꢇꢇ ꢂꢈꢉꢊꢈꢋꢅ
ꢌꢍꢎꢏꢅꢈꢇ ꢐ3ꢑꢑ × 3ꢑꢑꢒ ꢂꢏꢈꢓꢀꢄꢉ ꢇꢔꢕ
θ
= 45°C/W, θ = 10°C/W
JC
θ
= 43°C/W
JA
JA
EXPOSED PAD (PIN 17) IS PGND AND GND, MUST BE SOLDERED TO PCB
EXPOSED PAD (PIN 11) IS PGND AND GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION http://www.linear.com/product/LT8362#orderinfo
LEAD FREE FINISH
LT8362EMSE#PBF
LT8362IMSE#PBF
LT8362HMSE#PBF
LT8362EDD#PBF
LT8362IDD#PBF
LT8362HDD#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT8362EMSE#TRPBF
LT8362IMSE#TRPBF
LT8362HMSE#TRPBF
LT8362EDD#TRPBF
LT8362IDD#TRPBF
LT8362HDD#TRPBF
8362
16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C
16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C
16-Lead Plastic MSOP with 4 Pins Removed –40°C to 150°C
8362
8362
LGWZ
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
LGWZ
LGWZ
Consult LTC® Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
8362fa
2
For more information www.linear.com/LT8362
LT8362
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
V
V
Operating Voltage Range
2.8
60
V
IN
IN
Quiescent Current at Shutdown
V
V
= 0.2V
= 1.5V
1
1
2
15
μA
μA
EN/UVLO
EN/UVLO
2
2
5
25
μA
μA
V
IN
Quiescent Current
Sleep Mode (Not Switching)
SYNC = 0V
SYNC = 0V or INTV , BIAS = 0V
9
9
15
30
μA
μA
l
l
l
Active Mode (Not Switching)
1200
1200
1600
1850
µA
µA
CC
SYNC = 0V or INTV , BIAS = 5V
22
22
40
65
µA
µA
CC
BIAS Threshold
Rising, BIAS Can Supply INTV
4.4
4
4.65
4.25
V
V
CC
Falling, BIAS Cannot Supply INTV
CC
V
Falling Threshold to Supply INTV
BIAS = 12V
BIAS – 2V
V
V
IN
CC
BIAS Falling Threshold to Supply INTV
FBX Regulation
V
= 12V
V
IN
CC
IN
l
l
FBX Regulation Voltage
FBX > 0V
FBX < 0V
1.568
–0.820
1.6
–0.80
1.632
–0.780
V
V
FBX Line Regulation
FBX > 0V, 2.8V < V < 60V
0.005
0.005
0.015
0.015
%/V
%/V
IN
FBX < 0V, 2.8V < V < 60V
IN
l
FBX Pin Current
FBX = 1.6V, –0.8V
–10
10
nA
Oscillator
l
l
l
Switching Frequency (f
)
R = 165k
273
0.92
1.85
300
1
2
327
1.08
2.15
kHz
MHz
MHz
OSC
T
R = 45.3k
T
R = 20k
T
SSFM Maximum Frequency Deviation
Minimum On-Time
(∆f/f ) • 100, R = 20k
14
20
25
%
OSC
T
Burst Mode, V = 24V (Note 6)
70
60
90
85
ns
ns
IN
Pulse-Skip Mode, V = 24V (Note 6)
IN
l
Minimum Off-Time
50
75
ns
l
l
SYNC/Mode, Mode Thresholds (Note 5)
High (Rising)
Low (Falling)
1.3
0.2
1.7
V
V
0.14
l
l
SYNC/Mode, Clock Thresholds (Note 5)
Rising
Falling
1.3
0.8
1.7
V
V
0.4
f
/f
Allowed Ratio
R = 20k
T
0.95
1
1.25
kHz/kHz
SYNC OSC
SYNC Pin Current
SYNC = 2V
SYNC = 0V, Current Out of Pin
10
10
25
25
µA
µA
Switch
l
Maximum Switch Current Limit Threshold
Switch Overcurrent Threshold
2
2.5
3.75
165
0.1
3.1
1
A
A
Discharges SS Pin
Switch R
I
= 0.5A
= 60V
mΩ
µA
DS(ON)
SW
Switch Leakage Current
V
SW
8362fa
3
For more information www.linear.com/LT8362
LT8362
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
EN/UVLO Logic
l
l
l
EN/UVLO Pin Threshold (Rising)
EN/UVLO Pin Threshold (Falling)
EN/UVLO Pin Current
Soft-Start
Start Switching
Stop Switching
1.576
1.555
–50
1.68
1.6
1.90
1.645
50
V
V
V
= 1.6V
nA
EN/UVLO
Soft-Start Charge Current
Soft-Start Pull-Down Resistance
Error Amplifier
SS = 0.5V
2
µA
Ω
Fault Condition, SS = 0.1V
220
Error Amplifier Transconductance
FBX = 1.6V
FBX = –0.8V
75
60
µA/V
µA/V
Error Amplifier Voltage Gain
FBX = 1.6V
FBX = –0.8V
185
145
V/V
V/V
Error Amplifier Max Source Current
Error Amplifier Max Sink Current
V = 1.1V, Current Out of Pin
7
7
µA
µA
C
V = 1.1V
C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.
Note 2: INTV cannot be externally driven. No additional components or
CC
loading is allowed on this pin.
Note 5: For SYNC/MODE inputs required to select modes of operation see
the Pin Functions and Applications Information sections.
Note 6: The IC is tested in a Boost converter configuration with the output
voltage programmed for 24V.
Note 3: The LT8362E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT8362I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT8362H is guaranteed over the full –40°C to
150°C operating junction temperature range.
8362fa
4
For more information www.linear.com/LT8362
LT8362
TYPICAL PERFORMANCE CHARACTERISTICS
FBX Positive Regulation Voltage
vs Temperature
FBX Negative Regulation Voltage
vs Temperature
EN/UVLO Pin Thresholds
vs Temperature
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ꢀꢁꢂꢃ8ꢄ
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ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂ8ꢁꢁ
ꢀꢁꢂ8ꢁꢃ
ꢀꢁꢂ8ꢃꢁ
ꢀꢁꢂ8ꢃꢄ
ꢀꢁꢂ82ꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂ2
ꢀꢁꢂꢃ
ꢀꢁ68
ꢀꢁ66
ꢀꢁ6ꢂ
ꢀꢁ62
ꢀꢁ6ꢂ
ꢀꢁꢂ8
ꢀꢁꢂ6
ꢀꢁꢂꢃ
ꢀꢁ632
ꢀꢁ62ꢂ
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ꢀꢁ6ꢂꢂ
ꢀꢁꢂꢃ2
ꢀꢁꢂ8ꢃ
ꢀꢁꢂꢃ6
ꢀꢁꢂ68
ꢀ
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ꢀ
ꢀ ꢁ2ꢂ
ꢀꢁ
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ꢀꢁꢂꢃꢄꢅꢆ ꢇꢈꢅꢅꢉꢁꢊ ꢋꢌꢃꢍꢁꢎꢆꢇꢇꢏ
ꢀꢁꢂ ꢀ2ꢁ
ꢀ
2ꢀ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀ2ꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂ ꢀ2ꢁ
ꢀ
2ꢀ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀ2ꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂ ꢀ2ꢁ
ꢀ
2ꢀ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀ2ꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
8362 ꢀꢁ2
8362 ꢀꢁ3
8362 ꢀꢁꢂ
Switching Frequency
vs Temperature
Normalized Switching Frequency
vs FBX Voltage
Switching Frequency vs VIN
2ꢀꢁꢂ
2ꢀꢁ8
2ꢀꢁ6
2ꢀꢁꢂ
2ꢀꢁ2
2ꢀꢁꢁ
ꢀꢁꢂ8
ꢀꢁꢂ6
ꢀꢁꢂꢃ
ꢀꢁꢂ2
ꢀꢁꢂꢃ
ꢀ2ꢁ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
2ꢀ
ꢀ
2ꢀꢁꢂ
2ꢀꢁ8
2ꢀꢁ6
2ꢀꢁꢂ
2ꢀꢁ2
2ꢀꢁꢁ
ꢀꢁꢂ8
ꢀꢁꢂ6
ꢀꢁꢂꢃ
ꢀꢁꢂ2
ꢀꢁꢂꢃ
ꢀ
ꢀ ꢁ2ꢂ
ꢀ
ꢀ ꢁ2ꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ ꢀ2ꢁ
ꢀ
2ꢀ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀ2ꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂ8 ꢀꢁꢂꢃ
ꢀꢁꢀ
ꢀꢁꢂ
ꢀꢁ8
ꢀꢁ2
ꢀꢁ6
ꢀ
ꢀ ꢀꢁ ꢀꢁ 2ꢀ 2ꢀ 3ꢀ 3ꢀ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢀ 6ꢀ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
ꢀꢁꢂꢃꢄꢅꢆ ꢇꢀꢈ
ꢀ
ꢀꢁꢂ
ꢀꢁ
8362 ꢀꢁꢂ
8362 ꢀꢁ6
8362 ꢀꢁꢂ
Switch Current Limit
vs Duty Cycle
Switch Minimum On-Time
vs Temperature
Switch Minimum Off-Time
vs Temperature
3ꢀꢁ
2ꢀꢁ
2ꢀ8
2ꢀꢁ
2ꢀ6
2ꢀꢁ
2ꢀꢁ
2ꢀ3
2ꢀ2
2ꢀꢁ
2ꢀꢁ
ꢀꢁꢁ
ꢀꢁ
8ꢀ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢁ
ꢀꢁ
8ꢀ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀ
ꢀ ꢁ2ꢂ
ꢀ
ꢀ ꢁ2ꢂ
ꢀꢁ
ꢀ
ꢀ ꢁ2ꢂ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀꢁ 2ꢀ 3ꢀ ꢀꢁ ꢀꢁ 6ꢀ ꢀꢁ 8ꢀ ꢀꢁ ꢀꢁꢁ
ꢀꢁꢂ ꢀ2ꢁ
ꢀ
2ꢀ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀ2ꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂ ꢀ2ꢁ
ꢀ
2ꢀ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀ2ꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢃꢄꢅꢆ ꢇꢈꢉ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
8362 ꢀꢁꢂ
8362 ꢀꢁ8
8362 ꢀꢁꢂ
8362fa
5
For more information www.linear.com/LT8362
LT8362
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Pin Current (Active Mode,
VIN Pin Current (Active Mode, Not
Switching, Bias = 5V)
vs Temperature
VIN Pin Current (Sleep Mode, Not
Switching) vs Temperature
Not Switching, Bias = 0V)
vs Temperature
3ꢀ
2ꢀ
2ꢀ
2ꢀ
ꢀ8
ꢀꢁ
ꢀ2
ꢀ
2ꢀꢁ
ꢀꢁ8
ꢀꢁ6
ꢀꢁꢂ
ꢀꢁ2
ꢀꢁꢂ
ꢀꢁ8
ꢀꢁ6
ꢀꢁꢂ
ꢀꢁ2
ꢀ
ꢀꢁ
ꢀ6
ꢀ2
38
3ꢀ
3ꢀ
26
22
ꢀ8
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ
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6
3
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ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇꢊꢋꢄꢁꢊꢇ ꢌꢍꢃꢎ
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8362 ꢀꢁꢂ
8362 ꢀꢁꢁ
8362 ꢀꢁ2
Switching Waveforms
(in CCM)
Switching Waveforms
(in DCM/Light Burst Mode)
Switching Waveforms
(in Deep Burst Mode)
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8362 ꢀꢁ3
8362 ꢀꢁꢂ
8362 ꢀꢁꢂ
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ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂꢃꢄꢅꢆ
V
OUT Transient Response: Load
VOUT Transient Response: Load
Current Transients from 160mA to
320mA to 160mA
Current Transients from 80mA to
320mA to 80mA
Burst Frequency vs Load Current
2ꢀꢁ
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2ꢀꢀꢁꢂꢃꢄꢅꢆ
2ꢀꢀꢁꢂꢃꢄꢅꢆ
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ꢀ ꢁ8ꢂ
ꢀꢁꢂ
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ꢀ
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8362 ꢀꢁꢂ
8362 ꢀꢁ6
ꢀꢁꢁꢂꢃꢄꢅꢆꢇ
ꢀꢁꢁꢂꢃꢄꢅꢆꢇ
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2ꢀ
3ꢀ
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8362 ꢀꢁ8
8362fa
6
For more information www.linear.com/LT8362
LT8362
PIN FUNCTIONS
EN/UVLO: Shutdown and Undervoltage Detect Pin. The
LT8362 is shut down when this pin is low and active
when this pin is high. Below an accurate 1.6V threshold,
the part enters undervoltage lockout and stops switching.
This allows an undervoltage lockout (UVLO) threshold to
be programmed for system input voltage by resistively
dividing down system input voltage to the EN/UVLO pin.
An 80mV pin hysteresis ensures part switching resumes
when the pin exceeds 1.68V. EN/UVLO pin voltage below
0.2V reduces VIN current below 1µA. If shutdown and
UVLO features are not required, the pin can be tied directly
to system input.
RT: A resistor from this pin to the exposed pad GND cop-
per (near FBX) programs switching frequency.
SS: Soft-Start Pin. Connect a capacitor from this pin to
GND copper (near FBX) to control the ramp rate of induc-
tor current during converter start-up. SS pin charging
current is 2μA. An internal 220Ω MOSFET discharges this
pin during shutdown or fault conditions.
SYNC/MODE: This pin allows five selectable modes for
optimization of performance.
SYNC/MODE Pin Input
(1) GND or <0.14V
Capable Mode(s) of Operation
Burst
(2) External Clock
Pulse-skip/Sync
Burst/SSFM
V : Input Supply. This pin must be locally bypassed. Be
IN
sure to place the positive terminal of the input capacitor as
close as possible to the VIN pin, and the negative terminal
as close as possible to the exposed pad PGND copper
(near EN/UVLO).
(3) 100k Resistor to GND
(4) Float (pin open)
Pulse-skip
(5) INTV or >1.7V
Pulse-skip/SSFM
CC
where the selectable modes of operation are,
INTVCC: Regulated 3.2V Supply for Internal Loads. The
Burst = low I , low output ripple operation at light loads
Q
INTV pin must be bypassed with a 1µF low ESR ceramic
CC
Pulse-skip = skipped pulse(s) at light load (aligned to clock)
Sync = switching frequency synchronized to external clock
SSFM = Spread Spectrum Frequency Modulation for low
EMI
capacitor to GND. No additional components or loading is
allowed on this pin. INTV draws power from the BIAS
CC
pin if 4.4V ≤ BIAS ≤ V , otherwise INTV is powered by
IN
CC
the V pin.
IN
SW1, SW2 (SW): Output of the Internal Power Switch.
Minimize the metal trace area connected to these pins to
reduce EMI.
NC: No Internal Connection. Leave this pin open.
BIAS: Second Input Supply for Powering INTVCC.
Removes the majority of INTV current from the V pin
CC
IN
PGND,GND: Power Ground and Signal Ground for the
IC. The package has an exposed pad underneath the IC
which is the best path for heat out of the package. The
pin should be soldered to a continuous copper ground
plane under the device to reduce die temperature and
increase the power capability of the LT8362. Connect
power ground components to the exposed pad copper
exiting near the EN/UVLO and SW pins. Connect signal
ground components to the exposed pad copper exiting
to improve efficiency when 4.4V ≤ BIAS ≤ V . If unused,
IN
tie the pin to GND.
VC: Error Amplifier Output Pin. Tie external compensation
network to this pin.
FBX: Voltage Regulation Feedback Pin for Positive or
Negative Outputs. Connect this pin to a resistor divider
between the output and the exposed pad GND copper
(near FBX). FBX reduces the switching frequency during
start-up and fault conditions when FBX is close to 0V.
near the V and FBX pins.
C
8362fa
7
For more information www.linear.com/LT8362
LT8362
BLOCK DIAGRAM
L
D
V
IN
V
OUT
R4
OPT
R3
OPT
C
C
IN
OUT
EN/UVLO
V
IN
SW
SW
BIAS
+
+
V
(+)
– 2V(–)
4.4V(+)
4.0V(–)
BIAS
BIAS
–
–
INTERNAL
REFERENCE
UVLO
V
+
–
1.68V(+)
1.6V(–)
UVLO
A6
T > 170°C
J
3.2V REGULATOR
INTV
CC
INTV
CC
UVLO
SYNC/MODE
RT
C
VCC
OSCILLATOR
FREQUENCY
FOLDBACK
R5
SWITCH
LOGIC
ERROR AMP
SELECT
M1
SLOPE
DRIVER
BURST
DETECT
ERROR
AMP
+
–
1.5×
1.6V
–
+
–
+
FBX
A1
R1
MAX
I
V
OUT
LIMIT
A7
A5
R2
PWM
OVER-
ERROR
AMP
COMPARATOR
CURRENT
+
–
–
+
MAX
LIMIT
A2
I
A3
–0.8V
I
SS
2μA
UVLO
OVERCURRENT
+
–
M2
Q1
A4
R
SENSE
SLOPE
PGND/GND
SS
V
C
8362 BD
R
C
C
SS
C
C
8362fa
8
For more information www.linear.com/LT8362
LT8362
OPERATION
The LT8362 uses a fixed frequency, current mode con-
trol scheme to provide excellent line and load regula-
tion. Operation can be best understood by referring
to the Block Diagram. An oscillator (with frequency
programmed by a resistor at the RT pin) turns on the
internal power switch at the beginning of each clock
cycle. Current in the inductor then increases until the
current comparator trips and turns off the power switch.
The peak inductor current at which the switch turns off
is controlled by the voltage on the VC pin. The error
If the EN/UVLO pin voltage is below 1.6V, the LT8362
enters undervoltage lockout (UVLO), and stops switching.
When the EN/UVLO pin voltage is above 1.68V (typical),
the LT8362 resumes switching. If the EN/UVLO pin volt-
age is below 0.2V, the LT8362 draws less than 1µA from
V .
IN
For the SYNC/MODE pin tied to ground or <0.14V, the
LT8362 will enter low output ripple Burst Mode opera-
tion for ultra low quiescent current during light loads to
maintain high efficiency. For a 100k resistor from SYNC/
MODE pin to GND, the LT8362 uses Burst Mode opera-
tion for improved efficiency at light loads but seamlessly
transitions to Spread-Spectrum Modulation of switch-
ing frequency for low EMI at heavy loads. For the SYNC/
MODE pin floating (left open), the LT8362 uses pulse-
skipping mode, at the expense of hundreds of microamps,
to maintain output voltage regulation at light loads by
skipping switch pulses. For the SYNC/MODE pin tied to
amplifier servos the V pin by comparing the voltage on
C
the FBX pin with an internal reference voltage (1.60V or
–0.80V, depending on the chosen topology). When the
load current increases it causes a reduction in the FBX
pin voltage relative to the internal reference. This causes
the error amplifier to increase the V pin voltage until the
C
new load current is satisfied. In this manner, the error
amplifier sets the correct peak switch current level to
keep the output in regulation.
INTV or >1.7V, the LT8362 uses pulse-skipping mode
CC
The LT8362 is capable of generating either a positive or
negative output voltage with a single FBX pin. It can be
configured as a boost or SEPIC converter to generate a
positive output voltage, or as an inverting converter to
generate a negative output voltage. When configured as
a Boost converter, as shown in the Block Diagram, the
FBX pin is pulled up to the internal bias voltage of 1.60V
by a voltage divider (R1 and R2) connected from VOUT
to GND. Amplifier A2 becomes inactive and amplifier A1
and performs Spread-Spectrum Modulation of switching
frequency. For the SYNC/MODE pin driven by an external
clock, the converter switching frequency is synchronized
to that clock and pulse-skipping mode is also enabled. See
the Pin Functions section for SYNC/MODE pin.
The LT8362 includes a BIAS pin to improve efficiency
across all loads. The LT8362 intelligently chooses
between the V and BIAS pins to supply the INTV for
IN
CC
best efficiency. The INTV supply current can be drawn
CC
performs (inverting) amplification from FBX to V . When
C
from the BIAS pin instead of the V pin for 4.4V ≤ BIAS
IN
the LT8362 is in an inverting configuration, the FBX pin
≤ V .
IN
is pulled down to –0.80V by a voltage divider from V
OUT
Protection features ensure the immediate disable of
switching and reset of the SS pin for any of the following
faults: internal reference UVLO, INTVCC UVLO, switch cur-
rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction
temperature > 170°C.
to GND. Amplifier A1 becomes inactive and amplifier A2
performs (non-inverting) amplification from FBX to V .
C
8362fa
9
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
ACHIEVING ULTRALOW QUIESCENT CURRENT
To enhance efficiency at light loads the LT8362 uses a
low ripple Burst Mode architecture. This keeps the out-
put capacitor charged to the desired output voltage while
minimizing the input quiescent current and output ripple.
In Burst Mode operation, the LT8362 delivers single small
pulses of current to the output capacitor followed by sleep
periods where the output power is supplied by the output
capacitor. While in sleep mode, the LT8362 consumes
only 9µA.
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8362 ꢀꢁ2
ꢀꢁꢂꢃꢄꢅꢆꢇ
Figure 2. Burst Mode Operation
As the output load decreases, the frequency of single cur-
rent pulses decreases (see Figure 1) and the percentage of
time the LT8362 is in sleep mode increases, resulting in
much higher light load efficiency than for typical convert-
ers. To optimize the quiescent current performance at light
loads, the current in the feedback resistor divider must
be minimized as it appears to the output as load current.
In addition, all possible leakage currents from the output
defined by the resistor at the RT pin as shown in Figure 1.
The output load at which the LT8362 reaches the fixed
frequency varies based on input voltage, output voltage,
and inductor choice.
PROGRAMMING INPUT TURN-ON AND TURN-OFF
THRESHOLDS WITH EN/UVLO PIN
should also be minimized as they all add to the equiva
-
The EN/UVLO pin voltage controls whether the LT8362 is
enabled or is in a shutdown state. A 1.6V reference and
a comparator A6 with built-in hysteresis (typical 80mV)
allow the user to accurately program the system input
voltage at which the IC turns on and off (see the Block
Diagram). The typical input falling and rising threshold
voltages can be calculated by the following equations:
lent output load. The largest contributor to leakage current
can be due to the reverse biased leakage of the Schottky
diode (see Diode Selection in the Applications Information
section).
While in Burst Mode operation, the current limit of the
switch is approximately 500mA resulting in the output
voltage ripple shown in Figure 2. Increasing the output
capacitance will decrease the output ripple proportionally.
As the output load ramps upward from zero the switching
frequency will increase but only up to the fixed frequency
R3 + R4
V
= 1.60 •
IN(FALLING,UVLO(–))
R4
R3 + R4
R4
V
= 1.68 •
IN(RISING, UVLO(+))
2ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢆꢅꢅꢉꢊꢋꢆꢄꢊꢂꢃ
V current is reduced below 1µA when the EN/UVLO pin
IN
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voltage is less than 0.2V. The EN/UVLO pin can be con-
nected directly to the input supply VIN for always-enabled
operation. A logic input can also control the EN/UVLO pin.
2ꢀꢁ
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When operating in Burst Mode operation for light load
currents, the current through the R3 and R4 network can
easily be greater than the supply current consumed by the
LT8362. Therefore, R3 and R4 should be large enough to
minimize their effect on efficiency at light loads.
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2ꢀ
3ꢀ
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ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢋꢂꢌ
8362 ꢀꢁꢂ
Figure 1. Burst Frequency vs Load Current
8362fa
10
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
INTV REGULATOR
Synchronization and Mode Selection
CC
A low dropout (LDO) linear regulator, supplied from V ,
To select low ripple Burst Mode operation, for high effi-
ciency at light loads, tie the SYNC/MODE pin below 0.14V
(this can be ground or a logic low output).
IN
produces a 3.2V supply at the INTV pin. A minimum
CC
1µF low ESR ceramic capacitor must be used to bypass
the INTV pin to ground to supply the high transient cur-
CC
To synchronize the LT8362 oscillator to an external fre-
quency connect a square wave (with 20% to 80% duty
cycle) to the SYNC pin. The square wave amplitude should
have valleys that are below 0.4V and peaks above 1.7V
(up to 6V). The LT8362 will not enter Burst Mode opera-
tion at low output loads while synchronized to an external
clock, but instead will pulse skip to maintain regulation.
The LT8362 may be synchronized over a 300kHz to 2MHz
range. The RT resistor should be chosen to set the LT8362
switching frequency equal to or below the lowest synchro-
nization input. For example, if the synchronization signal
rents required by the internal power MOSFET gate driver.
No additional components or loading is allowed on this
pin. The INTV rising threshold (to allow soft-start and
CC
switching) is typically 2.65V. The INTVCC falling threshold
(to stop switching and reset soft-start) is typically 2.5V.
To improve efficiency across all loads, the majority of
INTV current can be drawn from the BIAS pin (4.4V ≤
CC
BIAS ≤ V ) instead of the V pin. For SEPIC applications
IN
IN
with VIN often greater than VOUT, the BIAS pin can be
directly connected to V . If the BIAS pin is connected
OUT
will be 500kHz and higher, the R should be selected for
T
to a supply other than V , be sure to bypass the pin
OUT
500kHz.
with a local ceramic capacitor.
For some applications it is desirable for the LT8362 to
operate in pulse-skipping mode, offering two major differ-
ences from Burst Mode operation. Firstly, the clock stays
awake at all times and all switching cycles are aligned to
the clock. Secondly, the full switching frequency is main-
tained at lower output load than in Burst Mode operation.
These two differences come at the expense of increased
quiescent current. To enable pulse-skipping mode, float
the SYNC pin.
Programming Switching Frequency
The LT8362 uses a constant frequency PWM architecture
that can be programmed to switch from 300kHz to 2MHz
by using a resistor tied from the RT pin to ground. A table
showing the necessary R value for a desired switching
T
frequency is in Table 1.
The R resistor required for a desired switching frequency
T
can be calculated using:
To improve EMI/EMC, the LT8362 can provide spread
spectrum frequency modulation (SSFM). This feature var-
ies the clock with a triangle frequency modulation of 20%.
For example, if the LT8362's frequency was programmed
to switch at 2MHz, spread spectrum mode will modulate
the oscillator between 2MHz and 2.4MHz. The 20% modu-
51.2
fOSC
RT =
–5.6
where R is in kΩ and f
is the desired switching fre-
T
OSC
quency in MHz.
Table 1. SW Frequency vs R Value
lation will occur at a frequency: f /256 where f
is
T
OSC
OSC
the switching frequency programmed using the RT pin.
f
(MHz)
R (kΩ)
T
OSC
0.3
165
107
63.4
45.3
28.7
20
The LT8362 can also be configured to operate in pulse-
skipping/SSFM mode by tying the SYNC/MODE pin above
1.7V. The LT8362 can also be configured for Burst Mode
operation at light loads (for improved efficiency) and
SSFM at heavy loads (for low EMI) by tying a 100k from
the SYNC/MODE pin to GND.
0.45
0.75
1
1.5
2
8362fa
11
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
DUTY CYCLE CONSIDERATION
Choose the resistor values for a negative output voltage
according to:
The LT8362 minimum on-time, minimum off-time and
switching frequency (fOSC) define the allowable minimum
and maximum duty cycles of the converter (see Minimum
On-Time, Minimum Off-Time, and Switching Frequency
in the Electrical Characteristics table).
⎛
⎞
|VOUT
|
R1 = R2 •
–1
⎟
⎜
⎝0.80V
⎠
The locations of R1 and R2 are shown in the Block
Diagram. 1% resistors are recommended to maintain
output voltage accuracy.
Minimum Allowable Duty Cycle =
Minimum On-Time(MAX) • fOSC(MAX)
Higher-value FBX divider resistors result in the lowest
input quiescent current and highest light-load efficiency.
FBX divider resistors R1 and R2 are usually in the range
from 25k to 1M.
Maximum Allowable Duty Cycle =
1 – Minimum Off-Time(MAX) • fOSC(MAX)
The required switch duty cycle range for a Boost converter
operating in continuous conduction mode (CCM) can be
calculated as:
SOFT-START
The LT8362 contains several features to limit peak switch
currents and output voltage (VOUT) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
V
IN(MAX)
DMIN = 1 –
DMAX = 1 –
VOUT + VD
V
IN(MIN)
VOUT + VD
High peak switch currents during start-up may occur
where V is the diode forward voltage drop. If the above
D
in switching regulators. Since V
is far from its final
value, the feedback loop is satuOraUtTed and the regulator
tries to charge the output capacitor as quickly as possible,
resulting in large peak currents. A large surge current may
cause inductor saturation or power switch failure.
duty cycle calculations for a given application violate
the minimum and/or maximum allowed duty cycles
for the LT8362, operation in discontinuous conduction
mode (DCM) might provide a solution. For the same V
IN
and V
levels, operation in DCM does not demand as
OUT
The LT8362 addresses this mechanism with a programma-
ble soft-start function. As shown in the Block Diagram, the
soft-start function controls the ramp of the power switch
low a duty cycle as in CCM. DCM also allows higher duty
cycle operation than CCM. The additional advantage of
DCM is the removal of the limitations to inductor value
and duty cycle required to avoid sub-harmonic oscilla-
tions and the right half plane zero (RHPZ). While DCM
provides these benefits, the trade-off is higher inductor
peak current, lower available output power and reduced
efficiency.
current by controlling the ramp of V through Q1. This
C
allows the output capacitor to be charged gradually toward
its final value while limiting the start-up peak currents.
Figure 3 shows the output voltage and supply current for
the first page Typical Application. It can be seen that both
the output voltage and supply current come up gradually.
SETTING THE OUTPUT VOLTAGE
The output voltage is programmed with a resistor divider
from the output to the FBX pin. Choose the resistor values
for a positive output voltage according to:
⎛
⎞
VOUT
R1 = R2 •
–1
⎟
⎜
⎝1.60V
⎠
8362fa
12
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
COMPENSATION
Loop compensation determines the stability and transient
performance. The LT8362 uses current mode control to
regulate the output which simplifies loop compensation.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LT8362, a series resistor-capacitor
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2ꢀꢁꢂꢃꢄꢁ
8362 ꢀꢁ3
ꢀꢁꢁꢂꢃꢄꢅꢆꢇ
network is usually connected from the V pin to GND.
C
The Block Diagram shows the typical V compensation
C
Figure 3. Soft-Start Waveforms
network. For most applications, the capacitor should be
in the range of 100pF to 10nF, and the resistor should
be in the range of 5k to 100k. A small capacitor is often
connected in parallel with the RC compensation network
FAULT PROTECTION
An inductor overcurrent fault (> 3.75A) and/or INTV
undervoltage (INTVCC < 2.5V) and/or thermal lockoCuCt
(TJ > 170°C) will immediately prevent switching, will
reset the SS pin and will pull down V . Once all faults are
removed, the LT8362 will soft-start VC and hence inductor
peak current.
to attenuate the V voltage ripple induced from the out-
C
put voltage ripple through the internal error amplifier. The
parallel capacitor usually ranges in value from 2.2pF to
22pF. A practical approach to designing the compensa-
tion network is to start with one of the circuits in this data
sheet that is similar to your application, and tune the com-
pensation network to optimize the performance. Stability
should then be checked across all operating conditions,
including load current, input voltage and temperature.
Application Note 76 is a good reference.
C
FREQUENCY FOLDBACK
During start-up or fault conditions in which V
is very
OUT
low, extremely small duty cycles may be required to main-
tain control of inductor peak current. The minimum on-
time limitation of the power switch might prevent these
low duty cycles from being achievable. In this scenario
inductor current rise will exceed inductor current fall
during each cycle, causing inductor current to “walk up”
beyond the switch current limit. The LT8362 provides
protection from this by folding back switching frequency
whenever FBX or SS pins are close to GND (low V
levels or start-up). This frequency foldback provideOsUaT
larger switch-off time, allowing inductor current to fall
enough each cycle (see Normalized Switching Frequency
vs FBX Voltage in the Typical Performance Characteristics
section).
THERMAL CONSIDERATIONS
Care should be taken in the layout of the PCB to ensure
good heat sinking of the LT8362. Both packages have an
exposed pad underneath the IC which is the best path
for heat out of the package. The exposed pad should be
soldered to a continuous copper ground plane under the
device to reduce die temperature and increase the power
capability of the LT8362. The ground plane should be
connected to large copper layers to spread heat dissi-
pated by the LT8362. Power dissipation within the LT8362
(P ) can be estimated by subtracting the induc-
DISS_LT8362
tor and Schottky diode power losses from the total power
losses calculated in an efficiency measurement. The junc-
tion temperature of LT8362 can then be estimated by:
THERMAL LOCKOUT
If the LT8362 die temperature reaches 170°C (typical),
the part will stop switching and go into thermal lockout.
When the die temperature has dropped by 5°C (nominal),
the part will resume switching with a soft-started inductor
peak current.
TJ(LT8362) = TA + θJA • PDISS_LT8362
8362fa
13
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
APPLICATION CIRCUITS
Due to the current limit of its internal power switch, the
LT8362 should be used in a boost converter whose maxi-
The LT8362 can be configured for different topologies.
The first topology to be analyzed will be the boost con-
verter, followed by the SEPIC and inverting converters.
mum output current (I
) is:
O(MAX)
V
IN(MIN)
IO(MAX)
≤
• 2A − 0.5 • ΔI
(
• η
)
SW
VOUT
Boost Converter: Switch Duty Cycle
Minimum possible inductor value and switching frequency
should also be considered since they will increase inductor
The LT8362 can be configured as a boost converter for
the applications where the converter output voltage is
higher than the input voltage. Remember that boost con-
verters are not short-circuit protected. Under a shorted
output condition, the inductor current is limited only by the
input supply capability. For applications requiring a step-
up converter that is short-circuit protected, please refer
to the Applications Information section covering SEPIC
converters.
ripple current ∆I
.
SW
The inductor ripple current ∆I has a direct effect on the
SW
choice of the inductor value and the converter’s maximum
output current capability. Choosing smaller values of
∆ISW increases output current capability, but requires
large inductances and reduces the current loop gain
(the converter will approach voltage mode). Accepting
larger values of ∆I provides fast transient response and
allows the use ofSloWw inductances, but results in higher
input current ripple and greater core losses, and reduces
output current capability. It is recommended to choose a
The conversion ratio as a function of duty cycle is:
VOUT
VIN
1
=
1 − D
∆I of approximately 0.75A.
SW
in continuous conduction mode (CCM).
Given an operating input voltage range, and having cho-
sen the operating frequency and ripple current in the
inductor, the inductor value of the boost converter can
be determined using the following equation:
For a boost converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (V ) and the input voltage (V ). The maximum
OUT
IN
duty cycle (DMAX) occurs when the converter has the
VIN(MIN)
minimum input voltage:
L =
• DMAX
ΔISW • fOSC
VOUT − VIN(MIN)
DMAX
=
The peak inductor current is the switch current limit (max-
imum 3.1A), and the RMS inductor current is approxi-
VOUT
mately equal to I
.
Discontinuous conduction mode (DCM) provides higher
conversion ratios at a given frequency at the cost of
reduced efficiencies, higher switching currents, and lower
available output power.
L(MAX)(AVE)
Choose an inductor that can handle at least 3.1A without sat-
urating, and ensure that the inductor has a low DCR (copper-
2
wire resistance) to minimize I R power losses. Note that in
some applications, the current handling requirements of the
inductor can be lower, such as in the SEPIC topology where
each inductor only carries one-half of the total switch cur-
rent. For better efficiency, use similar valued inductors with a
larger volume. Many different sizes and shapes are available
from various manufacturers (see Table 2). Choose a core
material that has low losses at the programmed switching
Boost Converter: Maximum Output Current Capability
and Inductor Selection
For the boost topology, the maximum average inductor
current is:
1
1
η
IL(MAX)(AVE)= IO(MAX)
•
•
1 − DMAX
where η (< 1.0) is the converter efficiency.
8362fa
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For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
inductance forms a high quality (under damped) tank cir-
cuit. If the LT8362 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT8362’s voltage rating. This situation is
easily avoided (see Application Note 88).
frequency, such as a ferrite core. The final value chosen
for the inductor should not allow peak inductor currents to
exceed 2A in steady state at maximum load. Due to toler-
ances, be sure to account for minimum possible inductance
value, switching frequency and converter efficiency.
For inductor current operation in CCM and duty cycles
above 50%, the LT8362's internal slope compensa-
tion prevents sub-harmonic oscillations provided the
inductor value exceeds a minimum value given by:
BOOST CONVERTER: OUTPUT CAPACITOR SELECTION
Low ESR (equivalent series resistance) capacitors should
be used at the output to minimize the output ripple volt-
age. Multilayer ceramic capacitors are an excellent choice,
as they are small and have extremely low ESR. Use X5R or
X7R types. This choice will provide low output ripple and
good transient response. A 4.7µF to 47µF output capacitor
is sufficient for most applications, but systems with very
low output currents may need only a 1µF or 2.2µF out-
put capacitor. Solid tantalum or OS-CON capacitor can be
used, but they will occupy more board area than a ceramic
and will have a higher ESR. Always use a capacitor with a
sufficient voltage rating.
2•D–1
V
(
)
IN
L>
•
–14•D2 +21•D–5 • f
1–D
(
)
(
)
(
)
OSC
Lower L values are allowed if the inductor current oper-
ates in DCM or duty cycle operation is below 50%.
Table 2. Inductor Manufacturers
Sumida
TDK
(847) 956-0666
(847) 803-6100
(714) 852-2001
(847) 639-6400
(605) 886-4385
www.sumida.com
www.tdk.com
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct output
capacitors for a given output ripple voltage. The effect of
these three parameters (ESR, ESL and bulk C) on the out-
put voltage ripple waveform for a typical boost converter
is illustrated in Figure 4.
Murata
Coilcraft
Wurth
www.murata.com
www.coilcraft.com
www.we-online.com
BOOST CONVERTER: INPUT CAPACITOR SELECTION
Bypass the input of the LT8362 circuit with a ceramic
capacitor of X7R or X5R type placed as close as pos-
sible to the VIN and GND pins. Y5V types have poor
performance over temperature and applied voltage, and
should not be used. A 4.7µF to 10µF ceramic capacitor is
adequate to bypass the LT8362 and will easily handle the
ripple current. If the input power source has high imped-
ance, or there is significant inductance due to long wires
or cables, additional bulk capacitance may be necessary.
This can be provided with a low performance electrolytic
capacitor.
ꢈ
ꢈ
ꢁꢔꢔ
ꢁꢉ
Δꢀ
ꢆꢁꢂꢃ
ꢀ
ꢁꢂꢃ
ꢄꢅꢆꢇ
ꢌꢍꢉꢎꢍꢉꢎ ꢏꢂꢊ ꢃꢁ
ꢃꢁꢃꢅꢐ ꢍꢉꢏꢂꢆꢃꢅꢉꢆꢊ
ꢄꢑꢁꢅꢌꢏ ꢒ ꢆꢅꢓꢇ
Δꢀ
ꢊꢋꢌ
8362 ꢔꢕꢖ
Figure 4. The Output Ripple Waveform of a Boost Converter
A precaution regarding the ceramic input capacitor con-
cerns the maximum input voltage rating of the LT8362.
A ceramic input capacitor combined with trace or cable
8362fa
15
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
nature. When in Burst Mode operation, the LT8362’s
switching frequency depends on the load current, and
at very light loads the LT8362 can excite the ceramic
capacitor at audio frequencies, generating audible noise.
Since the LT8362 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet to a
casual ear. If this is unacceptable, use a high performance
tantalum or electrolytic capacitor at the output. Low noise
ceramic capacitors are also available.
between the ESR step ∆V
and the charging/discharg-
ESR
ing ∆V
. For the purpose of simplicity, we will choose
COUT
2% for the maximum output ripple, to be divided equally
between ∆V and ∆V . This percentage ripple will
ESR
COUT
change, depending on the requirements of the application,
and the following equations can easily be modified. For a
1% contribution to the total ripple voltage, the ESR of the
output capacitor can be determined using the following
equation:
Table 3. Ceramic Capacitor Manufacturers
Taiyo Yuden
AVX
(408) 573-4150
(803) 448-9411
(714) 852-2001
www.t-yuden.com
www.avxcorp.com
www.murata.com
0.01 • VOUT
ID(PEAK)
Murata
ESRCOUT
≤
BOOST CONVERTER: DIODE SELECTION
For the bulk C component, which also contributes 1% to
the total ripple:
A Schottky diode is recommended for use with the LT8362.
Low leakage Schottky diodes are necessary when low
quiescent current is desired at low loads. The diode leak-
age appears as an equivalent load at the output and should
be minimized. Choose Schottky diodes with sufficient
reverse voltage ratings for the target applications.
IO(MAX)
COUT
≥
0.01 • VOUT • fOSC
The output capacitor in a boost regulator experiences
high RMS ripple currents, as shown in Figure 4. The RMS
ripple current rating of the output capacitor can be deter-
mined using the following equation:
Table 4. Recommended Schottky Diodes
AVERAGE
FORWARD REVERSE REVERSE
CURRENT VOLTAGE CURRENT
DMAX
1 − DMAX
IRMS(COUT) ≥ IO(MAX)
•
PART NUMBER
DFLS260
(A)
(V)
60
20
30
(µA)
MANUFACTURER
Diodes, Inc.
NXP
2
20
PMEG2020EJ
PMEG3020EPA
2
100
80
Multiple capacitors are often paralleled to meet ESR
requirements. Typically, once the ESR requirement is sat-
isfied, the capacitance is adequate for filtering and has the
required RMS current rating. Additional ceramic capaci-
tors in parallel are commonly used to reduce the effect of
parasitic inductance in the output capacitor, which reduces
high frequency switching noise on the converter output.
2
NXP
BOOST CONVERTER: LAYOUT HINTS
The high speed operation of the LT8362 demands careful
attention to board layout. Careless layout will result in per-
formance degradation. Figure 5 shows the recommended
component placement for a boost converter. Note the vias
under the exposed pad. These should connect to a local
ground plane for better thermal performance.
CERAMIC CAPACITORS
Ceramic capacitors are small, robust and have very low
ESR. However, ceramic capacitors can cause problems
when used with the LT8362 due to their piezoelectric
8362fa
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For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
ꢅ
ꢅ
ꢗꢘꢇ
ꢆꢄ
ꢔꢕꢄꢖ
ꢋꢏ
ꢅ
ꢅ
ꢗꢘꢇ
ꢀꢍ
ꢆꢄ
ꢀ
3
ꢃꢄ
ꢋꢏꢀ ꢀ6
ꢋꢏ2 ꢀꢌ
ꢔꢕꢄꢖ
ꢋꢏ
°
ꢔꢕꢄꢖ
ꢋꢏ
ꢅ
ꢆꢄ
°
ꢃꢄ
ꢋꢏ
ꢀ
2
3
ꢌ
ꢁ
ꢎ
8
ꢂ
6
ꢅ
ꢋꢐꢄꢈ
ꢋꢋ
ꢆꢄ
ꢁ
6
ꢂ
8
ꢆꢄꢇꢅ
ꢈꢈ
ꢋꢐꢄꢈ ꢀ2
ꢋꢋ ꢀꢀ
ꢆꢄꢇꢅ
ꢉꢆꢊꢋ
ꢈꢈ
ꢄꢈ
ꢑꢇ
ꢕꢄꢖ
ꢉꢆꢊꢋ
ꢑꢇ ꢀꢍ
ꢕꢄꢖ
ꢅ
ꢒꢉꢓ
ꢈ
ꢅ
ꢒꢉꢓ ꢎ
ꢈ
ꢅ
ꢗꢘꢇ
ꢅ
ꢗꢘꢇ
°
°
8362 ꢒꢍꢁ
(a) MSOP
(b) DFN
Figure 5. Suggested Boost Converter Layout
ꢀ
ꢀꢁ
ꢀꢁ
SEPIC CONVERTER APPLICATIONS
ꢀꢁ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁ
The LT8362 can be configured as a SEPIC (single-ended
primary inductance converter), as shown in Figure 6. This
topology allows for the input to be higher, equal, or lower
than the desired output voltage. The conversion ratio as
a function of duty cycle is:
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀ2
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ8362
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂ
ꢀꢁꢂ
VOUT + VD
D
1 − D
ꢀꢁꢂꢀ
=
ꢀꢀ
V
IN
in continuous conduction mode (CCM).
8362 ꢀꢁ6
In a SEPIC converter, no DC path exists between the input
and output. This is an advantage over the boost converter
for applications requiring the output to be disconnected
from the input source when the circuit is in shutdown.
Figure 6. LT8362 Configured in a SEPIC Topology
8362fa
17
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
SEPIC Converter: Switch Duty Cycle and Frequency
In a SEPIC converter, the switch current is equal to I
L2
average switch current is defined as:
+
L1
I
when the power switch is on, therefore, the maximum
For a SEPIC converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (V ), the input voltage (V ) and the diode for-
ISW(MAX)(AVG) = IL1(MAX)(AVG) + IL2(MAX)(AVG)
OUT
IN
ward voltage (V ).
D
1
= IO(MAX)
•
The maximum duty cycle (D
) occurs when the con-
MAX
1 − DMAX
verter operates at the minimum input voltage:
and the peak switch current is:
VOUT + VD
DMAX
=
ꢀ
ꢃ
ꢅ
ꢄ
χ
1
V
+ VOUT + VD
IN(MIN)
ISW(PEAK) = 1 +
• IO(MAX) •
ꢂ
ꢁ
2
1 − DMAX
Conversely, the minimum duty cycle (D ) occurs when
the converter operates at the maximum input voltage:
MIN
c
The constant
in the preceding equations represents
the percentage peak-to-peak ripple current in the switch,
SW(MAX)(AVG)
switch ripple current ∆I can be calculated by:
VOUT + VD
relative to I
, as shown in Figure 7. Then, the
SW
DMIN
=
V
+ VOUT + VD
IN(MAX)
∆ISW = χ • ISW(MAX)(AVG)
Be sure to check that D
and D
obey:
MAX
MIN
DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX)
and
The inductor ripple currents ∆I and ∆I are identical:
L1
L2
∆IL1 = ∆IL2 = 0.5 • ∆ISW
DMIN > Minimum On-Time(MAX) • fOSC(MAX)
where Minimum Off-Time, Minimum On-Time and f
are specified in the Electrical Characteristics table.
ꢃ
OSC
ꢄꢅ
ꢃ
• ꢃ
ꢄꢅꢇꢈꢉꢊꢋꢇꢉꢌꢍꢋ
ꢄꢅ ꢆ
ꢃ
ꢄꢅꢇꢈꢉꢊꢋꢇꢉꢌꢍꢋ
SEPIC Converter: The Maximum Output Current
Capability and Inductor Selection
ꢎ
ꢏꢐ
ꢄ
As shown in Figure 6, the SEPIC converter contains two
inductors: L1 and L2. L1 and L2 can be independent, but
can also be wound on the same core, since identical volt-
ages are applied to L1 and L2 throughout the switching
cycle.
ꢐ
ꢄ
8362 ꢀꢁꢂ
Figure 7. The Switch Current Waveform of the SEPIC Converter
The inductor ripple current has a direct effect on the
choice of the inductor value. Choosing smaller values of
∆IL requires large inductances and reduces the current
loop gain (the converter will approach voltage mode).
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher input current ripple and
For the SEPIC topology, the current through L1 is the
converter input current. Based on the fact that, ideally, the
output power is equal to the input power, the maximum
average inductor currents of L1 and L2 are:
DMAX
IL1(MAX)(AVG) = IIN(MAX)(AVG) = IO(MAX)
•
1 − DMAX
c
greater core losses. It is recommended that falls in the
range of 0.5 to 0.8.
IL2(MAX)(AVG) = IO(MAX)
8362fa
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For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
Due to the current limit of its internal power switch, the
LT8362 should be used in a SEPIC converter whose maxi-
Similar to Boost converters, the SEPIC converter also needs
slope compensation to prevent subharmonic oscillations
while operating in CCM. The equation presented in the
Boost converter section defines the minimum inductance
value to avoid sub-harmonic oscillations when coupled
inductors are used. For uncoupled inductors, the minimum
inductance requirement is doubled.
mum output current (I ) is:
O(MAX)
IO(MAX) < (1 – DMAX) • (2A – 0.5 • ∆ISW) • η
where η (< 1.0) is the converter efficiency. Minimum
possible inductor value and switching frequency should
also be considered since they will increase inductor ripple
SEPIC Converter: Output Diode Selection
current ∆I
.
SW
To maximize efficiency, a fast switching diode with a low
forward drop and low reverse leakage is desirable. The
average forward current in normal operation is equal to
the output current.
Given an operating input voltage range, and having cho-
sen ripple current in the inductor, the inductor value (L1
and L2 are independent) of the SEPIC converter can be
determined using the following equation:
It is recommended that the peak repetitive reverse voltage
V
IN(MIN)
rating V
is higher than V
+ V
by a safety
RRM
OUT
IN(MAX)
L1 = L2 =
• DMAX
0.5 • ΔISW • fOSC
margin (a 10V safety margin is usually sufficient).
The power dissipated by the diode is:
PD = IO(MAX) • VD
For most SEPIC applications, the equal inductor values
will fall in the range of 2.2µH to 100µH.
By making L1 = L2, and winding them on the same core,
the value of inductance in the preceding equation is
replaced by 2L, due to mutual inductance:
where V is diode’s forward voltage drop, and the diode
D
junction temperature is:
TJ = TA + PD • RθJA
V
IN(MIN)
The RθJA used in this equation normally includes the RθJC
for the device, plus the thermal resistance from the board,
L =
• DMAX
ΔISW • fOSC
to the ambient temperature in the enclosure. T must not
J
This maintains the same ripple current and energy storage
in the inductors. The peak inductor currents are:
exceed the diode maximum junction temperature rating.
SEPIC Converter: Output and Input Capacitor Selection
IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1
IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2
The selections of the output and input capacitors of the
SEPIC converter are similar to those of the boost converter.
The maximum RMS inductor currents are approximately
equal to the maximum average inductor currents.
Based on the preceding equations, the user should choose
the inductors having sufficient saturation and RMS cur-
rent ratings.
8362fa
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For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
SEPIC Converter: Selecting the DC Coupling Capacitor
Inverting Converter: Switch Duty Cycle and Frequency
The DC voltage rating of the DC coupling capacitor (C ,
as shown in Figure 6) should be larger than the maximum
input voltage:
For an inverting converter operating in CCM, the duty
cycle of the main switch can be calculated based on the
negative output voltage (VOUT) and the input voltage (VIN).
DC
VCDC > V
The maximum duty cycle (D
) occurs when the con-
IN(MAX)
MAX
verter has the minimum input voltage:
C
has nearly a rectangular current waveform. During the
DC
VOUT − VD
VOUT − VD − V
switch off-time, the current through C is I , while approx-
DMAX
=
imately –I flows during the on-time.DTChe RMS rating of the
IN
IN(MIN)
O
coupling capacitor is determined by the following equation:
Conversely, the minimum duty cycle (D ) occurs when
the converter operates at the maximum input voltage :
MIN
VOUT + VD
IRMS(CDC) > IO(MAX) •
V
IN(MIN)
VOUT − VD
VOUT − VD − V
DMIN
=
IN(MAX)
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for C .
DC
Be sure to check that D
and D
obey :
MAX
MIN
DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX)
and
INVERTING CONVERTER APPLICATIONS
The LT8362 can be configured as a dual-inductor invert-
ing topology, as shown in Figure 8. The V
is:
DMIN > Minimum On-Time(MAX) • fOSC(MAX)
to V ratio
OUT
IN
where Minimum Off-Time, Minimum On-Time and f
are specified in the Electrical Characteristics table.
OSC
VOUT − VD
D
1 − D
= −
V
IN
Inverting Converter: Inductor, Output Diode and Input
Capacitor Selections
in continuous conduction mode (CCM).
The selections of the inductor, output diode and input
capacitor of an inverting converter are similar to those
of the SEPIC converter. Please refer to the corresponding
SEPIC converter sections.
ꢀ
ꢌ
ꢁꢀꢐ
ꢅꢆ
ꢅ2
ꢂ
ꢃꢄ
ꢌ
ꢐ
ꢀ
ꢃꢄ
ꢀ
ꢂ
ꢇꢈꢉ ꢌ
ꢇꢈꢉ
ꢎꢏ
ꢅꢉ8362
ꢁꢆ
ꢌ
8362 ꢊꢆꢋ
ꢍꢄꢁ
Figure 8. A Simplified Inverting Converter
8362fa
20
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
Inverting Converter: Output Capacitor Selection
The RMS ripple current rating of the output capacitor
needs to be greater than:
The inverting converter requires much smaller output
capacitors than those of the boost, flyback and SEPIC
converters for similar output ripples. This is due to the
fact that, in the inverting converter, the inductor L2 is
in series with the output, and the ripple current flowing
through the output capacitors are continuous. The output
ripple voltage is produced by the ripple current of L2 flow-
ing through the ESR and bulk capacitance of the output
capacitor:
IRMS(COUT) > 0.3 • ∆IL2
Inverting Converter: Selecting the DC Coupling
Capacitor
The DC voltage rating of the DC coupling capacitor (C ,
DC
as shown in Figure 8) should be larger than the maximum
input voltage minus the output voltage (negative voltage):
VCDC > V
+| VOUT|
IN(MAX)
ꢀ
ꢃ
ꢅ
ꢄ
1
ΔVOUT(P–P) = ΔIL2 • ESR
+
ꢂ
C
has nearly a rectangular current waveform. During
COUT
DC
8 • fOSC • COUT
ꢁ
the switch off-time, the current through C is I , while
approximately –I flows during the on-tiDmCe. TIhNe RMS
O
After specifying the maximum output ripple, the user can
select the output capacitors according to the preceding
equation.
rating of the coupling capacitor is determined by the fol-
lowing equation:
DMAX
1 − DMAX
The ESR can be minimized by using high quality X5R or
X7R dielectric ceramic capacitors. In many applications,
ceramic capacitors are sufficient to limit the output volt-
age ripple.
I
RMS(CDC) >IO(MAX) •
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for C .
DC
8362fa
21
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 8V to 38V Input, 48V Boost Converter
ꢀꢁ
6ꢀ8ꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀ
ꢀ8ꢁ
2ꢀꢀꢁꢂ ꢂꢃ ꢄ ꢇ 8ꢄ
ꢀꢁ
8ꢀ ꢁꢂ 38ꢀ
ꢅꢆ
ꢀ3
32ꢀꢁꢂ ꢂꢃ ꢄ ꢇ ꢈ2ꢄ
ꢅꢆ
ꢀ6
ꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃꢄ
ꢅꢆꢇ
ꢈ2ꢈꢆ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁ
ꢁꢂ
ꢉꢀꢀꢁꢂ ꢂꢃ ꢄ ꢇ 2ꢊꢄ
ꢅꢆ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ
Efficiency
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢁ
ꢀꢁ
8ꢀ
ꢀꢁ
6ꢀ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
3ꢀꢁ8ꢂ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀ3
2ꢀꢁ
ꢀꢁ
ꢀꢁꢂ6ꢃ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁꢂꢃꢄ
8362 ꢀꢁꢂ2
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢐꢏ ꢎꢑꢑ3ꢎ3ꢑꢒꢏ68
ꢀ
ꢀ
ꢀ ꢁ2ꢂ
ꢀ 2ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ32ꢈꢄꢉꢊꢋꢌꢉꢍꢎ
ꢀꢁ
ꢀꢁꢀꢀꢂ
ꢀꢁꢀꢂ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂ2a
2MHz, 2.8V to 9V Input, 12V Boost Converter
ꢀ
ꢀꢁ
2ꢀ2ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀ2ꢁ
ꢀ
3ꢀꢀꢁꢂ ꢂꢃ ꢄ ꢀ 2ꢁ8ꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
2ꢀ8ꢁ ꢂꢃ ꢄꢁ
6ꢀꢀꢁꢂ ꢂꢃ ꢄ ꢀ ꢁꢂ
ꢀꢁꢀꢂ ꢂꢃ ꢄ ꢇ ꢈꢄ
ꢅꢆ
ꢀ6
ꢁꢂꢃꢄꢅ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ3
ꢀꢁꢂꢃ
ꢀꢁ
ꢁꢂ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ
Efficiency
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
ꢀꢁꢂꢃ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
36ꢀꢁꢂ
ꢀꢁ
ꢀ3
2ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂ3
ꢀꢁꢂ ꢃꢄꢅ ꢅꢆꢇꢈ2ꢉ2ꢉꢇꢊ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢐꢏ ꢎꢑꢑ3ꢎ3ꢑꢒꢏ22
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉꢈꢊꢈꢋ6ꢌꢅꢈ2ꢍ
ꢀ
ꢀ 2ꢁ8ꢂ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀꢁ2
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
ꢀꢁꢂ
ꢀꢁ2
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂ3a
8362fa
22
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 4V to 19V Input, 24V Boost Converter
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃꢄ
2ꢀꢁ
ꢀꢁ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 8ꢁ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁ2ꢂ
ꢀꢁ ꢂꢃ ꢄꢅꢁ
ꢀꢁ2ꢂꢃ ꢃꢄ ꢅ ꢈ ꢀꢉꢅ
ꢆꢇ
ꢀ3
ꢀꢁꢂꢃꢄ
ꢅ2ꢅꢆ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ6
ꢁꢂꢃꢄꢅ
ꢀꢁ
ꢁꢂ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
Efficiency
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
ꢀꢁꢂꢃꢄ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
36ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀ3
2ꢀꢁ
ꢀꢁ
33ꢀꢁꢂ
8362 ꢀꢁꢂꢃ
ꢀꢁꢂ ꢃꢄꢅ ꢅꢆꢇꢈ3ꢉ2ꢉꢇꢅꢊ
ꢀ
ꢀ
ꢀ
ꢀ 8ꢁ
ꢀ ꢁ2ꢂ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢐꢏ ꢎꢑꢑ3ꢎ3ꢑꢒꢏꢑꢎ
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ32ꢈꢄꢉꢊꢋꢌꢉꢍꢎ
ꢀ
ꢀꢁ2 ꢀꢁꢂ ꢀꢁ6 ꢀꢁ8 ꢀꢁꢂ ꢀꢁ2 ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂꢃa
2MHz, 2.8V to 6V Input, 48V Boost Converter in DCM
ꢀꢁ
ꢀꢁ33ꢂꢃ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀ8ꢁ
2ꢀꢁꢂ ꢂꢃ ꢄ ꢀ 2ꢁ8ꢂ
ꢀ
ꢀꢁ
ꢀꢁ
2ꢀ8ꢁ ꢂꢃ 6ꢁ
22ꢀꢁ ꢁꢂ ꢃ ꢀ ꢁꢂ
2ꢀꢁꢂ ꢂꢃ ꢄ ꢀ 6ꢁ
ꢀꢁ
ꢀꢁ
ꢀ3
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂ
ꢀꢁ
ꢁꢂ
ꢀ6
ꢁꢂꢃꢄꢅ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢃꢃꢄ
ꢀ2ꢀꢃ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ
Efficiency
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢁ
ꢀꢁ
8ꢀ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
3ꢀꢁ8ꢂ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
36ꢀꢁꢂ
ꢀꢁ
ꢀ3
2ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂꢃ
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢐꢏ ꢎꢑꢑ3ꢎ3ꢑꢒꢏꢏ33
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ32ꢀꢄꢈ2ꢅꢉꢊꢋꢌꢅ3ꢋꢍ
ꢀ
ꢀ
ꢀ
ꢀ 2ꢁ8ꢂ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ 6ꢁ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
2ꢀ
2ꢀ
3ꢀ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢋꢂꢌ
8362 ꢀꢁꢂꢃa
8362fa
23
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 2.8V to 28V Input, 5V SEPIC Converter
ꢀ
ꢀꢁ
2ꢀ2ꢁꢂ
ꢀ6
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁ8ꢂ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄ ꢄꢅ ꢆ ꢀ ꢁꢂ
ꢀꢁ
2ꢀ8ꢁ ꢂꢃ 28ꢁ
ꢀꢁ ꢁꢂ ꢃ ꢀ ꢁ2ꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ2ꢂ ꢂꢃ ꢄ ꢀ 28ꢁ
ꢀ2
2ꢀ2ꢁꢂ
ꢀ3
22ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢂꢃꢁꢄꢅ
ꢀꢁ
ꢁꢂ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁ
Efficiency
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂ
ꢀꢁ8362
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
ꢀ6ꢀꢁ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
36ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀ3
2ꢀꢁ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂ6
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ 2ꢁ8ꢂ
ꢀ ꢁꢂ
ꢀ ꢁ2ꢂ
ꢀ 28ꢁ
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢀ2ꢃ ꢄꢅꢆꢇꢈ ꢉꢀꢉꢊꢇꢆꢋꢌꢍꢊ ꢄꢉꢎꢏꢏ ꢐꢑꢏ ꢁ26ꢒ ꢓꢔꢔ8ꢓꢁ22ꢒ
ꢀ3ꢁ ꢂꢃꢄꢅꢆ ꢅꢇꢈꢉꢊ ꢂꢋꢌ32ꢍꢎꢏ226ꢋꢋꢐꢑ
ꢀ6ꢁ ꢋꢇꢒꢃꢂꢃ ꢓꢒꢋ3ꢔꢀꢒꢏ2ꢃꢔꢕꢍꢌ
ꢀ
ꢀꢁ2 ꢀꢁꢂ ꢀꢁ6 ꢀꢁ8 ꢀꢁꢂ ꢀꢁ2 ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂ6a
2MHz, 2.8V to 42V Input, 12V SEPIC Converter
ꢀ
ꢀ6
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ2ꢁ
ꢀꢁ
ꢀ2ꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁ8ꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ6ꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁꢂ
2ꢀ8ꢁ ꢂꢃ ꢄ2ꢁ
ꢀ6ꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁ2ꢂ
ꢀꢁ ꢁꢂ ꢃ ꢀ 2ꢁꢂ
ꢀ2
ꢀꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢂꢃꢁꢄꢅ
ꢀ3
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢁꢂ
ꢀꢁ ꢁꢂ ꢃ ꢀ ꢁ2ꢂ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂ
ꢀꢁꢂꢃ
Efficiency
ꢀꢁ8362
ꢀ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀ2
ꢀꢁꢂꢃ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ3
36ꢀꢁꢂ
ꢀꢁꢂꢃ
2ꢀꢁ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂꢃ
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ ꢀ2ꢃ ꢄꢅꢆꢇꢈ ꢉꢀꢉꢊꢇꢆꢋꢌꢍꢊ ꢄꢉꢎꢏꢏ ꢐꢑꢏ ꢁ26ꢒ ꢓꢔꢔ8ꢓꢁꢔꢓꢒ
ꢀ ꢁ2ꢂ
ꢀ 2ꢁꢂ
ꢀ ꢁ2ꢂ
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉꢈꢊꢈꢋ6ꢌꢅꢈ2ꢍ
ꢀ6ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉ2ꢅꢈꢋꢎꢌ
ꢀ
ꢀꢁ2
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
ꢀꢁꢂ
ꢀꢁ2
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂꢃa
8362fa
24
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 4.5V to 30V Input, 24V SEPIC Converter
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀ6
2ꢀꢁ
26ꢀꢁꢂ ꢂꢃ ꢄ ꢇ ꢈꢄ
6ꢀ8ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢅꢆ
ꢀ
ꢀꢁ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁ2ꢂ
ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅ 3ꢆꢃ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢈ 2ꢉꢅ
ꢆꢇ
ꢀ2
6ꢀ8ꢁꢂ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢈ 3ꢁꢅ
ꢆꢇ
ꢀ3
ꢁꢂꢃꢄ
ꢀꢁ
ꢂꢃꢁꢄꢅ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁ
ꢁꢂ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁ8362
Efficiency
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢁ
ꢀꢀ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ2
ꢀꢁꢂꢃꢄ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ3
36ꢀꢁꢂ
ꢀꢁꢂꢃ
2ꢀꢁ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂ8
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢀ2ꢃ ꢄꢅꢆꢇꢈ ꢉꢀꢉꢊꢇꢆꢋꢌꢍꢊ ꢄꢉꢎꢏꢏ ꢐꢑꢏ ꢒꢓꢓ8ꢒꢔꢔꢔ6
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉꢈꢊꢈꢋ6ꢌꢅꢈ2ꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ6ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉ2ꢅꢈꢋꢎꢌ
ꢀ ꢁ2ꢂ
ꢀ 2ꢁꢂ
ꢀ 3ꢁꢂ
ꢀ
ꢀꢁꢂ ꢀꢁ2 ꢀꢁ3 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ6 ꢀꢁꢂ ꢀꢁ8
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂ8a
2MHz, 2.8V to 28V Input, –5V Inverting Converter
ꢀꢁ
2ꢀ2ꢁꢂ
ꢀ2
2ꢀ2ꢁꢂ
ꢀ6
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁ8ꢂ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄ ꢄꢅ ꢆ ꢀ ꢁꢂ
2ꢀ8ꢁ ꢂꢃ 28ꢁ
ꢀꢁ ꢁꢂ ꢃ ꢆ ꢀ2ꢃ
ꢄꢅ
ꢅꢆ
ꢀꢁ2ꢂ ꢂꢃ ꢄ ꢇ 28ꢄ
ꢀꢁ
ꢂꢃꢁꢄꢅ
ꢀꢁ
ꢀ3
22ꢀꢁ
ꢀꢁ
ꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁ8362
Efficiency
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢀ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
ꢀꢁꢀꢂ
ꢀ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ3
36ꢀꢁꢂ
ꢀꢁꢂꢃ
2ꢀꢁ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂꢃ
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢀ2ꢃ ꢄꢅꢆꢇꢈ ꢉꢀꢉꢊꢇꢆꢋꢌꢍꢊ ꢄꢉꢎꢏꢏ ꢐꢑꢏ ꢁ26ꢒ ꢓꢔꢔ8ꢓꢁ22ꢒ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ 2ꢁ8ꢂ
ꢀ ꢁꢂ
ꢀ ꢁ2ꢂ
ꢀ 28ꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ3ꢁ ꢂꢃꢄꢅꢆ ꢅꢇꢈꢉꢊ ꢂꢋꢌ32ꢍꢎꢏ226ꢋꢋꢐꢑ
ꢀ6ꢁ ꢋꢇꢒꢃꢂꢃ ꢓꢒꢋ3ꢔꢀꢒꢏ2ꢃꢔꢕꢍꢌ
ꢀ
ꢀꢁ2 ꢀꢁꢂ ꢀꢁ6 ꢀꢁ8 ꢀꢁꢂ ꢀꢁ2 ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂꢃa
8362fa
25
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 2.8V to 42V Input, –12V Inverting Converter
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ2
ꢀꢁꢂꢃꢄ
ꢀ6
ꢀꢁꢂ
ꢀꢁ2ꢂ
ꢀ2ꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁ8ꢂ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ6ꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
2ꢀ8ꢁ ꢂꢃ ꢄ2ꢁ
ꢀ6ꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁ2ꢂ
ꢀꢁ ꢁꢂ ꢃ ꢆ 2ꢇꢃ
ꢄꢅ
ꢄꢅ
ꢀ3
ꢀꢁꢂꢃ
ꢀꢁ
ꢂꢃꢁꢄꢅ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ ꢁꢂ ꢃ ꢆ ꢇ2ꢃ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁ8362
ꢀꢁꢂ
Efficiency
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢁ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
ꢀꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ3
36ꢀꢁꢂ
ꢀꢁꢂꢃ
2ꢀꢁ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂꢃ
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ ꢀ2ꢃ ꢄꢅꢆꢇꢈ ꢉꢀꢉꢊꢇꢆꢋꢌꢍꢊ ꢄꢉꢎꢏꢏ ꢐꢑꢏ ꢁ26ꢒ ꢓꢔꢔ8ꢓꢁꢔꢓꢒ
ꢀ ꢁ2ꢂ
ꢀ 2ꢁꢂ
ꢀ ꢁ2ꢂ
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉꢈꢊꢈꢋ6ꢌꢅꢈ2ꢍ
ꢀ6ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉ2ꢅꢈꢋꢎꢌ
ꢀ
ꢀꢁ2
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
ꢀꢁꢂ
ꢀꢁ2
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂꢃa
2MHz, 4.5V to 30V Input, –24V Inverting Converter
ꢀ
ꢀꢁꢂ
ꢀꢁ
6ꢀ8ꢁꢂ
ꢀ2
6ꢀ8ꢁꢂ
ꢀ6
ꢀꢁꢂ
ꢀ2ꢁꢂ
26ꢀꢁꢂ ꢂꢃ ꢄ ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ ꢁ2ꢂ
ꢀꢁꢂꢃ ꢄꢅ 3ꢆꢃ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁꢂ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 3ꢁꢂ
ꢀ3
ꢀꢁꢂꢃ
ꢀꢁ
ꢂꢃꢁꢄꢅ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁ8362
ꢀꢁꢂ
Efficiency
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
6ꢀ
ꢀꢀ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ2
3ꢀꢁ8ꢂ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
36ꢀꢁꢂ
ꢀꢁ
ꢀ3
2ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁ
68ꢀꢁꢂ
8362 ꢀꢁꢂꢂ
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ ꢀ2ꢃ ꢄꢅꢆꢇꢈ ꢉꢀꢉꢊꢇꢆꢋꢌꢍꢊ ꢄꢉꢎꢏꢏ ꢐꢑꢏ ꢁ28ꢒ ꢓꢔꢔ8ꢓꢒꢒꢒ6
ꢀ3ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉꢈꢊꢈꢋ6ꢌꢅꢈ2ꢍ
ꢀ ꢁ2ꢂ
ꢀ 2ꢁꢂ
ꢀ 3ꢁꢂ
ꢀ6ꢁ ꢂꢃꢄꢅꢆꢅ ꢇꢄꢂ3ꢈꢀꢄꢉ2ꢅꢈꢋꢎꢌ
ꢀ
ꢀꢁꢂ ꢀꢁ2 ꢀꢁ3 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ6 ꢀꢁꢂ ꢀꢁ8
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8362 ꢀꢁꢂꢂa
8362fa
26
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
Low IQ, Low EMI, 2MHz, 48V Output Boost Converter with SSFM
ꢀꢁꢂꢃꢄ ꢅꢆꢀ ꢇꢀꢈꢄꢅꢉ
ꢈ2
ꢊꢋꢌꢍꢎꢏ
ꢀꢁ
6ꢀ8ꢁꢂ
ꢀꢁꢂꢃꢁꢂ ꢄꢅꢆ ꢇꢆꢈꢂꢄꢉ
ꢀ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ2
ꢀ
ꢀ8ꢁ
ꢀꢁ
8ꢀ ꢁꢂ 38ꢀ
3ꢀꢀꢁꢂ ꢂꢃ ꢄ ꢀ ꢁ2ꢂ
ꢀꢁ
ꢀ3
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀꢁꢂ
ꢂꢃꢁꢄꢅ
ꢆ2
ꢁꢂꢂꢇ
ꢂꢈꢂ2
ꢀꢁ
ꢀ8
ꢀ6
33ꢀꢁ
ꢀ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁꢁꢂ
ꢀꢁꢀ2
ꢀꢁꢂꢃꢄ
ꢀꢁꢁꢂ
ꢀꢁꢀ2
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀ2ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁꢁ
ꢂꢃꢄꢅꢆ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀ2ꢁ6
ꢀ2ꢁ6
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ2
3ꢀꢁ8ꢂ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢁꢂ
ꢀꢁ
ꢀ3
2ꢀꢁ
22ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁꢂ
8362 ꢀꢁꢂ2
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢏ3ꢎ32ꢏꢐ68
ꢀ2ꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢎꢏꢏꢎꢑ8ꢎ6ꢁꢏꢎ
ꢒꢓꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢎꢏ2ꢎꢑ2ꢐꢏꢐ
ꢔ6ꢂ ꢕꢐꢔꢈ33ꢖꢔꢗ
Conducted EMI Performance
(CISPR25 Class 5 Peak)
Conducted EMI Performance
(CISPR25 Class 5 Average)
8ꢀ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
8ꢀ
ꢀꢁꢂꢃꢃ ꢄ ꢅꢆꢂꢇ ꢁꢈꢉꢈꢊ
ꢀꢁꢂꢃꢃ ꢄ ꢂꢅꢆꢇꢂꢈꢆ ꢁꢉꢊꢉꢋ
ꢀꢁ
6ꢀ
ꢀꢁ8362 2ꢂꢃꢄ f ꢀꢁꢂꢃ ꢁꢄꢅ
ꢀꢁ8362 2ꢂꢃꢄ f ꢀꢁꢂꢃꢀꢄꢂ ꢂꢅꢆ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ2ꢁ
ꢀꢁꢂ
ꢀ2ꢁ
ꢀ
3
6
ꢀ
ꢀ2
ꢀꢁ
ꢀ8
2ꢀ
2ꢀ
2ꢀ
3ꢀ
ꢀ
3
6
ꢀ
ꢀ2
ꢀꢁ
ꢀ8
2ꢀ
2ꢀ
2ꢀ
3ꢀ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
8362 ꢀꢁꢂ2a
8362 ꢀꢁꢂ2ꢃ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ 2ꢁꢂꢃ
ꢀꢁ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ 2ꢁꢂꢃ
ꢀꢁ
Radiated EMI Performance
(CISPR25 Class 5 Peak)
Radiated EMI Performance
(CISPR25 Class 5 Average)
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂꢃꢃ ꢄ ꢅꢆꢂꢇ ꢁꢈꢉꢈꢊ
ꢀꢁꢂꢃꢃ ꢄ ꢂꢅꢆꢇꢂꢈꢆ ꢁꢉꢊꢉꢋ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ2ꢁ
ꢀꢁ8362 2ꢂꢃꢄ f ꢀꢁꢂꢃ ꢁꢄꢅ
ꢀꢁ8362 2ꢂꢃꢄ f ꢀꢁꢂꢃꢀꢄꢂ ꢂꢅꢆ
ꢀꢁ
ꢀꢁ
ꢀ2ꢁ
ꢀ
ꢀꢁꢁ
2ꢀꢀ
3ꢀꢀ
ꢀꢁꢁ
ꢀꢁꢁ
6ꢀꢀ
ꢀꢁꢁ
8ꢀꢀ
ꢀꢁꢁ ꢀꢁꢁꢁ
ꢀ
ꢀꢁꢁ
2ꢀꢀ
3ꢀꢀ
ꢀꢁꢁ
ꢀꢁꢁ
6ꢀꢀ
ꢀꢁꢁ
8ꢀꢀ
ꢀꢁꢁ ꢀꢁꢁꢁ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
8362 ꢀꢁꢂ2ꢃ
8362 ꢀꢁꢂ2ꢃ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ 2ꢁꢂꢃ
ꢀꢁ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ 2ꢁꢂꢃ
ꢀꢁ
8362fa
27
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
Low IQ, Low EMI, 400kHz, 48V Boost Converter with SSFM
ꢀꢁꢂꢃꢄ ꢅꢆꢀ ꢇꢀꢈꢄꢅꢉ
ꢀꢁ
22ꢀꢁ
ꢀꢁꢂꢃꢁꢂ ꢄꢅꢆ ꢇꢆꢈꢂꢄꢉ
ꢈ2
2ꢊ2ꢋꢌ
ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀ8ꢁ
ꢀꢁ
ꢀꢁ ꢂꢃ 3ꢄꢁ
ꢀ8
3ꢀꢀꢁꢂ ꢂꢃ ꢄ ꢀ ꢁ2ꢂ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ3
ꢀꢁ
ꢀꢁꢂ
ꢂꢃꢁꢄꢅ
ꢆ2
ꢁꢂꢂꢇ
ꢂꢈꢂ2
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀ
ꢀ6
82ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀ2ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄ
ꢀꢁꢁꢂ
ꢀꢁꢀ2
ꢁꢂꢃꢄꢅ
ꢆꢁ
ꢇꢈꢉ
ꢊ2ꢈ6
ꢀꢁꢁꢂ
ꢀꢁꢀ2
ꢀ
ꢀꢁ
ꢀꢁꢁ
ꢂꢃꢄꢅꢆ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ2ꢁ6
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀ2
3ꢀꢁ8ꢂ
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀ3
ꢀ2ꢀꢁ
22ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
8362 ꢀꢁꢂ3
ꢀꢁꢂ ꢀꢃꢄꢀꢅꢆ ꢃꢇꢈꢉ ꢀꢊꢋꢆ26ꢌ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢏ3ꢎ3ꢏ622ꢐ
ꢀ2ꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢎꢏꢏ3ꢎ32ꢏꢐ22
ꢑꢒꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢎꢏ2ꢎꢓ2ꢐꢏꢐ
ꢔ6ꢂ ꢕꢖꢋꢖꢗꢊꢋꢌꢔ 3ꢘꢗꢙꢕꢑ82ꢍ
Conducted EMI Performance
(CISPR25 Class 5 Peak)
Conducted EMI Performance
(CISPR25 Class 5 Average)
8ꢀ
8ꢀ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂꢃꢃ ꢄ ꢅꢆꢂꢇ ꢁꢈꢉꢈꢊ
ꢀꢁꢂꢃꢃ ꢄ ꢂꢅꢆꢇꢂꢈꢆ ꢁꢉꢊꢉꢋ
ꢀꢁ8362 ꢂꢃꢃꢄꢅꢆ f ꢀꢁꢂꢃꢀꢄꢂ ꢂꢅꢆ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁ8362 ꢂꢃꢃꢄꢅꢆ f ꢀꢁꢂꢃ ꢁꢄꢅ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀ2ꢁ
ꢀꢁꢂ
ꢀ2ꢁ
ꢀ
3
6
ꢀ
ꢀ2
ꢀꢁ
ꢀ8
2ꢀ
2ꢀ
2ꢀ
3ꢀ
ꢀ
3
6
ꢀ
ꢀ2
ꢀꢁ
ꢀ8
2ꢀ
2ꢀ
2ꢀ
3ꢀ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
8362 ꢀꢁꢂ3a
8362 ꢀꢁꢂ3ꢃ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀꢁ
Radiated EMI Performance
(CISPR25 Class 5 Peak)
Radiated EMI Performance
(CISPR25 Class 5 Average)
6ꢀ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
3ꢀ
2ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂꢃꢃ ꢄ ꢅꢆꢂꢇ ꢁꢈꢉꢈꢊ
ꢀꢁꢂꢃꢃ ꢄ ꢂꢅꢆꢇꢂꢈꢆ ꢁꢉꢊꢉꢋ
ꢀꢁꢂ
ꢀ2ꢁ
ꢀꢁꢂ
ꢀꢁ8362 ꢂꢃꢃꢄꢅꢆ f ꢀꢁꢂꢃ ꢁꢄꢅ
ꢀꢁ8362 ꢂꢃꢃꢄꢅꢆ f ꢀꢁꢂꢃꢀꢄꢂ ꢂꢅꢆ
ꢀꢁ
ꢀꢁ
ꢀ2ꢁ
ꢀ
ꢀꢁꢁ
2ꢀꢀ
3ꢀꢀ
ꢀꢁꢁ
ꢀꢁꢁ
6ꢀꢀ
ꢀꢁꢁ
8ꢀꢀ
ꢀꢁꢁ ꢀꢁꢁꢁ
ꢀ
ꢀꢁꢁ
2ꢀꢀ
3ꢀꢀ
ꢀꢁꢁ
ꢀꢁꢁ
6ꢀꢀ
ꢀꢁꢁ
8ꢀꢀ
ꢀꢁꢁ ꢀꢁꢁꢁ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
8362 ꢀꢁꢂ3ꢃ
8362 ꢀꢁꢂ3ꢃ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀ2ꢁ ꢂꢃꢄꢅꢆ ꢆꢇ ꢈ8ꢁ ꢇꢅꢆꢄꢅꢆ ꢉꢆ 3ꢊꢊꢋꢉꢌ f ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
8362fa
28
For more information www.linear.com/LT8362
LT8362
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8362#packaging for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
ꢃꢎꢨfꢨꢩꢨꢪꢫꢨ ꢙꢌꢕ ꢇꢐꢑ ꢬ ꢁꢡꢚꢁ8ꢚꢂ6ꢛꢛ ꢎꢨꢭ ꢕꢉ
ꢁꢀꢥꢁ ±ꢁꢀꢁꢡ
3ꢀꢡꢡ ±ꢁꢀꢁꢡ
2ꢀꢂꢡ ±ꢁꢀꢁꢡ ꢃ2 ꢅꢆꢇꢈꢅꢉ
ꢂꢀ6ꢡ ±ꢁꢀꢁꢡ
ꢖꢏꢕꢗꢏꢑꢈ
ꢋꢘꢌꢙꢆꢊꢈ
ꢁꢀ2ꢡ ±ꢁꢀꢁꢡ
ꢁꢀꢡꢁ
ꢒꢅꢕ
2ꢀ38 ±ꢁꢀꢁꢡ
ꢃ2 ꢅꢆꢇꢈꢅꢉ
RECOMMENDED ꢅꢋꢙꢇꢈꢎ ꢖꢏꢇ ꢖꢆꢌꢕꢞ ꢏꢊꢇ ꢇꢆꢓꢈꢊꢅꢆꢋꢊꢅ
ꢎ ꢦ ꢁꢀꢂ2ꢡ
ꢁꢀꢄꢁ ±ꢁꢀꢂꢁ
ꢌꢣꢖ
6
ꢂꢁ
3ꢀꢁꢁ ±ꢁꢀꢂꢁ
ꢃꢄ ꢅꢆꢇꢈꢅꢉ
ꢂꢀ6ꢡ ±ꢁꢀꢂꢁ
ꢃ2 ꢅꢆꢇꢈꢅꢉ
ꢖꢆꢊ ꢂ ꢊꢋꢌꢕꢞ
ꢎ ꢦ ꢁꢀ2ꢁ ꢋꢎ
ꢖꢆꢊ ꢂ
ꢌꢋꢖ ꢓꢏꢎꢗ
ꢃꢅꢈꢈ ꢊꢋꢌꢈ 6ꢉ
ꢁꢀ3ꢡ × ꢄꢡ°
ꢕꢞꢏꢓꢝꢈꢎ
ꢃꢇꢇꢉ ꢇꢝꢊ ꢎꢈꢜ ꢕ ꢁ3ꢂꢁ
ꢡ
ꢂ
ꢁꢀ2ꢡ ±ꢁꢀꢁꢡ
ꢁꢀꢡꢁ ꢒꢅꢕ
ꢁꢀꢥꢡ ±ꢁꢀꢁꢡ
ꢁꢀ2ꢁꢁ ꢎꢈꢝ
2ꢀ38 ±ꢁꢀꢂꢁ
ꢃ2 ꢅꢆꢇꢈꢅꢉ
ꢁꢀꢁꢁ ꢧ ꢁꢀꢁꢡ
ꢒꢋꢌꢌꢋꢓ ꢜꢆꢈꢐꢤꢈꢟꢖꢋꢅꢈꢇ ꢖꢏꢇ
ꢊꢋꢌꢈꢍ
ꢂꢀ ꢇꢎꢏꢐꢆꢊꢑ ꢌꢋ ꢒꢈ ꢓꢏꢇꢈ ꢏ ꢔꢈꢇꢈꢕ ꢖꢏꢕꢗꢏꢑꢈ ꢋꢘꢌꢙꢆꢊꢈ ꢓꢁꢚ22ꢛ ꢜꢏꢎꢆꢏꢌꢆꢋꢊ ꢋꢝ ꢃꢐꢈꢈꢇꢚ2ꢉꢀ
ꢕꢞꢈꢕꢗ ꢌꢞꢈ ꢙꢌꢕ ꢐꢈꢒꢅꢆꢌꢈ ꢇꢏꢌꢏ ꢅꢞꢈꢈꢌ ꢝꢋꢎ ꢕꢘꢎꢎꢈꢊꢌ ꢅꢌꢏꢌꢘꢅ ꢋꢝ ꢜꢏꢎꢆꢏꢌꢆꢋꢊ ꢏꢅꢅꢆꢑꢊꢓꢈꢊꢌ
2ꢀ ꢇꢎꢏꢐꢆꢊꢑ ꢊꢋꢌ ꢌꢋ ꢅꢕꢏꢙꢈ
3ꢀ ꢏꢙꢙ ꢇꢆꢓꢈꢊꢅꢆꢋꢊꢅ ꢏꢎꢈ ꢆꢊ ꢓꢆꢙꢙꢆꢓꢈꢌꢈꢎꢅ
ꢄꢀ ꢇꢆꢓꢈꢊꢅꢆꢋꢊꢅ ꢋꢝ ꢈꢟꢖꢋꢅꢈꢇ ꢖꢏꢇ ꢋꢊ ꢒꢋꢌꢌꢋꢓ ꢋꢝ ꢖꢏꢕꢗꢏꢑꢈ ꢇꢋ ꢊꢋꢌ ꢆꢊꢕꢙꢘꢇꢈ
ꢓꢋꢙꢇ ꢝꢙꢏꢅꢞꢀ ꢓꢋꢙꢇ ꢝꢙꢏꢅꢞꢠ ꢆꢝ ꢖꢎꢈꢅꢈꢊꢌꢠ ꢅꢞꢏꢙꢙ ꢊꢋꢌ ꢈꢟꢕꢈꢈꢇ ꢁꢀꢂꢡꢢꢢ ꢋꢊ ꢏꢊꢣ ꢅꢆꢇꢈ
ꢡꢀ ꢈꢟꢖꢋꢅꢈꢇ ꢖꢏꢇ ꢅꢞꢏꢙꢙ ꢒꢈ ꢅꢋꢙꢇꢈꢎ ꢖꢙꢏꢌꢈꢇ
6ꢀ ꢅꢞꢏꢇꢈꢇ ꢏꢎꢈꢏ ꢆꢅ ꢋꢊꢙꢣ ꢏ ꢎꢈꢝꢈꢎꢈꢊꢕꢈ ꢝꢋꢎ ꢖꢆꢊ ꢂ ꢙꢋꢕꢏꢌꢆꢋꢊ ꢋꢊ ꢌꢞꢈ
ꢌꢋꢖ ꢏꢊꢇ ꢒꢋꢌꢌꢋꢓ ꢋꢝ ꢖꢏꢕꢗꢏꢑꢈ
8362fa
29
For more information www.linear.com/LT8362
LT8362
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8362#packaging for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
(.0197)
1.0
(.039)
BSC
TYP
BSC
0.280 ±0.076
(.011 ±.003)
16 14 121110
9
RECOMMENDED SOLDER PAD LAYOUT
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1
3 5 6 7 8
1.0
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
(.039)
BSC
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.50
(.0197)
BSC
MSOP (MSE16(12)) 0213 REV D
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
8362fa
30
For more information www.linear.com/LT8362
LT8362
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/17 Removed Lead Temperature line from Absolute Maximum Ratings
2
Corrected Electrical Characteristics table SSFM Maximum Frequency Deviation Condition
3
Corrected f
/f
units
3
SYNC OSC
Corrected Soft-Start Charge Current Condition to 0.5V
4
Inverting Converter Section: Added, + |V | to equation
21
22
27
27
28
28
28
OUT
Added efficiency graph to 48V Boost Converter circuit
Removed 200mA output current line from schematic
Corrected Conducted EMI Y axis units on both plots
Removed 100mA and 200mA output current lines from schematic
Edited circuit: Added lower FB resistor, shorted BIAS pin to GND
Corrected Conducted EMI Y axis units on both plots
8362fa
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
31
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATION
2MHz, Low-IQ Automotive Pre-Boost Application
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁ
2ꢀ8ꢁ ꢂꢃ 2ꢄꢁ
8ꢀ ꢁꢂꢃꢄꢅꢆ ꢇꢈꢈꢉꢊꢄꢋꢌꢍ
ꢀꢁ
ꢀꢁ
ꢀꢁꢁꢂꢃ ꢃꢄ ꢅ ꢀ 2ꢁ8ꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ6
ꢀꢁꢂꢃꢄ
ꢀ3
22ꢀꢁ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀꢁ8362
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢀ
Line Transient Response
ꢀ
ꢀ
ꢀꢀ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ2
2ꢀꢁꢂ
(Pass-Through to Boosting)
ꢀ2
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ3
2ꢀꢁ
ꢀꢁꢂ6ꢃ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢁ
ꢀ
ꢀ 8 ꢂ ꢃ
ꢀ ꢁꢂꢃꢄ
ꢀꢁꢂ
ꢀꢁꢂ
8362 ꢀꢁꢂꢃ
ꢀꢁꢂ ꢃꢄꢅ ꢅꢆꢇꢈ2ꢉ2ꢉꢇꢊ
ꢀ
ꢀꢁ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢈꢀꢈꢉꢆꢅꢊꢋꢌꢉ ꢀꢇꢍꢌ ꢎꢏꢐꢏ ꢎꢑꢑ3ꢎ3ꢑꢒꢏꢁꢐ
ꢀꢁꢂꢃꢄꢁ
ꢀ3ꢁ ꢂꢃꢄꢅꢆ ꢅꢇꢈꢉꢊ ꢂꢋꢌ32ꢍꢎꢏ226ꢋꢋꢐꢑ
ꢀ
ꢀ ꢁꢂꢃ ꢄꢅ 3ꢃ ꢆ2ꢇꢃꢈꢉꢊꢋ
ꢀꢁ
8362 ꢀꢁꢂꢃa
ꢀꢁꢁꢂꢃꢄꢅꢆꢇ
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V = 6V to 100V, Low I Monolithic No-Opto Flyback, 5-Lead
IN
LT8300
100V Micropower Isolated Flyback Converter with
IN
Q
150V/260mA Switch
TSOT-23
LT8330
60V, 1A, Low I Boost/SEPIC/Inverting 2MHz Converter
V
IN
= 3V to 40V, V
= 60V, I = 6µA (Burst Mode Operation),
OUT(MAX) Q
Q
6-Lead TSOT-23, 3mm × 2mm DFN packages
V = 4.5V to 100V, V =140V, I = 6µA (Burst Mode
IN
LT8331
Low I Boost/SEPIC/Flyback/Inverting Converter with
Q
OUT(MAX)
Q
140V/0.5A Switch
Operation), MSOP-16(12)E
= 3V to 25V, V = 25V, I = 6µA (Burst Mode Operation),
OUT(MAX) Q
LT8335
28V, 2A, Low IQ Boost/SEPIC/Inverting 2MHz Converter
V
IN
3mm × 2mm DFN package
LT8494
70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up
DC/DC Converter
V
= 1V to 60V (2.5V to 32V Start-Up), V
= 70V, I = 3µA
OUT(MAX) Q
IN
(Burst Mode Operation), I = <1µA, 20-Lead TSSOP
SD
LT8570/LT8570-1
LT8580
65V, 500mA/250mA Boost/Inverting DC/DC Converter
V
SD
= 2.55V, V
= 40V, V
= 60V, I = 1.2mA,
IN(MIN)
IN(MAX)
OUT(MAX) Q
I
= <1mA, 3mm × 3mm DFN-8, MSOP-8E
1A (I ), 65V, 1.5MHz, High Efficiency Step-Up DC/DC
V : 2.55V to 40V, V
= 65V, I = 1.2mA, I = <1µA,
OUT(MAX) Q SD
SW
IN
Converter
3mm × 3mm DFN-8, MSOP-8E
8362fa
LT 1217 REV A • PRINTED IN USA
www.linear.com/LT8362
32
ANALOG DEVICES, INC. 2017
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