LT6301IFE#TRPBF [Linear]
LT6301 - Dual 500mA, Differential xDSL Line Driver in 28-Lead TSSOP Package; Package: TSSOP; Pins: 28; Temperature Range: -40°C to 85°C;
| 型号： | LT6301IFE#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT6301 - Dual 500mA, Differential xDSL Line Driver in 28-Lead TSSOP Package; Package: TSSOP; Pins: 28; Temperature Range: -40°C to 85°C 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总16页 (文件大小：243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT6301
Dual 500mA, Differential xDSL
Line Driver in 28-Lead TSSOP Package
U
FEATURES
DESCRIPTIO
The LT®6301 is a 500mA minimum output current, quad
op amp with outstanding distortion performance. The
amplifiers are gain-of-ten stable, but can be easily com-
pensated for lower gains. The extended output swing al-
lowsforlowersupplyrailstoreducesystempower.Supply
current is set with an external resistor to optimize power
dissipation. The LT6301 features balanced, high imped-
ance inputs with low input bias current and input offset
voltage. Active termination is easily implemented for fur-
ther system power reduction. Short-circuit protection and
thermal shutdown ensure the device’s ruggedness.
■
Drives Two Lines from One Package
■
Exceeds All Requirements For Full Rate,
Downstream ADSL Line Drivers
■
Power Enhanced 28-Lead TSSOP Package
■
Power Saving Adjustable Supply Current
■
±500mA Minimum IOUT
■
±11.1V Output Swing, VS = ±12V, RL = 100Ω
±10.9V Output Swing, VS = ±12V, IL = 250mA
Low Distortion: –82dBc at 1MHz, 2VP-P Into 50Ω
200MHz Gain Bandwidth
■
■
■
■
■
600V/µs Slew Rate
Specified at ±12V and ±5V
The outputs drive a 100Ω load to ±11.1V with ±12V
supplies, and ±10.9V with a 250mA load. The LT6301 is a
functional replacement for the LT1739 and LT1794 in
xDSL line driver applications and requires no circuit
changes.
U
APPLICATIO S
■
High Density ADSL Central Office Line Drivers
■
High Efficiency ADSL, HDSL2, SHDSL Line Drivers
■
Buffers
The LT6301 is available in the very small, thermally
enhanced, 28-lead TSSOP package for maximum port
density in line driver applications.
■
Test Equipment Amplifiers
■
Cable Drivers
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
High Efficiency ±12V Supply ADSL Line Driver
12V
24.9k
SHDN
+IN
+
12.7Ω
1/4
LT6301
TWO COMPLETE ADSL LINE DRIVERS
PROVIDED WITH ONE LT6301 PACKAGE
–
1k
1:2*
110Ω
110Ω
100Ω
1000pF
1k
*COILCRAFT X8390-A OR EQUIVALENT
= 10mA PER AMPLIFIER
–
I
SUPPLY
WITH R
12.7Ω
1/4
LT6301
= 24.9k
SHDN
SHDNREF
–IN
+
6301 TA01
–12V
sn6301 6301f
1
LT6301
W W U W
U
W U
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Supply Voltage (V+ to V–) ................................. ±13.5V
Input Current ..................................................... ±10mA
Output Short-Circuit Duration (Note 2)........... Indefinite
Operating Temperature Range ............... – 40°C to 85°C
Specified Temperature Range (Note 3).. – 40°C to 85°C
Junction Temperature.......................................... 150°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
ORDER PART
–
NUMBER
–
1
2
V
V
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
–IN A
–
A
LT6301CFE
LT6301IFE
3
OUT A
+
+IN A
4
V
SHDN1
SHDNREF1
+IN B
+
5
V
6
OUT B
–
B
C
7
V
–IN B
–
8
V
–IN C
9
OUT C
+
+IN C
10
11
12
13
14
V
SHDN2
SHDNREF2
+IN D
+
V
OUT D
–
D
V
–IN D
–
–
V
V
FE PACKAGE
28-LEAD PLASTIC TSSOP
TJMAX = 150°C, θJA = 25°C/W (NOTE 4)
UNDERSIDE METAL CONNECTED TO V–
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C.
VCM = 0V, pulse tested, ±5V ≤ VS ≤ ±12V, VSHDNREF = 0V, RBIAS = 24.9k between V+ and SHDN unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
1
5.0
7.5
mV
mV
OS
●
Input Offset Voltage Matching
(Note 6)
0.3
5.0
7.5
mV
mV
●
●
Input Offset Voltage Drift
Input Offset Current
10
µV/°C
I
I
100
500
800
nA
nA
OS
●
●
●
Input Bias Current
±0.1
±4
±6
µA
µA
B
Input Bias Current Matching
(Note 6)
100
500
800
nA
nA
e
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
f = 10kHz
8
nV/√Hz
pA/√Hz
n
i
f = 10kHz
0.8
n
+
–
R
V
= (V – 2V) to (V + 2V)
●
5
50
6.5
MΩ
MΩ
IN
CM
Differential
C
Input Capacitance
3
pF
IN
+
+
Input Voltage Range (Positive)
Input Voltage Range (Negative)
(Note 5)
(Note 5)
+
●
●
V – 2
V – 1
V
V
–
–
V + 1
V + 2
–
CMRR
Common Mode Rejection Ratio
V
= (V – 2V) to (V + 2V)
74
66
83
dB
dB
CM
●
sn6301 6301f
2
LT6301
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C.
VCM = 0V, pulse tested, ±5V ≤ VS ≤ ±12V, VSHDNREF = 0V, RBIAS = 24.9k between V+ and SHDN unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
V = ±4V to ±12V
MIN
TYP
MAX
UNITS
PSRR
Power Supply Rejection Ratio
74
66
88
dB
dB
S
●
●
●
●
●
●
●
A
V
Large-Signal Voltage Gain
Output Swing
V = ±12V, V
= ±10V, R = 40Ω
63
57
76
70
dB
dB
VOL
OUT
S
OUT
L
V = ±5V, V
S
= ±3V, R = 25Ω
60
54
dB
dB
OUT
L
V = ±12V, R = 100Ω
10.9
10.7
11.1
10.9
4
±V
±V
S
L
V = ±12V, I = 250mA
10.6
10.4
±V
±V
S
L
V = ±5V, R = 25Ω
3.7
3.5
±V
±V
S
L
V = ±5V, I = 250mA
3.6
3.4
3.9
±V
±V
S
L
I
I
Maximum Output Current
V = ±12V, R = 1Ω
500
1200
10
mA
OUT
S
S
L
Supply Current per Amplifier
V = ±12V, R
= 24.9k (Note 7)
8.0
6.7
13.5
15.0
mA
mA
mA
mA
mA
S
BIAS
●
V = ±12V, R
= 32.4k (Note 7)
= 43.2k (Note 7)
= 66.5k (Note 7)
8
6
4
S
BIAS
BIAS
BIAS
V = ±12V, R
S
V = ±12V, R
S
V = ±5V, R
= 24.9k (Note 7)
BIAS
2.2
1.8
3.4
5.0
5.8
mA
mA
S
●
●
Supply Current in Shutdown
Output Leakage in Shutdown
Channel Separation
V
V
= 0.4V
0.1
0.3
110
1
1
mA
mA
SHDN
SHDN
= 0.4V
V = ±12V, V
S
= ±10V, R = 40Ω (Note 8)
80
77
dB
dB
OUT
L
SR
Slew Rate
V = ±12V, A = –10, (Note 9)
300
100
600
200
–85
–82
200
V/µs
V/µs
dBc
S
V
V = ±5V, A = –10, (Note 9)
S
V
HD2
HD3
GBW
Differential 2nd Harmonic Distortion
Differential 3rd Harmonic Distortion
Gain Bandwidth
V = ±12V, A = 10, 2V , R = 50Ω, 1MHz
S V P-P L
V = ±12V, A = 10, 2V , R = 50Ω, 1MHz
dBc
S
V
P-P
L
f = 1MHz
MHz
Note 5: Guaranteed by the CMRR tests.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 6: Matching is between amplifiers A and B or between amplifiers
C and D.
Note 7: R
SHDNREF pin grounded.
Note 2: Applies to short circuits to ground only. A short circuit between
the output and either supply may permanently damage the part when
operated on supplies greater than ±10V.
+
is connected between V and each SHDN pin, with each
BIAS
Note 3: The LT6301C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and 85°C. The
LT6301I is guaranteed to meet the extended temperature limits.
Note 8: Channel separation is measured between amplifiers A and B and
between amplifiers C and D. Channel separation between any other
combination of amplifiers is guaranteed by design as two separate die are
used in the package.
Note 4: Thermal resistance varies depending upon the amount of PC board
metal attached to Pins 1, 14, 15, 28 and the exposed bottom side metal of
the device. If the maximum dissipation of the package is exceeded, the
device will go into thermal shutdown and be protected.
Note 9: Slew rate is measured at ±5V on a ±10V output signal while
operating on ±12V supplies and ±1V on a ±3V output signal while
operating on ±5V supplies.
sn6301 6301f
3
LT6301
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Supply Current
Input Common Mode Range
vs Supply Voltage
Input Bias Current
vs Ambient Temperature
vs Ambient Temperature
+
200
180
160
140
120
100
80
15
14
13
12
11
10
9
V
T
= 25°C
V
I
= ±12V
S
PER AMPLIFIER = 10mA
V
= ±12V
BIAS
A
S
∆V > 1mV
R
= 24.9k TO SHDN
–0.5
–1.0
–1.5
–2.0
OS
S
V
= 0V
SHDNREF
2.0
1.5
1.0
0.5
60
8
40
7
20
6
–
V
0
5
–50 –30 –10
10
30
50
70
90
–50 –30 –10 10
30
50
70
90
2
4
8
10
12
14
6
SUPPLY VOLTAGE (±V)
TEMPERATURE (°C)
TEMPERATURE (°C)
6301 G03
6301 G01
6301 G02
Output Short-Circuit Current
vs Ambient Temperature
Output Saturation Voltage
vs Ambient Temperature
Input Noise Spectral Density
+
100
10
1
100
800
780
760
740
720
700
680
660
640
620
600
V
V
I
= ±12V
PER AMPLIFIER = 10mA
T
= 25°C
= ±12V
V
S
= ±12V
S
S
A
S
V
I
–0.5
–1.0
PER AMPLIFIER = 10mA
R
L
= 100Ω
S
e
i
I
I
= 250mA
10
1
n
LOAD
–1.5
SINKING
1.5
1.0
0.5
SOURCING
n
= 250mA
LOAD
R
L
= 100Ω
–
0.1
0.1
100k
V
–50
30
TEMPERATURE (°C)
70
–30 –10 10
50
90
–30 –10
30
50
70
90
–50
10
1
10
100
1k
10k
FREQUENCY (Hz)
TEMPERATURE (°C)
6301 G04
6301 G05
6301 G06
Open-Loop Gain and Phase
vs Frequency
–3dB Bandwidth
vs Supply Current
Slew Rate vs Supply Current
120
100
80
120
80
45
40
35
30
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
0
T
= 25°C
= ±12V
= 10
A
S
V
T
= 25°C
= ±12V
= –10
= 1k
A
S
V
V
A
V
A
PHASE
40
R
= 100Ω
L
R
L
RISING
60
0
40
–40
–80
–120
–160
–200
–240
–280
FALLING
20
GAIN
0
–20
–40
–60
–80
T
= 25°C
= ±12V
= –10
A
S
V
V
A
R
= 100Ω
L
I
PER AMPLIFIER = 10mA
S
0
100k
1M
10M
100M
2
4
6
8
10
12
14
2
3
4
5
6
7
8
9
10 11 12 13 14 15
FREQUENCY (Hz)
SUPPLY CURRENT PER AMPLIFIER (mA)
SUPPLY CURRENT PER AMPLIFIER (mA)
6300 G07
6301 G08
6301 G09
sn6301 6301f
4
LT6301
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Frequency Response
vs Supply Current
CMRR vs Frequency
PSRR vs Frequency
100
90
30
25
20
15
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
V
S
A
V
= ±12V
= 10
A
S
V
A
S
= ±12V
= 10
= 10mA PER AMPLIFIER
S
V
V
= ±12V
I
= 10mA PER AMPLIFIER
S
I
80
70
2mA PER AMPLIFIER
60
50
10
5
10mA PER AMPLIFIER
15mA PER AMPLIFIER
(–) SUPPLY
40
30
20
10
0
0
–5
(+) SUPPLY
–10
–15
–20
–10
0.1
1
10
100
1k
10k
100k
1M
10M 100M
0.01
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (Hz)
FREQUENCY (MHz)
6301 G10
6301 G12
6301 G11
Output Impedance vs Frequency
ISHDN vs VSHDN
Supply Current vs VSHDN
35
1000
100
10
2.5
2.0
1.5
T
= 25°C
±12V
A
S
T
V
V
= 25°C
= ±12V
SHDNREF
T
V
V
= 25°C
= ±12V
S
A
S
A
V
30
25
20
15
10
5
= 0V
= 0V
SHDNREF
I
PER
S
AMPLIFIER = 2mA
I
S
PER
AMPLIFIER = 10mA
1
1.0
0.5
0
I
PER
S
AMPLIFIER = 15mA
0.1
0.01
0
0.01
0.1
1
10
100
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(V)
FREQUENCY (MHz)
V
V
SHDN
SHDN
6301 G13
6301 G14
6301 G15
Differential Harmonic Distortion
vs Output Amplitude
Differential Harmonic Distortion
vs Frequency
–40
–50
–40
f = 1MHz
V
T
= 10V
P-P
O
A
S
V
L
T
= 25°C
= ±12V
= 10
–45
–50
–55
–60
–65
–70
–75
–80
–85
–90
= 25°C
= ±12V
= 10
A
S
V
V
A
V
A
R
I
= 50Ω
R
I
= 50Ω
PER AMPLIFIER = 10mA
L
S
–60
PER AMPLIFIER = 10mA
S
HD3
HD2
–70
–80
HD3
–90
HD2
–100
0
2
4
6
8
10 12 14 16 18
100 200 300 400 500 600 700 800 900 1000
V
FREQUENCY (kHz)
OUT(P-P)
6301 G16
6301 G17
sn6301 6301f
5
LT6301
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Differential Harmonic Distortion
vs Supply Current
Undistorted Output Swing
vs Frequency
–40
20
15
10
5
V
V
A
= 10V
P-P
O
S
V
= ±12V
= 10
–45
–50
–55
–60
–65
–70
–75
–80
–85
R
= 50Ω
L
f = 1MHz, HD3
SFDR > 40dB
f = 100kHz, HD2
T
= 25°C
= ±12V
= 10
A
V
A
S
V
f = 100kHz, HD3
f = 1MHz, HD2
R
= 50Ω
L
I
PER AMPLIFIER = 10mA
S
0
100k
300k
1M
3M
10M
2
3
4
5
6
11
7
8
9
10
FREQUENCY (Hz)
I
PER AMPLIFIER (mA)
SUPPLY
6301 G19
6301 G18
TEST CIRCUIT
SUPPLY BYPASSING
TO PINS: 18, 19, 24 AND 25
12V
+
0.1µF
0.1µF
4.7µF
+
4.7µF
0.1µF
+
12V
4.7µF
R
R
TO PINS: 1, 14, 15, 16,
21, 22, 27 AND 28
BIAS
BIAS
–12V
4
(SHDN)
3 OR 9
2 OR 8
10
+
–
V
OUT(P-P)
26 OR 20
A OR C
12.7Ω
1:2*
10k
1k
–12V
110Ω
110Ω
OUT (+)
OUT (–)
R
≈ 50Ω
L
E
IN
SPLITTER
100 LINE LOAD
0.01µF
49.9Ω
1k
MINICIRCUITS
ZSC5-2-2
10k
23
OR
17
7 OR 13
6 OR 12
12.7Ω
–
6301 TC
B OR D
5 (SHDNREF)
+
11
*COILCRAFT X8390-A OR EQUIVALENT
AMPLITUDE SET AT EACH AMPLIFIER OUTPUT
V
OUTP-P
DISTORTION MEASURED ACROSS LINE LOAD
FOR MATCHING, USE AMPLIFIERS A AND B,
OR AMPLIFIERS C AND D
sn6301 6301f
6
LT6301
W U U
APPLICATIO S I FOR ATIO
U
The LT6301 is a high speed, 200MHz gain bandwidth
product, quad voltage feedback amplifier with high output
current drive capability, 500mA source and sink. The
LT6301 is ideal for use as a line driver in xDSL data
communication applications. The output voltage swing
has been optimized to provide sufficient headroom when
operating from ±12V power supplies in full-rate ADSL
applications. The LT6301 also allows for an adjustment of
the operating current to minimize power consumption. In
addition, the LT6301 is available in a small footprint
surface mount package to minimize PCB area.
Setting the Quiescent Operating Current
Power consumption and dissipation are critical concerns
in multiport xDSL applications. Two pins, Shutdown
(SHDN)andShutdownReference(SHDNREF),areprovided
to control quiescent power consumption and allow for the
complete shutdown of the drivers. The quiescent current
should be set high enough to prevent distortion induced
errorsinaparticularapplication,butnotsohighthatpower
iswastedinthedriverunnecessarily. Agoodstartingpoint
to evaluate the LT6301 is to set the quiescent current to
10mA per amplifier. Pins 4 and 5 set the current for ampli-
fiersAandBandPins10and11setthecurrentforamplifers
CandD.Eachamplifierpairshouldbecontrolledseparately.
To minimize signal distortion, the LT6301 amplifiers are
decompensated to provide very high open-loop gain at
high frequency. As a result each amplifier is frequency
stable with a closed-loop gain of 10 or more. If a closed-
loop gain of less than 10 is desired, external frequency
compensating components can be used.
TheinternalbiasingcircuitryisshowninFigure1.Ground-
ingtheSHDNREFpinanddirectlydrivingtheSHDNpinwith
a voltage can control the operating current as seen in the
Typical Performance Characteristics. When the SHDN pin
is less than SHDNREF + 0.4V, the driver is shut down and
consumes typically only 100µA of supply current and the
outputs are in a high impedance state. Part to part varia-
tions, however, will cause inconsistent control of the qui-
escentcurrentifdirectvoltagedriveoftheSHDNpinisused.
SHDN
5I
2k
I
2I
2I
Using an external resistor, RBIAS, connected in one of two
ways provides a much more predictable control of the
quiescent supply current. Figure 2 illustrates the effect on
supply current per amplifier with RBIAS connected be-
tween the SHDN pin and the 12V V+ supply of the LT6301
and the approximate design equations. Figure 3 illustrates
the same control with RBIAS connected between the
SHDNREFpinandgroundwhiletheSHDNpinistiedtoV+.
Either approach is equally effective.
1k
TO
START-UP
I
BIAS
CIRCUITRY
TO AMPLIFIERS
BIAS CIRCUITRY
6301 F01
SHDNREF
2
I
I
=
I
= I
BIAS
SHDN SHDNREF
5
PER AMPLIFIER (mA) = 64 • I
BIAS
SUPPLY
Figure 1. Internal Current Biasing Circuitry
30
+
V
= ±12V
V
= 12V
S
25
R
BIAS
SHDN
+
20
15
10
5
V
R
– 1.2V
• 25.6
≈
I
PER AMPLIFIER (mA)
+
S
+ 2k
BIAS
V
– 1.2V
R
=
• 25.6 – 2k
BIAS
I
S
PER AMPLIFIER (mA)
SHDNREF
0
7
10
40
70
100
130
160
190
R
(kΩ)
6301 F02
BIAS
Figure 2. RBIAS to V+ Current Control
sn6301 6301f
7
LT6301
W U U
U
APPLICATIO S I FOR ATIO
45
+
V
= ±12V
V
= 12V
SHDN
S
40
35
30
25
20
15
10
5
+
V
– 1.2V
• 64
≈
PER AMPLIFIER
I
(mA)
S
R
+ 5k
BIAS
+
V
– 1.2V
R
=
• 64 – 5k
BIAS
I
S
PER AMPLIFIER (mA)
SHDNREF
R
BIAS
0
4
7
10 30 50 70 90 100 130 150 170 190 210 230 250 270 290
(kΩ)
R
BIAS
6301 F03
Figure 3. RBIAS to Ground Current Control
12V OR V
LOGIC
Two Control Inputs
RESISTOR VALUES (kΩ)
TO V (12V)
R
SHDN
V
LOGIC
R
R
TO V
SHDN LOGIC
SHDN
CC
R
R
C1
C0
V
3V 3.3V 5V
3V 3.3V 5V
V
SHDN
2k
LOGIC
C1
R
R
R
V
40.2 43.2 60.4 4.99 6.81 19.6
11.5 13.0 21.5 8.66 10.7 20.5
19.1 22.1 36.5 14.3 17.8 34.0
SUPPLY CURRENT PER AMPLIFIER (mA)
SHDN
0V
V
C0
C1
CO
C0
V
C1
H
H
L
H
L
H
L
10
7
5
10
7
5
10
7
5
10
7
5
10
7
5
10
7
5
SHDNREF
LOGIC
L
2
2
2
2
2
2
12V OR V
One Control Input
RESISTOR VALUES (kΩ)
TO V (12V)
R
SHDN
V
R
R
TO V
LOGIC
SHDN
CC
SHDN
LOGIC
R
C
V
R
3V 3.3V 5V
3V 3.3V 5V
LOGIC
V
C
0V
SHDN
40.2 43.2 60.4 4.99 6.81 19.6
7.32 8.25 13.7 5.49 6.65 12.7
SUPPLY CURRENT PER AMPLIFIER (mA)
SHDN
2k
R
V
C
C
H
L
10
2
10
2
10
2
10
2
10
2
10
2
6301 F04
SHDNREF
Figure 4. Providing Logic Input Control of Operating Current
while maintaining less than 2Ω output impedance to
frequencies less than 1MHz. This low power mode retains
termination impedance at the amplifier outputs and the
line driving back termination resistors. With this termina-
tion, while a DSL port is not transmitting data, it can still
sense a received signal from the line across the back-
termination resistors and respond accordingly.
Logic Controlled Operating Current
The DSP controller in a typical xDSL application can have
I/O pins assigned to provide logic control of the LT6301
line driver operating current. As shown in Figure 4 one or
two logic control inputs can control two or four different
operating modes. The logic inputs add or subtract current
to the SHDN input to set the operating current. The one
logic input example selects the supply current to be either
full power, 10mA per amplifier or just 2mA per amplifier,
whichsignificantlyreducesthedriverpowerconsumption
The two logic input control provides two intermediate
(approximately 7mA per amplifier and 5mA per amplifier)
operatinglevelsbetweenfullpowerandterminationmodes.
sn6301 6301f
8
LT6301
W U U
APPLICATIO S I FOR ATIO
U
These modes can be useful for overall system power Power Dissipation and Heat Management
management when full power transmissions are not nec-
essary. Contact LTC Applications for single supply design
information.
xDSL applications require the line driver to dissipate a
significant amount of power and heat compared to other
components in the system. The large peak to RMS varia-
tions of DMT and CAP ADSL signals require high supply
voltages to prevent clipping, and the use of a step-up
transformer to couple the signal to the telephone line can
require high peak current levels. These requirements
result in the driver package having to dissipate significant
amounts of power. Several multiport cards inserted into
a rack in an enclosed central office box can add up to
many, many watts of power dissipation in an elevated
ambienttemperatureenvironment. TheLT6301hasbuilt-
in thermal shutdown circuitry that will protect the ampli-
fiers if operated at excessive temperatures, however data
transmissions will be seriously impaired. It is important in
thedesignofthePCBandcardenclosuretotakemeasures
to spread the heat developed in the driver away to the
ambientenvironmenttopreventthermalshutdown(which
occurs when the junction temperature of the LT6301
exceeds 165°C).
Shutdown and Recovery
The ultimate power saving action on a completely idle port
is to fully shut down the line driver by pulling the SHDN pin
to within 0.4V of the SHDNREF potential. As shown in
Figure 5 complete shutdown occurs in less than 10µs and,
more importantly, complete recovery from the shut down
state to full operation occurs in less than 2µs. The biasing
circuitry in the LT6301 reacts very quickly to bring the
amplifiers back to normal operation.
VSHDN
SHDNREF = 0V
AMPLIFIER
OUTPUT
Estimating Line Driver Power Dissipation
6301 F05
Figure 6 is a typical ADSL application shown for the
purpose of estimating the power dissipation in the line
driver. Due to the complex nature of the DMT signal,
Figure 5. Shutdown and Recovery Timing
12V
24.9k – SETS I PER AMPLIFIER = 10mA
Q
20mA DC
2V
SHDN
RMS
+IN
+
17.4Ω
A
–
1k
1:1.7
110Ω
110Ω
I
= 57mA
RMS
100Ω
3.16V
RMS
LOAD
1000pF
1k
–
+
17.4Ω
6301 F06
B
SHDNREF
–IN
–12V
–2V
RMS
Figure 6. Estimating Line Driver Power Dissipation
sn6301 6301f
9
LT6301
W U U
U
APPLICATIO S I FOR ATIO
which looks very much like noise, it is easiest to use the
RMS values of voltages and currents for estimating the
driver power dissipation. The voltage and current levels
shown for this example are for a full-rate ADSL signal
driving 20dBm or 100mWRMS of power on to the 100Ω
telephone line and assuming a 0.5dBm insertion loss in
the transformer. The quiescent current for the LT6301 is
set to 10mA per amplifier.
becomes part of the load current. Figure 7 illustrates the
total amount of biasing current flowing between the + and
– power supplies through the amplifiers as a function of
load current for one differential driver. As much as 60% of
the quiescent no load operating current is diverted to the
load.
At full power to both lines the total package power dissi-
pation is:
ThepowerdissipatedintheLT6301isacombinationofthe
quiescent power and the output stage power when driving
asignal.Thetwopairsofamplifiersareconfiguredtoplace
adifferentialsignalontwolines.TheClassABoutputstage
in each amplifier will simultaneously dissipate power in
the upper power transistor of one amplifier, while sourc-
ing current, and the lower power transistor of the other
amplifier, while sinking current. The total device power
dissipation is then:
PD(FULL)
=
[
24V • 8mA + (12V – 2VRMS) • 57mARMS
+ [|–12V – (–2VRMS)|] • 57mARMS • 2
]
P
D(FULL) = [192mW + 570mW + 570mW] • 2
= 2.664W*
The junction temperature of the driver must be kept less
than the thermal shutdown temperature when processing
a signal. The junction temperature is determined from the
following expression:
PD = PQUIESCENT + PQ(UPPER) + PQ(LOWER)
TJ = TAMBIENT (°C) + PD(FULL) (W) • θJA (°C/W)
PD = (V+ – V–) • IQ + (V+ – VOUTARMS) •
θJA is the thermal resistance from the junction of the
LT6301 to the ambient air, which can be minimized by
heat-spreading PCB metal and airflow through the enclo-
sure as required. For the example given, assuming a
maximum ambient temperature of 50°C and keeping the
junction temperature of the LT6301 to 150°C maximum,
themaximumthermalresistancefromjunctiontoambient
required is:
ILOAD + (V– – VOUTBRMS) • ILOAD
With no signal being placed on the line and the amplifier
biased for 10mA per amplifier supply current, the quies-
cent driver power dissipation is:
PDQ = [24V • 10mA] • 4 = 960mW
This can be reduced in many applications by operating
with a lower quiescent current value or shutting down the
part during idle conditions.
150°C – 50°C
θJA(MAX)
=
= 37.5°C/ W
2.664W
When driving a load, a large percentage of the amplifier
quiescent current is diverted to the output stage and
*Design techniques exist to significantly reduce this value (See Line Driving Back Termination).
25
20
15
10
5
0
–240 –200 –160 –120 –80
–40
0
40
80
120
160
200
240
I
(mA) (ONE DIFFERENTIAL DRIVER)
LOAD
6301 F07
Figure 7. IQ vs ILOAD
sn6301 6301f
10
LT6301
W U U
APPLICATIO S I FOR ATIO
U
Heat Sinking Using PCB Metal
Layout and Passive Components
Designing a thermal management system is often a trial
and error process as it is never certain how effective it is
until it is manufactured and evaluated. As a general rule,
the more copper area of a PCB used for spreading heat
away from the driver package, the more the operating
junction temperature of the driver will be reduced. The
limit to this approach however is the need for very com-
pact circuit layout to allow more ports to be implemented
on any given size PCB.
With a gain bandwidth product of 200MHz the LT6301
requires attention to detail in order to extract maximum
performance. Use a ground plane, short lead lengths and
acombinationofRF-qualitysupplybypasscapacitors(i.e.,
0.1µF). As the primary applications have high drive cur-
rent, uselowESRsupplybypasscapacitors(1µFto10µF).
The four V+ pins (Pins 18, 19, 24, 25) separately provide
power to each amplifier and should be shorted together
with leads as short as possible to the bypass capacitors.
To best extract heat from the FE28 package, a generous
areaoftoplayerPCBmetalshouldbeconnectedtothefour
corner pins (Pins 1, 14, 15 and 28). These pins are fused
to the leadframe where the LT6301 die are attached. The
packagealsohasanexposedmetalheatsinkingpadonthe
bottom side which, when soldered to the PCB top layer
metal, directly conducts heat away from the IC junction.
Solderingthethermalpadtotheboardproducesathermal
resistance from junction to case, θJC, of approximately
3°C/W.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole that can cause
frequency peaking. In general, use feedback resistors of
1k or less.
Compensation
The LT6301 is stable in a gain 10 or higher for any supply
andresistiveload.Itiseasilycompensatedforlowergains
with a single resistor or a resistor plus a capacitor.
Important Note: The metal planes used for heat sinking
the LT6301 are electrically connected to the negative
supply potential of the driver, typically –12V. These
planes must be isolated from any other power planes
used in the board design.
Figure 8showsthatforinvertinggains,aresistorfromthe
inverting node to AC ground guarantees stability if the
parallel combination of RC and RG is less than or equal to
RF/9. For lowest distortion and DC output offset, a series
capacitor, CC, can be used to reduce the noise gain at
lower frequencies. The break frequency produced by RC
and CC should be less than 5MHz to minimize peaking.
Fortunately xDSL circuit boards use multiple layers of
metal for interconnection of components. Areas of metal
beneath the LT6301 connected together through several
small 13 mil vias can be effective in conducting heat away
from the driver package. The use of inner layer metal can
free up top and bottom layer PCB area for external compo-
nent placement.
Figure9showscompensationinthenoninvertingconfigu-
ration. The RC, CC network acts similarly to the inverting
case. The input impedance is not reduced because the
network is bootstrapped. This network can also be placed
between the inverting input and an AC ground.
When PCB cards containing multiple ports are inserted
into a rack in an enclosed cabinet, it is often necessary to
provide airflow through the cabinet and over the cards.
This is also very effective in reducing the junction-to-
ambient thermal resistance of each line driver. To a limit,
this thermal resistance can be reduced approximately
5°C/W for every 100lfpm of laminar airflow.
R
F
V
V
–R
F
O
R
=
G
–
+
R
I
G
V
I
(R || R ) ≤ R /9
R
V
C
G
F
C
O
C
C
1
< 5MHz
(OPTIONAL)
2πR C
C
C
6301 F08
Figure 8. Compensation for Inverting Gains
sn6301 6301f
11
LT6301
W U U
U
APPLICATIO S I FOR ATIO
R
R
V
O
F
In differential driver applications, as shown on the first
page of this data sheet, it is recommended that the gain
setting resistor be comprised of two equal value resistors
connected to a good AC ground at high frequencies. This
ensures that the feedback factor of each amplifier remains
less than 0.1 at any frequency. The midpoint of the
resistors can be directly connected to ground, with the
resulting DC gain to the VOS of the amplifiers, or just
bypassed to ground with a 1000pF or larger capacitor.
= 1 +
+
V
I
V
G
I
R
C
V
(R || R ) ≤ R /9
C
O
C
G
F
–
C
1
(OPTIONAL)
< 5MHz
2πR C
C
C
R
F
R
G
6301 F09
Figure 9. Compensation for Noninverting Gains
Line Driving Back-Termination
Anothercompensationschemefornoninvertingcircuitsis
shown in Figure 10. The circuit is unity gain at low fre-
quency and a gain of 1 + RF/RG at high frequency. The DC
output offset is reduced by a factor of ten. The techniques
of Figures 9 and 10 can be combined as shown in Fig-
ure 11. The gain is unity at low frequencies, 1 + RF/RG at
mid-band and for stability, a gain of 10 or greater at high
frequencies.
The standard method of cable or line back-termination is
shown in Figure 12. The cable/line is terminated in its
characteristic impedance (50Ω, 75Ω, 100Ω, 135Ω, etc.).
Aback-terminationresistoralsoequaltothechararacteristic
impedance should be used for maximum pulse fidelity of
outgoing signals, and to terminate the line for incoming
signals in a full-duplex application. There are three main
drawbacks to this approach. First, the power dissipated in
the load and back-termination resistors is equal so half of
the power delivered by the amplifier is wasted in the
termination resistor. Second, the signal is halved so the
gain of the amplifer must be doubled to have the same
overall gain to the load. The increase in gain increases
noise and decreases bandwidth (which can also increase
distortion). Third, the output swing of the amplifier is
doubled which can limit the power it can deliver to the load
for a given power supply voltage.
V
V
O
+
–
= 1 (LOW FREQUENCIES)
I
V
i
R
F
= 1 +
(HIGH FREQUENCIES)
V
O
R
G
R
G
≤ R /9
F
R
F
1
< 5MHz
2πR C
G
C
R
C
G
C
6301 F10
An alternate method of back-termination is shown in
Figure 13. Positive feedback increases the effective back-
termination resistance so RBT can be reduced by a factor
Figure 10. Alternate Noninverting Compensation
+
CABLE OR LINE WITH
V
I
CHARACTERISTIC IMPEDANCE R
L
+
–
R
V
O
C
V
I
R
BT
–
V
O
C
C
V
O
R
F
= 1 AT LOW FREQUENCIES
R
L
V
I
R
R
F
F
= 1 +
= 1 +
AT MEDIUM FREQUENCIES
6301 F12
R
R
= R
1
2
G
BT
O
L
R
G
V
V
R
G
C
=
(1 + R /R )
BIG
R
F
F
G
AT HIGH FREQUENCIES
I
(R || R )
C
G
6301 F11
Figure 11. Combination Compensation
Figure 12. Standard Cable/Line Back Termination
sn6301 6301f
12
LT6301
W U U
APPLICATIO S I FOR ATIO
U
R
P2
V
+
–
I
V
R
BT
A
R
P1
+
–
V
O
V
I
V
R
V
O
A
BT
V
P
R
L
n
FOR R
n =
=
BT
R
R
F
F
R
L
1
R
F
R
F
1 –
R
R
R
G
G
L
6301 F13
R
P
R
R
P
P
R
R
R
R
F
F
G
R
L
n
1 +
+
FOR R
1 +
=
R
BT
V
O
G
R
P
L
=
V
I
R
R
F
2 1 –
1
n
R
R
P1
F
(
)
= 1 –
P
R
R
+ R
(
G)(
)
P1 P2
–
+
R
BT
–V
O
R
/(R + R
)
P1
P2 P2
6301 F14
–V
A
V
O
V
R
P1
1 + 1/n
–V
I
=
–
R
+ R
I
P2
P1
R
R
F
1 +
(
)
G
Figure 13. Back Termination Using Postive Feedback
Figure 14. Back Termination Using Differential Postive Feedback
and assuming RP >> RL, we require
VA = VO (1 – 1/n)
solving
ofn. Toanalyzethiscircuit, firstgroundtheinput. AsRBT
RL/n, and assuming RP2>>RL we require that:
=
VA = VO (1 – 1/n) to increase the effective value of
RBT by n.
RF/RP = 1 – 1/n
VP = VO (1 – 1/n)/(1 + RF/RG)
VO = VP (1 + RP2/RP1)
So to reduce the back-termination by a factor of 3 choose
RF/RP = 2/3. Note that the overall gain is increased to:
Eliminating VP, we get the following:
(1 + RP2/RP1) = (1 + RF/RG)/(1 – 1/n)
VO/VI = (1 + RF/RG + RF/RP)/[2(1 – RF/RP)]
Using positive feedback is often referred to as active
termination.
For example, reducing RBT by a factor of n = 4, and with an
amplifer gain of (1 + RF/RG) = 10 requires that RP2/RP1
= 12.3.
Figure 16 shows a full-rate ADSL line driver incorporating
positive feedback to reduce the power lost in the back
terminationresistorsby40%yetstillmaintainstheproper
impedance match to the100Ω characteristic line imped-
ance. This circuit also reduces the transformer turns ratio
over the standard line driving approach resulting in lower
peak current requirements. With lower current and less
power loss in the back termination resistors, this driver
dissipates only 1W of power, a 30% reduction.
Note that the overall gain is increased:
RP2 / RP2 +RP1
VO
V
I
(
)
=
1+ 1/n / 1+R /R − R / RP2 +RP1
) (
)
(
[
)
]
(
[
]
F
G
P1
A simpler method of using positive feedback to reduce the
back-termination is shown in Figure 14. In this case, the
drivers are driven differentially and provide complemen-
tary outputs. Grounding the inputs, we see there is invert-
ing gain of –RF/RP from –VO to VA
Whilethepowersavingsofpositivefeedbackareattractive
there is one important system consideration to be ad-
dressed, received signal sensitivity. The signal received
VA = VO (RF/RP)
sn6301 6301f
13
LT6301
W U U
U
APPLICATIO S I FOR ATIO
from the line is sensed across the back termination resis-
tors. With positive feedback, signals are present on both
ends of the RBT resistors, reducing the sensed amplitude.
Extra gain may be required in the receive channel to
compensate,oracompletelyseparatereceivepathmaybe
implementedthroughaseparatelinecouplingtransformer.
Using DC blocking capacitors, as shown in Figure 15, to
AC couple the signal to the transformer eliminates the
possibility for DC current to flow under any conditions.
These capacitors should be sized large enough to not
impairthefrequencyresponsecharacteristicsrequiredfor
the data transmission.
Another important fault related concern has to do with
very fast high voltage transients appearing on the tele-
phone line (lightning strikes for example). TransZorbs®,
varistors and other transient protection devices are often
used to absorb the transient energy, but in doing so also
create fast voltage transitions themselves that can be
coupled through the transformer to the outputs of the line
driver. Several hundred volt transient signals can appear
at the primary windings of the transformer with current
intothedriveroutputslimitedonlybythebacktermination
resistors. While the LT6301 has clamps to the supply rails
at the output pins, they may not be large enough to handle
thesignificanttransientenergy. Externalclampingdiodes,
such as BAV99s, at each end of the transformer primary
help to shunt this destructive transient energy away from
the amplifier outputs.
Considerations for Fault Protection
The basic line driver design, shown on the front page of
this data sheet, presents a direct DC path between the
outputs of the two amplifiers. An imbalance in the DC
biasing potentials at the noninverting inputs through
eitherafaultconditionorduringturn-onofthesystemcan
create a DC voltage differential between the two amplifier
outputs. This condition can force a considerable amount
of current to flow as it is limited only by the small valued
back-termination resistors and the DC resistance of the
transformerprimary.Thishighcurrentcanpossiblycause
the power supply voltage source to drop significantly
impacting overall system performance. If left unchecked,
the high DC current can heat the LT6301 to thermal
shutdown.
TransZorb is a registered trademark of General Instruments, GSI
12V
12V –12V
24.9k
SHDN
0.1µF
BAV99
+IN
+
12.7Ω
1/4
LT6301
–
1k
1:2
110Ω
110Ω
LINE
LOAD
1000pF
1k
0.1µF
–
12.7Ω
1/4
LT6301
SHDNREF
BAV99
–IN
+
–12V
12V –12V
6301 F15
Figure 15. Protecting the Driver Against Load Faults and Line Transients
sn6301 6301f
14
LT6301
W
W
SI PLIFIED SCHE ATIC
(one amplifier shown)
+
V
Q9
Q10
Q13
Q17
Q3
Q4
Q7
Q8
C1
Q14
R1
Q1
Q5
+IN
C2
OUT
Q6
Q2
–IN
Q15
Q18
Q16
Q12
Q11
–
V
6301 SS
U
PACKAGE DESCRIPTIO
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation EA
9.60 – 9.80*
(.378 – .386)
7.56
(.298)
7.56
(.298)
28 2726 25 24 23 22 21 20 19 18 1716 15
6.60 ±0.10
3.05
(.120)
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
4.50 ±0.10
SEE NOTE 4
6.40
BSC
3.05
(.120)
0.45 ±0.05
1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
5
7
1
2
3
4
6
8
9 10 12 13 14
11
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0° – 8°
0.65
(.0256)
BSC
0.45 – 0.75
(.018 – .030)
0.09 – 0.20
(.0036 – .0079)
0.05 – 0.15
(.002 – .006)
FE28 (EA) TSSOP 0203
0.195 – 0.30
(.0077 – .0118)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
sn6301 6301f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will notinfringe onexisting patent rights.
15
LT6301
U
TYPICAL APPLICATIO
12V
24.9k
SHDN
+IN
+
13.7Ω
1/4
LT6301
–
1k
1:1.2*
1.65k
1.65k
182Ω
100Ω
LINE
1000pF
182Ω
1k
*COILCRAFT X8502-A OR EQUIVALENT
1W DRIVER POWER DISSIPATION
1.15W POWER CONSUMPTION
–
13.7Ω
SHDNREF
1/4
LT6301
–IN
+
6301 F16
–12V
Figure 16. ADSL Line Driver Using Active Termination
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
±15V Operation, 1mV V , 1µA I
LT1361
Dual 50MHz, 800V/µs Op Amp
OS
B
LT1739
Dual 500mA, 200MHz xDSL Line Driver
Dual 500mA, 200MHz xDSL Line Driver
Dual 500mA, 50MHz Current Feedback Amplifier
Dual 100MHz, 750V/µs, 8nV/√Hz Op Amp
Dual 200mA, 700MHz Op Amp
Low Cost ADSL CO Driver, Low Power
LT1794
ADSL CO Driver, Extended Output Swing, Low Power
Shutdown/Current Set Function, ADSL CO Driver
Low Noise, Low Power Differential Receiver, 4mA/Amplifier
12V Operation, 7mA/Amplifier, ADSL CPE Modem Line Driver
12V Operation, MSOP Package, ADSL CPE Modem Line Driver
ADSL CO Driver in SSOP Package
LT1795
LT1813
LT1886
LT1969
Dual 200mA, 700MHz Op Amp with Power Control
Dual 500mA, 200MHz, xDSL Line Driver
LT6300
sn6301 6301f
LT/TP 0303 2K • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 2001
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LT6350CDD#PBF
LT6350 - Low Noise Single-Ended to Differential Converter/ADC Driver; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT6350CDD#TRPBF
LT6350 - Low Noise Single-Ended to Differential Converter/ADC Driver; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT6350CMS8#PBF
LT6350 - Low Noise Single-Ended to Differential Converter/ADC Driver; Package: MSOP; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT6350CMS8#TRPBF
LT6350 - Low Noise Single-Ended to Differential Converter/ADC Driver; Package: MSOP; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT6350HDD#PBF
LT6350 - Low Noise Single-Ended to Differential Converter/ADC Driver; Package: DFN; Pins: 8; Temperature Range: -40°C to 125°C
Linear
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