LT6230CS6-10#TRM [Linear]

LT6230 - 215MHz, Rail-to-Rail Output, 1.1nV/rtHz, 3.5mA Op Amp Family; Package: SOT; Pins: 6; Temperature Range: 0°C to 70°C;
LT6230CS6-10#TRM
型号: LT6230CS6-10#TRM
厂家: Linear    Linear
描述:

LT6230 - 215MHz, Rail-to-Rail Output, 1.1nV/rtHz, 3.5mA Op Amp Family; Package: SOT; Pins: 6; Temperature Range: 0°C to 70°C

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LT6230/LT6230-10/  
LT6231/LT6232  
215MHz, Rail-to-Rail Output,  
1.1nV/Hz, 3.5mA Op Amp Family  
U
DESCRIPTIO  
FEATURES  
The LT®6230/LT6231/LT6232 are single/dual/quad low  
noise, rail-to-rail output unity gain stable op amps that  
feature 1.1nV/Hz noise voltage and draw only 3.5mA of  
supply current per amplifier. These amplifiers combine  
very low noise and supply current with a 215MHz gain  
bandwidth product, a 70V/µs slew rate and are optimized  
for low supply voltage signal conditioning systems. The  
LT6230-10 is a single amplifier optimized for higher gain  
applications resulting in higher gain bandwidth and slew  
rate. The LT6230 and LT6230-10 include an enable pin  
that can be used to reduce the supply current to less than  
10µA.  
Low Noise Voltage: 1.1nV/Hz  
Low Supply Current: 3.5mA/Amp Max  
Low Offset Voltage: 350µV Max  
Gain Bandwidth Product:  
LT6230: 215MHz; AV 1  
LT6230-10: 1450MHz; AV 10  
Wide Supply Range: 3V to 12.6V  
Output Swings Rail-to-Rail  
Common Mode Rejection Ratio 115dB Typ  
Output Current: 30mA  
Operating Temperature Range 40°C to 85°C  
LT6230 Shutdown to 10µA Maximum  
LT6230/LT6230-10 in SOT-23 Package  
The amplifier family has an output that swings within  
50mV of either supply rail to maximize the signal dynamic  
range in low supply applications and is specified on 3.3V,  
5V and ±5V supplies. The en ISUPPLY product of 1.9 per  
amplifier is among the most noise efficient of any op amp.  
Dual LT6231 in 8-Pin SO and Tiny DFN Packages  
LT6232 in 16-Pin SSOP Package  
U
APPLICATIO S  
The LT6230/LT6230-10 is available in the 6-lead SOT-23  
package and the LT6231 dual is available in the 8-pin SO  
package with standard pinouts. For compact layouts, the  
dual is also available in a tiny dual fine pitch leadless  
package (DFN). The LT6232 is available in the 16-pin  
SSOP package.  
Ultrasound Amplifiers  
Low Noise, Low Power Signal Processing  
Active Filters  
Driving A/D Converters  
Rail-to-Rail Buffer Amplifiers  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
U
TYPICAL APPLICATIO  
Noise Voltage and Unbalanced  
Noise Current vs Frequency  
Low Noise Low Power Instrumentation Amplifier  
+
V
S
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
T
CM  
= ±2.5V  
= 25°C  
= 0V  
+
R4  
R6  
S
A
+
IN  
499Ω  
499Ω  
V
1/2 LT6231  
+
V
S
R2  
196Ω  
+
R1  
10Ω  
LT6202  
V
OUT  
NOISE CURRENT  
NOISE VOLTAGE  
R3  
196Ω  
R5  
499Ω  
R7  
499Ω  
V
S
1/2 LT6231  
IN  
A
= 40  
I
E
= 10mA  
= 5.8µV  
+
V
S
BW = 5.1MHz  
= ±1.5V to ±5V  
INPUT REFERRED,  
N
RMS  
10  
100  
1k  
10k  
100k  
V
S
V
S
MEASUREMENT BW = 8MHz  
FREQUENCY (Hz)  
623012 TA01a  
623012 TA01b  
sn623012 623012fas  
1
LT6230/LT6230-10/  
LT6231/LT6232  
W W U W  
ABSOLUTE AXI U RATI GS (Note 1)  
Total Supply Voltage (V+ to V) ............................ 12.6V Junction Temperature........................................... 150°C  
Input Current (Note 2) ........................................ ±40mA Junction Temperature (DD Package) ................... 125°C  
Output Short-Circuit Duration (Note 3)............ Indefinite Storage Temperature Range ..................–65°C to 150°C  
Operating Temperature Range (Note 4) ...–40°C to 85°C Storage Temperature Range  
Specified Temperature Range (Note 5)....–40°C to 85°C (DD Package) ...................................... 65°C to 125°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
U
W
U
PACKAGE/ORDER I FOR ATIO  
ORDER PART  
NUMBER  
ORDER PART  
NUMBER  
TOP VIEW  
LT6230CS6  
LT6231CDD  
LT6231IDD  
TOP VIEW  
+
OUT A  
–IN A  
+IN A  
1
2
3
4
8
7
6
5
V
LT6230IS6  
+
OUT 1  
6 V  
OUT B  
–IN B  
+IN B  
+
LT6230CS6-10  
LT6230IS6-10  
5 ENABLE  
4 –IN  
V
2
+
+IN 3  
V
S6 PACKAGE  
S6 PART  
DD PART  
6-LEAD PLASTIC TSOT-23  
DD PACKAGE  
MARKING*  
MARKING*  
8-LEAD (3mm × 3mm) PLASTIC DFN  
T
JMAX = 150°C, θJA = 250°C/W  
TJMAX = 125°C, θJA = 160°C/W  
UNDERSIDE METAL CONNECTED TO V–  
(PCB CONNECTION OPTIONAL)  
LAEU  
LTAFJ  
LTAFK  
TOP VIEW  
ORDER PART  
NUMBER  
ORDER PART  
NUMBER  
OUT A  
–IN A  
+IN A  
1
2
3
4
5
6
7
8
16 OUT D  
15 –IN D  
TOP VIEW  
+
+A  
LT6232CGN  
LT6232IGN  
LT6231CS8  
LT6231IS8  
D
C
+
OUT A  
1
2
3
4
8
7
6
5
V
14  
13  
12  
11  
10  
9
+IN D  
+
V
V
–IN A  
+IN A  
OUT B  
–IN B  
+IN B  
+
+
+
+IN B  
–IN B  
OUT B  
NC  
+IN C  
–IN C  
OUT C  
NC  
+
B  
V
GN PART  
MARKING  
S8 PART  
MARKING  
S8 PACKAGE  
8-LEAD PLASTIC SO  
TJMAX = 150°C, θJA = 200°C/W  
6232  
6232I  
6231  
6231I  
GN PACKAGE  
16-LEAD NARROW PLASTIC SSOP  
TJMAX = 150°C, θJA = 135°C/W  
*The temperature grade is identified by a label on the shipping container.Consult LTC Marketing for parts specified with wider operating temperature ranges.  
sn623012 623012fas  
2
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
TA = 25°C, VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply,  
ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
LT6230S6, LT6230S6-10  
LT6231S8, LT6232GN  
LT6231DD  
100  
50  
75  
500  
350  
450  
µV  
µV  
µV  
OS  
Input Offset Voltage Match  
100  
600  
µV  
(Channel-to-Channel) (Note 6)  
I
I
Input Bias Current  
5
10  
0.9  
0.6  
µA  
µA  
µA  
B
I Match (Channel-to-Channel) (Note 6)  
B
0.1  
0.1  
180  
1.1  
Input Offset Current  
OS  
Input Noise Voltage  
0.1Hz to 10Hz  
nV  
P-P  
e
Input Noise Voltage Density  
Input Noise Current Density, Balanced Source  
f = 10kHz, V = 5V  
1.7  
nV/Hz  
n
S
i
f = 10kHz, V = 5V, R = 10k  
1
2.4  
pA/Hz  
pA/Hz  
n
S
S
Unbalanced Source f = 10kHz, V = 5V, R = 10k  
S
S
Input Resistance  
Input Capacitance  
Large-Signal Gain  
Common Mode  
Differential Mode  
6.5  
7.5  
MΩ  
kΩ  
C
A
Common Mode  
Differential Mode  
2.9  
7.7  
pF  
pF  
IN  
V = 5V, V = 0.5V to 4.5V, R = 10k to V /2  
105  
21  
5.4  
200  
40  
9
V/mV  
V/mV  
V/mV  
VOL  
S
O
L
S
R = 1k to V /2  
L
S
V = 1V to 4V,  
O
R = 100to V /2  
L
S
V = 3.3V, V = 0.65V to 2.65V, R = 10k to V /2  
90  
16.5  
175  
32  
V/mV  
V/mV  
S
O
L
S
R = 1k to V /2  
L
S
V
Input Voltage Range  
Guaranteed by CMRR, V = 5V, 0V  
1.5  
1.15  
4
2.65  
V
V
CM  
S
V = 3.3V, 0V  
S
CMRR  
PSRR  
Common Mode Rejection Ratio  
V = 5V, V = 1.5V to 4V  
90  
90  
115  
115  
dB  
dB  
S
CM  
V = 3.3V, V = 1.15V to 2.65V  
S
CM  
CMRR Match (Channel-to-Channel) (Note 6)  
Power Supply Rejection Ratio  
V = 5V, V = 1.5V to 4V  
84  
90  
84  
3
120  
115  
115  
dB  
dB  
dB  
V
S
CM  
V = 3V to 10V  
S
PSRR Match (Channel-to-Channel) (Note 6)  
Minimum Supply Voltage (Note 7)  
V = 3V to 10V  
S
V
V
Output Voltage Swing LOW (Note 8)  
No Load  
4
85  
240  
185  
40  
mV  
mV  
mV  
mV  
OL  
OH  
I
= 5mA  
190  
460  
350  
SINK  
V = 5V, I  
= 20mA  
= 15mA  
SINK  
S
SINK  
V = 3.3V, I  
S
Output Voltage Swing HIGH (Note 8)  
Short-Circuit Current  
No Load  
5
90  
325  
250  
50  
mV  
mV  
mV  
mV  
I
= 5mA  
200  
600  
400  
SOURCE  
V = 5V, I  
= 20mA  
S
SOURCE  
V = 3.3V, I  
S
= 15mA  
SOURCE  
I
I
V = 5V  
±30  
±25  
±45  
±40  
mA  
mA  
SC  
S
V = 3.3V  
S
Supply Current per Amplifier  
Disabled Supply Current per Amplifier  
3.15  
0.2  
3.5  
10  
mA  
µA  
S
+
ENABLE = V – 0.35V  
sn623012 623012fas  
3
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
TA = 25°C, VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply,  
ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
–75  
0.3  
UNITS  
µA  
V
I
ENABLE Pin Current  
ENABLE Pin Input Voltage LOW  
ENABLE Pin Input Voltage HIGH  
Output Leakage Current  
Turn-On Time  
ENABLE = 0.3V  
–25  
ENABLE  
V
V
L
+
V – 0.35V  
V
H
+
ENABLE = V – 0.35V, V = 1.5V to 3.5V  
0.2  
300  
41  
10  
µA  
ns  
O
t
t
ENABLE = 5V to 0V, R = 1k, V = 5V  
L S  
ON  
Turn-Off Time  
ENABLE = 0V to 5V, R = 1k, V = 5V  
µs  
OFF  
L
S
GBW  
Gain Bandwidth Product  
Frequency = 1MHz, V = 5V  
LT6230-10  
200  
1300  
MHz  
MHz  
S
SR  
Slew Rate  
V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V  
42  
60  
V/µs  
V/µs  
S
V
L
O
LT6230-10, V = 5V, A = –10, R = 1k,  
250  
S
V
L
V = 1.5V to 3.5V  
O
FPBW  
Full Power Bandwidth  
V = 5V, V  
= 3V (Note 9)  
4.8  
6.3  
11  
55  
MHz  
MHz  
ns  
S
OUT  
P-P  
LT6230-10, HD = HD = 1%  
2
3
t
Settling Time (LT6230, LT6231, LT6232)  
0.1%, V = 5V, V  
= 2V, A = –1, R = 1k  
STEP V L  
S
S
The denotes the specifications which apply over 0°C < TA < 70°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half  
supply, ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
LT6230S6, LT6230S6-10  
LT6231S8, LT6232GN  
LT6231DD  
600  
450  
550  
µV  
µV  
µV  
OS  
Input Offset Voltage Match  
800  
µV  
(Channel-to-Channel) (Note 6)  
V
TC  
Input Offset Voltage Drift (Note 10)  
Input Bias Current  
V
= Half Supply  
0.5  
3
11  
1
µV/°C  
µA  
OS  
CM  
I
I
B
I Match (Channel-to-Channel) (Note 6)  
B
µA  
Input Offset Current  
Large-Signal Gain  
0.7  
µA  
OS  
A
V = 5V, V = 0.5V to 4.5V, R = 10k to V /2  
78  
17  
4.1  
V/mV  
V/mV  
V/mV  
VOL  
S
O
L
S
R = 1k to V /2  
L
S
V = 1V to 4V,  
O
R = 100to V /2  
L
S
V = 3.3V, V = 0.65V to 2.65V, R = 10k to V /2  
66  
13  
V/mV  
V/mV  
S
O
L
S
R = 1k to V /2  
L
S
V
Input Voltage Range  
Guaranteed by CMRR, V = 5V, 0V  
1.5  
1.15  
4
2.65  
V
V
CM  
S
V = 3.3V, 0V  
S
CMRR  
PSRR  
Common Mode Rejection Ratio  
V = 5V, V = 1.5V to 4V  
90  
85  
dB  
dB  
S
CM  
V = 3.3V, V = 1.15V to 2.65V  
S
CM  
CMRR Match (Channel-to-Channel) (Note 6) V = 5V, V = 1.5V to 4V  
84  
85  
79  
3
dB  
dB  
dB  
V
S
CM  
Power Supply Rejection Ratio  
V = 3V to 10V  
S
PSRR Match (Channel-to-Channel) (Note 6) V = 3V to 10V  
S
Minimum Supply Voltage (Note 7)  
V
Output Voltage Swing LOW (Note 8)  
No Load  
= 5mA  
50  
mV  
mV  
mV  
mV  
OL  
I
200  
500  
380  
SINK  
V = 5V, I  
= 20mA  
S
SINK  
= 15mA  
SINK  
V = 3.3V, I  
S
sn623012 623012fas  
4
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over 0°C < TA < 70°C  
temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Output Voltage Swing HIGH (Note 8)  
No Load  
60  
mV  
mV  
mV  
mV  
OH  
I
= 5mA  
215  
650  
430  
SOURCE  
V = 5V, I  
= 20mA  
S
SOURCE  
V = 3.3V, I  
S
= 15mA  
SOURCE  
I
I
I
Short-Circuit Current  
V = 5V  
V = 3.3V  
S
±25  
±20  
mA  
mA  
SC  
S
Supply Current per Amplifier  
Disabled Supply Current per Amplifier  
4.2  
mA  
µA  
S
+
ENABLE = V – 0.25V  
ENABLE = 0.3V  
1
ENABLE Pin Current  
ENABLE Pin Input Voltage LOW  
ENABLE Pin Input Voltage HIGH  
Output Leakage Current  
Turn-On Time  
–85  
0.3  
µA  
V
ENABLE  
V
V
L
+
V – 0.25V  
V
H
+
ENABLE = V – 0.25V, V = 1.5V to 3.5V  
1
µA  
O
t
t
ENABLE = 5V to 0V, R = 1k, V = 5V  
300  
65  
ns  
ON  
L
S
Turn-Off Time  
ENABLE = 0V to 5V, R = 1k, V = 5V  
µs  
OFF  
L
S
SR  
Slew Rate  
V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V  
S
35  
V/µs  
V/µs  
V
L
O
LT6230-10, A = –10, R = 1k,  
225  
V
L
V = 1.5V to 3.5V  
O
FPBW  
Full Power Bandwidth (Note 9)  
V = 5V, V  
LT6230, LT6231, LT6232  
= 3V  
P-P  
3.7  
MHz  
S
OUT  
The denotes the specifications which apply over 40°C < TA < 85°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half  
supply, ENABLE = 0V, unless otherwise noted. (Note 5)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
LT6230S6, LT6230S6-10  
LT6231S8, LT6232GN  
LT6231DD  
700  
550  
650  
µV  
µV  
µV  
OS  
Input Offset Voltage Match  
1000  
µV  
(Channel-to-Channel) (Note 6)  
V
TC  
Input Offset Voltage Drift (Note 10)  
Input Bias Current  
V
= Half Supply  
0.5  
3
µV/°C  
µA  
OS  
CM  
I
I
12  
1.1  
0.8  
B
I Match (Channel-to-Channel) (Note 6)  
B
µA  
Input Offset Current  
Large-Signal Gain  
µA  
OS  
A
V = 5V, V = 0.5V to 4.5V, R = 10k to V /2  
72  
16  
3.6  
V/mV  
V/mV  
V/mV  
VOL  
S
O
L
S
R = 1k to V /2  
L
S
V = 1V to 4V,  
O
R = 100to V /2  
L
S
V = 3.3V, V = 0.65V to 2.65V,R = 10k to V /2  
60  
12  
V/mV  
V/mV  
S
O
L
S
R = 1k to V /2  
L
S
V
Input Voltage Range  
Guaranteed by CMRR, V = 5V, 0V  
1.5  
1.15  
4
2.65  
V
V
CM  
S
V = 3.3V, 0V  
S
CMRR  
PSRR  
Common Mode Rejection Ratio  
V = 5V, V = 1.5V to 4V  
90  
85  
dB  
dB  
S
CM  
V = 3.3V, V = 1.15V to 2.65V  
S
CM  
CMRR Match (Channel-to-Channel) (Note 6)  
Power Supply Rejection Ratio  
V = 5V, V = 1.5V to 4V  
84  
85  
dB  
dB  
S
CM  
V = 3V to 10V  
S
sn623012 623012fas  
5
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over 40°C < TA < 85°C  
temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, ENABLE = 0V, unless otherwise noted. (Note 5)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
79  
3
TYP  
MAX  
UNITS  
dB  
PSRR Match (Channel-to-Channel) (Note 6)  
Minimum Supply Voltage (Note 7)  
Output Voltage Swing LOW (Note 8)  
V = 3V to 10V  
S
V
V
V
No Load  
60  
mV  
mV  
mV  
mV  
OL  
OH  
I
= 5mA  
210  
510  
390  
SINK  
V = 5V, I  
= 15mA  
= 15mA  
S
SINK  
V = 3.3V, I  
S
SINK  
Output Voltage Swing HIGH (Note 6)  
Short-Circuit Current  
No Load  
70  
mV  
mV  
mV  
mV  
I
= 5mA  
220  
675  
440  
SOURCE  
V = 5V, I  
= 20mA  
= 15mA  
S
SOURCE  
V = 3.3V, I  
S
SOURCE  
I
I
I
V = 5V  
±15  
±15  
mA  
mA  
SC  
S
V = 3.3V  
S
Supply Current per Amplifier  
Disabled Supply Current per Amplifier  
4.4  
mA  
µA  
S
+
ENABLE = V – 0.2V  
ENABLE = 0.3V  
1
ENABLE Pin Current  
ENABLE Pin Input Voltage LOW  
ENABLE Pin Input Voltage HIGH  
Output Leakage Current  
Turn-On Time  
–100  
0.3  
µA  
V
ENABLE  
V
V
L
+
V – 0.2V  
V
H
+
ENABLE = V – 0.2V, V = 1.5V to 3.5V  
1
µA  
O
t
t
ENABLE = 5V to 0V, R = 1k, V = 5V  
300  
72  
ns  
ON  
L
S
Turn-Off Time  
ENABLE = 0V to 5V, R = 1k, V = 5V  
µs  
OFF  
L
S
SR  
Slew Rate  
V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V  
31  
V/µs  
V/µs  
S
V
L
O
LT6230-10, A = –10, R = 1k,  
185  
V
L
V = 1.5V to 3.5V  
O
FPBW  
Full Power Bandwidth (Note 9)  
V = 5V, V  
LT6230, LT6231, LT6232  
= 3V  
P-P  
3.3  
MHz  
S
OUT  
TA = 25°C, VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
LT6230, LT6230-10  
LT6231S8, LT6232GN  
LT6231DD  
100  
50  
75  
500  
350  
450  
µV  
µV  
µV  
OS  
Input Offset Voltage Match  
100  
600  
µV  
(Channel-to-Channel) (Note 6)  
I
I
Input Bias Current  
5
10  
0.9  
0.6  
µA  
µA  
µA  
B
I Match (Channel-to-Channel) (Note 6)  
B
0.1  
0.1  
180  
1.1  
Input Offset Current  
OS  
Input Noise Voltage  
0.1Hz to 10Hz  
f = 10kHz  
nV  
P-P  
e
Input Noise Voltage Density  
1.7  
nV/Hz  
n
i
Input Noise Current Density, Balanced Source  
Unbalanced Source  
f = 10kHz, R = 10k  
1
2.4  
pA/Hz  
pA/Hz  
n
S
f = 10kHz, R = 10k  
S
sn623012 623012fas  
6
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
TA = 25°C, VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Input Resistance  
Common Mode  
Differential Mode  
6.5  
7.5  
MΩ  
kΩ  
C
A
Input Capacitance  
Large-Signal Gain  
Common Mode  
Differential Mode  
2.4  
6.5  
pF  
pF  
IN  
V = ±4.5V, R = 10k  
140  
35  
8.5  
260  
65  
16  
V/mV  
V/mV  
V/mV  
VOL  
O
L
R = 1k  
L
V = ±2V, R = 100Ω  
O
L
V
Input Voltage Range  
Guaranteed by CMRR  
–3  
95  
89  
90  
84  
4
V
dB  
dB  
dB  
dB  
CM  
CMRR  
Common Mode Rejection Ratio  
CMRR Match (Channel-to-Channel) (Note 6)  
Power Supply Rejection Ratio  
V
V
= –3V to 4V  
= –3V to 4V  
120  
125  
115  
115  
CM  
CM  
PSRR  
V = ±1.5V to ±5V  
S
PSRR Match (Channel-to-Channel) (Note 6)  
Output Voltage Swing LOW (Note 8)  
V = ±1.5V to ±5V  
S
V
V
No Load  
4
85  
240  
40  
190  
460  
mV  
mV  
mV  
OL  
OH  
I
I
= 5mA  
= 20mA  
SINK  
SINK  
Output Voltage Swing HIGH (Note 8)  
No Load  
5
90  
325  
50  
200  
600  
mV  
mV  
mV  
I
I
= 5mA  
= 20mA  
SOURCE  
SOURCE  
I
I
Short-Circuit Current  
±30  
mA  
SC  
Supply Current per Amplifier  
Disabled Supply Current per Amplifier  
3.3  
0.2  
3.9  
mA  
µA  
S
ENABLE = 4.65V  
ENABLE = 0.3V  
I
ENABLE Pin Current  
–35  
–85  
0.3  
µA  
V
ENABLE  
V
V
ENABLE Pin Input Voltage LOW  
ENABLE Pin Input Voltage HIGH  
Output Leakage Current  
Turn-On Time  
L
4.65  
V
H
+
ENABLE = V – 4.65V, V = ±1V  
0.2  
300  
62  
10  
µA  
ns  
µs  
O
t
t
ENABLE = 5V to 0V, R = 1k  
L
ON  
Turn-Off Time  
ENABLE = 0V to 5V, R = 1k  
OFF  
L
GBW  
Gain Bandwidth Product  
Frequency = 1MHz  
LT6230-10  
150  
1000  
215  
1450  
MHz  
MHz  
SR  
Slew Rate  
A = –1, R = 1k, V = –2V to 2V  
50  
70  
320  
7.4  
11  
V/µs  
V/µs  
MHz  
MHz  
ns  
V
L
O
LT6230-10, A = –10, R = 1k, V = –2V to 2V  
V
L
O
FPBW  
Full Power Bandwidth  
V
= 3V (Note 9)  
5.3  
OUT  
P-P  
LT6230-10, HD2 = HD3 1%  
0.1%, V = 2V, A = –1, R = 1k  
t
Settling Time (LT6230, LT6231, LT6232)  
50  
S
STEP  
V
L
sn623012 623012fas  
7
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over 0°C < TA < 70°C  
temperature range. VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
LT6230S6, LT6230S6-10  
LT6231S8, LT6232GN  
LT6231DD  
600  
450  
550  
µV  
µV  
µV  
OS  
Input Offset Voltage Match  
800  
µV  
(Channel-to-Channel) (Note 6)  
V
TC  
Input Offset Voltage Drift (Note 10)  
Input Bias Current  
0.5  
3
11  
1
µV/°C  
µA  
OS  
I
I
B
I Match (Channel-to-Channel) (Note 6)  
B
µA  
Input Offset Current  
Large-Signal Gain  
0.7  
µA  
OS  
A
V = ±4.5V, R = 10k  
100  
27  
6
V/mV  
V/mV  
V/mV  
VOL  
O
L
R = 1k  
L
V = ±2V, R = 100Ω  
O
L
V
Input Voltage Range  
Guaranteed by CMRR  
–3  
95  
89  
85  
79  
4
V
dB  
dB  
dB  
dB  
CM  
CMRR  
Common Mode Rejection Ratio  
CMRR Match (Channel-to-Channel) (Note 6)  
Power Supply Rejection Ratio  
V
V
= –3V to 4V  
= –3V to 4V  
CM  
CM  
PSRR  
V = ±1.5V to ±5V  
S
PSRR Match (Channel-to-Channel) (Note 6)  
Output Voltage Swing LOW (Note 8)  
V = ±1.5V to ±5V  
S
V
V
No Load  
50  
200  
500  
mV  
mV  
mV  
OL  
OH  
I
I
= 5mA  
= 20mA  
SINK  
SINK  
Output Voltage Swing HIGH (Note 8)  
Short-Circuit Current  
No Load  
60  
215  
650  
mV  
mV  
mV  
I
I
= 5mA  
= 20mA  
SOURCE  
SOURCE  
I
I
±25  
mA  
SC  
Supply Current per Amplifier  
Disabled Supply Current per Amplifier  
4.6  
mA  
µA  
S
ENABLE = 4.75V  
ENABLE = 0.3V  
1
I
ENABLE Pin Current  
ENABLE Pin Input Voltage LOW  
ENABLE Pin Input Voltage HIGH  
Output Leakage Current  
Turn-On Time  
–95  
0.3  
µA  
V
ENABLE  
V
V
L
4.75  
V
H
ENABLE = 4.75V, V = ±1V  
1
µA  
O
t
t
ENABLE = 5V to 0V, R = 1k  
300  
85  
ns  
ON  
L
Turn-Off Time  
ENABLE = 0V to 5V, R = 1k  
µs  
OFF  
L
SR  
Slew Rate  
A = –1, R = 1k, V = –2V to 2V  
44  
V/µs  
V/µs  
MHz  
V
L
O
LT6230-10, A = –10, R = 1k, V = –2V to 2V  
315  
V
L
O
FPBW  
Full Power Bandwidth  
V
= 3V (Note 9)  
4.66  
OUT  
P-P  
LT6230, LT6231, LT6232  
sn623012 623012fas  
8
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over –40°C < TA < 85°C  
temperature range. VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted. (Note 5)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
LT6230, LT6230-10  
LT6231S8, LT6232GN  
LT6231DD  
700  
550  
650  
µV  
µV  
µV  
OS  
Input Offset Voltage Match  
1000  
µV  
(Channel-to-Channel) (Note 6)  
V
TC  
Input Offset Voltage Drift (Note 10)  
Input Bias Current  
0.5  
3
µV/°C  
µA  
OS  
I
I
12  
1.1  
0.8  
B
I Match (Channel-to-Channel) (Note 6)  
B
µA  
Input Offset Current  
Large-Signal Gain  
µA  
OS  
A
V = ±4.5V, R = 10k  
93  
25  
4.8  
V/mV  
V/mV  
V/mV  
VOL  
O
L
R = 1k  
L
V = ±1.5V, R = 100Ω  
O
L
V
Input Voltage Range  
Guaranteed by CMRR  
–3  
95  
89  
85  
79  
4
V
dB  
dB  
dB  
dB  
CM  
CMRR  
Common Mode Rejection Ratio  
CMRR Match (Channel-to-Channel) (Note 6)  
Power Supply Rejection Ratio  
V
V
= –3V to 4V  
= –3V to 4V  
CM  
CM  
PSRR  
V = ±1.5V to ±5V  
S
PSRR Match (Channel-to-Channel) (Note 6)  
Output Voltage Swing LOW (Note 8)  
V = ±1.5V to ±5V  
S
V
V
No Load  
60  
210  
510  
mV  
mV  
mV  
OL  
OH  
I
I
= 5mA  
= 15mA  
SINK  
SINK  
Output Voltage Swing HIGH (Note 8)  
Short-Circuit Current  
No Load  
70  
220  
675  
mV  
mV  
mV  
I
I
= 5mA  
= 20mA  
SOURCE  
SOURCE  
I
I
±15  
mA  
SC  
Supply Current per Amplifier  
Disabled Supply Current per Amplifier  
4.85  
mA  
µA  
S
ENABLE = 4.8V  
ENABLE = 0.3V  
1
I
ENABLE Pin Current  
ENABLE Pin Input Voltage LOW  
ENABLE Pin Input Voltage HIGH  
Output Leakage Current  
Turn-On Time  
–110  
0.3  
µA  
V
ENABLE  
V
V
L
4.8  
V
H
ENABLE = 4.8V, V = ±1V  
1
µA  
O
t
t
ENABLE = 5V to 0V, R = 1k  
300  
72  
ns  
ON  
L
Turn-Off Time  
ENABLE = 0V to 5V, R = 1k  
µs  
OFF  
L
SR  
Slew Rate  
A = –1, R = 1k, V = –2V to 2V  
37  
V/µs  
V/µs  
MHz  
V
L
O
LT6230-10, A = –10, R = 1k, V = –2V to 2V  
260  
V
L
O
FPBW  
Full Power Bandwidth (Note 9)  
V
= 3V  
3.9  
OUT  
P-P  
LT6230, LT6231, LT6232  
sn623012 623012fas  
9
LT6230/LT6230-10/  
LT6231/LT6232  
ELECTRICAL CHARACTERISTICS  
Note 1: Absolute maximum ratings are those values beyond which the life  
The LT6230I/LT6231I/LT6232I are guaranteed to meet specified  
of the device may be impaired.  
performance from –40°C to 85°C.  
Note 2: Inputs are protected by back-to-back diodes. If the differential  
input voltage exceeds 0.7V, the input current must be limited to less than  
40mA.  
Note 3: A heat sink may be required to keep the junction temperature  
below the absolute maximum rating when the output is shorted  
indefinitely.  
Note 6: Matching parameters are the difference between the two amplifiers  
A and D and between B and C of the LT6232; between the two amplifiers  
of the LT6231. CMRR and PSRR match are defined as follows: CMRR and  
PSRR are measured in µV/V on the matched amplifiers. The difference is  
calculated between the matching sides in µV/V. The result is converted  
to dB.  
Note 7: Minimum supply voltage is guaranteed by power supply rejection  
ratio test.  
Note 8: Output voltage swings are measured between the output and  
Note 4: The LT6230C/LT6230I the LT6231C/LT6231I, and LT6232C/  
LT6232I are guaranteed functional over the temperature range of –40°C  
and 85°C.  
power supply rails.  
Note 9: Full-power bandwidth is calculated from the slew rate:  
FPBW = SR/2πV  
Note 10: This parameter is not 100% tested.  
Note 5: The LT6230C/LT6231C/LT6232C are guaranteed to meet specified  
performance from 0°C to 70°C. The LT6230C/LT6231C/LT6232C are  
designed, characterized and expected to meet specified performance from  
– 40°C to 85°C, but are not tested or QA sampled at these temperatures.  
P
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230/LT6231/LT6232)  
Supply Current vs Supply Voltage  
(Per Amplifier)  
Offset Voltage vs Input Common  
Mode Voltage  
VOS Distribution  
6
5
4
3
2
1
0
2.0  
1.5  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
V
= 5V, 0V  
CM  
V = 5V, 0V  
S
S
+
= V /2  
S8  
1.0  
T
= 125°C  
= 25°C  
A
0.5  
0
T
A
–0.5  
–1.0  
–1.5  
–2.0  
T
= –55°C  
A
T = –55°C  
A
T
= 25°C  
A
T
= 125°C  
A
50 100  
2
4
8
10  
12  
14  
0.5  
1 2  
2.5  
3 3.5 4 4.5 5  
–200 –150 –100 –50  
0
150 200  
0
6
0
1.5  
INPUT OFFSET VOLTAGE (µV)  
TOTAL SUPPLY VOLTAGE (V)  
INPUT COMMON MODE VOLTAGE (V)  
623012 GO1  
623012 GO2  
623012 GO3  
Input Bias Current vs  
Common Mode Voltage  
Output Saturation Voltage vs  
Load Current (Output Low)  
Input Bias Current vs Temperature  
10  
1
14  
12  
10  
8
10  
9
V
= 5V, 0V  
V
= 5V, 0V  
V = 5V, 0V  
S
S
S
8
T
= –55°C  
A
V
= 4V  
CM  
7
T
= 125°C  
0.1  
A
6
T
= 125°C  
A
6
V
= 1.5V  
T
= –55°C  
CM  
A
4
T
= 25°C  
A
5
0.01  
0.001  
2
T
= 25°C  
A
4
0
–2  
3
0.01  
0.1  
1
10  
100  
0
1
3
4
5
6
–25  
0
50  
75 100 125  
–1  
2
–50  
25  
LOAD CURRENT (mA)  
COMMON MODE VOLTAGE (V)  
TEMPERATURE (°C)  
623012 GO6  
623012 GO4  
623012 GO5  
sn623012 623012fas  
10  
LT6230/LT6230-10/  
LT6231/LT6232  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230/LT6231/LT6232)  
Output Saturation Voltage vs  
Load Current (Output High)  
Output Short Circuit Current vs  
Power Supply Voltage  
Minimum Supply Voltage  
10  
1
1.0  
0.8  
70  
60  
50  
40  
V
= 5V, 0V  
V
= V /2  
S
CM S  
SINKING  
T
= 125°C  
A
0.6  
T
= 25°C  
A
30  
0.4  
20  
10  
T
= –55°C  
A
0.2  
T
= 125°C  
A
0.1  
0
0
T
= –55°C  
A
–10  
–20  
–30  
–40  
–50  
–60  
–70  
SOURCING  
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
T
= 125°C  
A
T
= –55°C  
A
T
= –55°C  
A
T
= 25°C  
A
T
= 125°C  
0.01  
0.001  
A
T
= 25°C  
A
T
= 25°C  
A
0.01  
0.1  
1
10  
100  
0
0.5  
1
1.5  
2
2.5  
3
3.5 4 4.5 5  
2
2.5  
3.5  
4
4.5  
5
1.5  
3
LOAD CURRENT (mA)  
TOTAL SUPPLY VOLTAGE (V)  
POWER SUPPLY VOLTAGE (±V)  
623012 G07  
623012 G08  
623012 GO9  
Open Loop Gain  
Open Loop Gain  
Open Loop Gain  
2.5  
2.0  
2.5  
2.0  
2.5  
2.0  
V
T
= 3V, 0V  
= 25°C  
V
T
= 5V, 0V  
= 25°C  
V
A
= ±5V  
S
S
A
S
A
T
= 25°C  
1.5  
1.5  
1.5  
1.0  
1.0  
1.0  
0.5  
0.5  
0.5  
R
L
= 1k  
R
= 1k  
R
L
= 1k  
L
0
0
0
R
= 100Ω  
R
= 100Ω  
L
–0.5  
–1.0  
–1.5  
–2.0  
–2.5  
–0.5  
–1.0  
–1.5  
–2.0  
–2.5  
–0.5  
–1.0  
–1.5  
–2.0  
–2.5  
R = 100Ω  
L
L
0.5  
1
2
2.5  
3
3.5  
4
4.5  
5
–4 –3  
–1  
0
1
2
3
4
5
0
0.5  
1
1.5  
2
2.5  
3
0
1.5  
–5  
–2  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
623012 G10  
623012 G11  
623012 G12  
Total Noise vs Total Source  
Resistance  
Offset Voltage vs Output Current  
Warm-Up Drift vs Time  
100  
10  
1
2.0  
1.5  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
10  
V
= ±5V  
V
V
= ±2.5V  
CM  
T
= 25°C  
S
S
A
= 0V  
f = 100kHz  
UNBALANCED  
SOURCE  
TOTAL NOISE  
T
= –55°C  
A
V
= ±5V  
S
1.0  
RESISTORS  
0.5  
V
= ±2.5V  
= ±1.5V  
S
RESISTOR NOISE  
0
T
= 25°C  
A
V
S
–0.5  
–1.0  
–1.5  
–2.0  
T = 125°C  
A
AMPLIFIER NOISE VOLTAGE  
0.1  
–60 –45 –30 –15  
0
15 30 45 60 75  
–75  
20  
80 100 120 140 160  
40 60  
TIME AFTER POWER-UP (s)  
0
10  
100  
1k  
10k  
100k  
OUTPUT CURRENT (mA)  
SOURCE RESISTANCE ()  
623012 G15  
623012 G13  
623012 G14  
sn623012 623012fas  
11  
LT6230/LT6230-10/  
LT6231/LT6232  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230/LT6231/LT6232)  
0.1Hz to 10Hz Output Voltage  
Noise  
Noise Voltage and Unbalanced  
Noise Current vs Frequency  
Gain Bandwidth and Phase Margin  
vs Temperature  
6
5
4
3
2
1
0
6
5
4
3
2
1
0
70  
60  
50  
40  
V
T
= ±2.5V  
V
= ±2.5V  
C
= 5pF  
= 1k  
S
A
S
L
L
PHASE MARGIN  
= 25°C  
R
V
V
= 0V  
V = ±5V  
S
= V /2  
CM  
CM  
S
V
= 3V, 0V  
S
100nV  
240  
220  
200  
180  
160  
140  
V
= ±5V  
S
NOISE CURRENT  
NOISE VOLTAGE  
–100nV  
V
= 3V, 0V  
S
GAIN BANDWIDTH  
10  
100  
1k  
10k  
100k  
–25  
35  
65  
95  
125  
5s/DIV  
–55  
5
FREQUENCY (Hz)  
TEMPERATURE (°C)  
623012 G16  
623012 G17  
623012 G18  
Gain Bandwidth and Phase Margin  
vs Supply Voltage  
Open Loop Gain vs Frequency  
Slew Rate vs Temperature  
80  
70  
60  
50  
40  
30  
20  
10  
0
120  
120  
110  
100  
90  
70  
60  
50  
40  
C
R
V
= 5pF  
T
= 25°C  
= 5pF  
= 1k  
A = –1  
V
L
L
A
L
L
= 1k  
C
R = R = 1k  
F G  
100  
80  
= V /2  
R
CM  
S
PHASE  
PHASE MARGIN  
V
= ±5V FALLING  
60  
S
V
= ±5V  
S
240  
220  
200  
180  
160  
140  
V
= 3V, 0V  
V
= ±5V RISING  
40  
S
80  
S
20  
70  
0
60  
V
= ±5V  
GAIN BANDWIDTH  
V = ±2.5V FALLING  
S
S
–20  
–40  
–60  
–80  
50  
GAIN  
V
= ±2.5V RISING  
S
40  
V
= 3V, 0V  
S
–10  
–20  
30  
20  
100k  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
2
4
8
10  
12  
14  
–35 –15  
25 45 65 85 105 125  
TEMPERATURE (°C)  
0
6
–55  
5
TOTAL SUPPLY VOLTAGE (V)  
623012 G19  
623012 G20  
623012 G21  
Common Mode Rejection Ratio vs  
Frequency  
Channel Separation vs Frequency  
Output Impedance vs Frequency  
1k  
100  
10  
120  
100  
80  
60  
40  
20  
0
–40  
V
= 5V, 0V  
A
= 1  
= 25°C  
= ±5V  
S
V
A
–50  
–60  
T
V
S
–70  
–80  
A
= 10  
V
–90  
–100  
–110  
–120  
–130  
–140  
1
A
= 2  
V
A
= 1  
V
0.1  
0.01  
V
V
= 5V, 0V  
S
= V /2  
CM  
S
10k  
100k  
1M  
10M  
100M  
1G  
100k  
1M  
10M  
100M  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
623012 G24  
623012 G23  
623012 G22  
sn623012 623012fas  
12  
LT6230/LT6230-10/  
LT6231/LT6232  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230/LT6231/LT6232)  
Power Supply Rejection Ratio vs  
Frequency  
Series Output Resistance and  
Overshoot vs Capacitive Load  
Series Output Resistance and  
Overshoot vs Capacitive Load  
120  
100  
80  
60  
40  
20  
0
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
50  
V
T
= 5V, 0V  
= 25°C  
= V /2  
V
A
= 5V, 0V  
= 1  
V
A
= 5V, 0V  
= 2  
S
A
CM  
S
V
S
V
45  
40  
35  
30  
25  
20  
15  
10  
5
V
R
= 10Ω  
S
S
R
= 10Ω  
S
POSITIVE SUPPLY  
R
= 20Ω  
S
R
= 20Ω  
S
NEGATIVE SUPPLY  
R
R
= 50Ω  
= 50Ω  
S
L
R
R
= 50Ω  
= 50Ω  
S
L
0
0
1k  
10k  
100k  
1M  
10M  
100M  
10  
100  
1000  
10  
100  
CAPACITIVE LOAD (pF)  
1000  
CAPACITIVE LOAD (pF)  
FREQUENCY (Hz)  
623012 G25  
623012 G26  
623012 G27  
Settling Time vs Output Step  
(Non-Inverting)  
Settling Time vs Output Step  
(Inverting)  
Maximum Undistorted Output  
Signal vs Frequency  
10  
9
200  
150  
100  
50  
200  
150  
100  
50  
V
= ±5V  
= 25°C  
= 1  
V
= ±5V  
= 25°C  
= –1  
S
A
S
A
500  
T
T
A
= –1  
V
A
A
V
V
500Ω  
A
= 2  
8
+
V
+
V
IN  
V
V
OUT  
OUT  
7
500  
V
IN  
6
5
1mV  
1mV  
1mV  
1mV  
1
4
V
= ±5V  
S
A
10mV  
10mV  
3
10mV  
10mV  
2
3
T
= 25°C  
HD , HD < –40dBc  
2
3
2
0
0
10k  
100k  
1M  
10M  
–3 –2 –1  
2
4
–3 –2 –1  
1
3
4
–4  
0
–4  
0
FREQUENCY (Hz)  
OUTPUT STEP (V)  
OUTPUT STEP (V)  
623012 G30  
623012 G28  
623012 G29  
Distortion vs Frequency  
Distortion vs Frequency  
Distortion vs Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
V
A
V
= ±5V  
= 1  
OUT  
V
A
V
= ±2.5V  
= 2  
V
A
V
= ±2.5V  
= 1  
S
V
S
V
S
V
R
= 100, 3RD  
L
= 2V  
= 2V  
= 2V  
(P–P)  
(P–P)  
(P–P)  
OUT  
OUT  
R
= 100, 3RD  
L
R
= 100, 3RD  
L
R
= 100, 2ND  
L
R
= 100, 2ND  
R
= 100, 2ND  
L
L
R
= 1k, 2ND  
L
R
= 1k, 2ND  
L
R
= 1k, 2ND  
L
R
= 1k, 3RD  
R
= 1k, 3RD  
L
L
R
= 1k, 3RD  
100k  
L
10k  
100k  
1M  
10M  
10k  
1M  
10M  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
623012 G32  
623012 G33  
623012 G31  
sn623012 623012fas  
13  
LT6230/LT6230-10/  
LT6231/LT6232  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230/LT6231/LT6232)  
Large Signal Response  
Small Signal Response  
Distortion vs Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
V
A
V
= ±5V  
= 2  
OUT  
S
V
R
= 100, 3RD  
L
= 2V  
(P–P)  
2V  
0V  
R
= 100, 2ND  
L
0V  
R
L
= 1k, 3RD  
–2V  
VS = ±2.5V  
V = –1  
RL = 1k  
200ns/DIV  
VS = ±2.5V  
AV = 1  
RL = 1k  
200ns/DIV  
A
R
= 1k, 2ND  
L
623345 G35  
623345 G36  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
623012 G34  
Large Signal Response  
Output Overdrive Recovery  
5V  
0V  
0V  
0V  
–5V  
VS = ±5V  
200ns/DIV  
VS = ±2.5V  
AV = 3  
200ns/DIV  
AV = 1  
R
L = 1k  
623345 G37  
623345 G38  
(LT6230) ENABLE Characteristics  
Supply Current vs ENABLE Pin  
Voltage  
ENABLE Pin Current vs ENABLE  
Pin Voltage  
ENABLE Pin Response Time  
4.5  
30  
25  
20  
15  
10  
5
V
A
= ±2.5V  
S
V
T
= –55°C  
A
= 1  
4.0  
T
= 125°C  
A
5V  
0V  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
T
= 25°C  
A
T
T
= 25°C  
A
T
= –55°C  
A
= 125°C  
A
0.5V  
0V  
VS = ±2.5V  
VIN = 0.5V  
AV = 1  
100µs/DIV  
V
= ±2.5V  
S
0
–2.0  
0
1.0  
2.0  
–1.0  
–2.0  
0
1.0  
2.0  
–1.0  
R
L = 1k  
623345 G41  
PIN VOLTAGE (V)  
PIN VOLTAGE (V)  
623012 G39  
623012 G40  
sn623012 623012fas  
14  
LT6230/LT6230-10/  
LT6231/LT6232  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230-10)  
Gain Bandwidth and Phase Margin  
vs Temperature  
Series Output Resistor and  
Overshoot vs Capacitive Load  
Slew Rate vs Temperature  
600  
550  
500  
450  
400  
350  
300  
250  
200  
150  
100  
70  
1700  
1500  
1300  
1100  
900  
A
= 10  
A = –10  
V
V
A
= 5V, 0V  
= 10  
V
S
V
R = 1k  
V
= ±5V  
F
G
S
60  
50  
40  
30  
20  
10  
0
R
= 100Ω  
R
= 10Ω  
S
V
= ±5V FALLING  
GAIN BANDWIDTH  
S
V
= 3V, 0V  
S
R
= 20Ω  
V
= ±5V RISING  
S
S
80  
70  
60  
50  
40  
R
= 50Ω  
S
PHASE MARGIN  
V
= ±2.5V RISING  
S
V
= ±5V  
S
V
= ±2.5V FALLING  
V
= 3V, 0V  
S
S
10  
100  
1000  
10000  
–25  
0
50  
75 100 125  
–35 –15  
25 45 65 85 105 125  
TEMPERATURE (°C)  
–50  
25  
–55  
5
CAPACITIVE LOAD (pF)  
TEMPERATURE (°C)  
623012 G44  
623012 G42  
623012 G43  
Open Loop Gain and Phase vs  
Frequency  
Gain Bandwidth and Phase Margin  
vs Supply Voltage  
Gain Bandwidth vs Resistor Load  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
120  
1600  
1400  
1200  
1000  
800  
600  
400  
200  
0
1700  
1450  
1200  
950  
V = ±5V  
T
= 25°C  
= 10  
= 5pF  
= 1k  
S
A
V
L
PHASE  
T
= 25°C  
A
C
100  
80  
A
R = 1k  
F
G
V
= ±5V  
R
= 100  
R
S
L
V
= 3V, 0V  
S
60  
GAIN BANDWIDTH  
PHASE MARGIN  
GAIN  
40  
20  
V
= 3V, 0V  
S
0
100  
50  
0
–20  
–40  
–60  
–80  
A
C
= 10  
= 5pF  
= 1k  
V
= ±5V  
V
L
L
S
R
V
= V /2  
CM  
S
–10  
100k  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
0
200  
400  
600  
800  
1000  
2
4
8
10  
12  
0
6
TOTAL RESISTOR LOAD ()  
TOTAL SUPPLY VOLTAGE (V)  
(INCLUDES FEEDBACK R)  
623012 G45  
623012 G47  
623012 G46  
Common Mode Rejection Ratio vs  
Frequency  
Maximum Undistorted Output  
Signal vs Frequency  
2nd and 3rd Harmonic Distortion vs  
Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
120  
100  
80  
60  
40  
20  
0
10  
9
8
7
6
5
4
3
2
1
0
V
A
V
= ±2.5V  
= 10  
S
V
V
V
= 5V, 0V  
= V /2  
S
CM  
S
= 2V  
(P–P)  
OUT  
R
= 100, 2ND  
L
R
= 100, 3RD  
L
R
= 1k, 3RD  
= 1k, 2ND  
L
R
L
V
= ±5V  
= 25°C  
= 10  
S
A
V
T
A
HD = HD 40dBc  
2
3
10k  
100k  
1M  
10M  
10k  
100k  
1M  
10M  
100M  
1G  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
623012 G50  
623012 G49  
623012 G48  
sn623012 623012fas  
15  
LT6230/LT6230-10/  
LT6231/LT6232  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(LT6230-10)  
2nd and 3rd Harmonic Distortion vs  
Frequency  
Large Signal Response  
Output-Overload Recovery  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
V
A
V
= ±5V  
= 10  
OUT  
S
V
= 2V  
(P–P)  
R
= 100, 2ND  
L
R
= 100, 3RD  
L
0V  
0V  
0V  
R
= 1k, 3RD  
L
R
= 1k, 2ND  
L
VS = ±5V  
V = 10  
100ns/DIV  
VS = 5V, 0V  
V = 10  
RF = 900, RG = 100Ω  
100ns/DIV  
A
A
RF = 900, RG = 100Ω  
623345 G52  
623345 G53  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
623012 G51  
Input Referred High Frequency  
Noise Spectrum  
Small Signal Response  
10  
2.5V  
0
VS = 5V, 0V  
AV = 10  
100ns/DIV  
100kHz  
50MHz  
5MHz/DIV  
RF = 900, RG = 100Ω  
623345 G54  
623345 G55  
sn623012 623012fas  
16  
LT6230/LT6230-10/  
LT6231/LT6232  
U
W
U U  
APPLICATIO S I FOR ATIO  
Amplifier Characteristics  
2.5V  
0V  
Figure 1 is a simplified schematic of the LT6230/LT6231/  
LT6232, whichhasapairoflownoiseinputtransistorsQ1  
and Q2. A simple current mirror Q3/Q4 converts the  
differential signal to a single-ended output, and these  
transistorsaredegeneratedtoreducetheircontributionto  
the overall noise.  
–2.5V  
500µs/DIV  
Capacitor C1 reduces the unity cross frequency and  
improves the frequency stability without degrading the  
gain bandwidth of the amplifier. Capacitor CM sets the  
overall amplifier gain bandwidth. The differential drive  
generator supplies current to transistors Q5 and Q6 that  
swing the output from rail-to-rail.  
623012 F02  
Figure 2. VS = ±2.5V, AV = 1 with Large Overdrive  
handle transient currents due to amplifier slew rate over-  
drive and clipping without protection resistors.  
The photo of Figure 2 shows the output response to an  
input overdrive with the amplifier connected as a voltage  
follower. With the input signal low, current source I1  
saturates and the differential drive generator drives Q6  
into saturation so the output voltage swings all the way to  
V. The input can swing positive until transistor Q2 satu-  
rates into current mirror Q3/Q4. When saturation occurs,  
the output tries to phase invert, but diode D2 conducts  
current from the signal source to the output through the  
feedback connection. The output is clamped a diode drop  
below the input. In this photo, the input signal generator  
is limiting at about 20mA.  
+V  
+V  
Q5  
C
M
Q3  
Q4  
DESD5  
V
OUT  
–V  
+V  
C1  
DESD2  
DESD6  
DIFFERENTIAL  
DRIVE GENERATOR  
DESD1  
–V  
D2  
–V  
+V  
–V  
Q1  
Q2  
IN  
Q6  
D1  
+V  
+V  
IN  
BIAS  
ENABLE  
I
1
DESD3  
DESD4  
–V  
–V  
623012 F01  
Figure 1. Simplified Schematic  
With the amplifier connected in a gain of AV 2, the output  
can invert with very heavy overdrive. To avoid this inver-  
sion, limit the input overdrive to 0.5V beyond the power  
supply rails.  
Input Protection  
Thereareback-to-backdiodes,D1andD2acrossthe+and  
– inputs of these amplifiers to limit the differential input  
voltage to ±0.7V. The inputs of the LT6230/LT6231/  
LT6232 do not have internal resistors in series with the  
input transistors. This technique is often used to protect  
the input devices from over voltage that causes excessive  
current to flow. The addition of these resistors would  
significantly degrade the low noise voltage of these ampli-  
fiers. For instance, a 100resistor in series with each  
input would generate 1.8nV/Hz of noise, and the total  
amplifier noise voltage would rise from 1.1nV/Hz to  
2.1nV/Hz. Once the input differential voltage exceeds  
±0.7V, steadystatecurrentconductedthroughtheprotec-  
tion diodes should be limited to ±40mA. This implies 25Ω  
of protection resistance is necessary per volt of overdrive  
beyond ±0.7V. These input diodes are rugged enough to  
ESD  
The LT6230/LT6231/LT6232 have reverse-biased ESD  
protection diodes on all inputs and outputs as shown in  
Figure 1. If these pins are forced beyond either supply,  
unlimited current will flow through these diodes. If the  
current is transient and limited to one hundred milliamps  
or less, no damage to the device will occur.  
Noise  
ThenoisevoltageoftheLT6230/LT6231/LT6232isequiva-  
lent to that of a 75resistor, and for the lowest possible  
noise it is desirable to keep the source and feedback  
resistance at or below this value, i.e. RS + RG||RFB 75.  
sn623012 623012fas  
17  
LT6230/LT6230-10/  
LT6231/LT6232  
U
W
U U  
APPLICATIO S I FOR ATIO  
With RS + RG||RFB = 75the total noise of the amplifier is:  
eN=(1.1nV)2+(1.1nV)2 = 1.55nV/Hz  
For a complete discussion of amplifier noise, see the  
LT1028 data sheet.  
Below this resistance value, the amplifier dominates the  
noise, but in the region between 75and about 3k, the  
noise is dominated by the resistor thermal noise. As the  
total resistance is further increased beyond 3k, the ampli-  
fier noise current multiplied by the total resistance even-  
tually dominates the noise.  
Enable Pin  
The LT6230 includes an ENABLE pin that shuts down the  
amplifier to 10µA maximum supply current. The ENABLE  
pin must be driven high to within 0.35V of V+ to shut down  
the supply current. This can be accomplished with simple  
gate logic; however care must be taken if the logic and the  
LT6230 operate from different supplies. If this is the case,  
then open drain logic can be used with a pull-up resistor  
to ensure that the amplifier remains off. See Typical  
Characteristic Curves.  
TheproductofeN ISUPPLY isaninterestingwaytogauge  
low noise amplifiers. Most low noise amplifiers with low  
eN have high ISUPPLY current. In applications that require  
low noise voltage with the lowest possible supply current,  
this product can prove to be enlightening. The LT6230/  
LT6231/LT6232 have an eN ISUPPLY product of only 1.9  
per amplifier, yet it is common to see amplifiers with  
similar noise specifications to have eN ISUPPLY as high  
as 13.5.  
The output leakage current when disabled is very low;  
however, current can flow into the input protection diodes  
D1 and D2 if the output voltage exceeds the input voltage  
by a diode drop.  
sn623012 623012fas  
18  
LT6230/LT6230-10/  
LT6231/LT6232  
U
W
U U  
APPLICATIO S I FOR ATIO  
Single Supply, Low Noise, Low Power, Bandpass Filter with Gain = 10  
Frequency Response Plot of  
Bandpass Filter  
23  
C2  
47pF  
R1  
732Ω  
1
f
=
= 1MHz  
0
+
2πRC  
V
C = C C , R = R1 = R2  
1
2
C1  
1000pF  
732Ω  
0.1µF  
R3  
R2  
f
f
=
MHz, MAXIMUM f = 1MHz  
0
3
0
(
)
R
10k  
732Ω  
f
0
=
V
IN  
+
–3dB  
2.5  
LT6230  
EN  
V
OUT  
A
E
= 20dB at f  
V
0
= 4µV  
INPUT REFERRED  
+
N
RMS  
I
S
= 3.7mA FOR V = 5V  
R4  
10k  
C3  
0.1µF  
–7  
100k  
1M  
10M  
623012 F03  
FREQUENCY (Hz)  
623012 F04  
Low Noise, Low Power, Single Supply, Instrumentation  
Amplifier with Gain = 100  
R1  
30.9  
R2  
511Ω  
+
C2  
2200pF  
V
C8  
68pF  
U1  
LT6230-10  
+
R15  
88.7Ω  
R10  
511Ω  
V
V
+
IN1  
EN  
C1  
1µF  
R13  
2k  
+
R6  
511Ω  
U3  
V
OUT  
LT6230  
EN  
R3  
30.9Ω  
R4  
511Ω  
R16  
88.7Ω  
C9  
68pF  
R12  
511Ω  
+
V
R14  
2k  
C4  
10µF  
R5  
511Ω  
V
= 100 (V – V )  
IN1  
R1 = R3  
U2  
OUT  
IN2  
R2 = R4  
LT6230-10  
R2  
R1  
R10  
GAIN =  
+ 1  
R10 = R12  
R15 = R16  
(
) (R15)  
V
+
IN2  
EN  
INPUT RESISTANCE = R5 = R6  
= 310Hz TO 11MHz  
C3  
1µF  
f
–3dB  
E
N
= 20µV  
INPUT REFERRED  
RMS  
I
S
= 10.5mA FOR V = 5V, 0V  
S
623012 F05  
sn623012 623012fas  
19  
LT6230/LT6230-10/  
LT6231/LT6232  
U
PACKAGE DESCRIPTIO  
S6 Package  
6-Lead Plastic TSOT-23  
(Reference LTC DWG # 05-08-1636)  
2.90 BSC  
(NOTE 4)  
0.62  
MAX  
0.95  
REF  
1.22 REF  
1.4 MIN  
1.50 – 1.75  
2.80 BSC  
3.85 MAX 2.62 REF  
(NOTE 4)  
PIN ONE ID  
RECOMMENDED SOLDER PAD LAYOUT  
PER IPC CALCULATOR  
0.30 – 0.45  
6 PLCS (NOTE 3)  
0.95 BSC  
0.80 – 0.90  
0.20 BSC  
DATUM ‘A’  
0.01 – 0.10  
1.00 MAX  
0.30 – 0.50 REF  
1.90 BSC  
0.09 – 0.20  
(NOTE 3)  
S6 TSOT-23 0302  
NOTE:  
1. DIMENSIONS ARE IN MILLIMETERS  
2. DRAWING NOT TO SCALE  
3. DIMENSIONS ARE INCLUSIVE OF PLATING  
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR  
5. MOLD FLASH SHALL NOT EXCEED 0.254mm  
6. JEDEC PACKAGE REFERENCE IS MO-193  
sn623012 623012fas  
20  
LT6230/LT6230-10/  
LT6231/LT6232  
U
PACKAGE DESCRIPTIO  
DD Package  
8-Lead Plastic DFN (3mm × 3mm)  
(Reference LTC DWG # 05-08-1698)  
0.675 ±0.05  
3.5 ±0.05  
2.15 ±0.05 (2 SIDES)  
1.65 ±0.05  
PACKAGE  
OUTLINE  
0.25 ± 0.05  
0.50  
BSC  
2.38 ±0.05  
(2 SIDES)  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
R = 0.115  
0.38 ± 0.10  
TYP  
5
8
3.00 ±0.10  
(4 SIDES)  
1.65 ± 0.10  
(2 SIDES)  
PIN 1  
TOP MARK  
(NOTE 6)  
(DD8) DFN 1203  
4
1
0.25 ± 0.05  
0.75 ±0.05  
0.200 REF  
0.50 BSC  
2.38 ±0.10  
(2 SIDES)  
0.00 – 0.05  
BOTTOM VIEW—EXPOSED PAD  
NOTE:  
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION  
ON TOP AND BOTTOM OF PACKAGE  
sn623012 623012fas  
21  
LT6230/LT6230-10/  
LT6231/LT6232  
U
PACKAGE DESCRIPTIO  
S8 Package  
8-Lead Plastic Small Outline (Narrow .150 Inch)  
(Reference LTC DWG # 05-08-1610)  
.189 – .197  
(4.801 – 5.004)  
.045 ±.005  
NOTE 3  
.050 BSC  
7
5
8
6
.245  
MIN  
.160 ±.005  
.150 – .157  
(3.810 – 3.988)  
NOTE 3  
.228 – .244  
(5.791 – 6.197)  
.030 ±.005  
TYP  
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT  
.010 – .020  
(0.254 – 0.508)  
× 45°  
.053 – .069  
(1.346 – 1.752)  
.004 – .010  
(0.101 – 0.254)  
.008 – .010  
(0.203 – 0.254)  
0°– 8° TYP  
.016 – .050  
(0.406 – 1.270)  
.050  
(1.270)  
BSC  
.014 – .019  
(0.355 – 0.483)  
TYP  
NOTE:  
INCHES  
1. DIMENSIONS IN  
(MILLIMETERS)  
2. DRAWING NOT TO SCALE  
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.  
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)  
SO8 0303  
sn623012 623012fas  
22  
LT6230/LT6230-10/  
LT6231/LT6232  
U
PACKAGE DESCRIPTIO  
GN Package  
16-Lead Plastic SSOP (Narrow .150 Inch)  
(Reference LTC DWG # 05-08-1641)  
.189 – .196*  
(4.801 – 4.978)  
.045 ±.005  
.009  
(0.229)  
REF  
16 15 14 13 12 11 10 9  
.254 MIN  
.150 – .165  
.229 – .244  
.150 – .157**  
(5.817 – 6.198)  
(3.810 – 3.988)  
.0165 ±.0015  
.0250 BSC  
RECOMMENDED SOLDER PAD LAYOUT  
1
2
3
4
5
6
7
8
.015 ± .004  
(0.38 ± 0.10)  
× 45°  
.0532 – .0688  
(1.35 – 1.75)  
.004 – .0098  
(0.102 – 0.249)  
.007 – .0098  
(0.178 – 0.249)  
0° – 8° TYP  
.016 – .050  
(0.406 – 1.270)  
.0250  
(0.635)  
BSC  
.008 – .012  
GN16 (SSOP) 0204  
(0.203 – 0.305)  
TYP  
NOTE:  
1. CONTROLLING DIMENSION: INCHES  
INCHES  
2. DIMENSIONS ARE IN  
(MILLIMETERS)  
3. DRAWING NOT TO SCALE  
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE  
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD  
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  
sn623012 623012fas  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
23  
LT6230/LT6230-10/  
LT6231/LT6232  
U
TYPICAL APPLICATIO S  
The LT6230 is applied as a transimpedance amplifier with  
an I-to-V conversion gain of 1.5kset by R1. The LT6230  
is ideally suited to this application because of its low input  
offset voltage and current, and its low noise. This is be-  
cause the 1.5k resistor has an inherent thermal noise of  
5nV/Hz or 3.4pA/Hz at room temperature, while the  
LT6230 contributes only 1.1nV and 2.4pA /Hz. So, with  
respect to both voltage and current noises, the LT6230 is  
actually quieter than the gain resistor.  
the photodiode, it induces a current IPD which flows into  
the amplifier circuit. The amplifier output falls negative to  
maintain balance at its inputs. The transfer function is  
thereforeVOUT =IPD 1.5k. C1ensuresstabilityandgood  
settling characteristics. Output offset was measured  
at 280µV, so low in part because R2 serves to cancel the  
DC effects of bias current. Output noise was measured at  
1.1mVP–P ona100MHzmeasurementbandwidth, withC2  
shunting R2’s thermal noise. As shown in the scope  
photo, the rise time is 17ns, indicating a signal bandwidth  
of 20MHz.  
Thecircuitusesanavalanchephotodiodewiththecathode  
biased to approximately 200V. When light is incident on  
Low Power Avalanche Photodiode Transimpedance Amplifier  
IS = 3.3mA  
Photodiode Amplifier Time Domain Response  
200V BIAS  
C1  
4.7pF  
ADVANCED PHOTONIX  
012-70-62-541  
WWW.ADVANCEDPHOTONIX.COM  
R1  
1.5k  
5V  
R2  
1.5k  
LT6230  
+
50ns/DIV  
–5V  
ENABLE  
623012 TA02b  
623012 TA02a  
C2  
0.1µF  
OUTPUT OFFSET = 500µV TYPICAL  
BANDWIDTH = 20MHz  
OUTPUT NOISE = 1.1mV  
(100MHz MEASUREMENT BW)  
P–P  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LT1028  
Single, Ultra Low Noise 50MHz Op Amp  
Single, Low Noise Rail-to-Rail Amplifier  
Single/Dual, Low Noise 325MHz Rail-to-Rail Amplifier  
Single/Dual, Low Noise 165MHz  
0.85nV/Hz  
LT1677  
3V Operation, 2.5mA, 4.5nV/Hz, 60µV Max V  
OS  
LT1806/LT1807  
LT6200/LT6201  
LT6202/LT6203/LT6204  
2.5V Operation, 550µV Max V , 3.5nV/Hz  
OS  
0.95nVHz, Rail-to-Rail Input and Output  
Single/Dual/Quad, Low Noise, Rail-to-Rail Amplifier  
1.9nV/Hz, 3mA Max, 100MHz Gain Bandwidth  
sn623012 623012fas  
LT/TP 0304 1K REV A • PRINTED IN USA  
24 LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
LINEAR TECHNOLOGY CORPORATION 2003  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  

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