LT6082IGN#PBF [Linear]
IC,OP-AMP,QUAD,CMOS,SSOP,16PIN,PLASTIC;
| 型号： | LT6082IGN#PBF |
| 厂家： | 
Linear |
| 描述： | IC,OP-AMP,QUAD,CMOS,SSOP,16PIN,PLASTIC |
| 文件： | 总20页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6081/LTC6082
Precision Dual/Quad
CMOS Rail-to-Rail Input/
Output Amplifiers
FEATURES
DESCRIPTION
TheLTC®6081/LTC6082aredual/quadlowoffset,lowdrift,
low noise CMOS operational amplifiers with rail-to-rail
input/output swing.
■
Maximum Offset Voltage: 70μV (25°C)
■
Maximum Offset Drift: 0.8μV/°C
■
Maximum Input Bias: 1pA (25°C) 40pA (T ≤ 85°C)
Open Loop Voltage Gain: 120dB Typ
Gain Bandwidth Product: 3.6MHz
A
■
The 70μV maximum offset, 1pA input bias current, 120dB
■
open loop gain and 1.3μV 0.1Hz to 10Hz noise make
P-P
■
CMRR: 100dB Min
PSRR: 98dB Min
0.1Hz to 10Hz Noise: 1.3μV
Supply Current: 330μA
Rail-to-Rail Inputs and Outputs
Unity Gain Stable
2.7V to 5.5V Operation Voltage
Dual LTC6081 in 8-Lead MSOP and 10-Lead DFN10
Packages; Quad LTC6082 in 16-Lead SSOP and DFN
Packages
it perfect for precision signal conditioning. The LTC6081/
■
LTC6082 features 100dB CMRR and 98dB PSRR.
■
P-P
■
■
■
■
■
Each amplifier consumes only 330μA of current on a 3V
supply. The 10-lead DFN has an independent shutdown
function that reduces each amplifier’s supply current to
1μA.
LTC6081/LTC6082 is specified for power supply voltages
of 3V and 5V from –40°C to 125°C. The dual LTC6081 is
available in 8-lead MSOP and 10-lead DFN10 packages.
The quad LTC6082 is available in 16-lead SSOP and DFN
packages.
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
■
Photodiode Amplifier
■
Strain Gauge
■
High Impedance Sensor Amplifier
Microvolt Accuracy Threshold Detection
Instrumentation Amplifiers
Thermocouple Amplifiers
■
■
■
TYPICAL APPLICATION
Shock Sensor Amplifier (Accelerometer)
VOS Drift Histogram
30
LTC6081MS8
= –40°C TO 125°C
+
V
0.1μF
T
V
V
A
S
CM
8.2pF
25
20
15
10
5
= 3V
= 0.5V
2M
2M
+
1/2
LTC6081
MURATA
PKGS-00LD
770pF
V = 109mV/g
OUT
BW ~ 2.2kHz
1G
3.9pF
3.9pF
–
0° SENSOR
1M
0.1μF
–
V
1M
60812 TA01
10k
0
–0.20
–0.10
0
0.10
0.20
0.30
47pF
V
(μV/°C)
OSDRIFT
60812 TA01b
60812fa
1
LTC6081/LTC6082
ABSOLUTE MAXIMUM RATINGS
(Note 1)
+
–
Total Supply Voltage (V to V )...................................6V
Specified Temperature Range (Note 4)
–
+
Input Voltage...................................................... V to V
Output Short Circuit Duration (Note 2)............. Indefinite
Operating Temperature Range (Note 3)
LTC6081C, LTC6082C .............................. 0°C to 70°C
LTC6081I, LTC6082I............................. –40°C to 85°C
LTC6081H, LTC6082H........................ –40°C to 125°C
Junction Temperature
LTC6081C, LTC6082C .......................... –40°C to 85°C
LTC6081I, LTC6082I............................. –40°C to 85°C
LTC6081H, LTC6082H........................ –40°C to 125°C
(H Temperature Range Not Available in DFN Package)
DFN Packages................................................... 125°C
All Other Packages............................................ 150°C
Storage Temperature Range
DFN Packages.................................... –65°C to 125°C
All Other Packages............................. –65°C to 150°C
Lead Temperature (Soldering, 10 Sec).................. 300°C
PIN CONFIGURATION
TOP VIEW
+
OUTA
–INA
+INA
1
2
3
4
5
10
9
V
TOP VIEW
+
OUTB
–INB
+INB
SHDN_B
OUTA 1
–INA 2
8 V
A
7 OUTB
8
A
B
6
5
+INA 3
–INB
+INB
–
B
V
7
–
V
4
SHDN_A
6
MS8 PACKAGE
8-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
T
= 150°C, θ = 200°C/W
JMAX
JA
T
= 125°C, θ = 43°C/W
JMAX
JA
–
UNDERSIDE METAL CONNECTED TO V
TOP VIEW
TOP VIEW
OUTA
–INA
+INA
1
2
3
4
5
6
7
8
16 OUTD
15 –IND
OUTA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUTD
A
B
D
C
–INA
–IND
A
B
D
C
14 +IND
–
+INA
+IND
+
V
13 V
+
–
V
V
+INB
–INB
OUTB
NC
12 +INC
11 –INC
10 OUTC
+INB
–INB
OUTB
NC
+INC
–INC
OUTC
NC
9
NC
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
= 125°C, θ = 43°C/W
GN PACKAGE
16-LEAD PLASTIC SSOP
= 150°C, θ = 110°C/W
T
JMAX
JA
T
JMAX
JA
–
UNDERSIDE METAL CONNECTED TO V
60812fa
2
LTC6081/LTC6082
ORDER INFORMATION
LEAD FREE FINISH
LT6081CDD#PBF
LT6081IDD#PBF
LT6081CMS8#PBF
LT6081IMS8#PBF
LT6081HMS8#PBF
LT6082CDHC#PBF
LT6082IDHC#PBF
LT6082CGN#PBF
LT6082IGN#PBF
LT6082HGN#PBF
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LT6081CDD#TRPBF
LT6081IDD#TRPBF
LT6081CMS8#TRPBF
LT6081IMS8#TRPBF
LT6081HMS8#TRPBF
LT6082CDHC#TRPBF
LT6082IDHC#TRPBF
LT6082CGN#TRPBF
LT6082IGN#TRPBF
LT6082HGN#TRPBF
LCJP
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LCJP
–40°C to 85°C
0°C to 70°C
LTCJN
LTCJN
LTCJN
6082
8-Lead Plastic MSOP
8-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
8-Lead Plastic MSOP
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead Plastic SSOP
6082
–40°C to 85°C
0°C to 70°C
6082
6082I
6082H
16-Lead Plastic SSOP
–40°C to 85°C
–40°C to 125°C
16-Lead Plastic SSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
60812fa
3
LTC6081/LTC6082
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
H SUFFIX
TYP MAX UNITS
SYMBOL PARAMETER
Offset Voltage
CONDITIONS
MIN
TYP
MAX
MIN
V
OS
LTC6081MS8, LTC6082GN
LTC6081MS8, LTC6082GN
LTC6081DD, LTC6082DHC
LTC6081DD, LTC6082DHC
V
CM
V
CM
V
CM
V
CM
= 0.5V, 2.5V
= 0.5V, 2.5V
= 0.5V, 2.5V
= 0.5V, 2.5V
–70
–90
–70
–90
70
90
70
90
–70
–90
70
90
ꢀV
ꢀV
ꢀV
ꢀV
●
●
●
ΔV ⁄ΔT Input Offset Voltage Drift
0.2
0.2
0.1
0.8
0.2
0.2
0.1
0.8
ꢀV/°C
OS
(Note 5)
I
I
Input Bias Current
(Note 6)
1
40
1
500
pA
pA
B
●
●
Input Offset Current
pA
pA
OS
15
100
e
Input Referred Noise
Noise Density at f = 1kHz
Integrated Noise From 0.1Hz to 10Hz
13
1.3
13
1.3
nV/√Hz
μV
P-P
n
I
Input Noise Current Density
(Note 7)
0.5
0.5
fA/√Hz
n
–
+
–
+
●
Input Common Mode Range
Differential Input Capacitance
V
V
V
V
V
pF
pF
C
C
3
7
3
7
DIFF
Common Mode Input
Capacitance
CM
CMRR
Common Mode Rejection
Ratio
V
V
V
V
= 0V to 1.5V
= 0V to 1.5V
= 0V to 3V
= 0V to 3V
95
88
93
88
105
100
105
100
95
86
93
86
105
100
105
100
dB
dB
dB
dB
CM
CM
CM
CM
●
●
PSRR
Power Supply Rejection Ratio V = 2.7V to 5.5V
98
96
110
98
96
110
dB
dB
S
●
V
OUT
Output Voltage, High, Either
Output Pin
No Load
SOURCE
SOURCE
1
1
mV
mV
mV
●
●
I
I
= 0.5mA
= 5mA
–32
–320
–35
–350
Output Voltage, Low, Either
No Load
1
1
mV
mV
mV
–
●
●
Output Pin (Referred to V )
I
I
= 0.5mA
33
300
40
360
SINK
SINK
= 5mA
●
A
VOL
Large-Signal Voltage Gain
R
LOAD
= 10k, 0.5V < V
< 2.5V
110
120
110
120
dB
OUT
●
●
I
Output Short-Circuit Current Source
Sink
17
17
15
15
mA
mA
SC
SR
Slew Rate
A = 1
V
1
1
V/ꢀs
GBW
Gain-Bandwidth Product
TEST
R = 100k
L
2.5
1.8
3.6
2.5
1.5
3.6
MHz
MHz
●
(f
= 50kHz)
Φ
Phase Margin
R = 10k
70
6
70
6
Deg
ꢀs
0
L
t
I
Settling Time 0.1%
A = 1, 1V Step
V
S
Supply Current
(Per Amplifier)
No Load
330
400
435
330
400
460
ꢀA
ꢀA
S
●
Shutdown Current
(Per Amplifier)
Shutdown, V
≤ 0.8V
0.5
ꢀA
ꢀA
SHDN
●
●
2
V
S
Supply Voltage Range
Channel Separation
Guaranteed by the PSRR Test
f = 10kHz, R = 10k
2.7
5.5
2.7
5.5
V
–120
–120
dB
s
L
60812fa
4
LTC6081/LTC6082
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
H SUFFIX
TYP
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
MAX UNITS
●
●
Shutdown Logic
SHDN High
SHDN Low
2
2
V
0.8
2
0.8
V
dB
μs
μs
ꢀA
+
THD
Total Harmonic Distortion
f = 10kHz, V = 3V, V
= 1V , R = 10k
–90
10
2
–90
10
2
OUT
P-P
L
t
t
Turn-On Time
V
SHDN
V
SHDN
V
SHDN
= 0.8V to 2V
= 2V to 0.8V
= 0V
ON
Turn-Off Time
SHDN Pin Current
OFF
●
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test
conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
H SUFFIX
TYP MAX UNITS
SYMBOL PARAMETER
Offset Voltage
CONDITIONS
MIN
TYP
MAX
MIN
V
LTC6081MS8, LTC6082GN
LTC6081MS8, LTC6082GN
LTC6081DD, LTC6082DHC
LTC6081DD, LTC6082DHC
V
CM
V
CM
V
CM
V
CM
= 0.5V
= 0.5V
= 0.5V
= 0.5V
–70
–90
–70
–90
70
90
70
90
–70
–90
70
90
ꢀV
ꢀV
ꢀV
ꢀV
OS
●
●
●
ΔV ⁄ΔT Input Offset Voltage Drift
0.2
0.2
0.1
0.8
0.2
0.2
0.1
0.8
ꢀV/°C
OS
(Note 8)
I
I
Input Bias Current
Input Offset Current
Input Referred Noise
pA
pA
B
●
●
40
15
500
100
pA
pA
OS
e
f = 1kHz
0.1Hz to 10Hz
13
1.3
13
1.3
nV/√Hz
μV
P-P
n
I
Input Noise Current Density
(Note 7)
0.5
0.5
fA/√Hz
n
–
+
–
+
●
Input Common Mode Range
Differential Input Capacitance
V
V
V
V
V
pF
pF
C
C
3
7
3
7
DIFF
Common Mode Input
Capacitance
CM
CMRR
PSRR
Common Mode Rejection
Ratio
V
V
V
= 0V to 3.5V
= 0V to 3.5V
= 0V to 5V
100
95
110
110
95
100
94
110
110
95
dB
dB
dB
CM
CM
CM
●
●
86
86
Power Supply Rejection Ratio V = 2.7V to 5.5V
98
96
110
98
96
110
dB
dB
S
●
V
OUT
Output Voltage, High, Either
No Load
SOURCE
SOURCE
1
1
mV
mV
mV
+
●
●
Output Pin (Referred to V )
I
I
= 0.5mA
= 5mA
–24
–200
–25
–220
Output Voltage, Low, Either
No Load
1
1
mV
mV
mV
–
●
●
Output Pin (Referred to V )
I
I
= 0.5mA
27
210
32
240
SINK
SINK
= 5mA
= 10k, 0.5V < V < 4.5V
OUT
●
A
VOL
Large-Signal Voltage Gain
R
LOAD
110
120
110
120
dB
60812fa
5
LTC6081/LTC6082
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
H SUFFIX
TYP
SYMBOL PARAMETER
Output Short-Circuit Current Source
Sink
A = 1
CONDITIONS
MIN
TYP
MAX
MIN
MAX UNITS
●
●
I
24
24
21
21
mA
mA
SC
SR
Slew Rate
1
1
V/ꢀs
V
GBW
Gain-Bandwidth Product
TEST
R = 100k
L
2.5
1.8
3.5
2.5
1.5
3.5
MHz
MHz
●
(f
= 50kHz)
Φ
Phase Margin
R = 10k
70
6
70
6
Deg
ꢀs
0
L
t
I
Settling Time 0.1%
A = 1, 1V Step
V
S
Supply Current
(Per Amplifier)
No Load
340
425
465
340
425
490
ꢀA
ꢀA
S
●
●
Shutdown Current
(Per Amplifier)
Shutdown, V
≤ 1.2V
6
ꢀA
SHDN
●
V
Supply Voltage Range
Channel Separation
Shutdown Logic
Guaranteed by the PSRR Test
2.7
3.5
5.5
2.7
3.5
5.5
1.2
V
S
f = 10kHz, R = 10k
–120
–120
dB
s
L
●
●
SHDN High
SHDN Low
V
V
1.2
2
+
THD
Total Harmonic Distortion
Turn-On Time
f = 10kHz, V = 5V, V
= 2V , R = 10k
–90
10
2
–90
10
2
dB
μs
μs
ꢀA
OUT
P-P
L
t
t
V
SHDN
V
SHDN
V
SHDN
= 1.2V to 3.5V
ON
Turn-Off Time
= 3.5V to 1.2V
= 0V
OFF
●
SHDN Pin Current
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LTC6081I/LTC6082I are guaranteed to meet specified performance from
–40°C to 85°C. The LTC6081H/LTC6082H are guaranteed to meet specified
performance from –40°C to 125°C.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum. This depends on the power supply voltage
and how many amplifiers are shorted.
Note 3: The LTC6081C/LTC6082C and LTC6081I/LTC6082I are guaranteed
functional over the operating temperature range of –40°C to 85°C.
The LTC6081H/LTC6082H are guaranteed functional over the operating
temperature range of –40°C to 125°C.
Note 5: Input offset drift is computed from the limits of the V test
OS
divided by the temperature range. This is a conservative estimate of worst
case drift. Consult the Typical Performance Characteristics section for
more information on input offset drift.
Note 6: I guaranteed by the V = 5V test.
B
S
–19
Note 7: Current noise is calculated from I = √2qI , where q = 1.6 • 10
n
B
Note 4: The LTC6081C/LTC6082C are guaranteed to meet specified
coulomb.
performance from 0°C to 70°C. The LTC6081C/LTC6082C are designed,
Note 8: V drift is guaranteed by the V = 3V test.
OS
S
60812fa
6
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
VOS Drift Histogram
VOS Drift Histogram
VOS vs Temperature
25
30
25
20
15
10
5
25
20
15
10
5
LTC6081MS8
LTC6081DFN
LTC6081MS8
V
V
= 3V
CM
T
V
V
= –40°C TO 125°C
= 3V
CM
T
V
V
= –40°C TO 125°C
= 3V
CM
20
15
S
A
S
A
S
= 0.5V
REPRESENTATIVE PARTS
= 0.5V
= 0.5V
10
5
0
–5
–10
–15
–20
0
0
10 30
–50 –30 –10
50 70 90 110 130
–0.20
–0.10
0
0.10
0.20
0.30
–0.30 –0.20 –0.10
V
0
0.10
0.20
V
(μV/°C)
(μV/°C)
OSDRIFT
TEMPERATURE (°C)
OSDRIFT
60812 G01
60812 G02
60812 G03
VOS Histogram
VOS vs VCM
VOS vs VCM
40
30
18
16
14
12
10
8
140
120
100
80
V
T
= 3V
= 25°C
V
T
= 5V
= 25°C
LTC6081MS8
S
A
S
A
T
V
V
= 25°C
A
S
REPRESENTATIVE PARTS
REPRESENTATIVE PARTS
= 3V
= 0.5V
CM
20
10
60
0
40
–10
–20
–30
–40
6
20
4
0
2
–20
–40
0
–9.5
0
0.5
1.0
1.5
(V)
2.0
2.5
3.0
–5.5
–1.5
V
2.5
(μV)
6.5
10.5
0
1
2
3
4
5
V
V
CM
(V)
OS
CM
60812 G04
60812 G05
60812 G06
VOS vs Output Current
Warm-Up Drift vs Time
Noise Voltage vs Frequency
110
100
90
80
70
60
50
40
30
20
10
0
200
150
100
50
25
20
15
10
5
T
= 25°C
V
V
= 5V
CM
T
V
= 25°C
A
A
S
= 2.5V
= 0.5V
CM
T
= 125°C
A
V
= 5V
= 3V
S
T
T
= 25°C
= 55°C
A
V
A
S
V
V
= 5V
CM
S
0
= 0.5V
–50
–100
0
V
V
= 3V
CM
S
SINKING
CURRENT
= 0.5V
SOURCING CURRENT
–6
–4 –2
OUTPUT CURRENT (mA)
–5
5
10 15 20 25 30 35
0
2
4
6
0
40 45 50 55 60
1
10
100
1k
10k
100k
FREQUENCY (Hz)
TIME AFTER POWER UP (s)
60812 G09
60812 G07
60812 G08
60812fa
7
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
0.1Hz to 10Hz Output
Voltage Noise
0.1Hz to 10Hz Output
Voltage Noise
Noise Voltage vs Frequency
300
280
260
240
220
200
180
160
140
120
100
80
T
V
V
= 25°C
T
V
V
= 25°C
A
V
A
= 3V
= 25°C
A
S
S
= 3V
= 3V
T
S
= 0.5V
= 2.5V
CM
CM
PMOS INPUTS
= 0.5V
V
CM
NMOS INPUTS
60
40
V
= 2.5V
CM
20
0
0
5
10 15 20 25 30 35 40 45 50
TIME (s)
0
5
10 15 20 25 30 35 40 45 50
1
10
100
1k
10k
100k
TIME (s)
FREQUENCY (Hz)
60812 G10
60812 G11
60812 G12
Input Bias Current vs Temperature
IBIAS vs VCM
IBIAS vs VCM
1000
100
10
500
400
40
30
V
V
= 5V
CM
S
LTC6081MS8
LTC6081MS8
= 2.5V
V
= 5V
= 125°C
V
= 5V
S
A
S
T
300
20
200
10
100
T
A
= 70°C
A
0
0
–10
–20
–30
–40
–50
–100
–200
–300
–400
–500
T
= 85°C
1
0.1
1.5 2.0
1.5 2.0
0.5 1.0
0
0.5 1.0
2.5 3.0 3.5 4.0 4.5 5.0
(V)
20
40
60
80
100
120
140
0
2.5 3.0 3.5 4.0 4.5 5.0
(V)
TEMPERATURE (°C)
V
V
CM
CM
60812 G13
60812 G15
60812 G14
Large Signal Transient
Small Signal Transient
Overshoot vs CL
55
50
45
40
35
30
25
20
15
10
5
T
V
V
= 25°C
A
S
= 3V
= 0.5V
CM
A
= 1
0.5V/DIV
20mV/DIV
GND
GND
V
A
= 10
V
60812 G16
60812 G17
200μs/DIV
20μs/DIV
T
= 25°C
T
= 25°C
A
S
A
S
V
=
1.5V
V
=
1.5V
R
C
= 10k
= 100pF
R
C
= 10k
= 100pF
L
L
L
L
0
10
100
1000
10000
CAPACITIVE LOAD (pF)
60812 G18
60812fa
8
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Temperature
Supply Current vs Time
Output Impedance vs Frequency
390
370
350
330
310
290
270
250
1600
1200
800
400
0
4
3
2
1
0
1000
V
= 0.5V
T
= 25°C
CM
A
V
= 5V
S
PER AMPLIFIER
NO BYPASS CAPACITOR
100
SUPPLY VOLTAGE
A
= 100
= 10
= 1
V
V
= 3V
S
10
1
A
V
A
V
0.1
0.01
V
V
A
= 3V
CM
= 25°C
S
SUPPLY CURRENT
= 0.5V
T
–40 –25 –10
5
20 35 50 65 80 95 110 125
100
200
300
500
0
400
100
1k
10k 100k
1M
10M 100M
TEMPERATURE (°C)
FREQUENCY (Hz)
TIME (μs)
60812 G20
60812 G19
60812 G21
Open Loop Gain
Open Loop Gain
Open Loop Gain vs Frequency
60
40
270
20
10
20
10
V
= 3V
V
= 5V
R
R
= 10k
= 100k
S
A
S
A
L
L
T
= 25°C
T
= 25°C
180
90
PHASE
0
0
R
= 100k
= 10k
L
20
0
R
R
= 100k
= 10k
L
L
–10
–20
–30
–40
–10
–20
–30
–40
–90
–180
–270
–360
R
L
0
R
= 2k
L
GAIN
1M
R
= 2k
L
–20
–40
V
V
A
= 5V
CM
= 25°C
S
= 0.5V
T
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
1k
10k
100k
10M
100M
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
60812 G24
60812 G22
60812 G23
Open Loop Gain vs Frequency
CMRR vs Frequency
PSRR vs Frequency
60
40
180
90
120
120
100
80
R
R
= 10k
= 100k
V
V
A
R
= 5V
V
= 5V
S
L
L
S
= 0.5V
V
= 0.5V
CM
CM
PHASE
100
80
60
40
20
0
T
= 25°C
T = 25°C
A
= 1k
L
0
20
–90
–180
–270
–360
–450
60
40
0
GAIN
20
V
V
A
C
= 5V
S
–20
–40
= 0.5V
CM
0
T
= 25°C
= 200pF
L
–20
–20
1k
10k
100k
1M
10M
100M
100
1k
10k 100k
1M
10M 100M
100
1k
10k 100k
1M
10M 100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
60812 G25
60812 G26
60812 G27
60812fa
9
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing vs
Channel Separation vs Frequency
Load Current
Distortion vs Frequency
+V
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
S
V
A
= 5V
= 1
V
V
= 3V
CM
= 10k
S
V
L
S
V
V
= 3V
S
CM
+V –0.5
= 0.5V
S
= 0.5V
–20
SOURCE
R
= 10k
R
L
+V –1.0
S
V
= 2V
OUT P-P
–40
–60
+V –1.5
S
2ND
+V –2.0
S
3RD
–V 2.0
S
–80
–V 1.5
S
–100
–120
–140
–V 1.0
S
T
T
T
= 125°C
= 25°C
A
A
A
SINK
1
–V 0.5
S
= –55°C
–V
0
S
0.01
0.1
10
100
1
10
100
1000
100
1k
10k 100k
1M
10M 100M
LOAD CURRENT (mA)
FREQUENCY (kHz)
FREQUENCY (Hz)
60789 G29
60812 G30
60812 G28
PIN FUNCTIONS
OUT: Amplifier Output
–IN: Inverting Input
SHDN_A:ShutdownPinofAmplifierA,activelowandonly
valid for LTC6081DD. An internal current source pulls the
+
pin to V when floating.
+IN: Noninverting Input
SHDN_B:ShutdownPinofAmplifierB,activelowandonly
+
V : Positive Supply
valid for LTC6081DD. An internal current source pulls the
+
–
pin to V when floating.
V : Negative Supply
NC: Not internally connected.
–
Exposed Pad: Connected to V .
60812fa
10
LTC6081/LTC6082
APPLICATIONS INFORMATION
Preserving Input Precision
Rail-to-Rail Input
Preserving input accuracy of the LTC6081/LTC6082 re-
quires that the application circuit and PC board layout do
not introduce errors comparable or greater than the 5μV
typical offset of the amplifiers. Temperature differentials
across the input connections can generate thermocouple
voltages of 10’s of microvolts so the connections to the
input leads should be short, close together and away from
heatdissipatingcomponents. Aircurrentacrosstheboard
can also generate temperature differentials.
TheinputstageofLTC6081/LTC6082combinesbothPMOS
and NMOS differential pairs, extending its input common
mode voltage range to both positive and negative supply
voltages. At high input common mode range, the NMOS
pair is on. At low common mode range, the PMOS pair is
on. The transition happens when the common voltage is
between1.3Vand0.9Vbelowthepositivesupply.LTC6081
has better low frequency noise performance with PMOS
input on due to its lower flicker noise (see Voltage Noise
vs Frequency and 0.1Hz to 10Hz Input Voltage Noise in
Typical Performance Characteristics).
The extremely low input bias currents (0.1pA typical) al-
low high accuracy to be maintained with high impedance
sources and feedback resistors. Leakage currents on the
PC board can be higher than the input bias current. For
example, 10GΩ of leakage between a 5V supply lead and
an input lead will generate 500pA! Surround the input
leads with a guard ring driven to the same potential as the
input common mode voltage to avoid excessive leakage
in high impedance applications.
Thermal Hysteresis
Figure 1 shows the input offset voltage hysteresis of the
LTC6081IMS8 for 3 thermal cycles from –45°C to 90°C.
The typical offset shift is 4μV. The data was taken with
the ICs in stress free sockets. Mounting to PC boards
maycauseadditionalhysteresisduetomechanicalstress.
The LTC6081 will meet offset voltage specifications in the
electricalcharacteristicstableevenafter15μVofadditional
error from thermal hysteresis.
Capacitive Load
LTC6081/LTC6082 can drive capactive load up to 200pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
further increases the amount of capacitance the amplifier
can drive.
0.30
V
V
V
CHANGE AFTER 3 THERMAL CYCLES
= 0.5V
OS
CM
+
= 3V
0.25
0.20
0.15
0.10
0.5
300 UNITS
SHDN Pins
Pins 5 and 6 are used for power shutdown on the LTC6081
in the DD package. If they are floating, internal current
+
sources pull Pins 5 and 6 to V and the amplifiers operate
0
–15 –12 –9 –6 –3
0
3
6
9
12 15
normally. Inshutdown, theamplifieroutputishighimped-
ance, and each amplifier draws less than 2μA current.
60812 F01
V
OS
CHANGE (μV)
Figure 1. VOS Thermal Hysteresis of LTC6081MS8
60812fa
11
LTC6081/LTC6082
APPLICATIONS INFORMATION
PC Board Layout
and not the package. The package is generally aligned
with the leads perpendicular to the long side of the PC
board (see Figure 2).
Mechanical stress on a PC board and soldering-induced
stress can cause the V and V drift to shift. The DD
OS
OS
and DHC packages are more sensitive to stress. A simple
way to reduce the stress-related shifts is to mount the IC
near the short edge of the PC board, or in a corner. The
board edge acts as a stress boundary, or a region where
the flexure of the board is minimum. The package should
always be mounted so that the leads absorb the stress
ThemosteffectivetechniquetorelievethePCboardstress
is to cut slots in the board around the op amp. These slots
can be cut on three sides of the IC and the leads can exit on
the fourth side. Figure 2 shows the layout of a LTC6081DD
with slots at three sides.
LONG DIMENSION
SLOTS
60812 F02
Figure 2. Vertical Orientation of LTC6081DD with Slots
60812fa
12
LTC6081/LTC6082
SIMPLIFIED SCHEMATIC
Simplified Schematic of the Amplifier
+
V
R1
R2
M10
M11
I2
M8
C1
I1
1μA
+
V
A1
–
+
V
V
BIAS
M5
V
D4
+IN
D7
+
V
D3
OUTPUT
CONTROL
M6 M7
M1 M2
OUT
D6
–
D8
V
+
V
–IN
–
V
D5
D2
A2
BIAS
GENERATION
SHDN
–
V
C2
D1
NOTE: SHDN IS ONLY AVAILABLE
IN THE DFN10 PACKAGE
M3
M4
M9
–
V
R3
R4
–
60812 SS
V
60812fa
13
LTC6081/LTC6082
TYPICAL APPLICATIONS
Low Side Current Sense
100k
15pF
V
DD
+
V
–
I
LOAD
1/2
V
= R • I • 101
SH
OUT
LTC6081
+
e
= 3μV , RTI
P-P
NOISE
R
1k
SH
BW ~ 1kHz
60812 TA03
Two Op-Amp Instrumentation Amplifier
GAIN
TRIM
1.96k
100k
100k
0.1μF
+
V
CMRR
TRIM
1M
976k
–
50k
1/2
LTC6081
+
100k
–
–
1/2
V
= 1011 • V
IN
OUT
V
IN
+
LTC6081
+
60812 TA04
0.1μF
–
V
60812fa
14
LTC6081/LTC6082
TYPICAL APPLICATIONS
Thermocouple Amplifier
5V
0.1μF
1M
+
1/2
1μF
V
= 10mV/°C
OUT
LTC6081
–
1M
0°C TO 500°C
5V
LT1025
2.49M
K
–
R
10k
100pF
SENSOR: OMEGA 5TC-TT-K-30-36 K-TYPE THERMOCOUPLE
1M RESISTORS PROTECT CIRCUIT TO 350V WITH NO PHASE REVERSAL OF AMPLIFIER OUTPUT
1pA MAX I
TRANSLATES TO 0.05°C ERROR
BIAS
20μV V → 0.5°C OFFSET
60812 TA05
OS
Precision Nanoamp Bidirectional Current Source
100k
+
V
IN
1/4
LTC6082
100Ω
–
0.01μF
1k
100Ω
5k
GAIN
TRIM
97.6k
100k
10-TURN
2.5V
0.1μF
10mΩ
+
–
1/4
LTC6082
–
+
100k
100k
1/4
LTC6082
3.9pF
0.1μF
LOAD
I
I
= –1nA → 1nA FOR
= –10V → 10V
OUT
OUT
IN
–2.5V
V
TOTAL ERROR < 1% (10pA)
60812 TA06
60812fa
15
LTC6081/LTC6082
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)
0.70 p0.05
3.55 p0.05
2.15 p0.05 (2 SIDES)
1.65 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 p 0.10
TYP
6
10
3.00 p0.10
(4 SIDES)
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD) DFN REV B 0309
5
1
0.25 p 0.05
0.50 BSC
0.75 p0.05
0.200 REF
2.38 p0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60812fa
16
LTC6081/LTC6082
PACKAGE DESCRIPTION
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.40 ± 0.10
5.00 ±0.10
(2 SIDES)
TYP
16
9
R = 0.20
TYP
3.00 ±0.10 1.65 ± 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60812fa
17
LTC6081/LTC6082
PACKAGE DESCRIPTION
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 ±.0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 ± .004
(0.38 ± 0.10)
× 45°
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
60812fa
18
LTC6081/LTC6082
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.52
(.0205)
REF
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
7 6 5
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
GAUGE PLANE
1
2
3
4
0.53 ± 0.152
(.021 ± .006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
0.1016 ± 0.0508
(.009 – .015)
(.004 ± .002)
0.65
(.0256)
BSC
TYP
MSOP (MS8) 0307 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
60812fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC6081/LTC6082
TYPICAL APPLICATION
Single Supply Strain Gauge Amplifier
3V
3V
CMRR
TRIM
0.01μF
350Ω
10k
10M
9.76M
100Ω
100k
500k
3.2V
0.1μF
350Ω
0.1μF
LT1790B
1.25V
–
1/2
LTC6081
+
+
A
= 1001
V
1/2
LTC6081
10M
1.25V
–
SENSOR: OMEGA SG-3/350-LY41 STRAIN GAUGE
10M
60812 TA02
RELATED PARTS
PART NUMBER
LT1678/LT1679
LTC2050
DESCRIPTION
COMMENTS
Dual/Quad Precision Op Amps
Zero-Drift Op Amp
Low Noise, 2.7V to 36V Operation
2.7V Operation, SOT-23 Package
MS8/GN16 Packages
LTC2051/LTC2052
LTC2054/LTC2055
LTC6078/LTC6079
LTC6241/LTC6242
LTC6244
Dual/Quad Zero-Drift Op Amps
Single/Dual Zero-Drift Op Amp
Micropower, SOT-23 and DFN Packages
Dual/Quad Low Noise Precision CMOS Op Amps
Dual/Quad Low Noise CMOS Op Amps
Dual 50MHz CMOS Op Amp
Micropower 0.7μV/°C V Drift
OS
18MHz Bandwidth,10V/μs Slew Rate
Low Noise, Rail-to-Rail Out, MS8 and DFN Packages
60812fa
LT 0809 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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