LT6023-1_15 [Linear]
Dual Micropower, 1.4V/s Precision Rail-to-Rail Output Amplifier;
| 型号： | LT6023-1_15 |
| 厂家： | 
Linear |
| 描述： | Dual Micropower, 1.4V/s Precision Rail-to-Rail Output Amplifier |
| 文件： | 总22页 (文件大小：770K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT6023/LT6023-1
Dual Micropower, 1.4V/µs
Precision Rail-to-Rail
Output Amplifier
FEATURES
DESCRIPTION
n
Excellent Slew Rate to Power Ratio
TheLT®6023isalowpower,enhanced slewrate,precision
operational amplifier. The proprietary circuit topology of
this amplifier gives excellent slew rate at low quiescent
power dissipation without compromising precision or
settling time. In addition, proprietary input stage circuitry
allows the input impedance to remain high during input
voltage steps as large as 5V. The combination of preci-
sion specs along with fast settling makes this part ideal
for MUX applications.
n
Slew Rate: ±34V/μs
n
Maximum Supply Current: 20μA/Amplifier
n
Maximum Offset Voltage: 10μV
n
High Dynamic Input Impedance
n
Fast Recovery from Shutdown
n
Maximum Input Bias Current: 3nA
n
No Output Phase Inversion
n
Gain Bandwidth Product: 40kHz
n
Wide Specified Supply Range: 3V to 30V
The low quiescent current of the LT6023 along with its
ability to operate on supplies as low as 3V make it useful
in portable systems. The LT6023-1 features a shutdown
mode which reduces the typical supply current to 800nA.
n
Operating Temperature Range: –40°C to 125°C
n
Rail-to-Rail Outputs
DFN and MS8 Packages
n
The LT6023 is available in the small 8-lead DFN and 8-lead
MSOP packages. The LT6023-1 is available in a 10-lead
DFN package.
APPLICATIONS
n
Precision Signal Processing
L, LT, LTC, LTM, Linear Technology, SmartMesh and the Linear logo are registered trademarks
and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patent Pending.
n
DAC Amplifier
n
Multiplexed ADC Applications
n
Low Power Portable Systems
n
Low Power Wireless Sensor Networks
TYPICAL APPLICATION
±±13.V Input Range MUX Buffer
MUX Buffer Response, ±2V Step
1/2 LTC203
15V
IN1
IN2
S1
5
+
V
0
15V
V
IN1
D1
D2
+
–6V
1/2 LT6023
V
IN2
6V
S2
–
2V/DIV
20µs/DIV
–
60231 TA01b
GND
V
–15V
60231 TA01a
–15V
60231fa
1
For more information www.linear.com/LT6023
LT6023/LT6023-1
ABSOLUTE MAXIMUM RATINGS
(Note ±)
+
–
Total Supply Voltage (V to V ).................................36V
Differential Input Voltage (within Supplies)...............36V
Input Voltage (DGND, EN, +IN, –IN)
Operating and Specified Temperature Range
I-Grade.................................................–40°C to 85°C
H-Grade ............................................ .–40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
–
(Relative to V ) .....................................................36V
Input Current (+IN, –IN, DGND, EN) ..................... 10mA
Output Short-Circuit Duration.......................... Indefinite
PIN CONFIGURATION
TOP VIEW
TOP VIEW
+
OUTA
–INA
+INA
1
2
3
4
5
10
9
V
+
OUTA
–INA
+INA
1
2
3
4
8
7
6
5
V
TOP VIEW
OUTB
–INB
+INB
EN
+
OUTB
–INB
+INB
A
OUTA 1
–INA 2
8 V
A
11
9
8
7 OUTB
6 –INB
5 +INB
B
A
–
V
7
+INA
3
4
B
–
B
–
V
V
DGND
6
MS8 PACKAGE
8-LEAD PLASTIC MSOP
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
θ
= 163°C/W, θ = 40°C/W
JC
JA
θ
= 43°C/W, θ = 5.5°C/W
θ
= 43°C/W, θ = 5.5°C/W
JA
JC
JA JC
–
–
EXPOSED PAD (PIN 9) IS CONNECTED TO V (PIN 4)
(PCB CONNECTION OPTIONAL)
EXPOSED PAD (PIN 11) IS CONNECTED TO V (PIN 4)
(PCB CONNECTION OPTIONAL)
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
LGRS
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT6023IDD#PBF
LT6023IDD#TRPBF
LT6023HDD#TRPBF
LT6023IDD-1#TRPBF
LT6023HDD-1#TRPBF
LT6023IMS8#TRPBF
LT6023HMS8#TRPBF
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
8-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
LT6023HDD#PBF
LT6023IDD-1#PBF
LT6023HDD-1#PBF
LT6023IMS8#PBF
LT6023HMS8#PBF
LGRS
LGRV
LGRV
LTGRT
LTGRT
8-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
60231fa
2
For more information www.linear.com/LT6023
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = ±±5V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 5V3 DGND and
EN specifications only apply to the LT.021-±3
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
DD Packages
20
70
160
µV
µV
OS
l
MS8 Package
5
30
µV
µV
l
l
l
160
∆V
Input Offset Voltage Drift (Note 2)
DD Packages
MS8 Package
–3.5
–2.9
0.9
0.5
0.2
3.5
2.9
µV/°C
µV/°C
µV/Mo
OSI
∆Temp
∆V
Long Term Input Offset Voltage Stability
Input Bias Current
OSI
∆Time
I
–3
–3
0.1
0.1
3
3
3
nA
nA
nA
B
T = –40° to 85°C
A
l
l
A
T = –40° to 125°C
–10
10
I
Input Offset Current
–1
–1
–2
1
1
2
nA
nA
nA
OS
T = –40° to 85°C
l
l
A
T = –40° to 125°C
A
Input Noise Voltage
0.1Hz to 10Hz
µV
P-P
e
n
Input Noise Voltage Density
f = 1Hz
f = 1kHz
132
132
nV/√Hz
nV/√Hz
i
Input Noise Current Density
Input Capacitance
f = 1kHz
12.1
fA/√Hz
n
C
Common Mode
Differential Mode
1.5
2.5
pF
pF
IN
R
Input Resistance
Common Mode
Differential Mode
140
330
GΩ
MΩ
IN
–
+
l
l
l
l
l
V
Common Mode Input Range
V + 1.2
V – 1.4
V
ICM
CMRR
Common Mode Rejection Ratio
V
= –13.8V to 13.6V
120
116
136
140
114
134
180
dB
dB
CM
PSRR
Supply Rejection Ratio
V = 3V to 30V
S
120
110
dB
dB
A
Large-Signal Voltage Gain
R = 10kΩ, V = 14V
OUT
110
100
dB
dB
VOL
L
R = 100kΩ, V
= 14.5V
126
116
dB
dB
L
OUT
–
V
V
Output Swing Low (V
– V )
R = 10kΩ
300
380
430
mV
mV
mV
OL
OH
OUT
L
l
l
T = –40° to 85°C
A
T = –40° to 125°C
A
+
Output Swing High (V – V
Short-Circuit Current
)
R = 10kΩ
115
5.25
15
140
165
190
mV
mV
mV
OUT
L
l
l
T = –40° to 85°C
A
T = –40° to 125°C
A
I
V
A
= 0V, Sourcing
OUT
3
2.5
2
mA
mA
mA
SC
l
l
T = –40° to 85°C
T = –40° to 125°C
A
V
= 0V, Sinking
6.5
4.5
4
mA
mA
mA
OUT
l
l
T = –40° to 85°C
A
T = –40° to 125°C
A
60231fa
3
For more information www.linear.com/LT6023
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = ±±5V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 5V3 DGND and
EN specifications only apply to the LT.021-±3
SYMBOL PARAMETER
CONDITIONS
= 1, 10V Step
MIN
TYP
MAX
UNITS
SR
Slew Rate
A
0.85
0.7
0.6
1.4
V/μs
V/μs
V/μs
VCL
l
l
T = –40° to 85°C
A
T = –40° to 125°C
A
A
A
= 1, 5V Step
0.3
0.25
0.2
0.65
V/μs
V/μs
V/μs
VCL
l
l
T = –40° to 85°C
T = –40° to 125°C
A
l
l
GBW
Gain-Bandwidth Product
Minimum Supply Voltage
Supply Current per Amplifier
f = 1kHz
29
3
40
18
kHz
V
Guaranteed by PSRR
I
20
28
40
μA
μA
μA
S
T = –40° to 85°C
l
l
A
T = –40° to 125°C
A
Supply Current in Shutdown
V
A
= 0.8V
0.8
3
3.2
3.6
μA
μA
μA
EN
T = –40° to 85°C
l
l
T = –40° to 125°C
A
t
t
Settling Time (A = 1)
0.1% 5V Output Step
40
60
μs
μs
μs
μs
s
V
0.01% 5V Output Step
0.0015% 5V Output Step
0.0015% 10V Output Step
124
132
Enable Time
A = 1
V
480
µs
V
ON
–
+
l
l
l
l
l
V
DGND Pin Voltage Range
DGND Pin Current
V
V – 3
DGND
DGND
EN
I
I
–200
–200
0.8
nA
nA
V
EN Pin Current
V
V
EN Pin Input Low Voltage
EN Pin Input High Voltage
Relative to DGND
Relative to DGND
ENL
ENH
1.7
V
60231fa
4
For more information www.linear.com/LT6023
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = 1V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 1V3 DGND and EN
pin specifications only apply to the LT.021-±3
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
DD Packages
20
100
190
µV
µV
OS
l
MS8 Package
5
45
µV
µV
l
l
l
175
∆V
Input Offset Voltage Drift (Note 2)
DD Packages
MS8 Package
–3.5
–2.9
0.9
0.5
0.2
3.5
2.9
µV/°C
µV/°C
µV/Mo
OSI
∆Temp
∆V
Long Term Input Offset Voltage Stability
OSI
∆Time
I
I
Input Bias Current
1
0.1
3
nA
nA
B
Input Offset Current
Input Noise Voltage
Input Noise Voltage Density
OS
0.1Hz to 10Hz
µV
P-P
e
f = 1Hz
f = 1kHz
132
132
nV/√Hz
nV/√Hz
n
i
Input Noise Current Density
Input Capacitance
f = 1kHz
12.1
fA/√Hz
n
C
Common Mode
Differential Mode
1.5
2.5
pF
pF
IN
R
Input Resistance
Common Mode
Differential Mode
140
400
GΩ
MΩ
IN
–
+
l
V
Common Mode Input Range
Common Mode Rejection Ratio
Supply Rejection Ratio
V + 1.2
V – 1.4
V
ICM
CMRR
PSRR
V
= 1.2V to 1.6V
125
140
dB
CM
V = 3V to 30V
120
110
dB
dB
S
l
l
A
Large-Signal Voltage Gain
R = 10kΩ, V = 0.5V to 2.5V
OUT
98
95
108
dB
dB
VOL
L
R = 100kΩ, V
= 0.5V to 2.5V
136
60
dB
L
OUT
–
V
V
Output Swing Low (V
– V )
R = 10kΩ
100
150
170
mV
mV
mV
OL
OH
OUT
L
l
l
T = –40° to 85°C
A
T = –40° to 125°C
A
+
Output Swing High (V – V
Short-Circuit Current
)
R = 10kΩ
A
T = –40° to 125°C
A
60
3.5
5
80
90
100
mV
mV
mV
OUT
L
l
l
T = –40° to 85°C
I
V
A
= 1.5V, Sourcing
OUT
2.5
2.25
2
mA
mA
mA
SC
l
l
T = –40° to 85°C
T = –40° to 125°C
A
V
A
= 1.5V, Sinking
3.5
2
2
mA
mA
mA
OUT
l
l
T = –40° to 85°C
T = –40° to 125°C
A
SR
Slew Rate (Note 3)
A
= –1, 2V Step
0.05
40
V/μs
kHz
V
VCL
GBW
Gain-Bandwidth Product
Minimum Supply Voltage
f = 1kHz
l
Guaranteed by PSRR
3
60231fa
5
For more information www.linear.com/LT6023
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = 1V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 1V3 DGND and EN
pin specifications only apply to the LT.021-±3
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Supply Current per Amplifier
15
20
25
35
μA
μA
μA
S
T = –40° to 85°C
A
l
l
A
T = –40° to 125°C
Supply Current in Shutdown
V
A
= 0.8V
0.2
1.1
1.5
3
μA
μA
μA
EN
T = –40° to 85°C
l
l
T = –40° to 125°C
A
t
t
Settling Time (A = –1)
0.1% 2.4V Output Step
0.01% 2.4V Output Step
0.0015% 2.4V Output Step
85
μs
μs
μs
s
V
100
250
Enable Time
A = 1
V
580
µs
V
ON
–
+
l
V
DGND Pin Voltage Range
DGND Pin Current
V
V – 3
DGND
DGND
EN
I
I
–75
–75
nA
nA
V
EN Pin Current
l
l
V
V
EN Pin Input Low Voltage
EN Pin Input High Voltage
Relative to DGND
Relative to DGND
0.8
ENL
ENH
1.7
V
Note ±: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 1: The slew rate of the LT6023 increases with the size of the
input step. At lower supplies, the input step size is limited by the input
common mode range. This trend can be seen in the Typical Performance
Characteristics.
Note 2: Guaranteed by design.
60231fa
6
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±15V, RL = 100kΩ, unless
otherwise specified.
Typical Distribution of Input
Typical Distribution of Input
Typical Distribution of Input
Offset Voltage
Offset Voltage
Offset Voltage Drift
800
700
600
500
400
300
200
100
0
1000
800
600
400
200
0
160
2870 AMPLIFIERS
DD8 AND DD10 PACKAGES
215 AMPLIFIERS
MS8 PACKAGE
1386 AMPLIFIERS
MS8 PACKAGE
140
120
100
80
60
40
20
0
–30
–20
–10
0
10
20
30
–80 –60 –40 –20
0
20 40 60 80
–5 –4 –3 –1
0
1
3
4
5
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE DRIFT (µV/°C)
6023 G01
6023 G02
6023 G03
Typical Distribution of Input
Offset Voltage Drift
Offset Voltage Shift vs Lead Free
IR Reflow
Typical Input Offset Voltage
vs Temperature
90
80
70
60
50
40
30
20
10
0
30
25
20
15
10
5
160
120
80
210 AMPLIFIERS
80 AMPLIFIERS
MS8 PACKAGE
10 TYPICAL UNITS
DD PACKAGES
40
0
–40
–80
–120
–160
0
–5 –4 –3 –1
0
1
3
4
5
–10 –8 –6 –4 –2
0
2
4
6
8
10
–50 –25
0
25
50
75 100 125
INPUT OFFSET VOLTAGE DRIFT (µV/°C)
INPUT OFFSET VOLTAGE SHIFT (µV)
TEMPERATURE (°C)
6023 G04
6023 G05
6023 G06
Offset Voltage vs Input Common
Mode Voltage
Offset Voltage vs Supply Voltage
50
40
40
20
3 TYPICAL UNITS
30
20
10
0
0
–10
–20
–30
–40
–50
–20
–40
0
4
8
12 16 20 24 28 32 36
–15
–10
–5
0
5
10
15
TOTAL SUPPLY VOLTAGE (V)
INPUT COMMON MODE VOLTAGE (V)
6023 G07
6023 G08
60231fa
7
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±15V, RL = 100kΩ, unless
0.1Hz to 10Hz Voltage Noise
otherwise specified.
Input Bias Current vs
Temperature
Input Bias Current vs Differential
Input Voltage
1
0.75
0.5
4
3
–
+
0.25
0
IB
IB
1µV/DIV
2
1
–0.25
–0.5
–0.75
–1
0
–1
1s/DIV
6
4
2
0
–2
–4
–6
–50 –25
0
25
50
75 100 125
DIFFERENTIAL INPUT VOLTAGE (V)
TEMPERATURE (°C)
6023 G11
6023 G10
6023 G09
Voltage Noise Density vs
Frequency
Maximum Undistorted Output
Amplitude vs Frequency
Large-Signal Transient Response
(5V Step)
1000
100
10
35
30
25
20
15
10
5
A
= 1
V
V
= ±±V
10V STEP
THD < 40dBc
S
A
= 1
V
5V STEP
2V/DIV
0
50µs/DIV
0.01
0.1
1
10
100
1k
10k
0.1
1
10
FREQUENCY (Hz)
FREQUENCY (kHz)
6023 G14
6023 G12
6023 G13
Slew Rate vs Temperature
(5V Step)
Slew Rate vs Temperature
(10V Step)
Slew Rate vs Input Step
1
0.75
0.5
2
3.5
3
RISING EDGE
RISING EDGE
1.5
1
FALLING EDGE
RISING EDGE
2.5
2
FALLING EDGE
FALLING EDGE
1.5
1
0.25
0.5
0.5
0
0
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
5
10
15
20
25
30
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT STEP SIZE (V
)
P–P
6023 G15
6023 G16
6023 G17
60231fa
8
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VS = ±15V, RL = 100kΩ unless
otherwise specified.
Small-Signal Transient Response
Overshoot vs Capacitive Load
35
30
25
20
15
10
5
A
= 1
V
330pF
V
S
= 1ꢀ5V
2mV/DIV
100pF
V
=
15V
800
S
0
50µs/DIV
0
200
400
600
1000
CAPACITIVE LOAD (pF)
6023 G18
6023 G19
Open-Loop Gain and Phase
vs Frequency
PSRR vs Frequency
CMRR vs Frequency
140
120
100
80
140
120
100
80
140
120
100
80
–45
V
= 15V
S
–90
–PSRR
60
–135
–180
–225
+PSRR
60
60
40
40
40
20
20
20
0
0
0
–20
10m 100m
1
10 100 1k 10k 100k
100m
1
10
100
1k
10k 100k
100m
1
10
100
1k
10k 100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
6023 G20
6023 G21
6023 G22
Gain vs Frequency
Open Loop Gain vs Load
Output Impedance vs Frequency
3
0
160
10k
1k
V =±±15
S
V
OUT
=
14.5V
A = 1
V
150
140
130
120
100
10
–3
–6
–9
–12
110
100
1
90
80
C =100p, A =1
L
V
C =330p, A =1
L
V
0.1
C =330p, A =–1
70
60
L
V
0.01
10
100
1k
10k
100k
1M
0.01
0.1
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
LOAD CURRENT (mA)
FREQUENCY (Hz)
6023 G23
6023 G24
6023 G25
60231fa
9
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VS = ±15V, RL = 100kΩ unless
otherwise specified.
Shutdown Supply Current vs
Temperature
Supply Current vs Supply Voltage
Start-Up Response
40
35
30
25
20
15
10
5
2
1.5
1
V
S
20V/DIV
0V
+
I
5mA/DIV
0mA
V
V
=
=
15V
S
S
0V
V
OUT
2V/DIV
0.5
125°C
85°C
V
A
V
= ±±0V
= ±
IN
1.5V
0
S
V
25°C
= ±V
–40°C
0
0
0
5
10
15
20
25
30
–50 –25
25
50
75 100 125
200µs/DIV
TOTAL SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
6023 G26
6023 G27
6023 G28
Output Saturation Voltage vs
Sink Current (Output Low)
Output Saturation Voltage vs
Source Current (Output High)
Enable/Disable Response
1
1
V
EN
5V/DIV
0V
+
I
40µA/DIV
0.1
0.1
0µA
V
OUT
5V/DIV
0V
T
T
T
T
= 125°C
T
T
T
T
= 125°C
= 85°C
= 25°C
= –40°C
A
A
A
A
A
A
A
A
= 85°C
= 25°C
= –40°C
0.01
0.01
500µs/DIV
0.1
1
10
0.1
1
10
LOAD CURRENT (mA)
LOAD CURRENT (mA)
6023 G29
6023 G30
6023 G31
Positive Output Overdrive
Recovery
Negative Output Overdrive
Recovery
Crosstalk vs Frequency
0
–20
INPUT
–40
OUTPUT
5V/DIV
200mV/DIV
0V
–60
–80
0V
OUTPUT
5V/DIV
INPUT
200mV/DIV
–100
–120
–140
A
= 100
A = 100
V
V
10
100
1k
10k
100k
1M
2ms/DIV
2ms/DIV
FREQUENCY (Hz)
6023 G32
6023 G33
6023 G34
60231fa
10
For more information www.linear.com/LT6023
LT6023/LT6023-1
PIN FUNCTIONS
OUT: Amplifier Output.
EN (LT6023 -1 Only): Enable Input. This pin must be
+
connected high, normally to V , for the amplifiers to be
–IN: Inverting Input of the Amplifier.
+IN: Noninverting Input of the Amplifier.
functional. EN is active high with the threshold approxi-
mately two diodes above DGND. EN cannot be floated.
The shutdown threshold voltage is specified with respect
to the voltage on the DGND pin.
–
V : Negative Power Supply. A bypass capacitor should be
used between supply pins and ground. Additional bypass
capacitance may be used between the power supply pins.
+
V : Positive Power Supply. A bypass capacitor should be
used between supply pins and ground. Additional bypass
capacitance may be used between the power supply pins.
DGND(LT6023 -1Only):ReferenceforENPin.Itisnormally
–
+
tied to ground. DGND must be in the range from V to V
+
–3V. If grounded, V must be ≥ 3V. The EN pin threshold
is specified with respect to the DGND pin. DGND cannot
be floated.
SIMPLIFIED SCHEMATIC
+
LT6023-1 ONLY
V
LOAD
6k
2M
CLASS AB
DRIVE
+IN
EN
OUT
6k
–IN
2M
DGND
–
V
60231 SS
60231fa
11
For more information www.linear.com/LT6023
LT6023/LT6023-1
APPLICATIONS INFORMATION
Preserving Low Power Operation
200
150
100
50
A
= 1
V
The proprietary circuitry used in the LT6023 provides an
excellent combination of low power, low offset and en-
hancedslewrate.Normallyanamplifierwithhighersupply
current would be required to achieve this combination of
slew rate and precision. Special care must be taken to
ensure that the low power operation is preserved.
0.0015%
0.01%
The choice of feedback resistor values impacts several
op-amp parameters as noted in the feedback compo-
nents section. It should also be noted that the output of
the amplifier must drive this network. For example, in a
gain of two with a total feedback resistance of 10kΩ and
an output voltage of 14V, the amplifier’s output will need
to supply 1.4mA of current. This current will ultimately
come from a supply.
0
5
10
15
20
25
OUTPUT STEP (V
)
P-P
60231 F01
Figure 1. Settling Time Is Essentially Flat
will lower the slew rate to 0.02V/µs. Note that for these
smaller inputs the LT6023 slew rate approaches the slew
rate more common in traditional micropower amplifiers.
The supply current of the LT6023 increases with large
differential input voltages. Normally, this does not impact
the low power nature of the LT6023 because the ampli-
fier is forcing the two inputs to be at the same potential.
Conditionswhichcausedifferentialinputvoltagetoappear
should be avoided in order to preserve the low power dis-
sipation of the LT6023. This includes but is not limited
to: operation as a comparator, excessive loading on the
output and overdriving the input.
Input Bias Current
The design of the input stage of the LT6023 is more so-
phisticated than that shown in the Simplified Schematic.
It uses both NPN and PNP input differential amplifiers to
sense the input differential voltage. As a result the speci-
fied input bias current may flow in or out of the input pins.
Multiplexer Applications/High Dynamic Input
Impedance
Enhanced Slew Rate
The LT6023 uses a proprietary input stage which provides
an enhanced slew rate without sacrificing input precision
specssuchasinputoffsetvoltage,commonmoderejection
andnoise.TheuniqueinputstageoftheLT6023allowsthe
output to quickly slew to its final value when large signal
input steps are applied. This enhanced slew characteristic
allows the LT6023 to quickly settle the output to 0.0015%
independentofinputstepsizeasshowninFigure1.Typical
micropoweramplifierscannotprocesslargeamplitudesig-
nals with this speed. As shown in the Typical Performance
curves, when the LT6023 is configured in unity gain and
a 10V step is applied to the input the output will slew at
1.4V/µs. In this same configuration, a 5V input step will
slewtheoutputat0.65V/µs.Furthermore,a0.7Vinputstep
The LT6023 has features which make it desirable for
multiplexer applications, such as the application featured
on the front page of this data sheet. When the channels of
the multiplexer are cycled, the output of the multiplexer
can produce large voltage transitions. Normally, bipolar
amplifiers have back-to-back diodes between the inputs,
whichwillturnonwhentheinputtransientvoltageexceeds
0.7V, causing a large transient current to be conducted
from the amplifier output stage back into the input driving
circuitry. The driving circuitry then needs to absorb this
current and settle before the amplifier can settle. The
LT6023 uses5.5V Zener diodes to protect its inputs which
dramaticallyincreasesitsinputimpedancewithinputsteps
as large as 5V.
60231fa
12
For more information www.linear.com/LT6023
LT6023/LT6023-1
APPLICATIONS INFORMATION
V
+
–
V
+
–
V
IN
+
REF
IN
R
G
V
–
IN
R
F
R
F
60231 F02
R
G
V
REF
INVERTING: A = –R /R
NONINVERTING: A = 1 + R /R
G
NONINVERTING: A = 1
V
V
F
G
V
F
OP AMP INPUTS DO NOT MOVE,
BUT ARE FIXED AT DC BIAS
INPUTS MOVE BY AS MUCH AS
INPUTS MOVE BY AS MUCH AS
OUTPUT
V
, BUT THE OUTPUT MOVES
IN
POINT V
MORE
REF
INPUT MUST BE RAIL-TO-RAIL
FOR OVERALL CIRCUIT
RAIL-TO-RAIL PERFORMANCE
INPUT DOES NOT HAVE TO BE
RAIL-TO-RAIL
INPUT MAY NOT HAVE TO BE
RAIL-TO-RAIL
Figure 2. Some Op Amp Configurations Do Not Require Rail-to-Rail Inputs to Achieve Rail-to-Rail Outputs
Achieving Rail-to-Rail Operation without
accuracyislimitedbytheresistorsshownto0.2%. Output
referred, this error becomes 2.7mV. The 30µV input offset
voltage contribution, plus the additional error due to input
bias current times the ~10k effective source impedance,
contribute only negligibly to error.
Rail-to-Rail Inputs
The LT6023 output is able to swing close to each power
supply rail, but the input stage is limited to operating
–
+
between V + 1.2V and V – 1.4V. For many inverting
applications and noninverting gain applications, this is
largely inconsequential. Figure 2 shows the basic op amp
configurations, what happens to the op amp inputs and
whether or not the op amp must have rail-to-rail inputs.
Phase Inversion
–
TheLT6023inputstageislimitedtooperatingbetweenV +
+
1.2VandV –1.4V.Exceedingthiscommonmoderangewill
causetheopenloopgaintodropsignificantly.Foraunitygain
amplifier, the output roughly tracks the input well beyond
the specified input voltage range as shown in Figure 4.
The circuit of Figure 3 shows an extreme example of the
inverting case. The input voltage at the 100k resistor can
swing 13.5V and the LT6023 will output an inverted,
divided-by-ten version of the input voltage. The output
20V
V
A
=
= 1
15V
S
V
INPUT
1.5V
1.ꢀ5V
OUTPUT
SWING
+V LIMIT
CM
1ꢀ.5V SWINGS
WELL OUTSIDE
SUPPLY RAILS
10V
5V/DIV 0V
–10V
OUTPUT
+
–
LT602ꢀ
V
IN
100k, 0.1%
–V LIMIT
CM
10k, 0.1%
–1.5V
–20V
602ꢀ1 F0ꢀ
2ms/DIV
60231 F04
Figure 3 . Extreme Inverting Case: Circuit Operates Properly
with Input Voltage Swing Well Outside Op Amp Supply Rails
Figure 4. No Phase Inversion
60231fa
13
For more information www.linear.com/LT6023
LT6023/LT6023-1
APPLICATIONS INFORMATION
7
changeininputoffsetvoltage.Underlargesignalconditions
with load currents of 1mA the effective change in input
error is just tens of microvolts. In precision applications it
is important to consider amplifier loading when selecting
feedbackresistorvaluesaswellas theloadsonthedevice.
6
5
4
3
2
1
Feedback Components
0
Care must be taken to ensure that the phase shift formed
by the feedback resistors and the parasitic capacitance at
theinvertinginputdoesnotdegradestability.Forexample,
in a gain of +2 configuration, with 1M feedback resistors
and a poorly designed circuit board layout with parasitic
capacitance of 10pF (amplifier + PC board) at the ampli-
fier’s inverting input will cause the amplifier to have poor
phase margin due to a pole formed at 32kHz. An additional
capacitor of 10pF across the feedback resistor as shown
in Figure 6 will eliminate any ringing or oscillation.
–1
–2
–3
–15
–10
–5
0
5
10
15
INPUT COMMON MODE VOLTAGE (V)
60231 F05
Figure 5. Increased Ib Beyond VICM
Howevertheopenloopgainissignificantlyreduced.While
the output roughly tracks the input, the reduction in open
loop gain degrades the accuracy of the LT6023 in this
region. Exceeding the input common mode range also
causesasignificantincreaseininputbiascurrentasshown
in Figure 5. The output of the LT6023 is guaranteed over
thespecifiedtemperaturerangenottophaseinvertaslong
as the input voltage does not exceed the supply voltage.
10pF
1M
–
Preserving Input Precision
1M
LT6023
C
PAR
V
OUT
Preserving the input accuracy of the LT6023 requires
that the application circuit and PC board layout do not
introduce errors comparable to or greater than the offset
of the amplifiers. Temperature differentials across the
input connections can generate thermocouple voltages of
tens of microvolts so the connections of the input leads
should be short, close together and away from heat dis-
sipating components. Air currents across the board can
also generate temperature differentials.
+
V
IN
60231 F06
Figure 6. Stability with Parasitic Input Capacitance
Capacitive Loads
The LT6023 can drive capacitive loads up to 100pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
will further increase the amount of capacitance that the
amplifier can drive.
As is the case with all amplifiers, a change in load
current changes the finite open loop gain. Increased load
current reduces the open loop gain as seen in the Typical
Performance Characteristics section. This results in a
60231fa
14
For more information www.linear.com/LT6023
LT6023/LT6023-1
APPLICATIONS INFORMATION
Shutdown Operation (LT6023 -1)
to disable the LT6023-1 the enable pin can range from
–15V to –14.2V. Figure 7 shows examples of enable pin
control. While in shutdown, the outputs of the LT6023-1
are high impedance.
The LT6023-1 shutdown function has been designed
to be easily controlled from single supply logic or
microcontollers.ToenabletheLT6023-1whenV
=0V
DGND
the enable pin must be driven above 1.7V. Conversely, to
enter the low power shutdown mode the enable pin must
be driven below 0.8V. In a 15V dual supply application
The LT6023-1 is typically capable of coming out of
shutdown within 480µs. This is useful in power sensitive
applications where duty cycled operation is employed
such as wireless mesh networks. In these applications the
system is in low power mode the majority of the time, but
then needs to wake up quickly and settle for an acquisition
before being powered back down to save power.
where V
= –15V, the enable pin must be driven above
DGND
~ –13.3V to enable the LT6023-1. If the enable pin is
driven below –14.2V the LT6023-1 enters the low power
shutdown mode. Note that to enable the LT6023-1 the
enable pin voltage can range from –13.3V to 15V whereas
≥ –13.3V
ON
≥ 1.7V
ON
≥ 1.7V
ON
≥ 1.7V
ON
≥ 0.2V
ON
≤ –14.2V
OFF
≤ 0.8V
OFF
≤ 0.8V
OFF
≤ 0.8V
OFF
≤ –0.7V
OFF
+15
+15
+30
+3V
+1.5
+
+
+
+
+
TO V OR
EN LOGIC
TO V OR
EN LOGIC
TO V OR
EN LOGIC
TO V OR
EN LOGIC
TO V OR
EN LOGIC
EN
EN
EN
EN
EN
+
+
+
+
+
LT6023-1
LT6023-1
LT6023-1
LT6023-1
LT6023-1
DGND
DGND
DGND
DGND
DGND
–
–
–
–
–
–15
–15
–1.5
HIGH VOLTAGE
SPLIT SUPPLIES
HIGH VOLTAGE
SPLIT SUPPLIES
HIGH VOLTAGE
SINGLE SUPPLY
LOW VOLTAGE
SINGLE SUPPLY
LOW VOLTAGE
SPLIT SUPPLIES
60231 F07
Figure 7. LT6023 -1 Enable Pin Control Examples
60231fa
15
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL APPLICATIONS
High Open-Loop Gain Composite Amplifier
4.7pF
10k
680pF
10k
–
V
IN
+
1/2 LT6023
+
V
1/2 LT6023
–
OUT
60231 F02a
Parallel Amplifiers Achieves 93 nV/√Hz Noise, Doubles Output Drive and Lowers Offset
+
V
IN
1/2 LT6023
–
100Ω
V
OUT
+
100Ω
1/2 LT6023
–
60231 F02b
60231fa
16
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL APPLICATIONS
Micropower Reference Divider/Buffer
12V
+
R5
49.9Ω
4.096V
C6
10µF
1/2 LT6023
–
C5
0.1µF
R6
49.9k
LT6656-4.096
IN OUT
R2*
100k
C1
0.1µF
C2
1µF
GND
+
R7
49.9Ω
R1*
100k
2.048V
C4
10µF
1/2 LT6023
–
C3
0.1µF
R3*
100k
*LT5400-2
R4*
100k
60231 F02c
60231fa
17
For more information www.linear.com/LT6023
LT6023/LT6023-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 ±0.05
3.5 ±0.05
2.10 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.125
0.40 ±0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 0509 REV C
4
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
60231fa
18
For more information www.linear.com/LT6023
LT6023/LT6023-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 ±0.10
TYP
6
10
3.00 ±0.10
(4 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 × 45°
CHAMFER
(DD) DFN REV C 0310
5
1
0.25 ±0.05
0.50 BSC
0.75 ±0.05
0.200 REF
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60231fa
19
For more information www.linear.com/LT6023
LT6023/LT6023-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1ꢀꢀ0 Rev G)
0.889 0.127
(.035 .005)
5.10
3.20 – 3.45
(.201)
(.12ꢀ – .13ꢀ)
MIN
3.00 0.102
(.118 .004)
(NOTE 3)
0.52
(.0205)
REF
0.ꢀ5
(.025ꢀ)
BSC
0.42 0.038
(.01ꢀ5 .0015)
TYP
8
7 ꢀ 5
RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .00ꢀ)
DETAIL “A”
0.254
(.010)
0° – ꢀ° TYP
GAUGE PLANE
1
2
3
4
0.53 0.152
(.021 .00ꢀ)
1.10
(.043)
MAX
0.8ꢀ
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
0.101ꢀ 0.0508
(.009 – .015)
(.004 .002)
0.ꢀ5
(.025ꢀ)
BSC
TYP
MSOP (MS8) 0213 REV G
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.00ꢀ") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.00ꢀ") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
60231fa
20
For more information www.linear.com/LT6023
LT6023/LT6023-1
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
04/15 Updated typical slew rate to be consistent throughout the data sheet
Corrected negative supply voltage on front page circuit
1, 4
1
Corrected Input Bias Current vs. Differential Input Voltage graph
8
60231fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
21
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT6023/LT6023-1
TYPICAL APPLICATION
Gain of 11 Instrumentation Amplifier
Improved Load Drive Capability
+
V
R4, 100k
R3, 10k
R2, 10k
R1, 100k
2N3904
–
–
+
1k
V
IN
V
OUT
1/2 LT6023
+
1/2 LT6023
+
V
LT6023
OUT
–
V
INM
–3dB BW = 6kHz
2N3906
V
INP
–
V
R1 TO R4: FOR HIGH DC CMRR USE LT5400-3
60231 TA03a
60231 TA03b
16-Bit DAC with ±1ꢀV Output Swing
2ꢀV Output Step Response
LTC6652-2.5
3.8V TO 5.5V
DC
DC
IN
OUT
1µF
0.1µF
GND
0.1µF
V
OUT
5V/DIV
V
LTC2642
REF
DD
R
FB
15V
INV
–
60231 TA03d
200µs/DIV
V
1/2 LT6023
OUT
V
OUT
+
POWER-ON
RESET
16-BIT DAC
–15V
+
–
CS
16-BIT DATA LATCH
SCLK
DIN
1/2 LT6023
CONTROL
LOGIC
LT5400-2
100kΩ MATCHED
CLR
16-BIT SHIFT REGISTER
RESISTOR NETWORK
GND
60231 TA03c
RELATED PARTS
PART NUMBER
LT6004
DESCRIPTION
COMMENTS
2kHz, 1µA RRIO Op Amp
V
OS
V
OS
V
OS
V
OS
V
OS
V
OS
V
OS
V
OS
: 500µV, GBW: 2kHz, SR: 0.8V/ms, e : 325nV/√Hz, I : 1µA
n s
LT1490A
LTC6256
LT6020
200kHz, 50µA RRIO Op Amp
6.5MHz, 65µA RRIO Op Amp
400kHz, 100µA, 5V/µs Op Amp
500kHz, 150µA Zero-Drift Op Amp
: 500µV, GBW: 200kHz, SR: 0.06V/µs, e : 50nV/√Hz, I : 50µA
n s
: 350µV, GBW: 6.5MHz, SR: 1.8V/µs, e : 20nV/√Hz, I : 65µA
n
s
: 30µV, GBW: 400kHz, SR: 5V/µs, e : 46nV/√Hz, I : 100µA
n
s
LTC2055
LT1783
: 3µV, GBW: 500kHz, SR: 0.5V/µs, I : 150µA
s
1.2MHz, 230µA Over-The-Top RRIO Op Amp
3MHz. 200V/µs Op Amp
: 600µV, GBW: 1.2MHz, SR: 0.4V/µs, e : 20nV/√Hz, I : 230µA
n s
LT1352
: 600µV, GBW: 3MHz, SR: 200V/µs, e : 14nV/√Hz, I : 330µA
n s
LT1492
5MHz, 3V/µs Op Amp
: 180µV, GBW: 5MHz, SR: 3V/µs, e : 16.5nV/√Hz, I : 550µA
n s
LTC5800
LT5400
SmartMesh® Wireless Sensor Network I
Wireless Mesh Networks
0.01% Matching
C
Quad Matched Resistor Network
60231fa
LT 0415 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
22
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT6023
●
●
LINEAR TECHNOLOGY CORPORATION 2015
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