LT3758EDDTRPBF [Linear]
High Input Voltage, Boost, Flyback, SEPIC and Inverting Controller; 高输入电压，升压，反激式， SEPIC和负输出控制器
| 型号： | LT3758EDDTRPBF |
| 厂家： | 
Linear |
| 描述： | High Input Voltage, Boost, Flyback, SEPIC and Inverting Controller |
| 文件： | 总36页 (文件大小：735K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3758
High Input Voltage,
Boost, Flyback, SEPIC and
Inverting Controller
FEATURES
DESCRIPTION
The LT®3758 is a wide input range, current mode, DC/DC
controller which is capable of generating either positive or
negative output voltages. It can be configured as either a
boost, flyback, SEPIC or inverting converter. The LT3758
drives a low side external N-channel power MOSFET from
an internal regulated 7.2V supply. The fixed frequency,
current-mode architecture results in stable operation over
a wide range of supply and output voltages.
n
Wide Input Voltage Range: 5.5V to 100V
n
Positive or Negative Output Voltage Programming
with a Single Feedback Pin
n
Current Mode Control Provides Excellent Transient
Response
n
Programmable Operating Frequency (100kHz to
1MHz) with One External Resistor
Synchronizeable to an External Clock
Output Overvoltage Protection
Low Shutdown Current < 1μA
n
n
The operating frequency of LT3758 can be set with an
external resistor over a 100kHz to 1MHz range, and can
be synchronized to an external clock using the SYNC pin.
A minimum operating supply voltage of 5.5V, and a low
shutdown quiescent current of less than 1μA, make the
LT3758 ideally suited for battery-powered systems.
n
n
Internal 7.2V Low Dropout Voltage Regulator
Programmable Input Undervoltage Lockout with
Hysteresis
Programmable Soft-Start
Small 10-Lead DFN (3mm × 3mm) and
MSOPE Packages
n
n
n
The LT3758 features soft-start and frequency foldback
functions to limit inductor current during start-up and
output short-circuit.
APPLICATIONS
n
Automotive
The device is available in a small 10-lead DFN (3mm ×3mm)
n
Telecom
or MSOPE package.
n
Industrial
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Patents pending.
TYPICAL APPLICATION
12V Output Nonisolated Flyback Power Supply
D1
V
V
12V
1.2A
IN
OUT
36V TO
72V
0.022μF
100V
C
IN
6.2k
2.2μF
100V
X7R
1M
T1
1,2,3
(SERIES)
4,5,6
(PARALLEL)
V
IN
D
SN
SHDN/UVLO
44.2k
SW
LT3758
105k
1%
SYNC
GATE
M1
SENSE
RT
SS
FBX
63.4k
200kHz
VC
GND INTV
CC
1N4148
5.1Ω
0.47μF
C
4.7μF
10V
VCC
10k
10nF
C
47μF
X5R
OUT
15.8k
1%
100pF
0.030Ω
X5R
3758 TA01
3758f
1
LT3758
ABSOLUTE MAXIMUM RATINGS (Note 1)
V , SHDN/UVLO.....................................................100V
SENSE.................................................................... 0.3V
FBX ................................................................. –6V to 6V
Operating Temperature Range
(Note 2) ............................................. –40°C to 125°C
Maximum Junction Temperature........................... 125°C
Storage Temperature Range................... –65°C to 125°C
IN
INTV .................................................... V + 0.3V, 20V
CC
IN
GATE.........................................................INTV + 0.3V
CC
SYNC ..........................................................................8V
VC, SS.........................................................................3V
RT
1.5V
...............................................................................................
PIN CONFIGURATION
TOP VIEW
TOP VIEW
VC
FBX
SS
1
2
3
4
5
10
9
V
IN
VC
FBX
SS
1
2
3
4
5
10
9
V
IN
SHDN/UVLO
SHDN/UVLO
11
8
INTV
CC
11
8
INTV
CC
RT
7
6
GATE
RT
7
GATE
SYNC
SENSE
SYNC
6
SENSE
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
T
= 125°C, θ = 40°C/W
JA
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
10-LEAD (3mm s 3mm) PLASTIC DFN
JMAX
T
= 125°C, θ = 43°C/W
JA
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LT3758EDD#PBF
LT3758IDD#PBF
LT3758EMSE#PBF
LT3758IMSE #PBF
TAPE AND REEL
PART MARKING*
LDNK
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3758EDD#TRPBF
LT3758IDD#TRPBF
LT3758EMSE#TRPBF
LT3758IMSE#TRPBF
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
LDNK
LTDNM
LTDNM
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3758f
2
LT3758
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, SENSE = 0V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Operating Range
5.5
100
V
IN
IN
Shutdown I
SHDN/UVLO = 0V
SHDN/UVLO = 1.15V
0.1
1
6
μA
μA
Q
V
V
Operating I
VC = 0.3V, R = 41.2k
1.6
350
110
–65
2.2
400
120
mA
μA
IN
IN
Q
T
Operating I with Internal LDO Disabled
VC = 0.3V, R = 41.2k, INTV = 7.5V
Q
T
CC
l
SENSE Current Limit Threshold
SENSE Input Bias Current
Error Amplifier
100
mV
μA
Current Out of Pin
l
l
FBX Regulation Voltage (V
FBX Overvoltage Lockout
FBX Pin Input Current
)
FBX > 0V (Note 3)
FBX < 0V (Note 3)
1.569
1.6
1.631
V
V
FBX(REG)
–0.816 –0.800 –0.784
FBX > 0V (Note 4)
FBX < 0V (Note 4)
6
7
8
11
10
14
%
%
FBX = 1.6V (Note 3)
FBX = –0.8V (Note 3)
70
100
10
nA
nA
–10
Transconductance g (ΔI /ΔFBX)
(Note 3)
(Note 3)
230
5
μS
m
VC
VC Output Impedance
MΩ
V
FBX
Line Regulation (ΔV /[ΔV • V
])
FBX > 0V, 5.5V < V < 100V (Notes 3, 6)
0.006
0.005
0.025
0.03
%/V
%/V
FBX
IN
FBX(REG)
IN
FBX < 0V, 5.5V < V < 100V (Notes 3, 6)
IN
VC Current Mode Gain (ΔV /ΔV
)
5.5
V/V
μA
VC
SENSE
VC Source Current
VC Sink Current
VC = 1.5V
–15
FBX = 1.7V
FBX = –0.85V
12
11
μA
μA
Oscillator
Switching Frequency
R = 41.2k to GND, FBX = 1.6V
270
300
100
330
0.4
kHz
kHz
kHz
T
R = 140k to GND, FBX = 1.6V
T
R = 10.5k to GND, FBX = 1.6V
1000
T
RT Voltage
FBX = 1.6V
1.2
220
220
V
ns
ns
Minimum Off-Time
Minimum On-Time
SYNC Input Low
SYNC Input High
SS Pull-Up Current
Low Dropout Regulator
1.5
SS = 0V, Current Out of Pin
–10
7.2
μA
V
l
INTV Regulation Voltage
7
7.4
4.7
CC
INTV Undervoltage Lockout Threshold
Falling INTV
4.3
4.5
0.5
V
V
CC
CC
UVLO Hysteresis
INTV Overvoltage Lockout Threshold
17.5
V
CC
INTV Current Limit
V
V
= 100V
= 20V
11
–1
16
50
22
mA
mA
CC
IN
IN
INTV Load Regulation (ΔV
/V
)
0 < I
< 10mA, V = 8V
–0.4
0.005
500
%
%/V
mV
CC
INTVCC INTVCC
INTVCC
IN
INTV Line Regulation (ΔV
/[ΔV • V
]) 8V < V < 100V
0.02
CC
INTVCC
IN
INTVCC
IN
Dropout Voltage (V – V
)
V
IN
= 6V, I
= 10mA
INTVCC
IN
INTVCC
3758f
3
LT3758
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, SENSE = 0V, unless otherwise noted.
PARAMETER
INTV Current in Shutdown
CONDITIONS
SHDN/UVLO = 0V, INTV = 8V
MIN
TYP
MAX
UNITS
μA
16
CC
CC
INTV Voltage to Bypass Internal LDO
7.5
V
CC
Logic Inputs
l
SHDN/UVLO Threshold Voltage Falling
SHDN/UVLO Input Low Voltage
SHDN/UVLO Pin Bias Current Low
SHDN/UVLO Pin Bias Current High
Gate Driver
V
= INTV = 8V
1.17
1.7
1.22
1.27
0.4
V
V
IN
CC
I
Drops Below 1μA
VIN
SHDN/UVLO = 1.15V
SHDN/UVLO = 1.33V
2
2.5
μA
nA
10
100
t Gate Driver Output Rise Time
C = 3300pF (Note 5), INTV = 7.5V
22
20
ns
ns
V
r
L
CC
t Gate Driver Output Fall Time
f
C = 3300pF (Note 5), INTV = 7.5V
L CC
Gate Output Low (V
)
OL
0.05
Gate Output High (V
)
OH
INTV
V
CC
–0.05
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
LT3758I is guaranteed over the full –40°C to 125°C operating junction
temperature range.
Note 3: The LT3758 is tested in a feedback loop which servos V to the
FBX
reference voltages (1.6V and –0.8V) with the VC pin forced to 1.3V.
Note 2: The LT3758E is guaranteed to meet performance specifications
from the 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
Note 4: FBX overvoltage lockout is measured at V
relative
FBX(OVERVOLTAGE)
to regulated V
.
FBX(REG)
Note 5: Rise and fall times are measured at 10% and 90% levels.
Note 6: SHDN/UVLO = 1.33V when V = 5.5V.
IN
3758f
4
LT3758
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Positive Feedback Voltage
vs Temperature, VIN
Negative Feedback Voltage
vs Temperature, VIN
1.604
1.602
1.600
1.598
1.596
1.594
1.592
1.590
–792
V
= 100V
= 24V
IN
–794
–796
V
= INTV = 5.5V
CC
IN
V
IN
V
= 8V
IN
–798
–800
–802
–804
V
= 8V
IN
V
= 100V
IN
V
= 24V
IN
V
= INTV = 5.5V
CC
IN
–50
0
25
50
75 100 125
–50
0
25
50
75 100 125
–25
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
3758 G01
3758 G02
Quiescent Current
vs Temperature, VIN
Dynamic Quiescent Current
vs Switching Frequency
1.8
1.7
1.6
1.5
1.4
35
30
25
20
15
10
5
C
= 3300pF
GATE
V
= 100V
IN
V
= 24V
IN
V
= INTV = 5.5V
CC
IN
0
–50
0
25
50
75 100 125
–25
0
300 400 500 600 700
1000
800 900
100 200
TEMPERATURE (°C)
SWITCHING FREQUENCY (kHz)
3758 G03
3758 G04
Normalized Switching
Frequency vs FBX
RT vs Switching Frequency
120
100
80
60
40
20
0
1000
100
10
–0.8
0
0.4
0.8
1.2
1.6
–0.4
0
300 400 500 600 700 800 900 1000
100 200
FBX VOLTAGE (V)
SWITCHING FREQUENCY (kHz)
3758 G05
3758 G06
3758f
5
LT3758
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Switching Frequency
vs Temperature
SENSE Current Limit Threshold
vs Temperature
325
320
315
310
305
120
115
110
105
100
95
R
= 41.2k
T
300
295
290
285
280
275
–50
0
25
50
75 100 125
–25
50
–50
0
25
75 100 125
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
3758 G08
3758 G07
SENSE Current Limit Threshold
vs Duty Cycle
SHDN/UVLO Threshold
vs Temperature
1.28
1.26
1.24
1.22
1.20
1.18
115
110
105
100
95
SHDN/UVLO RISING
SHDN/UVLO FALLING
0
20
40
60
80
100
–50
0
25
50
75
125
–25
100
DUTY CYCLE (%)
TEMPERATURE (°C)
3758 G09
3758 G10
SHDN/UVLO Hysteresis Current
vs Temperature
SHDN/UVLO Current vs Voltage
2.4
2.2
2.0
1.8
1.6
50
40
30
20
10
0
–50
0
25
50
75 100 125
0
20
40
60
80
100
–25
SHDN/UVLO VOLTAGE (V)
TEMPERATURE (°C)
3758 G11
3758 G12
3758f
6
LT3758
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
INTVCC Minimum Output
Current vs VIN
INTVCC vs Temperature
7.4
7.3
7.2
7.1
7.0
45
40
35
30
25
20
15
10
5
T
= 125°C
J
INTV = 4.7V
CC
INTV = 6V
CC
0
1
10
IN
100
–50
0
25
50
75 100 125
–25
V
(V)
TEMPERATURE (°C)
3758 G14
3758 G13
INTVCC Load Regulation
INTVCC Line Regulation
7.3
7.2
7.30
7.25
7.20
7.15
7.10
V
= 8V
IN
7.1
7
6.9
6.8
60 70 80 100
90
0
10
15
INTV LOAD (mA)
20
25
0
10 20 30 40 50
(V)
5
V
CC
IN
3758 G16
3758 G15
INTVCC Dropout Voltage
vs Current, Temperature
900
125°C
800
700
600
500
75°C
25°C
400
300
200
100
0
0°C
–50°C
4
6
8
10
0
2
INTV LOAD (mA)
CC
3758 G17
3758f
7
LT3758
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Gate Drive Rise
and Fall Time vs CL
Gate Drive Rise
and Fall Time vs INTVCC
90
80
70
60
50
40
30
20
10
0
30
25
20
15
10
5
INTV = 7.2V
C = 3300pF
L
CC
RISE TIME
RISE TIME
FALL TIME
FALL TIME
0
0
5
10
15
(nF)
20
25
30
9
12
15
3
6
C
INTV (V)
CC
L
3758 G18
3758 G19
FBX Frequency Foldback
Waveforms During Overcurrent
Typical Start-Up Waveforms
V
= 48V
V
= 48V
IN
IN
V
OUT
20V/DIV
V
V
OUT
SW
10V/DIV
50V/DIV
I
+ I
L1A L1B
I
+ I
L1A L1B
1A/DIV
2A/DIV
3758 G20
3758 G21
2ms/DIV
50μs/DIV
SEE TYPICAL APPLICATION: 18V TO 72V INPUT,
24V OUTPUT SEPIC CONVERTER
SEE TYPICAL APPLICATION: 18V TO 72V INPUT,
24V OUTPUT SEPIC CONVERTER
3758f
8
LT3758
PIN FUNCTIONS
VC (Pin 1): Error Amplifier Compensation Pin. Used to
stabilize the voltage loop with an external RC network.
GATE (Pin 7): N-Channel MOSFET Gate Driver Output.
Switches between INTV and GND. Driven to GND when
CC
IC is shut down, during thermal lockout or when INTV
CC
FBX (Pin 2): Positive and Negative Feedback Pin. Re-
ceives the feedback voltage from the external resistor
divider across the output. Also modulates the switching
frequency during start-up and fault conditions when FBX
is close to GND.
is above or below the overvoltage or UV thresholds,
respectively.
INTV (Pin 8): Regulated Supply for Internal Loads and
CC
Gate Driver. Supplied from V and regulated to 7.2V (typi-
IN
cal). INTV must be bypassed with a minimum of 4.7μF
CC
SS (Pin 3): Soft-Start Pin. This pin modulates compensa-
tion pin voltage (VC) clamp. The soft-start interval is set
with an external capacitor. The pin has a 10μA (typical)
pull-up current source to an internal 2.5V rail. The soft-
start pin is reset to GND by an undervoltage condition
capacitor placed close to pin. INTV can be connected
CC
directly to V , if V is less than 17.5V. INTV can also
IN
IN
CC
be connected to a power supply whose voltage is higher
than 7.5V, and lower than V , provided that supply does
IN
not exceed 17.5V.
at SHDN/UVLO, an INTV undervoltage or overvoltage
CC
condition or an internal thermal lockout.
SHDN/UVLO (Pin 9): Shutdown and Undervoltage Detect
Pin. An accurate 1.22V (nominal) falling threshold with
externally programmable hysteresis detects when power
is okayto enable switching. Rising hysteresisis generated
by the external resistor divider and an accurate internal
2μA pull-down current. An undervoltage condition resets
sort-start. Tie to 0.4V, or less, to disable the device and
RT (Pin 4): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND. Do not leave this pin
open.
SYNC (Pin 5): Frequency Synchronization Pin. Used to
synchronize the switching frequency to an outside clock.
If this feature is used, an R resistor should be chosen to
reduce V quiescent current below 1μA.
T
IN
programaswitchingfrequency20%slowerthantheSYNC
pulse frequency. Tie the SYNC pin to GND if this feature is
not used. SYNC is ignored when FBX is close to GND.
V (Pin 10): Input Supply Pin. Must be locally bypassed
IN
with a 0.22μF, or larger, capacitor placed close to the
pin.
SENSE (Pin 6): The Current Sense Input for the Control
Loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor in the source of the NFET.
The negative terminal of the current sense resistor should
be connected to GND plane close to the IC.
Exposed Pad (Pin 11): Ground. This pin also serves
as the negative terminal of the current sense resistor.
The Exposed Pad must be soldered directly to the local
ground plane.
3758f
9
LT3758
BLOCK DIAGRAM
L1
C
DC
D1
V
IN
V
OUT
R4
R3
+
C
IN
L2
C
C
R2
R1
OUT1
OUT2
+
•
FBX
9
10
V
IN
SHDN/UVLO
A10
–
+
I
S1
2.5V
2μA
1.22V
2.5V
INTERNAL
REGULATOR
AND UVLO
I
S3
CURRENT
LIMIT
I
S2
17.5V
VC
10μA
+
–
UVLO
A9
1
7.2V LDO
INTV
Q3
CC
C
VCC
C
C2
8
7
G4
G3
A8
R
C
+
–
C
C1
5V UP
A11
A12
1.72V
4.5V DOWN
–
+
TSD
165˚C
DRIVER
G6
SR1
V
–
+
GATE
C
–
+
G5
G2
A7
R
O
M1
–0.88V
S
Q2
PWM
COMPARATOR
110mV
–
+
1.6V
+
–
A6
A5
A1
SLOPE
RAMP
V
ISENSE
FBX
SENSE
FBX
2
6
+
–
+
–
A2
RAMP
R
SENSE
GND
–0.8V
GENERATOR
1.25V
–
+
11
A3
100kHz-1MHz
OSCILLATOR
G1
1.25V
+
FREQUENCY
FOLDBACK
+
A4
Q1
–
FREQ
PROG
SS
3
SYNC
RT
5
4
3758 F01
C
R
T
SS
Figure 1. LT3758 Block Diagram Working as a SEPIC Converter
3758f
10
LT3758
APPLICATIONS INFORMATION
Main Control Loop
The LT3758 has overvoltage protection functions to
protect the converter from excessive output voltage
overshoot during start-up or recovery from a short-circuit
condition. An overvoltage comparator A11 (with 20mV
hysteresis) senses when the FBX pin voltage exceeds the
positive regulated voltage (1.6V) by 8% and provides a
reset pulse. Similarly, an overvoltage comparator A12
(with 10mV hysteresis) senses when the FBX pin voltage
exceeds the negative regulated voltage (–0.8V) by 11%
and provides a reset pulse. Both reset pulses are sent to
the main RS latch (SR1) through G6 and G5. The power
MOSFET switch M1 is actively held off for the duration of
an output overvoltage condition.
The LT3758 uses a fixed frequency, current mode control
scheme to provide excellent line and load regulation. Op-
eration can be best understood by referring to the Block
Diagram in Figure 1.
ThestartofeachoscillatorcyclesetstheSRlatch(SR1)and
turns on the external power MOSFET switch M1 through
driver G2. The switch current flows through the external
current sensing resistor R
and generates a voltage
SENSE
proportional to the switch current. This current sense
voltage V (amplified by A5) is added to a stabilizing
ISENSE
slope compensation ramp and the resulting sum (SLOPE)
isfedintothepositiveterminalofthePWMcomparatorA7.
When SLOPE exceeds the level at the negative input of A7
(VC pin), SR1 is reset, turning off the power switch. The
level at the negative input of A7 is set by the error amplifier
A1 (or A2) and is an amplified version of the difference
between the feedback voltage (FBX pin) and the reference
voltage (1.6V or –0.8V, depending on the configuration).
In this manner, the error amplifier sets the correct peak
switch current level to keep the output in regulation.
Programming Turn-On and Turn-Off Thresholds with
the SHDN/UVLO Pin
The SHDN/UVLO pin controls whether the LT3758 is
enabled or is in shutdown state. A micropower 1.22V
reference, a comparator A10 and a controllable current
source I allow the user to accurately program the sup-
S1
ply voltage at which the IC turns on and off. The falling
value can be accurately set by the resistor dividers R3
and R4. When SHDN/UVLO is above 0.7V, and below the
TheLT3758hasaswitchcurrentlimitfunction.Thecurrent
sense voltage is input to the current limit comparator A6.
If the SENSE pin voltage is higher than the sense current
1.22V threshold, the small pull-down current source I
(typical 2μA) is active.
S1
limit threshold V
(110mV, typical), A6 will reset
SENSE(MAX)
SR1 and turn off M1 immediately.
The purpose of this current is to allow the user to program
therisinghysteresis.TheBlockDiagramofthecomparator
and the external resistors is shown in Figure 1. The typical
falling threshold voltage and rising threshold voltage can
be calculated by the following equations:
The LT3758 is capable of generating either positive or
negative output voltage with a single FBX pin. It can
be configured as a boost, flyback or SEPIC converter
to generate positive output voltage, or as an inverting
converter to generate negative output voltage. When
configured as a SEPIC converter, as shown in Figure 1,
the FBX pin is pulled up to the internal bias voltage of 1.6V
(R3+R4)
VVIN,FALLING =1.22•
R4
VVIN,RISING = 2µA •R3+ VIN,FALLING
by a voltage divider (R1 and R2) connected from V
to
OUT
For applications where the SHDN/UVLO pin is only used
as a logic input, the SHDN/UVLO pin can be connected
GND. Comparator A2 becomes inactive and comparator
A1 performs the inverting amplification from FBX to VC.
When the LT3758 is in an inverting configuration, the
FBX pin is pulled down to –0.8V by a voltage divider
directly to the input voltage V through a 1k resistor for
IN
always-on operation.
connected from V
to GND. Comparator A1 becomes
OUT
inactive and comparator A2 performs the noninverting
amplification from FBX to VC.
3758f
11
LT3758
APPLICATIONS INFORMATION
INTV Regulator Bypassing and Operation
The LT3758 uses packages with an Exposed Pad for en-
hanced thermal conduction. With proper soldering to the
Exposed Pad on the underside of the package and a full
copper plane underneath the device, thermal resistance
CC
Aninternal,lowdropout(LDO)voltageregulatorproduces
the 7.2V INTV supply which powers the gate driver, as
CC
shown in Figure 1. The LT3758 contains an undervoltage
(θ )willbeabout43°C/WfortheDDpackageand40°C/W
JA
lockout comparator A8 and an overvoltage lockout com-
fortheMSEpackage. Foranambientboardtemperatureof
paratorA9fortheINTV supply.TheINTV undervoltage
CC
CC
T = 70°C and maximum junction temperature of 125°C,
A
(UV) threshold is 4.5V (typical), with 0.5V hysteresis, to
ensurethattheMOSFETshavesufficientgatedrivevoltage
before turning on. The logic circuitry within the LT3758 is
the maximum I
be calculated as:
(I
) of the DD package can
DRIVE DRIVE(MAX)
also powered from the internal INTV supply.
(TJ − TA)
(θJA • VIN)
CC
1.28W
VIN
IDRIVE(MAX)
=
−IQ =
−1.6mA
The INTV overvoltage threshold is set to be 17.5V
CC
(typical) to protect the gate of the power MOSFET. When
The LT3758 has an internal INTV
I
current limit
CC DRIVE
INTV is below the UV threshold, or above the overvolt-
CC
function to protect the IC from excessive on-chip power
age threshold, the GATE pin will be forced to GND and the
dissipation. The I
current limit decreases as the V
DRIVE
IN
IN
soft-start operation will be triggered.
increases(seetheINTV MinimumOutputCurrentvsV
CC
The INTV regulator must be bypassed to ground im-
graphintheTypicalPerformanceCharacteristicssection).
If I reaches the current limit, INTV voltage will fall
CC
mediately adjacent to the IC pins with a minimum of 4.7μF
ceramic capacitor. Good bypassing is necessary to supply
the high transient currents required by the MOSFET gate
driver.
DRIVE
CC
and may trigger the soft-start.
BasedontheprecedingequationandtheINTV Minimum
CC
Output Current vs V graph, the user can calculate the
IN
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
Theon-chippowerdissipationcanbeasignificantconcern
when a large power MOSFET is being driven at a high
maximum MOSFET gate charge the LT3758 can drive at
a given V and switch frequency. A plot of the maximum
IN
Q vs V at different frequencies to guarantee a minimum
G
IN
4.7V INTV is shown in Figure 2.
CC
frequency and the V voltage is high. It is important to
IN
limit the power dissipation through selection of MOSFET
and/oroperatingfrequencysotheLT3758doesnotexceed
its maximum junction temperature rating. The junction
140
300kHz
120
100
80
60
40
20
0
temperature T can be estimated using the following
J
equations:
T = T + P • θ
JA
J
A
IC
1MHz
T = ambient temperature
A
θ
JA
= junction-to-ambient thermal resistance
P = IC power consumption
IC
10
(V)
100
1
V
IN
3758 F02
= V • (I + I )
DRIVE
IN
Q
I = V operation I = 1.6mA
Q
IN
Q
Figure 2. Recommended Maximum QG vs VIN at Different
Frequencies to Ensure INTVCC Higher Than 4.7V
I
= average gate drive current = f • Q
G
DRIVE
f = switching frequency
Q = power MOSFET total gate charge
G
3758f
12
LT3758
APPLICATIONS INFORMATION
AsillustratedinFigure2, atrade-offbetweentheoperating
frequencyandthesizeofthepowerMOSFETmaybeneeded
in order to maintain a reliable IC junction temperature.
Prior to lowering the operating frequency, however, be
sure to check with power MOSFET manufacturers for their
or not the INTV pin is connected to an external voltage
CC
source, it is always necessary to have the driver circuitry
bypassedwitha4.7μFlowESRceramiccapacitortoground
immediately adjacent to the INTV and GND pins.
CC
Operating Frequency and Synchronization
most recent low Q , low R
devices. Power MOSFET
G
DS(ON)
manufacturingtechnologiesarecontinuallyimproving,with
newer and better performance devices being introduced
almost yearly.
The choice of operating frequency may be determined
by on-chip power dissipation, otherwise it is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing gate drive cur-
rent and MOSFET and diode switching losses. However,
lower frequency operation requires a physically larger
inductor. Switching frequency also has implications for
loopcompensation.TheLT3758usesaconstant-frequency
architecture that can be programmed over a 100kHz to
1000kHz range with a single external resistor from the
RT pin to ground, as shown in Figure 1. The RT pin must
have an external resistor to GND for proper operation of
An effective approach to reduce the power consumption
of the internal LDO for gate drive is to tie the INTV pin
CC
to an external voltage source high enough to turn off the
internal LDO regulator.
If the input voltage V does not exceed the absolute
IN
maximum rating of both the power MOSFET gate-source
voltage(V )andtheINTV overvoltagelockoutthreshold
GS
CC
voltage (17.5V), the INTV pin can be shorted directly
CC
to the V pin. In this condition, the internal LDO will be
IN
the LT3758. A table for selecting the value of R for a given
T
turned off and the gate driver will be powered directly
operating frequency is shown in Table 1.
from the input voltage V . With the INTV pin shorted to
IN
CC
Table 1. Timing Resistor (RT) Value
V , however, a small current (around 16μA) will load the
IN
SWITCHING FREQUENCY (kHz)
R (kΩ)
T
INTV in shutdown mode. For applications that require
CC
the lowest shutdown mode input supply current, do not
connect the INTV pin to V .
100
200
300
400
500
600
700
800
900
1000
140
63.4
41.2
30.9
24.3
19.6
16.5
14
CC
IN
In SEPIC or flyback applications, the INTV pin can be
CC
connected to the output voltage V
through a blocking
meets the following
OUT
diode, as shown in Figure 3, if V
conditions:
OUT
1. V
2. V
3. V
< V (pin voltage)
OUT
OUT
OUT
IN
< 17.5V
12.1
10.5
< maximum V rating of power MOSFET
GS
A resistor R can be connected, as shown in Figure 3, to
VCC
limit the inrush current from V . Regardless of whether
OUT
LT3758
D
VCC
R
VCC
V
OUT
INTV
CC
C
VCC
4.7μF
GND
3758 F03
Figure 3. Connecting INTVCC to VOUT
3758f
13
LT3758
APPLICATIONS INFORMATION
TheoperatingfrequencyoftheLT3758canbesynchronized
to an external clock source. By providing a digital clock
signal into the SYNC pin, the LT3758 will operate at the
Soft-Start
The LT3758 contains several features to limit peak switch
currents and output voltage (V ) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
OUT
SYNCclockfrequency.Ifthisfeatureisused,anR resistor
T
should be chosen to program a switching frequency 20%
slowerthanSYNCpulsefrequency.TheSYNCpulseshould
have a minimum pulse width of 200ns. Tie the SYNC pin
to GND if this feature is not used.
High peak switch currents during start-up may occur in
switching regulators. Since V
the feedback loop is saturated and the regulator tries to
chargetheoutputcapacitorasquicklyaspossible,resulting
in large peak currents. A large surge current may cause
inductor saturation or power switch failure.
is far from its final value,
OUT
Duty Cycle Consideration
Switching duty cycle is a key variable defining converter
operation.Assuch,itslimitsmustbeconsidered.Minimum
on-time is the smallest time duration that the LT3758 is
capable of turning on the power MOSFET. This time is
generally about 220ns (typical) (see Minimum On-Time
in the Electrical Characteristics table). In each switching
cycle, the LT3758 keeps the power switch off for at least
220ns (typical) (see Minimum Off-Time in the Electrical
Characteristics table).
The LT3758 addresses this mechanism with the SS pin.
As shown in Figure 1, the SS pin reduces the power
MOSFET current by pulling down the VC pin through
Q2. In this way the SS allows the output capacitor to
charge gradually toward its final value while limiting the
start-up peak currents. The typical start-up waveforms
are shown in the Typical Performance Characteristics
The minimum on-time and minimum off-time and the
switching frequency define the minimum and maximum
switching duty cycles a converter is able to generate:
section. The inductor current I slewing rate is limited by
the soft-start function.
L
Besides start-up (with SHDN/UVLO), soft-start can also
be triggered by the following faults:
Minimum duty cycle = minimum on-time • frequency
Maximum duty cycle = 1 – (minimum off-time • frequency)
1. INTV > 17.5V
CC
Programming the Output Voltage
2. INTV < 4.5V
CC
The output voltage V
shown in Figure 1. The positive and negative V
by the following equations:
is set by a resistor divider, as
3. Thermal lockout
OUT
are set
OUT
Any of these three faults will cause the LT3758 to stop
switching immediately. The SS pin will be discharged by
Q3. When all faults are cleared and the SS pin has been
discharged below 0.2V, a 10μA current source I starts
charging the SS pin, initiating a soft-start operation.
⎛
⎞
R2
R1
VOUT,POSITIVE =1.6V • 1+
⎜
⎝
⎟
⎠
S2
⎛
⎞
R2
R1
VOUT,NEGATIVE = –0.8V • 1+
The soft-start interval is set by the soft-start capacitor
selection according to the equation:
⎜
⎝
⎟
⎠
The resistors R1 and R2 are typically chosen so that
the error caused by the current flowing into the FBX pin
during normal operation is less than 1% (this translates
to a maximum value of R1 at about 158k).
1.25V
10µA
TSS =CSS
•
3758f
14
LT3758
APPLICATIONS INFORMATION
FBX Frequency Foldback
the input voltage, load current, etc.). To compensate the
feedback loop of the LT3758, a series resistor-capacitor
network is usually connected from the VC pin to GND.
Figure 1 shows the typical VC compensation network. For
most applications, the capacitor should be in the range of
470pF to 22nF, and the resistor should be in the range of
5k to 50k. A small capacitor is often connected in paral-
lel with the RC compensation network to attenuate the
VC voltage ripple induced from the output voltage ripple
through the internal error amplifier. The parallel capacitor
usually ranges in value from 10pF to 100pF. A practical
approach to design the compensation network is to start
with one of the circuits in this data sheet that is similar
to your application, and tune the compensation network
to optimize the performance. Stability should then be
checked across all operating conditions, including load
current, input voltage and temperature.
When V
is very low during start-up or a GND fault on
OUT
the output, the switching regulator must operate at low
duty cycles to maintain the power switch current within
the current limit range, since the inductor current decay
rate is very low during switch off time. The minimum on-
time limitation may prevent the switcher from attaining a
sufficiently low duty cycle at the programmed switching
frequency. So, the switch current will keep increasing
through each switch cycle, exceeding the programmed
current limit. To prevent the switch peak currents from
exceeding the programmed value, the LT3758 contains
a frequency foldback function to reduce the switching
frequency when the FBX voltage is low (see the Normal-
ized Switching Frequency vs FBX graph in the Typical
Performance Characteristics section).
During frequency foldback, external clock synchroniza-
tion is disabled to prevent interference with frequency
reducing operation.
SENSE Pin Programming
For control and protection, the LT3758 measures the
Thermal Lockout
powerMOSFETcurrentbyusingasenseresistor(R
)
SENSE
between GND and the MOSFET source. Figure 4 shows a
typical waveform of the sense voltage (V ) across the
sense resistor. It is important to use Kelvin traces between
If LT3758 die temperature reaches 165°C (typical), the
part will go into thermal lockout. The power switch will
be turned off. A soft-start operation will be triggered. The
part will be enabled again when the die temperature has
dropped by 5°C (nominal).
SENSE
the SENSE pin and R
close as possible to the GND terminal of the R
proper operation.
, and to place the IC GND as
SENSE
for
SENSE
Loop Compensation
Due to the current limit function of the SENSE pin, R
SENSE
shouldbeselectedtoguaranteethatthepeakcurrentsense
Loop compensation determines the stability and transient
performance. The LT3758 uses current mode control to
regulate the output which simplifies loop compensation.
Theoptimumvaluesdependontheconvertertopology,the
componentvaluesandtheoperatingconditions(including
voltageV duringsteadystatenormaloperation
SENSE(PEAK)
is lower than the SENSE current limit threshold (see the
Electrical Characteristics table). Given a 20% margin,
V
is set to be 80mV. Then, the maximum
SENSE(PEAK)
V
SENSE
$V
V
SENSE = C v SENSE(MAX)
V
V
SENSE(PEAK)
SENSE(MAX)
t
DT
S
T
S
3758 F04
Figure 4. The Sense Voltage During a Switching Cycle
3758f
15
LT3758
APPLICATIONS INFORMATION
switch ripple current percentage can be calculated using
the following equation:
APPLICATION CIRCUITS
The LT3758 can be configured as different topologies. The
first topology to be analyzed will be the boost converter,
followed by the flyback, SEPIC and inverting converters.
ΔVSENSE
80mV −0.5• ΔVSENSE
χ =
χ
isusedinsubsequentdesignexamplestocalculateinduc-
tor value. ΔV is the ripple voltage across R
Boost Converter: Switch Duty Cycle and Frequency
.
SENSE
SENSE
The LT3758 can be configured as a boost converter for
the applications where the converter output voltage is
higher than the input voltage. Remember that boost con-
verters are not short-circuit protected. Under a shorted
output condition, the inductor current is limited only by
the input supply capability. For applications requiring a
step-up converter that is short-circuit protected, please
refer to the Applications Information section covering
SEPIC converters.
TheLT3758switchingcontrollerincorporates100nstiming
interval to blank the ringing on the current sense signal
immediately after M1 is turned on. This ringing is caused
by the parasitic inductance and capacitance of the PCB
trace, the sense resistor, the diode, and the MOSFET. The
100ns timing interval is adequate for most of the LT3758
applications. In the applications that have very large and
long ringing on the current sense signal, a small RC filter
can be added to filter out the excess ringing. Figure 5
shows the RC filter on the SENSE pin. It is usually suf-
The conversion ratio as a function of duty cycle is
ficient to choose 22Ω for R and 2.2nF to 10nF for C
.
VOUT
VIN 1−D
1
FLT
FLT
=
Keep R ’s resistance low. Remember that there is 65μA
FLT
(typical) flowing out of the SENSE pin. Adding R will
FLT
in continuous conduction mode (CCM).
affect the SENSE current limit threshold:
For a boost converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
V
= 110mV – 65μA • R
SENSE_ILIM
FLT
voltage (V ) and the input voltage (V ). The maximum
OUT
duty cycle (D
minimum input voltage:
IN
) occurs when the converter has the
MAX
M
1
GATE
LT3758
VOUT − VIN(MIN)
R
FLT
SENSE
DMAX
=
VOUT
GND
C
FLT
R
SENSE
Discontinuous conduction mode (DCM) provides higher
conversionratiosatagivenfrequencyatthecostofreduced
efficiencies and higher switching currents.
3758 F05
Figure 5. The RC Filter on the SENSE Pin
Boost Converter: Inductor and Sense Resistor Selection
For the boost topology, the maximum average inductor
current is:
1
IL(MAX) =IO(MAX)
•
1−DMAX
Then, the ripple current can be calculated by:
1
ΔIL = χ •IL(MAX) = χ •IO(MAX)
•
1−DMAX
3758f
16
LT3758
APPLICATIONS INFORMATION
χ
The power MOSFET will see full output voltage, plus a
diode forward voltage, and any additional ringing across
its drain-to-source during its off-time. It is recommended
The constant in the preceding equation represents the
percentage peak-to-peak ripple current in the inductor,
relative to I
.
L(MAX)
to choose a MOSFET whose B
is higher than V
by
VDSS
OUT
Theinductorripplecurrenthasadirecteffectonthechoice
of the inductor value. Choosing smaller values of ΔI
a safety margin (a 10V safety margin is usually sufficient).
L
The power dissipated by the MOSFET in a boost converter is:
requires large inductances and reduces the current loop
gain(theconverterwillapproachvoltagemode).Accepting
2
2
P
= I
RSS
• R
• D
+ 2 • V • I
OUT L(MAX)
FET
• C
L(MAX)
DS(ON)
MAX
larger values of ΔI provides fast transient response and
L
• f/1A
allowstheuseoflowinductances,butresultsinhigherinput
The first term in the preceding equation represents the
conduction losses in the device, and the second term, the
current ripple and greater core losses. It is recommended
χ
that fall within the range of 0.2 to 0.6.
switching loss. C
is the reverse transfer capacitance,
RSS
Givenanoperatinginputvoltagerange,andhavingchosen
the operating frequency and ripple current in the inductor,
theinductorvalueoftheboostconvertercanbedetermined
using the following equation:
which is usually specified in the MOSFET characteristics.
For maximum efficiency, R and C should be
DS(ON)
RSS
minimized. From a known power dissipated in the power
MOSFET, its junction temperature can be obtained using
the following equation:
V
L = IN(MIN) •DMAX
ΔIL • f
T = T + P • θ = T + P • (θ + θ )
J
A
FET
JA
A
FET
JC
CA
T must not exceed the MOSFET maximum junction
J
The peak and RMS inductor current are:
temperature rating. It is recommended to measure the
MOSFETtemperatureinsteadystatetoensurethatabsolute
maximum ratings are not exceeded.
⎛
⎝
⎞
χ
2
IL(PEAK) =IL(MAX) •⎜1+
⎟
⎠
χ2
12
Boost Converter: Output Diode Selection
IL(RMS) =IL(MAX) • 1+
To maximize efficiency, a fast switching diode with low
forward drop and low reverse leakage is desirable. The
peak reverse voltage that the diode must withstand is
equal to the regulator output voltage plus any additional
ringing across its anode-to-cathode during the on-time.
The average forward current in normal operation is equal
to the output current, and the peak current is equal to:
Based on these equations, the user should choose the
inductors having sufficient saturation and RMS current
ratings.
Set the sense voltage at I
to be the minimum of the
L(PEAK)
SENSE current limit threshold with a 20% margin. The
sense resistor value can then be calculated to be:
⎛
⎝
⎞
⎠
χ
2
80mV
IL(PEAK)
ID(PEAK) =IL(PEAK) = ⎜1+
•IL(MAX)
⎟
RSENSE
=
It is recommended that the peak repetitive reverse voltage
rating V is higher than V by a safety margin (a 10V
safety margin is usually sufficient).
RRM
OUT
Boost Converter: Power MOSFET Selection
Important parameters for the power MOSFET include the
The power dissipated by the diode is:
drain-source voltage rating (V ), the threshold voltage
DS
DS(ON)
GS
(V
), the on-resistance (R
), the gate to source
GD
GS(TH)
P = I
D
• V
D
O(MAX)
and gate to drain charges (Q and Q ), the maximum
and the diode junction temperature is:
T = T + P • R
drain current (I
) and the MOSFET’s thermal
D(MAX)
resistances (R and R ).
θJC
θJA
J
A
D
θJA
3758f
17
LT3758
APPLICATIONS INFORMATION
Theoutputcapacitorinaboostregulatorexperienceshigh
RMSripplecurrents, asshowninFigure6. TheRMSripple
current rating of the output capacitor can be determined
using the following equation:
The R to be used in this equation normally includes the
θJA
R
θJC
forthedeviceplusthethermalresistancefromtheboard
to the ambient temperature in the enclosure. T must not
exceed the diode maximum junction temperature rating.
J
DMAX
1−DMAX
Boost Converter: Output Capacitor Selection
IRMS(COUT) ≥IO(MAX)
•
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct output
capacitors for a given output ripple voltage. The effect of
thesethreeparameters(ESR,ESLandbulkC)ontheoutput
voltage ripple waveform for a typical boost converter is
illustrated in Figure 6.
MultiplecapacitorsareoftenparalleledtomeetESRrequire-
ments.Typically,oncetheESRrequirementissatisfied,the
capacitance is adequate for filtering and has the required
RMS current rating. Additional ceramic capacitors in par-
allel are commonly used to reduce the effect of parasitic
inductance in the output capacitor, which reduces high
frequency switching noise on the converter output.
t
t
OFF
ON
$V
COUT
Boost Converter: Input Capacitor Selection
V
OUT
(AC)
The input capacitor of a boost converter is less critical
than the output capacitor, due to the fact that the inductor
is in series with the input, and the input current wave-
form is continuous. The input voltage source impedance
determines the size of the input capacitor, which is typi-
cally in the range of 10μF to 100μF. A low ESR capacitor
is recommended, although it is not as critical as for the
output capacitor.
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
$V
ESR
3758 F06
Figure 6. The Output Ripple Waveform of a Boost Converter
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
and the charging/discharg-
. For the purpose of simplicity, we will choose
2% for the maximum output ripple, to be divided equally
between ΔV and ΔV . This percentage ripple will
The RMS input capacitor ripple current for a boost con-
verter is:
between the ESR step ΔV
ESR
ing ΔV
COUT
I
= 0.3 • ΔI
L
RMS(CIN)
ESR
COUT
change, depending on the requirements of the applica-
tion, and the following equations can easily be modified.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the fol-
lowing equation:
FLYBACK CONVERTER APPLICATIONS
TheLT3758canbeconfiguredasaflybackconverterforthe
applications where the converters have multiple outputs,
high output voltages or isolated outputs. Figure 7 shows
a simplified flyback converter.
0.01• VOUT
ID(PEAK)
The flyback converter has a very low parts count for mul-
tipleoutputs, andwithprudentselectionofturnsratio, can
have high output/input voltage conversion ratios with a
desirable duty cycle. However, it has low efficiency due to
thehighpeakcurrents,highpeakvoltagesandconsequent
power loss. The flyback converter is commonly used for
an output power of less than 50W.
ESRCOUT
≤
For the bulk C component, which also contributes 1% to
the total ripple:
IO(MAX)
COUT
≥
0.01• VOUT • f
3758f
18
LT3758
APPLICATIONS INFORMATION
The flyback converter can be designed to operate either
in continuous or discontinuous mode. Compared to con-
tinuous mode, discontinuous mode has the advantage of
smaller transformer inductances and easy loop compen-
sation, and the disadvantage of higher peak-to-average
current and lower efficiency.
to the number of variables involved. The user can choose
either a duty cycle or a turns ratio as the start point. The
following trade-offs should be considered when select-
ing the switch duty cycle or turns ratio, to optimize the
converter performance. A higher duty cycle affects the
flyback converter in the following aspects:
• Lower MOSFET RMS current I
, but higher
SUGGESTED
SW(RMS)
RCD SNUBBER
D
N :N
P
S
MOSFET V peak voltage
DS
V
IN
+
+
–
SN
+
+
V
C
I
D
C
• Lower diode peak reverse voltage, but higher diode
RMS current I
R
IN
SN
SN
C
L
L
S
OUT
P
D(RMS)
–
D
SN
• Higher transformer turns ratio (N /N )
P
S
I
SW
LT3758
GATE
The choice,
+
DS
–
M
V
D
1
SENSE
=
D+D2 3
R
SENSE
GND
(for discontinuous mode operation with a given D3) gives
the power MOSFET the lowest power stress (the product
of RMS current and peak voltage). The choice,
3758 F07
Figure 7. A Simplified Flyback Converter
D
2
=
Flyback Converter: Switch Duty Cycle and Turns Ratio
D+D2 3
The flyback converter conversion ratio in the continuous
mode operation is:
(for discontinuous mode operation with a given D3) gives
the diode the lowest power stress (the product of RMS
current and peak voltage). An extreme high or low duty
cycleresultsinhighpowerstressontheMOSFETordiode,
and reduces efficiency. It is recommended to choose a
duty cycle between 20% and 80%.
VOUT NS
VIN NP 1−D
D
=
•
Where N /N is the second to primary turns ratio.
S
P
Figure 8 shows the waveforms of the flyback converter
in discontinuous mode operation. During each switching
V
DS
period T , three subintervals occur: DT , D2T , D3T .
S
S
S
S
During DT , M is on, and D is reverse-biased. During
S
I
D2T , M is off, and L is conducting current. Both L and
SW
S
S
P
L currents are zero during D3T .
S
S
I
SW(MAX)
The flyback converter conversion ratio in the discontinu-
ous mode operation is:
I
D
VOUT NS
VIN NP D2
D
=
•
I
D(MAX)
DT
D2T
D3T
S
t
S
S
Accordingtotheprecedingequations,theuserhasrelative
freedom in selecting the switch duty cycle or turns ratio to
suit a given application. The selections of the duty cycle
and the turns ratio are somewhat iterative processes, due
T
S
3758 F08
Figure 8. Waveforms of the Flyback Converter
in Discontinuous Mode Operation
3758f
19
LT3758
APPLICATIONS INFORMATION
Flyback Converter: Transformer Design for
Discontinuous Mode Operation
The primary and second inductor values of the flyback
converter transformer can be determined using the fol-
lowing equations:
The transformer design for discontinuous mode of opera-
tion is chosen as presented here. According to Figure 8,
D2MAX • V2IN(MAX) • η
the minimum D3 (D3 ) occurs when the the converter
LP =
MIN
2•POUT(MAX) • f
has the minimum V and the maximum output power
IN
MIN
(P ). Choose D3
to be equal to or higher than 10%
OUT
D22 •(VOUT + VD)
2•IOUT(MAX) • f
to guarantee the converter is always in discontinuous
mode operation. Choosing higher D3 allows the use of
low inductances but results in higher switch peak current.
LS =
The primary to second turns ratio is:
The user can choose a D
as the start point. Then, the
MAX
maximum average primary currents can be calculated by
the following equation:
NP
NS
LP
LS
=
POUT(MAX)
ILP(MAX) =ISW(MAX)
=
Flyback Converter: Snubber Design
DMAX • VIN(MIN) • η
Transformer leakage inductance (on either the primary or
secondary) causes a voltage spike to occur after the MOS-
FET turn-off. This is increasingly prominent at higher load
currents, where more stored energy must be dissipated.
In some cases a snubber circuit will be required to avoid
overvoltagebreakdownattheMOSFET’sdrainnode.There
are different snubber circuits, and Application Note 19 is
a good reference on snubber design. An RCD snubber is
shown in Figure 7.
where η is the converter efficiency.
If the flyback converter has multiple outputs, P
is the sum of all the output power.
OUT(MAX)
The maximum average secondary current is:
IOUT(MAX)
ILS(MAX) =ID(MAX)
where
D2 = 1 – D
=
D2
The snubber resistor value (R ) can be calculated by the
SN
– D3
MAX
following equation:
the primary and secondary RMS currents are:
NP
V2SN − VSN • VOUT
•
DMAX
NS
I2SW(PEAK) •LLK • f
where V is the snubber capacitor voltage. A smaller
ILP(RMS) = 2•ILP(MAX)
ILS(RMS) = 2•ILS(MAX)
•
•
RSN = 2 •
3
D2
3
SN
V
SN
results in a larger snubber loss. A reasonable V is
2 to 2.5 times of:
SN
According to Figure 8, the primary and secondary peak
currents are:
VOUT •NP
NS
I
I
= I
= I
= 2 • I
SW(PEAK) LP(MAX)
LP(PEAK)
LS(PEAK)
= 2 • I
D(PEAK)
LS(MAX)
3758f
20
LT3758
APPLICATIONS INFORMATION
L
is the leakage inductance of the primary winding,
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
equation:
LK
which is usually specified in the transformer character-
istics. L can be obtained by measuring the primary
LK
inductance with the secondary windings shorted. The
T = T + P • θ = T + P • (θ + θ )
J
A
FET
JA
A
FET
JC
CA
snubber capacitor value (C ) can be determined using
CN
T must not exceed the MOSFET maximum junction
J
the following equation:
temperature rating. It is recommended to measure the
MOSFETtemperatureinsteadystatetoensurethatabsolute
maximum ratings are not exceeded.
VSN
ΔVSN •RCN • f
CCN
=
where ΔV is the voltage ripple across C . A reasonable
SN
CN
Flyback Converter: Output Diode Selection
ΔV is 5% to 10% of V . The reverse voltage rating of
SN
SN
SN
D
should be higher than the sum of V and V
.
SN
IN(MAX)
The output diode in a flyback converter is subject to large
RMS current and peak reverse voltage stresses. A fast
switching diode with a low forward drop and a low reverse
leakage is desired. Schottky diodes are recommended if
the output voltage is below 100V.
Flyback Converter: Sense Resistor Selection
In a flyback converter, when the power switch is turned on,
the current flowing through the sense resistor (I ) is:
SENSE
I
= I
LP
Approximate the required peak repetitive reverse voltage
SENSE
rating V
using:
RRM
Set the sense voltage at I
to be the minimum of
LP(PEAK)
the SENSE current limit threshold with a 20% margin. The
sense resistor value can then be calculated to be:
NS
NP
VRRM
>
• VIN(MAX) + VOUT
80mV
ILP(PEAK)
RSENSE
=
The power dissipated by the diode is:
P = I • V
D
O(MAX)
D
and the diode junction temperature is:
T = T + P • R
Flyback Converter: Power MOSFET Selection
Fortheflybackconfiguration, theMOSFETisselectedwith
J
A
D
θJA
a V rating high enough to handle the maximum V , the
DC
IN
The R to be used in this equation normally includes the
θJA
reflected secondary voltage and the voltage spike due to
R
θJC
forthedevice,plusthethermalresistancefromtheboard
theleakageinductance.ApproximatetherequiredMOSFET
to the ambient temperature in the enclosure. T must not
exceed the diode maximum junction temperature rating.
J
V
DC
rating using:
BV
> V
DSS
DS(PEAK)
Flyback Converter: Output Capacitor Selection
where
The output capacitor of the flyback converter has a similar
operation condition as that of the boost converter. Refer to
the Boost Converter: Output Capacitor Selection section
V
= V
+ V
IN(MAX) SN
DS(PEAK)
The power dissipated by the MOSFET in a flyback con-
verter is:
for the calculation of C
and ESR
.
OUT
COUT
2
2
The RMS ripple current rating of the output capacitors
in discontinuous operation can be determined using the
following equation:
P
C
= I
• R
+ 2 • V
• I
•
FET
RSS
M(RMS)
DS(ON)
DS(PEAK) L(MAX)
• f/1A
The first term in this equation represents the conduction
losses in the device, and the second term, the switching
4−(3•D2)
IRMS(COUT),DISCONTINUOUS ≥ IO(MAX)
•
loss. C
is the reverse transfer capacitance, which is
RSS
3•D2
usually specified in the MOSFET characteristics.
3758f
21
LT3758
APPLICATIONS INFORMATION
Flyback Converter: Input Capacitor Selection
Themaximumdutycycle(D )occurswhentheconverter
MAX
has the minimum input voltage:
The input capacitor in a flyback converter is subject to
a large RMS current due to the discontinuous primary
current. To prevent large voltage transients, use a low
ESR input capacitor sized for the maximum RMS current.
The RMS ripple current rating of the input capacitors in
discontinuous operation can be determined using the
following equation:
VOUT + VD
VIN(MIN)+ VOUT + VD
DMAX
=
SEPIC Converter: Inductor and Sense Resistor Selection
As shown in Figure 1, the SEPIC converter contains two
inductors: L1 and L2. L1 and L2 can be independent, but
can also be wound on the same core, since identical volt-
ages are applied to L1 and L2 throughout the switching
cycle.
POUT(MAX)
4−(3•DMAX
)
IRMS(CIN),DISCONTINUOUS
≥
•
VIN(MIN) • η
3•DMAX
SEPIC CONVERTER APPLICATIONS
For the SEPIC topology, the current through L1 is the
converter input current. Based on the fact that, ideally, the
output power is equal to the input power, the maximum
average inductor currents of L1 and L2 are:
The LT3758 can be configured as a SEPIC (single-ended
primary inductance converter), as shown in Figure 1. This
topology allows for the input to be higher, equal, or lower
than the desired output voltage. The conversion ratio as
a function of duty cycle is:
DMAX
1−DMAX
IL1(MAX) =IIN(MAX) =IO(MAX)
•
VOUT + VD
D
1−D
IL2(MAX) =IO(MAX)
=
VIN
In a SEPIC converter, the switch current is equal to I
L2
average switch current is defined as:
+
L1
in continuous conduction mode (CCM).
I
when the power switch is on, therefore, the maximum
In a SEPIC converter, no DC path exists between the input
and output. This is an advantage over the boost converter
for applications requiring the output to be disconnected
from the input source when the circuit is in shutdown.
1
ISW(MAX) =IL1(MAX) +IL2(MAX) =IO(MAX)
•
1−DMAX
Compared to the flyback converter, the SEPIC converter
has the advantage that both the power MOSFET and the
and the peak switch current is:
output diode voltages are clamped by the capacitors (C ,
⎛
ISW(PEAK) = ⎜1+
⎝
⎞
IN
χ
2
1
•IO(MAX)
•
C
and C ), therefore, there is less voltage ringing
⎟
⎠
DC
OUT
1−DMAX
across the power MOSFET and the output diodes. The
SEPIC converter requires much smaller input capacitors
than those of the flyback converter. This is due to the fact
that, in the SEPIC converter, the inductor L1 is in series
with the input, and the ripple current flowing through the
input capacitor is continuous.
χ
The constant in the preceding equations represents the
percentage peak-to-peak ripple current in the switch, rela-
tive to I
, as shown in Figure 9. Then, the switch
SW
SW(MAX)
ripple current ΔI can be calculated by:
χ
• I
SW(MAX)
ΔI
=
SW
SEPIC Converter: Switch Duty Cycle and Frequency
The inductor ripple currents ΔI and ΔI are identical:
L1
L2
For a SEPIC converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
ΔI = ΔI = 0.5 • ΔI
SW
L1
L2
The inductor ripple current has a direct effect on the
choice of the inductor value. Choosing smaller values of
voltage (V ), the input voltage (V ) and the diode
OUT
IN
forward voltage (V ).
D
3758f
22
LT3758
APPLICATIONS INFORMATION
where
χL1=
ΔI requires large inductances and reduces the current
L
loop gain (the converter will approach voltage mode).
ΔIL1
IL1(MAX)
Accepting larger values of ΔI allows the use of low in-
L
ductances, but results in higher input current ripple and
χ
greater core losses. It is recommended that falls in the
χ2
range of 0.2 to 0.6.
L2
IL2(RMS) =IL2(MAX) • 1+
12
I
where
χL2 =
SW
$I
I
SW = C v SW(MAX)
ΔIL2
IL2(MAX)
I
SW(MAX)
t
DT
S
Basedontheprecedingequations,theusershouldchoose
the inductors having sufficient saturation and RMS cur-
rent ratings.
T
S
3758 F09
Figure 9. The Switch Current Waveform of the SEPIC Converter
In a SEPIC converter, when the power switch is turned on,
the current flowing through the sense resistor (I
the switch current.
) is
SENSE
Givenanoperatinginputvoltagerange,andhavingchosen
the operating frequency and ripple current in the induc-
tor, the inductor value (L1 and L2 are independent) of the
SEPIC converter can be determined using the following
equation:
Set the sense voltage at I
to be the minimum
SENSE(PEAK)
of the SENSE current limit threshold with a 20% margin.
The sense resistor value can then be calculated to be:
VIN(MIN)
80mV
ISW(PEAK)
L1=L2=
•DMAX
RSENSE
=
0.5• ΔISW • f
For most SEPIC applications, the equal inductor values
will fall in the range of 1μH to 100μH.
SEPIC Converter: Power MOSFET Selection
BymakingL1=L2,andwindingthemonthesamecore,the
value of inductance in the preceding equation is replaced
by 2L, due to mutual inductance:
For the SEPIC configuration, choose a MOSFET with a
DC
input voltage by a safety margin (a 10V safety margin is
usually sufficient).
V
rating higher than the sum of the output voltage and
V
L = IN(MIN) •DMAX
ΔISW • f
The power dissipated by the MOSFET in a SEPIC con-
verter is:
Thismaintainsthesameripplecurrentandenergystorage
in the inductors. The peak inductor currents are:
2
P
= I
• R
• D
MAX
FET
SW(MAX)
DS(ON)
2
+ 2 • (V
+ V ) • I
• C
• f/1A
I
I
= I
= I
+ 0.5 • ΔI
+ 0.5 • ΔI
IN(MIN)
OUT
L(MAX)
RSS
L1(PEAK)
L2(PEAK)
L1(MAX)
L2(MAX)
L1
L2
The first term in this equation represents the conduction
losses in the device, and the second term, the switching
The RMS inductor currents are:
loss. C
is the reverse transfer capacitance, which is
RSS
usually specified in the MOSFET characteristics.
χ2
12
L1
For maximum efficiency, R
and C
should be
IL1(RMS) =IL1(MAX) • 1+
DS(ON)
RSS
minimized. From a known power dissipated in the power
3758f
23
LT3758
APPLICATIONS INFORMATION
MOSFET, its junction temperature can be obtained using
the following equation:
C
has nearly a rectangular current waveform. During
DC
the switch off-time, the current through C is I , while
DC
IN
approximately –I flows during the on-time. The RMS
O
T = T + P • θ = T + P • (θ + θ )
J
A
FET
JA
A
FET
JC
CA
rating of the coupling capacitor is determined by the fol-
T must not exceed the MOSFET maximum junction
lowing equation:
J
VOUT + VD
VIN(MIN)
temperature rating. It is recommended to measure the
MOSFETtemperatureinsteadystatetoensurethatabsolute
maximum ratings are not exceeded.
IRMS(CDC) >IO(MAX)
•
A low ESR and ESL, X5R or X7R ceramic capacitor works
SEPIC Converter: Output Diode Selection
well for C .
DC
To maximize efficiency, a fast switching diode with a low
forward drop and low reverse leakage is desirable. The
average forward current in normal operation is equal to
the output current, and the peak current is equal to:
INVERTING CONVERTER APPLICATIONS
The LT3758 can be configured as a dual-inductor invert-
ing topology, as shown in Figure 10. The V
ratio is:
to V
OUT
IN
⎛
ID(PEAK) = ⎜1+
⎝
⎞
χ
2
1
•IO(MAX)
•
⎟
⎠
1−DMAX
VOUT − V
D
1−D
D = −
It is recommended that the peak repetitive reverse voltage
rating V is higher than V + V by a safety
VIN
RRM
OUT
IN(MAX)
in continuous conduction mode (CCM).
margin (a 10V safety margin is usually sufficient).
The power dissipated by the diode is:
C
+
DC
L1
L2
–
V
IN
P = I
• V
D
D
O(MAX)
+
–
+
C
IN
and the diode junction temperature is:
T = T + P • R
C
OUT
V
OUT
+
LT3758
GATE
J
A
D
θJA
D1
M1
The R used in this equation normally includes the R
θJA
θJC
SENSE
for the device, plus the thermal resistance from the board,
R
SENSE
to the ambient temperature in the enclosure. T must not
J
GND
3758 F10
exceed the diode maximum junction temperature rating.
SEPIC Converter: Output and Input Capacitor Selection
Figure 10. A Simplified Inverting Converter
The selections of the output and input capacitors of the
SEPICconverteraresimilartothoseoftheboostconverter.
Please refer to the Boost Converter: Output Capacitor
Selection and Boost Converter: Input Capacitor Selection
sections.
Inverting Converter: Switch Duty Cycle and Frequency
ForaninvertingconverteroperatinginCCM,thedutycycle
ofthemainswitchcanbecalculatedbasedonthenegative
output voltage (V ) and the input voltage (V ).
OUT
IN
Themaximumdutycycle(D )occurswhentheconverter
SEPIC Converter: Selecting the DC Coupling Capacitor
MAX
has the minimum input voltage:
The DC voltage rating of the DC coupling capacitor (C ,
DC
as shown in Figure 1) should be larger than the maximum
input voltage:
VOUT − VD
VOUT − VD − VIN(MIN)
DMAX
=
V
> V
IN(MAX)
CDC
3758f
24
LT3758
APPLICATIONS INFORMATION
Inverting Converter: Inductor, Sense Resistor, Power
MOSFET, Output Diode and Input Capacitor Selections
rating of the coupling capacitor is determined by the fol-
lowing equation:
DMAX
1−DMAX
The selections of the inductor, sense resistor, power
MOSFET, output diode and input capacitor of an inverting
converteraresimilartothoseoftheSEPICconverter.Please
refer to the corresponding SEPIC converter sections.
IRMS(CDC) >IO(MAX)
•
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for C .
DC
Inverting Converter: Output Capacitor Selection
Board Layout
The inverting converter requires much smaller output
capacitors than those of the boost, flyback and SEPIC
convertersforsimilaroutputripples. Thisisduetothefact
that, in the inverting converter, the inductor L2 is in series
with the output, and the ripple current flowing through the
outputcapacitorsarecontinuous.Theoutputripplevoltage
isproducedbytheripplecurrentofL2flowing through the
ESR and bulk capacitance of the output capacitor:
The high speed operation of the LT3758 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC, and is important for thermal management of the
IC. Therefore, it is crucial to achieve a good electrical and
thermal contact between the Exposed Pad and the ground
plane of the board. For the LT3758 to deliver its full output
power, it is imperative that a good thermal path be pro-
vided to dissipate the heat generated within the package.
It is recommended that multiple vias in the printed circuit
board be used to conduct heat away from the IC and into
a copper plane with as much area as possible.
⎛
⎞
1
ΔVOUT(P–P) = ΔI • ESR
+
COUT
⎜
⎟
L2
8• f •COUT
⎝
⎠
After specifying the maximum output ripple, the user can
select the output capacitors according to the preceding
equation.
To prevent radiation and high frequency resonance
problems, proper layout of the components connected
to the IC is essential, especially the power paths with
higher di/dt. The following high di/dt loops of different
topologies should be kept as tight as possible to reduce
inductive ringing:
The ESR can be minimized by using high quality X5R or
X7R dielectric ceramic capacitors. In many applications,
ceramic capacitors are sufficient to limit the output volt-
age ripple.
• In boost configuration, the high di/dt loop contains
the output capacitor, the sensing resistor, the power
MOSFET and the Schottky diode.
The RMS ripple current rating of the output capacitor
needs to be greater than:
I
> 0.3 • ΔI
L2
RMS(COUT)
• In flyback configuration, the high di/dt primary loop
contains the input capacitor, the primary winding, the
power MOSFET and the sensing resistor. The high
di/dt secondary loop contains the output capacitor,
the secondary winding and the output diode.
Inverting Converter: Selecting the DC Coupling Capacitor
The DC voltage rating of the DC coupling capacitor
(C , as shown in Figure 10) should be larger than the
DC
maximum input voltage minus the output voltage (nega-
• In SEPIC configuration, the high di/dt loop contains
the power MOSFET, sense resistor, output capacitor,
Schottky diode and the coupling capacitor.
tive voltage):
V
> V
– V
CDC
IN(MAX) OUT
C
has nearly a rectangular current waveform. During
DC
• In inverting configuration, the high di/dt loop con-
tains power MOSFET, sense resistor, Schottky diode
and the coupling capacitor.
the switch off-time, the current through C is I , while
DC
IN
approximately –I flows during the on-time. The RMS
O
3758f
25
LT3758
APPLICATIONS INFORMATION
Check the stress on the power MOSFET by measuring its
drain-to-sourcevoltagedirectlyacrossthedeviceterminals
(reference the ground of a single scope probe directly to
the source pad on the PC board). Beware of inductive
ringing, which can exceed the maximum specified voltage
rating of the MOSFET. If this ringing cannot be avoided,
and exceeds the maximum rating of the device, either
choose a higher voltage device or specify an avalanche-
rated power MOSFET.
tion and true remote sensing, the top of the output voltage
sensing resistor divider should connect independently to
thetopoftheoutputcapacitor(Kelvinconnection),staying
away from any high dV/dt traces. Place the divider resis-
tors near the LT3758 in order to keep the high impedance
FBX node short.
Figure 11 shows the suggested layout of the 10V to 40V
input, 48V output boost converter in the Typical Applica-
tions section.
Thesmall-signalcomponentsshouldbeplacedawayfrom
highfrequencyswitchingnodes.Foroptimumloadregula-
C
IN
V
IN
C
C
C1
C2
L1
R3
R
C
R1
R2
C
1
2
3
4
5
10
LT3758
9
8
7
6
C
SS
VCC
R
T
1
2
3
4
8
7
6
5
M1
R
S
VIAS TO GROUND
PLANE
D1
C
C
OUT1
OUT2
V
OUT
3758 F11
Figure 11. Suggested Layout of the 10V to 40V Input, 48V Output
Boost Converter in the Typical Applications Section
3758f
26
LT3758
APPLICATIONS INFORMATION
Recommended Component Manufacturers
Some of the recommended component manufacturers
are listed in Table 2.
Table 2. Recommended Component Manufacturers
VENDOR
AVX
COMPONENTS
TELEPHONE
207-282-5111
952-894-9590
WEB ADDRESS
avx.com
Capacitors
BH Electronics
Inductors,
Transformers
bhelectronics.com
Coilcraft
Inductors
Inductors
Diodes
847-639-6400
888-414-2645
805-446-4800
408-822-2126
516-847-3000
coilcraft.com
bussmann.com
diodes.com
Cooper Bussmann
Diodes, Inc
Fairchild
MOSFETs
Diodes
fairchildsemi.com
General Semiconductor
generalsemiconductor.
com
International Rectifier
IRC
MOSFETs, Diodes
Sense Resistors
Tantalum Capacitors
Toroid Cores
Diodes
310-322-3331
361-992-7900
408-986-0424
800-245-3984
617-926-0404
770-436-1300
847-843-7500
602-244-6600
714-373-7334
858-674-8100
619-661-6835
847-956-0667
408-573-4150
562-596-1212
972-243-4321
408-432-8020
847-699-3430
847-696-2000
605-665-9301
800-554-5565
605-886-4385
207-324-4140
631-543-7100
irf.com
irctt.com
Kemet
kemet.com
Magnetics Inc
Microsemi
Murata-Erie
Nichicon
mag-inc.com
microsemi.com
murata.co.jp
nichicon.com
onsemi.com
Inductors, Capacitors
Capacitors
On Semiconductor
Panasonic
Pulse
Diodes
Capacitors
panasonic.com
pulseeng.com
sanyo.co.jp
Inductors
Sanyo
Capacitors
Sumida
Inductors
sumida.com
Taiyo Yuden
TDK
Capacitors
t-yuden.com
component.tdk.com
aavidthermalloy.com
nec-tokinamerica.com
tokoam.com
chemi-com.com
vishay.com
Capacitors, Inductors
Heat Sinks
Thermalloy
Tokin
Capacitors
Toko
Inductors
United Chemi-Con
Vishay/Dale
Vishay/Siliconix
Würth Elektronik
Vishay/Sprague
Zetex
Capacitors
Resistors
MOSFETs
vishay.com
Inductors
we-online.com
vishay.com
Capacitors
Small-Signal Discretes
zetex.com
3758f
27
LT3758
TYPICAL APPLICATIONS
10V to 40V Input, 48V Output Boost Converter
V
IN
10V TO 40V
C
IN
L1
18.7μH
R3
200k
4.7μF
50V
X7R
x2
V
IN
D1
SHDN/UVLO
V
OUT
R4
48V
1A
32.4k
LT3758
R2
464k
M1
SYNC
GATE
SENSE
RT
SS
C
+
OUT1
FBX
R
T
100μF
63V
VC
GND INTV
CC
41.2k
C
300kHz
OUT2
4.7μF
50V
R1
15.8k
C
4.7μF
10V
C
VCC
SS
R
C
10k
R
0.68μF
S
0.012Ω
X7R
x4
C
C
C1
10nF
C2
X5R
100pF
3758 TA02a
C
C
, C
OUT1
: MURATA GRM32ER71H475KA88L
: PANASONIC ECG EEV-TG1J101UP
D1: VISHAY SILICONIX 30BQ060
L1: PULSE PB2020.223
M1: VISHAY SILICONIX SI7460DP
IN OUT2
Efficiency vs Output Current
Start-Up Waveforms
100
V
= 24V
IN
90
80
70
60
V
= 40V
IN
V
OUT
V
= 24V
IN
20V/DIV
50
I
40
30
20
10
L1
2A/DIV
3758 TA02c
V
= 10V
IN
5ms/DIV
0.001
0.1
0.01
OUTPUT CURRENT (A)
1
3758 TA02b
3758f
28
LT3758
TYPICAL APPLICATIONS
12V Output Nonisolated Flyback Power Supply
D1
V
12V
1.2A
OUT
V
IN
36V TO 72V
0.022μF
6.2k
C
IN
100V
1M
2.2μF
100V
X7R
T1
1,2,3
4,5,6
(PARALLEL)
V
IN
(SERIES)
D
SN
SHDN/UVLO
44.2k
SW
LT3758
105k
1%
SYNC
GATE
M1
SENSE
RT
SS
FBX
VC
GND INTV
CC
63.4k
200kHz
1N4148
5.1Ω
0.47μF
100pF
C
4.7μF
10V
VCC
10k
10nF
C
47μF
X5R
OUT
15.8k
1%
0.030Ω
X5R
3758 TA03a
C
: MURATA GRM32ER72A225KA35L
D1: ON SEMICONDUCTOR MBRS360T3G
IN
T1: COILTRONICS VP2-0066
M1: VISHAY SILICONIX SI4848DY
D
SN
: VISHAY SILICONIX ES1D
: MURATA GRM32ER61C476ME15L
C
OUT
Efficiency vs Output Current
Start-Up Waveform
100
90
80
70
60
50
V
= 48V
V
= 48V
IN
IN
V
OUT
5V/DIV
40
30
3758 TA03c
5ms/DIV
20
0.01
0.1
1
10
OUTPUT CURRENT (A)
3758 TA03b
Frequency Foldback Waveforms
When Output Short-Circuit
V
= 48V
IN
V
OUT
5V/DIV
V
SW
50V/DIV
3758 TA03d
20μs/DIV
3758f
29
LT3758
TYPICAL APPLICATIONS
VFD (Vacuum Fluorescent Display) Flyback Power Supply
D1
V
96V
80mA
OUT
C
OUT2
2.2μF
100V
X7R
4
5
6
V
IN
D2
V
64V
OUT2
9V TO 16V
C
22μF
25V
IN
T1
1, 2, 3
40mA
178k
V
IN
C
1μF
100V
X7R
OUT1
SHDN/UVLO
32.4k
M1 SW
LT3758
95.3k
SYNC
GATE
SENSE
RT
SS
FBX
VC
GND INTV
CC
0.47μF
63.4k
200kHz
C
4.7μF
10V
VCC
10k
10nF
0.019Ω
0.5W
47pF
1.62k
X5R
3758 TA04a
C
C
C
: MURATA GRM32ER61E226KE15L
D2: VISHAY SILICONIX ES1C
M1: VISHAY SILICONIX SI4848DY
T1: COILTRONICS VP1-0102
IN
: MURATA GRM31CR72A105K01L
: MURATA GRM32ER72A225KA35L
OUT1
OUT2
D1: VISHAY SILICONIX ES1D
(*PRIMARY = 3 WINDINGS IN PARALLEL)
Start-Up Waveforms
Switching Waveforms
V
= 12V
V
V
V
= 12V
IN
OUT1
OUT2
IN
V
OUT1
1V/DIV
(AC)
V
OUT2
1V/DIV
(AC)
V
,
OUT1
V
V
SW
50V/DIV
OUT2
20V/DIV
3758 TA04b
3758 TA04c
10ms/DIV
2μs/DIV
3758f
30
LT3758
TYPICAL APPLICATIONS
36V to 72V Input, 3.3V Output Isolated Telecom Power Supply
PA1277NL
4
+
-
V
3.3V
3A
OUT
5
6
V
IN
36V TO 72V
0.022μF
100V
C
C
OUT
5.6k
IN
2.2μF
100V
X7R
100μF
6.3V
x3
BAV21W
UPS840
7
8
3
V
OUT
1M
V
IN
FDC2512
GATE
BAS516
10Ω
2
SHDN/UVLO
SENSE
44.2k
4.7μF
25V
X5R
0.03Ω
LT3758
100pF
BAT54CWTIG
100k
47pF
SYNC
INTV
CC
1
4.7μF
25V
X5R
FBX
RT
16k
274Ω
VC
BAS516
SS
GND
63.4k
200kHz
LT4430
PS2801-1
0.47μF
47nF
0.47μF
V
OPTO
IN
2k
2200pF
250VAC
GND COMP
OC 0.5V FB
1μF
22.1k
3758 TA05a
Efficiency vs Output Current
100
90
80
70
60
50
V
= 36V
V
= 72V
IN
IN
V
= 48V
IN
40
30
20
0.01
0.1
1
10
OUTPUT CURRENT (A)
3758 TA05b
3758f
31
LT3758
TYPICAL APPLICATIONS
18V to 72V Input, 24V Output SEPIC Converter
V
IN
18V TO 72V
C
2.2μF
100V
DC
•
C
IN
232k
20k
V
L1A
IN
2.2μF
100V
X7R
X7R, x2
SHDN/UVLO
D1
V
OUT
24V
1A
LT3758
SYNC
GATE
M1
L1B
280k
1%
•
SENSE
0.025Ω
RT
SS
FBX
VC
GND INTV
CC
41.2k
300kHz
20k
1%
C
OUT
10μF
25V
X5R
x4
0.47μF
10k
10nF
C
4.7μF
10V
VCC
X5R
3757 TA06a
C
C
, C : TAIYO YUDEN HMK325B7225KN-T
L1A, L1B: COILTRONICS DRQ127-470
M1: FAIRCHILD SEMICONDUCTOR FDMS2572
D1: ON SEMICONDUCTOR MBRS3100T3G
IN DC
: MURATA GRM31CR61E106KA12L
OUT
Efficiency vs Output Current
Load Step Waveform
100
90
V
= 48V
IN
V
= 18V
IN
80
70
V
OUT
1V/DIV
(AC)
V
= 48V
IN
V
= 72V
IN
60
50
40
0.8A
I
OUT
0.5A/DIV
0.2A
30
20
10
3757 TA06c
500μs/DIV
0.001
0.1
0.01
OUTPUT CURRENT (A)
1
3757 TA06b
Frequency Foldback Waveforms
When Output Short-Circuit
Start-Up Waveform
V
= 48V
V
= 48V
IN
IN
V
OUT
20V/DIV
V
V
OUT
SW
10V/DIV
50V/DIV
IL
IL
IL
IL
1A + 1B
1A + 1B
1A/DIV
2A/DIV
3757 TA06d
3757 TA06e
2ms/DIV
50μs/DIV
3758f
32
LT3758
TYPICAL APPLICATIONS
10V to 40V Input, –12V Output Inverting Converter
V
IN
10V TO 40V
C
4.7μF
50V
DC
C
IN
•
R1
200k
4.7μF
50V
X7R
x2
V
L1A
IN
L1B
X7R, x2
SHDN/UVLO
V
OUT
R2
-12V
2A
32.4k
LT3758
SYNC
GATE
M1
D1
105k
7.5k
SENSE
0.015Ω
RT
SS
FBX
GND INTV
CC
VC
C
OUT
41.2k
300kHz
22μF
16V
X5R
x4
10k
6.8nF
C
4.7μF
10V
VCC
0.47μF
X5R
3757 TA07a
C
C
, C : MURATA GRM32ER71H475KA88L
L1A, L1B: COILTRONICS DRQ127-150
M1: VISHAY SILICONIX SI7850DP
IN DC
: MURATA GRM32ER61C226KE20
OUT
D1: VISHAY SILICONIX 30BQ060
Efficiency vs Output Current
Load Step Waveforms
100
90
V
= 24V
IN
V
= 10V
IN
V
= 24V
80
70
V
IN
OUT
V
= 40V
IN
500mV/DIV
(AC)
60
50
40
1.6A
I
OUT
1A/DIV
0.4A
30
20
10
3757 TA07c
500μs/DIV
0.001
0.1
1
10
0.01
OUTPUT CURRENT (A)
3757 TA07b
Frequency Foldback Waveforms
When Output Short-Circuit
Start-Up Waveforms
V
= 24V
V
OUT
= 24V
IN
IN
V
V
OUT
10V/DIV
5V/DIV
V
SW
20V/DIV
IL
IL
1A + 1B
2A/DIV
IL
IL
1A + 1B
3757 TA07d
3757 TA07e
5A/DIV
5ms/DIV
50μs/DIV
3758f
33
LT3758
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115
TYP
6
0.38 0.10
10
0.675 0.05
3.50 0.05
2.15 0.05 (2 SIDES)
1.65 0.05
3.00 0.10
(4 SIDES)
1.65 0.10
(2 SIDES)
PIN 1
PACKAGE
OUTLINE
TOP MARK
(SEE NOTE 6)
(DD) DFN 1103
5
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
0.25 0.05
0.50
BSC
2.38 0.10
(2 SIDES)
2.38 0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3758f
34
LT3758
PACKAGE DESCRIPTION
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
(.081 p .004)
1.83 p 0.102
(.072 p .004)
2.794 p 0.102
(.110 p .004)
0.889 p 0.127
(.035 p .005)
1
0.29
REF
0.05 REF
5.23
(.206)
MIN
2.083 p 0.102 3.20 – 3.45
(.082 p .004) (.126 – .136)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
DETAIL “B”
10
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.497 p 0.076
(.0196 p .003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
1
2
3
4 5
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
0.50
(.0197)
BSC
MSOP (MSE) 0908 REV C
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3758f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
35
LT3758
TYPICAL APPLICATIONS
8V to 72V Input, 12V Output SEPIC Converter
Efficiency vs Output Current
100
90
V
IN
8V TO 72V
C
2.2μF
100V
DC
C
V
= 8V
IN
•
IN
2.2μF
100V
X7R
x2
154k
V
L1A
IN
80
70
D1
V
= 42V
IN
X7R, x2
MBRS3100T3G
SHDN/UVLO
V
12V
2A
OUT
V
= 72V
IN
32.4k
60
50
40
LT3758
C
OUT1
SYNC
GATE
M1
L1B
+
47μF
20V
x2
Si7456DP
105k
1%
•
SENSE
0.012Ω
30
20
10
RT
SS
FBX
VC
GND INTV
CC
41.2k
300kHz
15.8k
1%
C
OUT2
0.001
0.01
0.1
1
10
10μF
16V
X5R
x4
OUTPUT CURRENT (A)
10k
10nF
3757 TA08b
C
0.47μF
VCC
4.7μF
10V
X5R
3757 TA08a
L1A, L1B: COILTRONICS DRQ127-220
RELATED PARTS
PART NUMBER
LT1619
DESCRIPTION
COMMENTS
300kHz Fixed Frequency, Boost, SEPIC, Flyback Topology; 1.9V ≤ V ≤ 18V
Current Mode PWM Controller
Current Mode DC/DC Controller
IN
LTC1624
V Up to 36V, 300kHz Operating Frequency; Buck, Boost, SEPIC Design,
IN
SO-8 Package
LTC1871, LTC1871-1 No R
™ Boost, Flyback and SEPIC Controller
SENSE
2.5V ≤ V ≤ 36V, Current Mode Control, Programmable Operating
IN
Frequency from 50kHz to 1MHz, 5V Gate Drive
LTC1871-7
LTC1872
LT1930
No R
Boost, Flyback and SEPIC Controller
7V Gate Drive Version of LTC1871
SENSE
TSOT-23 Boost Controller
550kHz Fixed Frequency, Current Mode, 2.5V ≤ V ≤ 9.8V
IN
1.2MHz, SOT-23 Boost Converter
Inverting 1.2MHz, SOT-23 Converter
Positive-to-Negative DC/DC Controller
2.6V ≤ V ≤ 16V, Up to 34V Output, 1A Switch Current
IN
LT1931
Positive-to-Negative DC/DC Conversion, Miniature Design
LTC3704
LT3844
No R
, Current Mode Control, 50kHz to 1MHz
SENSE
High Voltage, Current Mode Switching Regulator
Controller
Wide Input Range: 4V to 60V
LT3757
Boost, Flyback, SEPIC and Inverting Controller
2.9V ≤ V ≤ 40V, Current Mode Control, 100kHz to 1MHz Programmable
IN
Operation Frequency, 3mm × 3mm DFN-10 and MSOP-10E Packages
LT3782A
2-Phase Step-Up DC/DC Controller
6V ≤ V ≤ 40V, 4A Gate Drive, 150kHz to 500kHz
IN
LTC3803, LTC3803-3, Constant-Frequency, Current Mode DC/DC
LTC3803-5 Controller
Wide Input Range; Flyback, Boost and SEPIC Topologies, ThinSOT™
Package
LTC3805, LTC3805-5 Adjustable, Synchronizable Frequency, Current
Mode DC/DC Controller
V
and V
Limited Only by External Components, Used in Flyback, Boost
IN
OUT
and SEPIC Topologies
1.23V ≤ V ≤ 36V, 4V ≤ V ≤ 60V, 120μA I
Q
LT3845
Low I , High Voltage Single Output Synchronous
Q
OUT
IN
Step-Down DC/DC Controller
LTC3872
No R
Boost, Flyback and SEPIC Controller
SENSE
2.75V ≤ V ≤ 9.8V, Current Mode Control, TSOT-23 and 2mm × 3mm
IN
DFN-8 Packages
No R
and ThinSOT are trademarks of Linear Technology Corporation.
SENSE
3758f
LT 0709 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
36
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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