LT3743EFETRPBF [Linear]
High Current Synchronous Step-Down LED Driver with Three-State Control; 高电流同步降压型LED驱动器，三态控制
| 型号： | LT3743EFETRPBF |
| 厂家： | 
Linear |
| 描述： | High Current Synchronous Step-Down LED Driver with Three-State Control |
| 文件： | 总28页 (文件大小：348K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3743
High Current Synchronous
Step-Down LED Driver with
Three-State Control
FEATURES
DESCRIPTION
The LT®3743 is a fixed frequency synchronous step-down
DC/DCcontrollerdesignedtodrivehighcurrentLEDs. The
average current mode controller will maintain inductor
current regulation over a wide output voltage range of 0V
n
PWM Dimming Provides Up to 3000:1 Dimming Ratio
n
CTRL_SEL Dimming Provides Up to 3000:1 Dimming
Ratio Between Any Current
n
Three-State Current Control for Color Mixing
n
6% Current Regulation Accuracy
to (V – 2V). LED dimming is achieved through analog
IN
n
6V to 36V Input Voltage Range
dimming on the CTRL_L, CTRL_H and CTRL_T pins and
with PWM dimming on the PWM and CTRL_SEL pins.
Through the use of externally switched load capacitors,
the LT3743 is capable of changing regulated LED current
levels within several μs, providing accurate, high speed
PWM dimming between two current levels. The switching
frequencyisprogrammablefrom200kHzto1MHzthrough
an external resistor on the RT pin.
n
Average Current Mode Control
n
2μs Maximum Recovery Time Between Any Current
Regulation State
<1μA Shutdown Current
n
n
Output Voltage Regulation and Open-LED Protection
Thermally Enhanced 4mm × 5mm QFN and
n
28-Pin FE Package
Additional features include voltage regulation and
overvoltage protection set with a voltage divider from the
output to the FB pin. Overcurrent protection is provided
and set by the CTRL_H pin.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7199560, 7321203 and others pending.
APPLICATIONS
n
DLP Projectors
High Power Architectural Lighting
n
n
Laser Diodes
TYPICAL APPLICATION
92% Efficient 20A LED Driver
V
IN
10V TO 36V
V
IN
EN/UVLO
PWM
CTRL_SEL
EN/UVLO
PWM
CTRL_SEL
4.7μF
s4
1μF
RT
SYNC
HG
CTRL_SEL
220nF
82.5k
40k
5V/DIV
V
OUT
20A MAXIMUM
CBOOT
1.1μH
2.5mΩ
PWM
5V/DIV
V
REF
SW
LT3743
2nF
HOT
20μF
CTRL_L
V
CC_INT
SW
20V/DIV
1mF
20μF
R
LG
CTRL_H
CTRL_T
40k
1mF
45.3k
GND
+
SENSE
SENSE
I
LED
10A/DIV
–
R
NTC
680k
PWMGH
SS
PWMGL
10nF
3743 TA01b
V
= 24V
20μs/DIV
51k
IN
0A TO 2A TO 20A LED CURRENT STEP
FB
VCL
VCH
1mF
10.0k
3743 TA01a
34k
9nF
34k
9nF
3743f
1
LT3743
ABSOLUTE MAXIMUM RATINGS (Note 1)
V Voltage................................................................40V
CBOOT ......................................................................46V
RT Voltage...................................................................3V
FB Voltage...................................................................3V
SS Voltage ..................................................................6V
SYNC Voltage..............................................................6V
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
IN
EN/UVLO Voltage ........................................................6V
V
Voltage................................................................3V
REF
CTRL_L, CTRL_H, CTRL_T Voltage ............................3V
PWM, CTRL_SEL Voltage ...........................................6V
+
–
SENSE Voltage ........................................................40V
SENSE Voltage ........................................................40V
VCH, VCL Voltage .......................................................3V
SW Voltage ...............................................................40V
TSSOP .............................................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
1
2
LG
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC_INT
GND
GND
3
CBOOT
SW
V
IN
28 27 26 25 24 23
4
EN/UVLO
GND
1
2
3
4
5
6
7
8
22
21
20
19
18
17
16
15
PWMGL
GND
5
HG
V
REF
EN/UVLO
6
PWMGL
GND
CTRL_T
GND
V
GND
REF
7
CTRL_T
GND
PWMGH
PWM
29
GND
29
GND
8
PWMGH
PWM
CTRL_SEL
SYNC
RT
CTRL_H
CTRL_L
SS
CTRL_H
CTRL_L
SS
CTRL_SEL
SYNC
9
10
11
12
13
14
RT
GND
9
10 11 12 13 14
UFD PACKAGE
FB
+
VCH
SENSE
–
VCL
SENSE
28-LEAD (4mm s 5mm) PLASTIC QFN
FE PACKAGE
28-LEAD PLASTIC TSSOP
T
= 125°C, θ = 37°C/W
JMAX
JA
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
T
= 125°C, θ = 30°C/W
JA
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LT3743EUFD#PBF
LT3743IUFD#PBF
LT3743EFE#PBF
LT3743IFE#PBF
TAPE AND REEL
PART MARKING*
3743
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3743EUFD#TRPBF
LT3743IUFD#TRPBF
LT3743EFE#TRPBF
LT3743IFE#TRPBF
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
28-Lead (4mm × 5mm) Plastic QFN
28-Lead (4mm × 5mm) Plastic QFN
28-Lead Plastic TSSOP
3743
LT3743FE
LT3743FE
28-Lead Plastic TSSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3743f
2
LT3743
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VEN/UVLO = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Voltage Range
(Note 2)
6
36
V
V
Pin Quiescent Current (Note 3)
IN
Non-Switching Operation
Shutdown Mode
V
V
= V
EN/UVLO
= 0V, Not Switching
CTRL_SEL
= 0V
1.8
0.1
2.5
1
mA
μA
PWM
l
EN/UVLO Pin Falling Threshold
EN/UVLO Hysteresis
1.49
1.55
130
5.5
1.0
1.0
1.0
1.61
V
mV
μA
V
EN/UVLO Pin Current
V
IN
= 6V, EN/UVLO = 1.45V
PWM Pin Threshold
CTRL_SEL Threshold
V
SYNC Pin Threshold
V
CTRL_H and CTRL_L Pin Control Range
CTRL_H and CTRL_L Pin Current
Reference
0
1.5
V
100
2
nA
l
l
Reference Voltage (V Pin)
With a 67kΩ Resistor from V to GND
1.96
48
2.04
54
V
REF
REF
Inductor Current Sensing
+
–
Full Range SENSE to SENSE
V
or V
= 1.5V
CTRL_L
51
50
10
mV
nA
μA
CTRL_H
+
SENSE Pin Current
–
SENSE Pin Current
With V
~ 4V
OUT
Internal V Regulator (V
Pin)
CC
CC_INT
l
Regulation Voltage
4.7
5
5.2
V
NMOS FET Driver (Note 2)
Non-Overlap time HG to LG
Non-Overlap time LG to HG
Minimum On-Time LG
100
60
ns
ns
ns
ns
ns
(Note 4)
(Note 4)
(Note 4)
50
Minimum On-Time HG
200
60
Minimum Off-Time LG
High Side Driver Switch On-Resistance
Gate Pull Up
Gate Pull Down
V
– V = 5V
CBOOT
SW
2.3
1.3
Ω
Ω
Low Side Driver Switch On-Resistance
Gate Pull Up
Gate Pull Down
V
= 5V
CC_INT
2.5
1.3
Ω
Ω
Switching Frequency
l
f
R = 40kΩ
T
930
200
1000
218
1070
233
kHz
kHz
SW
T
R = 200kΩ
Soft-Start
Charging Current
Voltage Regulation Amplifier
Input Bias Current
5.5
μA
1
nA
μA/V
V
g
200
0.99
m
l
Feedback Regulation Voltage
0.945
1.025
3743f
3
LT3743
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VEN/UVLO = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PWMG Control Signals
CTRL_SEL High to PWMGL Low Delay
CTRL_SEL High to PWMGH High Delay
CTRL_SEL Low to PWMGH Low Delay
CTRL_SEL Low to PWMGL High Delay
PWMGH and PWMGL Pull-up Impedance
PWMGH and PWMGL Pull-Down Impedance
10
150
30
40
200
60
ns
ns
ns
ns
Ω
170
3.2
220
1.75
Ω
Current Control Loop g Amp
m
l
Offset Voltage
–2.75
375
0
2.75
mV
Input Common Mode Range
V
V
0
2
V
V
CM(LOW)
CM(HIGH)
V
Measured from V to V
IN CM
CM(HIGH)
Output Impedance
3.5
475
1.7
MΩ
μA/V
mV/V
g
m
625
Differential Gain
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: The LT3743E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3743I is guaranteed to meet performance specifications over the –40°C
to 125°C operating junction temperature range.
Note 2: The LT3743 will function with a supply voltage as low as 4.5V, but
to keep the gate drive voltages above 4V, the V
pin must be tied to
CC_INT
V
IN
for operation below 6.0V
Note 4: The minimum on and off times are guaranteed by design and are
not tested.
3743f
4
LT3743
TYPICAL PERFORMANCE CHARACTERISTICS
EN/UVLO Threshold (Falling)
EN/UVLO Pin Current
IQ in Shutdown
1.70
1.64
1.58
1.52
1.46
1.40
10
8
0.5
0.4
0.3
0.2
0.1
0
6
–50°C
130°C
130°C
25°C
4
2
25°C
130°C
–50°C
0
6
12
18
24
(V)
30
36
6
12
24
(V)
30
90
90
36
18
0
8
16
24
(V)
32
30
90
40
V
V
IN
V
IN
IN
3743 G01
3743 G02
3743 G03
Quiescent Current (Non-Switching)
VREF Pin Voltage
VREF Current Limit
2.02
2.01
2.00
1.99
1.98
1.97
1.6
1.4
1.2
1.0
0.8
2.0
1.6
1.2
0.8
0.4
0
T
= 25°C
A
V
= 36V
= 6V
IN
T
= 130°C
A
V
IN
T
= –50°C
A
T
T
T
= 25°C
= 130°C
= –50°C
A
A
A
–50
–15
20
55
125
6
12
18
24
36
6
12
18
24
(V)
30
36
TEMPERATURE (°C)
V
(V)
V
IN
IN
3743 G05
3743 G06
3743 G04
Oscillator Frequency
RT Pin Current Limit
Soft-Start Pin Current
7
6
5
4
3
1.5
1.2
0.9
0.6
0.3
0
90
80
70
60
50
40
1.2MHz
900kHz
V
= 36V
= 6V
IN
V
IN
220kHz
–50
–15
20
55
125
–50
–15
20
55
90
125
–50
–15
20
55
125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3743 G09
3743 G07
3743 G08
3743f
5
LT3743
TYPICAL PERFORMANCE CHARACTERISTICS
Internal UVLO
CBOOT-SW UVLO Voltage
V
CC_INT UVLO
5.0
4.5
4.0
3.5
3.0
3.00
2.75
4.00
3.75
2.50
2.25
3.50
3.25
2.00
1.75
1.50
3.00
2.75
2.50
–50
–15
20
55
90
125
–50
–15
20
55
90
125
–50
–15
20
55
90
90
90
125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3743 G10
3743 G11
3743 G12
VCC_INT Load Reg at 12V
Regulated Current vs VFB
Open-LED Threshold
120
100
6.0
5.6
5.2
4.8
4.4
4.0
1.5
1.4
1.3
1.2
1.1
1.0
80
60
–50°C
125°C
40
20
0
800
850
900
V
950
(mV)
1000
1050
0
10
20
30
(mA)
40
50
60
–50
–15
20
55
125
I
TEMPERATURE (°C)
FB
LOAD
3743 G14
3743 G13
3743 G15
Open-LED Timeout
Regulated Sense Voltage
Common Mode Lockout
60
50
2.5
2.0
1.5
1.0
0.5
0
19
17
15
13
11
9
MEASURED V – V
IN
OUT
V
= 6V
IN
40
30
V
= 36V
IN
20
10
0
0
0.5
1.0
1.5
2.0
–50
–15
20
55
125
–50
–15
20
55
90
125
V
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
CTRL
3743 G17
3743 G18
3743 G16
3743f
6
LT3743
TYPICAL PERFORMANCE CHARACTERISTICS
PWM Driver RDS(0N)
HG Driver RDS(ON)
LG Driver RDS(ON)
5
4
3
2
1
0
5
4
3
2
1
0
5
4
3
2
1
0
PMOS
NMOS
PMOS
PMOS
NMOS
NMOS
–50
–15
20
55
90
125
–50
–15
20
55
90
125
–50
–15
20
55
90
125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3743 G19
3743 G20
3743 G21
Non-Overlap PWM Signal Delay
Non-Overlap Time
Minimum On-Time
150
120
90
60
30
0
150
140
130
120
110
100
150
120
90
60
30
0
HG TO LG
PWMGL TO PWMGH
PWMGH TO PWMGL
HG
LG
LG TO HG
–50
–15
20
55
90
125
–50
–15
20
55
90
125
–50
–15
20
55
90
125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3743 G23
3743 G22
3743 G24
Regulation Accuracy
CTRL_H = 1.5V, VIN = 12V
Regulation Accuracy
CTRL_H = 0.75V, VIN = 12V
Minimum Off-Time
300
240
180
120
60
6
4
3
2
HG
2
0
1
0
–2
–4
–6
–1
–2
–3
LG
0
–50
–15
20
55
90
125
0
2.5
5.0
7.5
10
0
2.5
5.0
7.5
10
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
3743 G25
3743 G27
3743 G26
3743f
7
LT3743
TYPICAL PERFORMANCE CHARACTERISTICS
LED Current Waveforms
(90% PWM) 0.5A to 5A
LED Current Waveforms
(2000:1) 3A to 10A
Overcurrent Threshold
120
100
CTRL_SEL
5V/DIV
CTRL_SEL
5V/DIV
SW
20V/DIV
I
LED
80
60
5A/DIV
I
LED
5A/DIV
I
L
40
20
0
I
L
10A/DIV
10A/DIV
3743 G29
3743 G30
40μs/DIV
5μs/DIV
0
0.75
1.5
2.25
3.0
CTRL_H (V)
3743 G28
LED Current Waveforms (3000:1)
Analog Dimming on CTRL_L
COUT(LOW) = 20μF, COUT(HIGH) = 1mF
LED Current Waveforms
(3000:1) 2A to 20A
LED Current Waveforms
(3000:1) 0A to 2A to 20A
PWM
CTRL_SEL
5V/DIV
CTRL_SEL
5V/DIV
5V/DIV
CTRL_L
0.2V/DIV
PWM
5V/DIV
SW
10V/DIV
SW
10V/DIV
CTRL_SEL
5V/DIV
I
I
I
LED
LED
LED
11.1A/DIV
10A/DIV
8A/DIV
3743 G31
3743 G32
3743 G33
20μs/DIV
10μs/DIV
40μs/DIV
Voltage Regulation with 10A
Regulated Inductor Current
Overvoltage Lockout Operation
With Open-Load Condition
Common Mode Lockout (VIN = 7V)
I
L
200mA/DIV
V
V
OUT
2V/DIV
OUT
2V/DIV
V
OUT
I
2V/DIV
I
L
L
200mA/DIV
5A/DIV
3743 G34
3743 G36
3743 G35
100μs/DIV
40ms/DIV
1ms/DIV
3743f
8
LT3743
PIN FUNCTIONS (QFN/TSSOP)
GND (Pins 1, 5, 9, 20, 21, Exposed Pad Pin 29/Pins 2, 7,
11, 22, 27, Exposed Pad Pin 29): Ground. The exposed
pad must be soldered to the PCB.
–
–
SENSE (Pin12/Pin14):SENSE isthenoninvertinginput
oftheaveragecurrentmodelooperroramplifier. Therefer-
encecurrent,basedonCTRL_LorCTRL_Hflowsoutofthe
pin to the output (LED) side of the sense resistor, R .
S
EN/UVLO (Pin 2/Pin 4): Enable Pin. The EN/UVLO pin
acts as an enable pin and turns on the internal current
bias core and subregulators at 1.55V. The pin does
not have any pull-up or pull-down, requiring a voltage
bias for normal part operation. Full shutdown occurs at
approximately 0.5V.
VCL(Pin13/Pin15):VCLprovidesthenecessarycompen-
sationfortheaveragecurrentloopstabilityduringlowlevel
currentregulation.Typicalcompensationvaluesare15kto
80k for the resistor and 2nF to 10nF for the capacitor.
VCH (Pin 14/Pin 16): VCH provides the necessary com-
pensation for the average current loop stability during
highlevelcurrentregulation.Typicalcompensationvalues
are 15k to 80k for the resistor and 2nF to 10nF for the
capacitor.
V
(Pin 3/Pin 5): Buffered 2V Reference Capable of
REF
0.5mA Drive.
CTRL_T (Pin 4/Pin 6): The thermal control input to reduce
theregulatedcurrentlevelforbothcurrentlevels(CTRL_L
and CTRL_H).
RT(Pin15/Pin17):Aresistortogroundsetstheswitching
frequency between 200kHz and 1MHz. When using the
SYNC function, set the frequency to be 20% lower than
the SYNC pulse frequency. This pin is current limited to
60μA. Do not leave this pin open.
CTRL_H (Pin 6/Pin 8): The CTRL_H pin sets the high level
regulated output current and overcurrent. The maximum
inputvoltageisinternallyclampedto1.5V.Theovercurrent
set point is equal to the high level regulated current level
set by the CTRL_H pin with an additional 23mV offset
SYNC (Pin 16/Pin 18): Frequency Synchronization Pin.
+
–
between the SENSE and SENSE pins.
Thispinallowstheswitchingfrequencytobesynchronized
to an external clock. The R resistor should be chosen to
T
CTRL_L (Pin 7/Pin 9): The CTRL_L pin sets the low level
regulatedoutputcurrent.Maximuminputvoltageinternally
clamped to 1.5V.
operate the internal clock at 20% slower than the SYNC
pulse frequency. This pin should be grounded when not
in use.
SS(Pin8/Pin10):Soft-StartPin. Placeanexternalcapaci-
tor to ground to limit the regulated current during start-up
conditions. The SS pin has a 5.5μA charging current. This
pin controls both of the regulated inputs determined by
CTRL_L and CTRL_H.
CTRL_SEL (Pin 17/Pin 19): The CTRL_SEL pin selects
between the high current control, CTRL_H and the low
current control, CTRL_L. When high, the VCH pin is
connected to the error amp output and the PWMGH gate
signal is high. When low, the VCL pin is connected to the
error amp output and the PWMGL gate signal is high. This
pin is used for current level dimming of the LED. This pin
should be grounded when not in use.
FB (Pin 10/Pin 12): Feedback Pin for Overvoltage Protec-
tion. The feedback voltage is 1V. Overvoltage/Open LED
is sensed through the FB pin. When the feedback voltage
exceeds 1.3V, the overvoltage lockout prevents switching
and connects both output capacitors to discharge the
inductor current.
PWM (Pin 18/Pin 20): The input pin for PWM dimming
of the LED. When low, all switching is terminated and the
output caps are disconnected. This pin should be pulled
+
+
SENSE (Pin 11/Pin 13): SENSE is the inverting input of
to V
when not in use.
CC_INT
the average current mode loop error amplifier. This pin is
connected to the external current sense resistor, R . The
voltage drop between SENSE and SENSE referenced to
the voltage drop across an internal resistor produces the
input voltages to the current regulation loop.
PWMGH (Pin 19/Pin 21): The PWMGH output pin drives
the gate of an external FET to connect one of the switch-
ing regulator output capacitors to the load. The output
impedance is approximately 2.5Ω.
S
+
–
3743f
9
LT3743
PIN FUNCTIONS (QFN/TSSOP)
PWMGL (Pin 22/Pin 23): The PWMGL output pin drives
the gate of an external FET to connect one of the switch-
ing regulator output capacitors to the load. The output
impedance is approximately 2.5Ω.
LG (Pin 26/Pin 28): LG is the bottom FET gate drive signal
that controls the state of the low side external power FET.
The driver impedance is 2.5Ω.
V
(Pin 27/Pin 1): A regulated 5V output for charging
CC_INT
the C
HG (Pin 23/Pin 24): HG is the top FET gate drive signal
that controls the state of the high side external power FET.
The driver impedance is 2.5Ω.
capacitor. V
also provides the power for
BOOT
CC_INT
the digital and switching subcircuits. Below 6V V , tie
IN
this pin to the rail. V
is current limited to ≈50mA.
CC_INT
Shutdown operation disables the output voltage drive.
SW (Pin 24/Pin 25): The SW pin is used internally as the
lower rail for the floating high side driver. Externally, this
node connects the two power FETs and the inductor.
V
(Pin 28/Pin 3): Input Supply Pin. Must be locally
IN
bypassed with a 1μF low ESR capacitor to ground.
CBOOT (Pin 25/Pin 26): The CBOOT pin provides a float-
ing 5V regulated supply for the high side FET driver. An
external Schottky diode is required from the V
pin
CC_INT
capacitor when the
to the CBOOT pin to charge the C
switch pin is near ground.
BOOT
3743f
10
LT3743
BLOCK DIAGRAM (QFN Package)
V
IN
V
IN
28
27
V
IN
402k
133k
40μF
EN/UVLO
2
3
INTERNAL
REGUALTOR
AND
V
CC_INT
10μF
V
REF
UVLO
2V REFERENCE
OSCILLATOR
2nF
HIGH SIDE
DRIVER
CBOOT
HG
25
23
24
SYNC
RT
SYNC
82.5k
16
15
–
+
0.1μF
2.2μH
SW
SYNCRONOUS
CONTROLLER
R
Q
S
LG
26
PWM
COMPARATOR
LOW SIDE
DRIVER
+
–
+
SENSE
11
12
R
S
5mΩ
10A LED
1.5V
–
3k
SENSE
g
AMP
= 450μA/V
= 4M
V
OUT
m
m
O
CURRENT
MIRROR
g
1mF
1mF
+
+
R
I
5.5μA
CTRL_H
CTRL_L
= 40μA
OUT
6
7
+
–
40.2k
–
+
FB
10
CTRL BUFFER
10k
SS
8
4
90k
1V
CTRL_T
VCL
100nF
VOLTAGE
REGULATOR
AMP
13
34k
9nF
+
–
VCH
14
34k
9nF
1.3V
OPEN-LED
COMPARATOR
CTRL_SEL
PWM
2.5Ω
2.5Ω
17
18
PWMGL
PWMGH
22
19
3743 F01
Figure 1. Block Diagram
3743f
11
LT3743
OPERATION
The LT3743 utilizes fixed frequency, average current
mode control to accurately regulate the inductor current,
independently from the output voltage. This is an ideal
solution for applications requiring a regulated current
source including driving high current LEDs where the
forward junction voltage can range from 2V to 6V with a
dynamic resistance of 20mΩ to 40mΩ. The control loop
will regulate the current in the inductor at an accuracy
of 6%. For additional operation information, refer to the
Block Diagram in Figure 1.
voltage drop when the control loop regulates the low cur-
rent level. When the CTRL_SEL pin changes to the high
state, a 150ns delay ensures that the output capacitors
are not connected at the same time. After this delay, the
output capacitor for the CTRL_H level is switched in when
PWMGHgoeshighandimmediatelydeliverscurrenttothe
LED. The CTRL_H output capacitor has the voltage drop
of the LED with the regulated current determined by the
analog voltage at the CTRL_H pin. To achieve minimum
transition delay, the inductor is precharged to 70% of the
regulation current level just after the PWMGH pin goes
high. Conversely, when the PWM pin goes low, the induc-
tor is discharged to 70% of the low current level before
normal switching at the low current level commences.
The error amplifier for the average current mode control
loop also has a common mode lockout that regulates the
inductor current so that the error amplifier is never oper-
ated out of the common mode range. The common mode
range is with an output voltage from 0V to 2V below the
The control loop has two independent reference inputs,
determined by the analog control pins, CTRL_H and
CTRL_L. When the CTRL_SEL pin is low, the control loop
uses the reference determined by the CTRL_L pin and
when high, the loop uses the reference determined by
the CTRL_H pin. The analog voltage at the CTRL_L and
CTRL_H pins is buffered and produces a reference volt-
age across an internal resistor. The internal buffers have
a 1.5V clamp on the output, limiting the analog control
range of the CTRL_L and CTRL_H pins from 0V to 1.5V.
The average current mode control loop uses the internal
reference voltage to regulate the inductor current, as a
V supply rail.
IN
Theovercurrentsetpointisequaltothehighlevelregulated
current level set by the CTRL_H pin with an additional
+
–
voltage drop across the external sense resistor, R .
23mV offset between the SENSE and SENSE pins. The
overcurrent is limited on a cycle-by-cycle basis; shutting
switching down once the overcurrent level is reached.
Overcurrent is not soft started.
S
In many applications, a rapid transition between the two
regulatedcurrentstatesisdesirabletoprovidebackground
LED color mixing for pure colors in an RGB projector or
display.Forthispurpose,pulsewidthmodulationdimming
can be achieved with both the PWM and CTRL_SEL pins.
When the PWM pin is low, the regulated current in the
inductor is zero and both output capacitors are discon-
nected. When the PWM pin is high, and the CTRL_SEL pin
is low, the regulated current in the inductor is determined
by the analog voltage at the CTRL_L pin. When the PWM
and CTRL_SEL pins are both high, the regulated current
in the inductor is determined by the analog voltage at the
CTRL_H pin.
The output voltage may be limited with a resistor divider
from the output back to the FB pin. The reference at the
FB pin is 1.0V. If the output voltage level is high enough
to engage the voltage loop, the regulated inductor current
will be reduced so that the output voltage is limited. If the
voltage at the FB pin reaches 1.3V (30% higher than the
regulation level), an internal open-LED flag is set, shutting
down switching for 13μs and switching in both output
capacitors to fully drain the inductor’s current.
During start-up, the SS pin is held low until the first time
the PWM pin goes high. Once the PWM signal goes high,
the capacitor at the SS pin is charged with a 10μA current
source. The internal buffers for the CTRL_L and CTRL_H
signals are limited by the voltage at the SS pin, slowly
ramping the regulated inductor current to the current de-
termined by the voltage at the CTRL_H or CTRL_L pins.
The LT3743 uses a unique switched output capacitor
topology and two independent compensation networks
to transition between the two regulated current states in
less than 2μs. When the CTRL_SEL pin is low and the
PWM pin is high, the PWMGL output pin is high, switch-
ing in the output capacitor for the CTRL_L current level.
The CTRL_L output capacitor stores the LED forward
3743f
12
LT3743
APPLICATIONS INFORMATION
Programming Inductor Current
Inductor Selection
The analog voltage at the CTRL_L and CTRL_H pins is
The recovery time between regulated states is critical
to maintaining accurate control of the LED current. For
this reason, sizing the inductor to have no less than 30%
peak-to-peak ripple will provide excellent recovery time
with reasonable ripple. The overcurrent set point is equal
to the high level regulated current level set by the CTRL_H
buffered and produces a reference voltage, V
, across
CTRL
aninternalresistor.Theregulatedaverageinductorcurrent
is determined by:
VCTRL
IO =
30•RS
+
pin with an additional 23mV offset between the SENSE
–
and SENSE pins. The saturation current for the inductor
where R is the external sense resistor and I is the aver-
S
O
should be at least 20% higher than the maximum regu-
lated current. The following equation sizes the inductor
to achieve a reasonable recovery time while minimizing
the inductor ripple:
age inductor current, which is equal to the LED current.
Figure 2 shows the LED current vs R . The maximum
S
power dissipation in the resistor will be:
2
0.05V
RS
(
)
2
⎛
⎜
⎞
⎟
V • V – V
F
0.3• fS •IO • V
PRS =
( ) ( )
IN
F
L =
⎜
⎝
⎟
⎠
IN
Table 1 contains several resistors values, the correspond-
ing maximum current and power dissipation in the sense
whereV istheLEDforwardvoltagedrop,I isthemaximum
F
O
regulated current in the inductor and f is the switching
resistor. Figure 3 shows the power dissipation in R .
S
S
frequency. Using this equation, the inductor will have ap-
Table 1. Sense Resistor Values
MAXIMUM LED
proximately 15% ripple at maximum regulated current.
CURRENT (A)
RESISTOR, R (mΩ) POWER DISSIPATION (W)
S
Table 2. Recommended Inductor Manufacturers
1
5
50
10
5
0.05
0.25
0.5
VENDOR
Coilcraft
WEBSITE
www.coilcraft.com
www.sumida.com
www.vishay.com
www.we-online.com
www.nec-tokin.com
10
25
Sumida
2
1.25
Vishay
Würth Electronics
NEC-Tokin
30
25
1.4
1.2
20
15
1.0
10
5
0.8
0.6
0.4
0.2
0
0
2
4
6
8
R
10 12 14 16 18 20
(mΩ)
S
3743 F02
0
0
6
2
4
8
10 12 14 16 18 20
Figure 2. RS Value Selection for LED Current
R
(mΩ)
S
3743 F03
Figure 3. Power Dissipation in RS
3743f
13
LT3743
APPLICATIONS INFORMATION
Switching MOSFET Selection
can be optimized by selecting a high side MOSFET with
higher R and lower C . The power loss in the high
side MOSFET can be approximated by:
P = (ohmic loss) + (transition loss)
LOSS
DS(ON)
GD
When selecting switching MOSFETs, the following pa-
rameters are critical in determining the best devices for
a given application: total gate charge (Q ), on-resistance
G
(R
), gate to drain charge (Q ), gate-to-source
DS(ON)
GD
⎛
⎞
V +R I
(
)
•IO RDS(ON) •ρT
F
D O
2
charge (Q ), gate resistance (R ), breakdown voltages
GS
G
P
≈
+
⎜
⎟
LOSS
V
(maximumV andV )anddraincurrent(maximumI ).
⎝
⎠
IN
GS
DS
D
The following guidelines provide information to make the
⎛
⎝
⎞
⎠
V •I
⎛
⎞
⎠
IN OUT
selection process easier.
• QGD +QGS • 2•R +R +R
• f
S
(
) (
)
(
)
G
PU
PD
⎜
⎝
⎟
⎜
⎟
5V
BothoftheswitchingMOSFETsneedtohavetheirmaximum
rated drain currents greater than the maximum inductor
current. The following equation calculates the peak induc-
tor current:
whereρ isatemperature-dependanttermoftheMOSFET’s
T
on-resistance.Using70°Casthemaximumambientoperat-
ing temperature, ρ is roughly equal to 1.3. R and R
T
PD
PU
are the LT3743 high side gate driver output impedance,
2
⎛
⎜
⎞
⎟
V • V +R I – V +R I
D O
(
D O ) (
)
1.3ꢀ and 2.3ꢀ respectively.
IN
F
F
IMAX =IO +
2• fS •L • V
⎜
⎝
⎟
⎠
IN
A good approach to MOSFET sizing is to select a high
side MOSFET, then select the low side MOSFET. The trade-
whereV istheinputvoltage, Listheinductancevalue, V
off between R
, Q , Q and Q for the high side
IN
F
DS(ON) G GD GS
MOSFET is shown in the following example. V is equal
is the LED forward voltage drop, R is the dynamic series
D
O
resistance of the LED, I is the regulated output current
to 4V. Comparing two N-channel MOSFETs, with a rated
O
and f is the switching frequency. During MOSFET selec-
V
of 40V and in the same package, but with 8× different
S
DS
tion,noticethatthemaximumdraincurrentistemperature
dependant. Most data sheets include a table or graph of
the maximum rated drain current vs temperature.
R
and 4.5× different Q and Q :
DS(ON) G GD
M1: R
GS
= 2.3mꢀ, Q = 45.5nF,
G
DS(ON)
Q
= 13.8nF, Q = 14.4nF, R = 1Ω
GD G
The maximum V should be selected to be higher than
DS
M2: R
GS
= 18mꢀ, Q = 10nF,
G
GD G
DS(ON)
the maximum input supply voltage (including transient)
for both MOSFETs. The signals driving the gates of the
switching MOSFETs have a maximum voltage of 5V with
respect to the source. During start-up and recovery con-
ditions, the gate drive signals may be as low as 3V. To
ensure that the LT3743 recovers properly, the maximum
threshold should be less than 2V. For a robust design,
Q
= 4.5nF, Q = 3.1nF, R = 3.5Ω
PowerlossforbothMOSFETsisshowninFigure4.Observe
thatwhiletheR ofM1iseighttimeslower,thepower
DS(ON)
loss at low input voltages is equal, but four times higher
at high input voltages than the power loss for M2.
AnotherpowerlossrelatedtoswitchingMOSFETselection
isthepowerlosttodrivingthegates.Thetotalgatecharge,
select the maximum V greater than 7V.
GS
Q ,mustbechargedanddischargedeachswitchingcycle.
Power losses in the switching MOSFETs are related to
G
The power is lost to the internal LDO within the LT3743.
the on-resistance, R
; the transitional loss related
DS(ON)
The power lost to the charging of the gates is:
to the gate resistance, R ; gate-to-drain capacitance, Q
G
GD
and gate-to-source capacitance, Q . Power loss to the
on-resistance is an Ohmic loss, I R
GS
P
≈ (V – 5V) • (Q
+ Q ) • f
GLG GHG S
LOSS_LDO
IN
2
, and usually
DS(ON)
where Q
is the low side gate charge and Q
is the
GLG
GHG
dominates for input voltages less than ~15V. Power losses
to the gate capacitance dominate for voltages greater than
~12V. When operating at higher input voltages, efficiency
high side gate charge.
3743f
14
LT3743
APPLICATIONS INFORMATION
7
6
5
2.5
2.0
1.5
1.0
0.5
0
TOTAL
4
3
TOTAL
TRANSITIONAL
TRANSITIONAL
OHMIC
2
1
OHMIC
0
10
20
40
10
20
INPUT VOLTAGE (V)
30
0
30
0
40
INPUT VOLTAGE (V)
3743 F04a
3743 F04b
Figure 4a. Power Loss Example for M1
Figure 4b. Power Loss Example for M2
Figure 4
Whenever possible, utilize a switching MOSFET that
minimizes the total gate charge to limit the internal power
dissipation of the LT3743.
be used as the input capacitance. Use only type X5R or
X7R capacitors as they maintain their capacitance over a
wide range of operating voltages and temperatures.
Table 3. Recommended Switching FETs
Output Capacitor Selection
V
V
I
D
IN
OUT
(V) (V) (A)
TOP FET
BOTTOM FET MANUFACTURER
TheoutputcapacitorsneedtohaveverylowESR(equivalent
seriesresistance)toallowtheLEDcurrenttorampquickly.
A minimum of 50μF/A of load current should be used in
most designs. The capacitors also need to be surge rated
to the maximum output current. To achieve the lowest
possible ESR, several low ESR capacitors should be used
in parallel. Many applications benefit from the use of high
density POSCAP capacitors, which are easily destroyed
when exposed to overvoltage conditions. To prevent this,
select POSCAP capacitors that have a voltage rating that
is at least 50% higher than the regulated voltage
8
4
4
5-10 RJK0365DPA RJK0330DPB Renesas
www.renesas.com
24
5
RJK0368DPA RJK0332DPB
24 2-4 20 RJK0365DPA RJK0346DPA
12 2-4 10 FDMS8680 FDMS8672AS Fairchild
www.fairchildsemi.com
36
24
4
4
20
40
Si7884BDP
SiR470DP Vishay
www.vishay.com
PSMN4R0- RJK0346DPA NXP/Philips
30YL www.nxp.com
Input Capacitor Selection
The input capacitor should be sized at 4μF for every 1A
of output current and placed very close to the high side
MOSFET. A small 1μF ceramic capacitor should be placed
C
Capacitor Selection
BOOT
The C
capacitor must be sized less than 220nF and
BOOT
near the V and ground pins of the LT3743 for optimal
more than 50nF to ensure proper operation of the LT3743.
Use 220nF for high current switching MOSFETs with high
gate charge.
IN
noise immunity. The input capacitor should have a ripple
currentratingequaltohalfofthemaximumoutputcurrent.
ItisrecommendedthatseverallowESRceramiccapacitors
3743f
15
LT3743
APPLICATIONS INFORMATION
60
50
V
Capacitor Selection
CC_INT
The bypass capacitor for the V
pin should be larger
CC_INT
than 5μF for stability and has no ESR requirement. It
is recommended that the ESR be lower than 50mΩ to
reduce noise within the LT3743. For driving MOSFETs
with gate charges larger than 10nC, use 0.5μF/nC of total
gate charge.
40
30
20
10
0
LED Current Dimming
TheLT3743providesthecapabilityoftraditionalzerotofull
current PWM dimming as well as PWM dimming between
two regulated LED current states. When the PWM signal
is low, no switching occurs and the output capacitors
are disconnected from ground. When PWM is high and
CTRL_SEL is low, the inductor current is regulated to the
low current state. In this state, the PWMGL signal is high,
connecting the output capacitor for the low regulated
current state. When PWM and CTRL_SEL are both high,
the inductor current is regulated to the high current state.
In this state, the PWMGH signal is high, connecting the
output capacitor for the high regulated current state. The
transition time between each of the regulated inductor
0
0.5
1.0
1.5
2.0
V
(V)
CTRL
3743 F06
Figure 6. LED Current vs CTRL Voltage
V
REF
LT3743
CTRL_L
R2
R1
3743 F07
Figure 7. Analog Control of LED Current
currents is determined by the inductor size, V and V .
IN
O
Due to the use of the switched output capacitors, the LED
current will begin to flow within 130ns of the transition on
the CTRL_SEL pin. Figure 8 shows the LED and inductor
current waveforms with the various states of the control
signals.
t
PWM
t
ON(PWM)
PWM
CTRL_SEL
To adjust the regulated LED current for the two control
states, an analog voltage is applied to the CTRL_L and
CTRL_Hpins.Figure6showstheregulatedvoltageacross
the sense resistor for control voltages up to 2V. Figure 7
shows the CTRL_L voltage created by a voltage divider
INDUCTOR
CURRENT
PWMGH
PWMGL
from V
to ground. When sizing the resistor divider,
REF
please be aware that the V
pin is current limited to
REF
500μA. Above 1.5V, the control voltage has no effect on
the regulated LED current.
ICTRL_H
LED
CURRENT
ICTRL_L
3743 F08
For the widest dimming range, use the highest switching
frequency possible and lowest PWM frequency. For con-
figuration with the maximum PWM range, please contact
factory for optimized component selection.
Figure 8. LED Current vs CTRL Voltage
3743f
16
LT3743
APPLICATIONS INFORMATION
MOSFET Selection for the Switched Output Capacitors
If the voltage between the low state and the high state is
verylarge(greaterthanthethresholdoftheMOSFET)then
thecapacitormayonceagainbedischarged.Toaccountfor
this, choose a MOSFET that has a threshold greater than
the voltage difference. If the voltage difference exceeds
1.5V, use the circuit shown in Figure 11. The circuit shown
will keep the capacitor from discharging to a voltage dif-
TheMOSFETsusedfortheswitched-outputcapacitorneed
to also handle the maximum regulated current while the
capacitor is charged. The output drivers on the PWMGH
and PWMGL pins have a pull-up impedance of 3.2Ω and
a pull-down impedance of 1.75Ω. This provides adequate
gate drive for 30nC MOSFETs without the need for an
additional gate driver. If the LED forward resistance and
the difference between the two regulated currents is large
enough,thentwoMOSFETsarerequiredtopreventthebody
diode of the MOSFET from conducting and discharging
the capacitor for the high current state. Figure 9 shows
the output capacitor for the high current regulation state
discharged with the body diode when a single MOSFET
is used. Figure 10 shows the application circuit with a
drain-to-drain configuration for the high current output
capacitor. In this configuration, the body diode of the up-
per MOSFET blocks conduction and prevents discharge
of the high current output capacitor.
ference of approximately 2V + V .
TH
I
= 1A
= 20A
CTRL_L
I
CTRL_H
V = 3V
F
D
R
= 200mΩ
PWMGH
LT3743
PWMGL
V
CC_INT
3.01k
2V
I
= 1A
= 20A
CTRL_L
2k
I
CTRL_H
3743 F11
V = 3V
D
F
3.8V
3.04V
R
= 40mΩ
Figure 11. Application for Large Differences
in Regulated Currents
0V
5V
PWMGH
OFF
LT3743
PWMGL
Board and Interconnect Inductance
The board and interconnect inductance from the output
capacitors to the load also determine the rate of change
in load (LED) current. The rate of change in load current
will be:
ON
3743 F09
Figure 9. Body Diode of High Current FET
Discharges the Output Capacitor
VHIGH – VLOW
dIL
dt
I
= 1A
= 20A
CTRL_L
=
I
CTRL_H
LBOARD
V = 3V
D
F
3.8V
3.04V
R
= 40mΩ
where dI /dt is the rate of change in the load current,
L
V
HIGH
is the output voltage when the inductor is regulated
at the high level, and V
is the output voltage when the
LOW
PWMGH
inductor is regulated at the low state. When measuring the
LED current do not use a current probe. The core material
used in most probes adds inductance and slows the rise
time of the LED current. Instead, when measuring the
current, use a sense resistor.
LT3743
PWMGL
3743 F10
Figure 10. With a Drain-to-Drain Configuration, the Body
Diode of the Top FET Blocks the Current Path That Would
Discharge the High Current Output Capacitor
3743f
17
LT3743
APPLICATIONS INFORMATION
Voltage Regulation and Overvoltage Protection
The internal power consumption of the LT3743 is de-
termined by the switching frequency, V , and the gate
IN
The LT3743 uses the FB pin to regulate the output to a
maximumvoltageandtoprovideahighspeedovervoltage
lockout to avoid high voltage conditions that may damage
expensivehighcurrentLEDs.Theregulatedoutputvoltage
is programmed using a resistor divider from the output
and ground (Figure 12). When the output voltage exceeds
130% of the regulated voltage level (1.3V at the FB pin),
the internal open-LED flag is set, terminating switching
and forcing both PWMGL and PWMGH signals high. The
regulated output voltage must be greater than 2V and is
set by the equation:
charge, Q of the external switching MOSFETs selected.
G
The 4mm × 5mm QFN package has a θ of 35°C/W. The
JA
following equation calculates the maximum switching
frequency to avoid current limit and thermal shutdown at
a given ambient operating temperature, T :
A
163°C– T
(
)
A
fS ≤
fS ≤
35°C/W • V –5V • QGHG +QGLG
(
)
(
)
(
)
IN
60mA
Q
GLG +QGHG
(
)
R2
R1
⎛
⎝
⎞
Since the regulated output current flowing into the LED
may be very large, the switching frequency needs to be
carefully considered. Higher switching frequencies will
reduce the large size of high saturation current inductors,
whilereducingefficiencyandincreasingpowerlosswithin
the LT3743.
VOUT =1V 1+
⎜
⎟
⎠
V
OUT
LT3743
R2
FB
Table 4. Switching Frequency
R1
SWITCHING FREQUENCY (MHz)
R (kΩ)
T
3743 F12
1
0.750
0.5
40
54
Figure 12. Output Voltage Regulation and Overvoltage Protection
Feedback Connections
83
0.3
142
218
Soft-Start
0.2
Unlikeconventionalvoltageregulators,theLT3743utilizes
the soft-start function to control the regulated inductor
current. The charging current is 5.5μA and reduces the
regulated current for both the high and low regulated
current states. The SS pin is latched in a discharge state
untilthefirstPWMpulseandisresetbyUVLOandthermal
shutdown.
0.1
450
1.2
1.0
0.8
0.6
Programming Switching Frequency
0.4
0.2
0
The LT3743 has an operational switching frequency range
between200kHzand1MHz.Thisfrequencyisprogrammed
with an external resistor from the RT pin to ground. Do
not leave this pin open under any condition. The RT pin
is also current limited to 60μA. See Table 4 and Figure 13
for resistor values and the corresponding switching
frequencies.
0
50 100 150 200 250 300 350 400 450 500
(kΩ)
R
T
3743 F13
Figure 13. Frequency vs RT Resistance
3743f
18
LT3743
APPLICATIONS INFORMATION
Thermal Shutdown
The EN/UVLO pin as an absolute maximum voltage of
6V. To accommodate the largest range of applications,
there is an internal Zener diode that clamps this pin. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
TheinternalthermalshutdownwithintheLT3743engagesat
163°Candterminatesswitching,resetssoft-startandshuts
downthePWMGLandPWMGHdrivers. Whentheparthas
cooled to 155°C, the internal reset is cleared and soft-start
is allowed to charge once the PWM signal is asserted.
V
IN
V
IN
Switching Frequency Synchronization
LT3743
EN/UVLO
R2
R1
The nominal switching frequency of the LT3743 is deter-
mined by the resistor from the RT pin to ground and may
be set from 200kHz to 1MHz. The internal oscillator may
alsobesynchronizedtoanexternalclockthroughtheSYNC
pin. The external clock applied to the SYNC pin must have
a logic low below 0.3V and a logic high higher than 1.25V.
Theinputfrequencymustbe20%higherthanthefrequency
determined by the resistor at the RT pin. The duty cycle of
theinputsignalneedstobegreaterthan10%andlessthan
90%. Input signals outside of these specified parameters
will cause erratic switching behavior and subharmonic
oscillations. When synchronizing to an external clock,
pleasebeawarethattherewillbeafixeddelayfromtheinput
clock edge to the edge of switch. The SYNC pin must be
grounded if the synchronization to an external clock is not
required.WhenSYNCisgrounded,theswitchingfrequency
is determined by the resistor at the RT pin.
3743 F14
Figure 14. UVLO Configuration
LED Current Derating Using the CTRL_T Pin
The LT3743 is designed specifically for driving high cur-
rent LEDs. Most high current LEDs require derating the
maximum current based on operating temperature to
preventdamagetotheLED. Inaddition, manyapplications
have thermal limitations that will require the regulated
current to be reduced based on LED and/or board tem-
perature. To achieve this, the LT3743 uses the CTRL_T
pin to reduce the effective regulated current in the LED
for both the high and low control currents. While CTRL_H
and CTRL_L program the regulated current in the LED,
CTRL_T can be configured to reduce this regulated cur-
rent based on the analog voltage at the CTRL_T pin. The
LED/board temperature derating is programmed using a
resistor divider with a temperature dependant resistance
(Figure 15). When the board/LED temperature rises, the
CTRL_T voltage will decrease. To reduce the regulated
current, the CTRL_T voltage must be lower than voltage
at the CTRL_L and CTRL_H pins.
Shutdown and UVLO
TheLT3743hasaninternalUVLOthatterminatesswitching,
resetsallsynchronouslogic, anddischargesthesoft-start
capacitor for input voltages below 4.2V. The LT3743 also
has a precision shutdown at 1.55V on the EN/UVLO pin.
Partial shutdown occurs at 1.55V and full shutdown is
guaranteed below 0.5V with <2μA I in the full shutdown
Q
state.Below1.5V,aninternalcurrentsourceprovides5.5μA
of pull-down current to allow for programmable UVLO
hysteresis. The following equations determine the voltage
divider resistors for programming the UVLO voltage and
hysteresis as configured in Figure 14.
R
R
V
V
V
REF
R
R
NTC
R
R
R
R
X
LT3743
NTC
X
NTC
NTC
R2
CTRL_T
3743 F15
R1
(OPTION A TO D)
A
B
C
D
VHYST
R2=
5.5μA
Figure 15. LED Current Derating vs Temperature
Using NTC Resistor
⎛
⎞
1.55V •R2
–1.55V
R1=
⎜
⎟
V
⎝
⎠
UVLO
3743f
19
LT3743
APPLICATIONS INFORMATION
Average Current Mode Control Compensation
the error amplifier will be the compensation resistor, R .
C
For optimized phase margin and bandwidth, R and C
C
C
Theuseofaveragecurrentmodecontrolallowsforprecise
regulation of the inductor and LED currents. Figure 16
shows the average current mode control loop used in the
LT3743, where the regulation current is programmed by
a current source and a 3k resistor.
should be sized to be:
fS •L •1000V
VO •RS
0.002
fS
RC =
[Ω], CC =
[F]
where f is the switching frequency, L is the inductance
S
To design the compensation network, the maximum com-
pensationresistorneedstobecalculated. Incurrentmode
controllers, the ratio of the sensed inductor current ramp
to the slope compensation ramp determines the stability
of the current regulation loop above 50% duty cycle. In
the same way, average current mode controllers require
the slope of the error voltage to not exceed the PWM ramp
slope during the switch off-time.
value, V is the input voltage and R is the sense resistor.
IN
S
For most LED applications, a 4.7nF compensation capaci-
tor is adequate and provides excellent phase margin with
optimized bandwidth. Please refer to Table 6 for recom-
mended compensation values.
For applications where the load is not an LED, please call
the factory for additional compensation assistance.
Since the closed-loop gain at the switching frequency
produces the error signal slope, the output impedance of
Board Layout Considerations
Average current mode control is relatively immune to the
switching noise associated with other types of control
schemes. Placing the sense resistor as close as possible
V
• 11μA/V
L
CTRL
3k
+
–
to the SENSE and SENSE pins avoids noise issues and
ensures the fastest LED current transition time. Utilizing
a good ground plane underneath the switching compo-
nentswillminimizeinterplanenoisecoupling. Todissipate
the heat from the switching components, increase the
area of the switching node as much as possible without
negatively affecting the radiated noise. The interconnect
inductance and resistance between the output capacitors
and the LED load directly impacts the rise time of the load
current. To reduce the inductance and resistance, make
the traces as wide as physically possible and minimize
the trace length.
R
S
MODULATOR
LOAD
+
g
m
ERROR AMP
3743 F16
R
–
C
C
C
Figure 16. LT3743 Average Current Mode Control Scheme
Table 6. Recommended Compensation Values
V
(V)
V (V)
I (A)
f
SW
(MHz)
0.5
L (μH)
1.5
R (mΩ)
R (kΩ)
C (nF)
IN
O
L
S
C
C
12
4
4
5
4
4
5
5
47.5
47.5
38.3
52.3
52.3
4.7
4.7
8.2
4.7
4.7
12
12
24
24
10
20
2
0.5
1.5
5
0.25
0.5
1.8
2.5
2.5
2.5
1.0
20
0.5
1.0
3743f
20
LT3743
TYPICAL APPLICATIONS
12V, 20A LED Driver
V
IN
V
IN
EN/UVLO
PWM
CTRL_SEL
EN/UVLO
12V
PWM
1μF
200μF
CTRL_SEL
RT
SYNC
M1
HG
100nF
82.5k
40k
L1
1.0μH
V
OUT
CBOOT
2.5mΩ
20A MAXIMUM
V
SW
LT3743
REF
1μF
2nF
HOT
D1
CTRL_L
V
CC_INT
LG
1mF
20μF
R
M2
CTRL_H
CTRL_T
40k
1mF
45.2k
GND
+
M3
SENSE
SENSE
–
R
NTC
680k
PWMGH
M4
SS
PWMGL
10nF
40.2k
FB
VCL
34k
VCH
1mF
10k
D1: LUMINUS PT120
L1: IHLP4040DZER1R0M01
M1: RJK0365DPA
M2: RJK0346DPA
M3, M4: Si7236DP
3743 TA02
34k
4.7nF
4.7nF
Efficiency (Stepping from 2A to 20A)
94
V
= 12V
IN
GREEN LED
92
90
88
86
84
82
80
20
40
60
100
0
80
CTRL_SEL DIMMING DUTY CYCLE (%)
3743 TA02b
3743f
21
LT3743
TYPICAL APPLICATIONS
6V to 36V, 2A LED Driver With Shunted Output
V
IN
V
IN
EN/UVLO
INTV
EN/UVLO
PWM
CTRL_SEL
6V TO 36V
CC
1μF
8μF
CTRL_SEL
Shunted Output with CTRL_H
Equal to CTRL_L
RT
SYNC
HG
M1
100nF
82.5k
V
L1
10μH
OUT
CTRL_SEL
5V/DIV
CBOOT
2A MAXIMUM
25mΩ
V
REF
SW
LT3743
I
L
2.2μF
2nF
HOT
2A/DIV
D1
CTRL_L
V
CC_INT
LG
20μF
CONTROL
INPUT
R
M2
CTRL_H
CTRL_T
I
LED
45.3k
GND
+
1A/DIV
SENSE
SENSE
–
SW
2V/DIV
R
NTC
680k
PWMGH
3743 TA03b
20μs/DIV
SS
PWMGL
M3
10nF
40.2k
FB
VCL
34k
VCH
10k
D1: LUMINUS CBT-40
L1: MSS1048-103MLB
M1, M2: Si7848BDP
M3: Si2312BDS
3743 TA03
34k
4.7nF
4.7nF
6V to 36V, 2A LED Driver With Current Limited Shunted Output
V
IN
V
IN
EN/UVLO
INTV
EN/UVLO
PWM
CTRL_SEL
6V TO 36V
CC
1μF
8μF
CTRL_SEL
Shunted Output with CTRL_L at GND
RT
SYNC
M1
HG
100nF
CTRL_SEL
5V/DIV
82.5k
L1
10μH
V
OUT
CBOOT
2A MAXIMUM
25mΩ
V
REF
SW
LT3743
I
L
2A/DIV
2.2μF
2nF
CONTROL
INPUT
D1
CTRL_H
V
CC_INT
LG
20μF
I
R
M2
LED
1A/DIV
HOT
CTRL_L
CTRL_T
45.3k
GND
+
SENSE
SENSE
SW
10V/DIV
–
R
NTC
PWMGH
680k
3743 TA04b
20μs/DIV
M3
SS
PWMGL
10nF
40.2k
FB
VCL
34k
VCH
D1: LUMINUS CBT-40
L1: IHLP4040DZE10R0M01
M1, M2: Si7848BDP
M3: Si2312BDS
10k
3743 TA04
34k
4.7nF
4.7nF
3743f
22
LT3743
TYPICAL APPLICATIONS
6V to 30V, 20A LED Driver with Switched Cathode
V
IN
V
EN/UVLO
PWM
CC_INT
EN/UVLO
PWM
CTRL_SEL
IN
6V TO 30V
1μF
80μF
V
RT
SYNC
M1
HG
150nF
82.5k
L1
1.1μH
V
OUT
CBOOT
20A MAXIMUM
2.5mΩ
V
REF
SW
LT3743
1mF
2nF
D1
CTRL_L
V
CC_INT
LG
20μF
R
CONTROL
INPUT
M2
HOT
CTRL_H
CTRL_T
45.3k
GND
+
–
SENSE
SENSE
PWMGL
R
680k
NTC
M3
SS
PWMGH
10nF
60.4k
FB
VCL
VCH
10k
D1: LUMINUS PT121
L1: MVR1261C-112ML
M1: RJK0365DPA
M2: RJK0328DPB
M3: SiR496DP
3743 TA05
34k
4.7nF
Switched Cathode PWM Dimming (100:1) 0A to 20A
0A to 20A Efficiency
100
90
80
70
60
50
40
30
20
10
0
PWM
5V/DIV
I
LED
10A/DIV
SW
10V/DIV
3743 TA05b
10μs/DIV
V
= 12V
IN
GREEN LED
80
100
PWM DIMMING DUTY CYCLE (%)
0
20
40
60
3743 TA05c
3743f
23
LT3743
TYPICAL APPLICATIONS
12V, 5A Lithium-Ion Battery Charger
V
IN
V
EN/UVLO
PWM
CTRL_SEL
CTRL_H
CTRL_L
IN
12V
1μF
20μF
μCONTROLLER
82.5k
HG
100nF
V
RT
SYNC
OUT
CBOOT
3.6μH
10mΩ
5A MAXIMUM
SW
LT3743
+
3.6V
V
V
REF
CC_INT
LG
20μF
2nF
R
HOT
GND
+
–
45.3k
CTRL_T
SS
SENSE
SENSE
R
680k
NTC
PWMGH
PWMGL
10nF
40.2k
FB
VCL
VCH
10k
3743 TA06
56.2k
9nF
56.2k
9nF
3743f
24
LT3743
TYPICAL APPLICATIONS
24V, 20A 3-LED Driver
V
IN
V
IN
EN/UVLO
PWM
CC_INT
EN/UVLO
PWM
CTRL_SEL
24V
1μF
80μF
V
RT
SYNC
HG
100nF
82.5k
V
OUT
CBOOT
1.2μH
2.5mΩ
20A MAXIMUM
V
REF
SW
LT3743
2nF
500μF
20k
V
CC_INT
LG
CTRL_H
20μF
60.4k
R
HOT
RED
LEDs
GND
+
–
45.3k
CTRL_L
SENSE
SENSE
PWMGH
CTRL_T
SS
PWMGL
FB
316k
R
NTC
10nF
VCL
680k
VCH
20k
3743 TA07
24.3k
4.7nF
Efficiency
100
95
90
85
80
75
70
65
V
= 24V
IN
3 RED LEDs
60
0
20
40
60
80
100
DUTY CYCLE (%)
3743 TA07b
3743f
25
LT3743
PACKAGE DESCRIPTION
UFD Package
28-Lead Plastic QFN (4mm × 5mm)
(Reference LTC DWG # 05-08-1712 Rev B)
0.70 p0.05
4.50 p 0.05
3.10 p 0.05
2.50 REF
2.65 p 0.05
3.65 p 0.05
PACKAGE OUTLINE
0.25 p0.05
0.50 BSC
3.50 REF
4.10 p 0.05
5.50 p 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.20 OR 0.35
s 45o CHAMFER
2.50 REF
R = 0.115
TYP
R = 0.05
TYP
0.75 p 0.05
4.00 p 0.10
(2 SIDES)
27
28
0.40 p 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
5.00 p 0.10
(2 SIDES)
3.50 REF
3.65 p 0.10
2.65 p 0.10
(UFD28) QFN 0506 REV B
0.25 p 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X).
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3743f
26
LT3743
PACKAGE DESCRIPTION
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation EB
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
4.75
(.187)
28 27 26 2524 23 22 21 20 1918 17 16 15
2.74
6.60 p0.10
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
(.108)
4.50 p0.10
SEE NOTE 4
6.40
(.252)
BSC
2.74
(.108)
0.45 p0.05
1.05 p0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
5
7
1
2
3
4
6
8
9 10 12 13 14
11
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0o – 8o
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
FE28 (EB) TSSOP 0204
0.195 – 0.30
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
2. DIMENSIONS ARE IN
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
3. DRAWING NOT TO SCALE
3743f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT3743
TYPICAL APPLICATION
24V, 40A Pulsed LED Driver
V
IN
24V
VIN = 12V
4A to 40A LED Current Step
V
EN/UVLO
PWM
CTRL_SEL
EN/UVLO
PWM
CTRL_SEL
IN
4.7μF
s8
200μF
200μF
RT
SYNC
HG
M1
220nF
150k
L1
800nH
CTRL_SEL
5V/DIV
V
OUT
40A MAXIMUM
CBOOT
1.25mΩ
V
SW
LT3743
REF
1μF
HOT
1μF
D1
CTRL_L
40k
I
LED
V
CC_INT
LG
1μF
20A/DIV
1mF
20μF
R
M2
10Ω
10Ω
1mF
45.2k
CTRL_H
40k
GND
+
1μF
SW
10V/DIV
SENSE
M3
33nF
1nF
CTRL_T
SS
–
SENSE
3743 TA08b
M4
20μs/DIV
R
NTC
680k
PWMGH
PWMGL
1μF
140k
FB
VCL
VCH
1mF
20k
3743 TA08
51k
5.6nF
51k
5.6nF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 4.5V to 40V, V
LT3755/LT3755-1
High Side 40V, 1MHz LED Controller with True Color
3000:1 PWM Dimming
= 60V, Dimming = 3000:1 True Color PWM™,
IN
OUT(MAX)
OUT(MAX)
I
< 1μA, 3mm × 3mm QFN16, MSOP16E
SD
LT3756/LT3756-1
LTC3783
High Side 100V, 1MHz LED Controller with True Color
3000:1 PWM Dimming
V : 6V to 100V, V
= 100V, Dimming = 3000:1 True Color PWM,
IN
SD
I
< 1μA, 3mm × 3mm QFN16, MSOP16E
High Side 36V, 1MHz LED Controller with True Color
3000:1 PWM Dimming
V : 3V to 36V, V
SD
= 40V, Dimming = 3000:1 True Color PWM,
IN
OUT(MAX)
I
< 20μA, 4mm × 5mm DFN16, TSSOP16E
LT3517
1.3A, 2.5MHz High Current LED Driver with 3000:1
Dimming
V : 3V to 30V, Dimming = 3000:1 True Color PWM, I < 1μA,
IN
SD
4mm × 4mm QFN16
LT3518
2.3A, 2.5MHz High Current LED Driver with 3000:1
Dimming
V : 3V to 30V, Dimming = 3000:1 True Color PWM, I < 1μA,
IN
SD
4mm × 4mm QFN16
LT3496
Triple Output 750mA, 2.1MHz High Current LED Driver
with 3000:1 Dimming
V : 3V to 30V, V
SD
= 40V, Dimming = 3000:1 True Color PWM,
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
I
< 1μA, 4mm × 5mm QFN28
LT3474/LT3474-1
LT3475/LT3475-1
LT3476
36V, 1A (I ), 2MHz Step-Down LED Driver
V : 4V to 36V, V
= 13.5V, Dimming = 400:1 True Color PWM,
= 13.5V, Dimming = 3000:1 True Color PWM,
LED
IN
SD
I
< 1μA, TSSOP16E
Dual 1.5A (I ), 36V Step-Down LED Driver
V : 4V to 36V, V
IN
LED
I
< 1μA, TSSOP20E
SD
Quad Output 1.5A, 2MHz High Current LED Driver with
1000:1 Dimming
V : 2.8V to 16V, V
= 36V, Dimming = 1000:1 True Color PWM,
IN
SD
OUT(MAX)
I
< 10μA, 5mm × 7mm QFN10
LT3478/LT3478-1
4.5A, 2MHz High Current LED Driver with 3000:1
Dimming
V : 2.8V to 36V, V
SD
= 40V, Dimming = 1000:1 True Color PWM,
IN
OUT(MAX)
I
< 10μA, 5mm × 7mm QFN10
True Color PWM is a trademark of Linear Technology Corporation.
3743f
LT 1109 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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