LT3082ETS8TRPBF [Linear]
200mA Single Resistor Low Dropout Linear Regulator; 200毫安单电阻器低压差线性稳压器
| 型号： | LT3082ETS8TRPBF |
| 厂家： | 
Linear |
| 描述： | 200mA Single Resistor Low Dropout Linear Regulator |
| 文件： | 总20页 (文件大小：289K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3082
200mA Single Resistor Low
Dropout Linear Regulator
FEATURES
DESCRIPTION
The LT®3082 is a 200mA low dropout linear regulator that
can be paralleled to increase output current or spread heat
in surface mounted boards. Architected as a precision
currentsourceandvoltagefollower, thisregulatorbenefits
many applications requiring high current, adjustability to
zero and no heat sink. The LT3082 withstands reverse
inputvoltagesandreverseoutput-to-inputvoltageswithout
reverse-current flow.
n
Outputs May Be Paralleled for Higher Output
Current or Heat Spreading
n
Maximum Output Current: 200mA
n
Wide Input Voltage Range: 1.2V to 40V
Output Adjustable to 0V
n
n
Stable with Minimum 2.2μF Ceramic Capacitors
n
Single Resistor Sets Output Voltage
n
Initial Set Pin Current Accuracy: 1%
n
Low Output Noise: 33μV
(10Hz to 100kHz)
RMS
A key feature of the LT3082 is the capability to supply a
wide output voltage range. A precision “0” TC 10μA ref-
erence current source drives a single resistor to program
the output voltage to any level between zero and 38.5V.
The LT3082 is stable with only 2.2μF of capacitance on
the output; the IC uses small ceramic capacitors that
do not require additional ESR as is common with other
regulators.
n
n
n
n
n
n
Reverse-Battery Protection
Reverse-Current Protection
<1mV Load Regulation Typical
<0.001%/V Line Regulation Typical
Current Limit and Thermal Shutdown Protection
Available in 8-Lead SOT-23, 3-Lead SOT-223 and
8-Lead 3mm × 3mm DFN Packages
APPLICATIONS
Internal protection circuitry includes reverse-battery and
reverse-current protection, current limiting and ther-
mal limiting. The LT3082 is offered in the thermally en-
hanced 8-lead TSOT-23, 3-lead SOT-223 and 8-lead 3mm
× 3mm DFN packages.
n
All-Surface Mount Power Supply
n
Post Regulator for Switching Supplies
n
Low Parts Count Variable Voltage Supply
Low Output Voltage Supply
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Battery Powered Regulator
TYPICAL APPLICATION
SET Pin Current vs Temperature
10.100
10.075
10.050
10.025
10.000
9.975
Variable Output Voltage Battery Powered Supply
LT3082
IN
9V
1μF
10μA
+
–
9.950
SET
OUT
C
V
= 10μA • R
SET
OUT
9.925
R
C
SET
OUT
SET
500k
2.2μF
0.1μF
9.900
–50 –25
25 50 75 100 125 150
0
TEMPERATURE (°C)
3082 TA01a
3082 TA01b
3082f
1
LT3082
ABSOLUTE MAXIMUM RATINGS (Note 1) All Voltages Relative to VOUT
IN Pin Voltage Relative to SET, OUT ........................±±0V
SET Pin Current (Note 6) .....................................±15mA
SET Pin Voltage (Relative to OUT, Note 6)...............±10V
Output Short-Circuit Duration .......................... Indefinite
Operating Junction Temperature Range (Notes 2, 8)
E, I Grades......................................... –±0°C to 125°C
MP Grade........................................... –55°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (ST, TS8 Packages Only)
Soldering, 10 sec.............................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
3
2
1
IN
TOP VIEW
OUT
OUT
NC
1
2
3
±
8
7
6
5
IN
NC 1
OUT 2
OUT 3
OUT 4
8 IN
7 IN
6 NC
5 SET
IN
TAB IS OUT
OUT
SET
9
NC
NC
SET
ST PACKAGE
3-LEAD PLASTIC SOT-223
TS8 PACKAGE
DD PACKAGE
8-LEAD PLASTIC TSOT-23
8-LEAD (3mm s 3mm) PLASTIC DFN
T
= 125°C, θ = 2±°C/W, θ = 15°C/W
T
= 125°C, θ = 57°C/W, θ = 15°C/W
JMAX JA JC
JMAX
JA
JC
T
= 125°C, θ = 28°C/W, θ = 3°C/W
JA JC
EXPOSED PAD (PIN 9) IS OUT, MUST BE SOLDERED TO OUT ON
THE PCB; SEE THE APPLICATIONS INFORMATION SECTION
JMAX
TAB IS OUT, MUST BE SOLDERED TO OUT ON THE PCB;
SEE THE APPLICATIONS INFORMATION SECTION
ORDER INFORMATION
LEAD FREE FINISH
LT3082EDD#PBF
LT3082IDD#PBF
LT3082EST#PBF
LT3082IST#PBF
LT3082MPST#PBF
LT3082ETS8#PBF
LT3082ITS8#PBF
LEAD BASED FINISH
LT3082EDD
TAPE AND REEL
LT3082EDD#TRPBF
LT3082IDD#TRPBF
LT3082EST#TRPBF
LT3082IST#TRPBF
LT3082MPST#TRPBF
LT3082ETS8#TRPBF
LT3082ITS8#TRPBF
TAPE AND REEL
LT3082EDD#TR
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–±0°C to 125°C
–±0°C to 125°C
–±0°C to 125°C
–±0°C to 125°C
–55°C to 125°C
–±0°C to 125°C
–±0°C to 125°C
TEMPERATURE RANGE
–±0°C to 125°C
–±0°C to 125°C
–±0°C to 125°C
–±0°C to 125°C
–55°C to 125°C
–±0°C to 125°C
–±0°C to 125°C
LDYT
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
3-Lead Plastic SOT-223
LDYT
3082
3082
3-Lead Plastic SOT-223
3082MP
LTDYV
LTDYV
PART MARKING*
LDYT
3-Lead Plastic SOT-223
8-Lead Plastic SOT-23
8-Lead Plastic SOT-23
PACKAGE DESCRIPTION
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
3-Lead Plastic SOT-223
LT3082IDD
LT3082IDD#TR
LDYT
LT3082EST
LT3082EST#TR
3082
LT3082IST
LT3082IST#TR
3082
3-Lead Plastic SOT-223
LT3082MPST
LT3082MPST#TR
LT3082ETS8#TR
LT3082ITS8#TR
3082MP
LTDYV
LTDYV
3-Lead Plastic SOT-223
LT3082ETS8
8-Lead Plastic SOT-23
LT3082ITS8
8-Lead Plastic SOT-23
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3082f
2
LT3082
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. (Note 2)
PARAMETER
CONDITIONS
= 2V, I = 1mA
LOAD
MIN
TYP
MAX
UNITS
SET Pin Current
I
V
9.90
9.80
10
10
10.10
10.20
μA
μA
SET
IN
l
l
l
2V ≤ V ≤ ±0V, 1mA ≤ I
≤ 200mA
IN
LOAD
Offset Voltage (V
– V )
SET
V
V
IN
V
IN
= 2V, I
= 2V, I
= 1mA
= 1mA
–2
–±
2
±
mV
mV
OUT
OS
LOAD
LOAD
Load Regulation (Note 7)
Line Regulation
ΔI
ΔV
ΔI
LOAD
ΔI
LOAD
= 1mA to 200mA
= 1mA to 200mA
–0.1
–0.5
nA
mV
SET
OS
–2
ΔI
ΔV
ΔV = 2V to ±0V, I
IN
= 1mA
= 1mA
0.03
0.003
0.2
0.010
nA/V
mV/V
SET
OS
IN
LOAD
LOAD
ΔV = 2V to ±0V, I
l
Minimum Load Current (Note 3)
Dropout Voltage (Note ±)
2V ≤ V ≤ ±0V
300
500
μA
IN
l
l
I
I
= 10mA
= 200mA
1.22
1.3
1.±5
1.65
V
V
LOAD
LOAD
l
Current Limit
V
= 5V, V = 0V, V = –0.1V
OUT
200
300
33
mA
IN
SET
Error Amplifier RMS Output Noise (Note 5)
I
= 200mA, 10Hz ≤ f ≤ 100kHz, C
= 0.1μF
= 10μF,
μV
nA
LOAD
OUT
RMS
C
SET
Reference Current RMS Output Noise (Note 5)
Ripple Rejection
10Hz ≤ f ≤ 100kHz
0.7
90
RMS
f = 120Hz, V
= 0.5V , I
= 0.1A,
dB
RIPPLE
P-P LOAD
C
= 2.2μF, C = 0.1μF
SET
OUT
f = 10kHz
f = 1MHz
75
20
dB
dB
Thermal Regulation
I
10ms Pulse
0.003
%/W
SET
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: For the LT3082, dropout is specified as the minimum input-to-
output voltage differential required supplying a given output current.
Note 5: Adding a small capacitor across the reference current resistor
lowers output noise. Adding this capacitor bypasses the resistor shot
noise and reference current noise; output noise is then equal to error
amplifier noise (see the Applications Information section).
Note 2: Unless otherwise specified, all voltages are with respect to V
.
OUT
The LT3082E is tested and specified under pulse load conditions such
that T ≅ T . The LT3082E is 100% tested at T = 25°C. Performance at
J
A
A
Note 6: Diodes with series 1k resistors clamp the SET pin to the OUT pin.
–±0°C and 125°C is assured by design, characterization, and correlation
with statistical process controls. The LT3082I is guaranteed to meet all
data sheet specifications over the full –±0°C to 125°C operating junction
temperature range. The LT3082MP is 100% tested and guaranteed over
the –55°C to 125°C operating junction temperature range.
Note 3: Minimum load current is equivalent to the quiescent current of
the part. Since all quiescent and drive current is delivered to the output
of the part, the minimum load current is the minimum current required to
maintain regulation.
These diodes and resistors only carry current under transient overloads.
Note 7: Load regulation is Kelvin-sensed at the package.
Note 8: This IC includes overtemperature protection that protects the
device during momentary overload conditions. Junction temperature
exceeds the maximum operating junction temperature when
overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature may impair device
reliability.
3082f
3
LT3082
TYPICAL PERFORMANCE CHARACTERISTICS
Offset Voltage (VOUT – VSET
)
SET Pin Current
SET Pin Current Distribution
10.100
10.075
10.050
10.025
10.000
9.975
2.0
1.5
N = 1326
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
9.950
9.925
9.900
10
SET PIN CURRENT DISTRIBUTION (μA)
9.80
9.90
10.10
10.20
–50
50
100 125
150
–25
0
25
75
–50
50
100 125
150
–25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
3082 G01
3082 G03
3082 G02
Offset Voltage Distribution
Offset Voltage
Offset Voltage
1.00
0.75
0.50
0.25
0
100
50
I
= 1mA
N = 1326
LOAD
0
–50
–100
–150
–200
–250
–300
–350
–400
–0.25
–0.50
–0.75
–1.00
0
–2
–1
1
2
0
20
30 35
0
5
10 15
25
40
50
100
150
200
INPUT-TO-OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
V
DISTRIBUTION (mV)
OS
3082 G05
3082 G06
3082 G0±
Load Regulation
Minimum Load Current
100
600
500
400
300
200
20
ΔI
V
= 1mA TO 200mA
OUT
LOAD
– V
50
0
= 3V
10
IN
0
CHANGE IN REFERENCE CURRENT
–50
–10
–20
–30
–±0
–50
–60
–70
–80
–100
–150
–200
–250
–300
–350
–±00
(V
– V
)
SET
OUT
CHANGE IN OFFSET VOLTAGE
100
0
50 75
25
TEMPERATURE (°C)
–50 –25
0
100 125 150
–50
50
100 125
150
–25
0
25
75
TEMPERATURE (°C)
3082 G08
3082 G07
3082f
4
LT3082
TYPICAL PERFORMANCE CHARACTERISTICS
Dropout Voltage
Dropout Voltage
Current Limit
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
±00
350
300
250
200
150
100
50
1.6
1.±
1.2
1.0
0.8
0.6
0.±
0.2
0
I
= 200mA
= 100mA
LOAD
T
T
= –55°C
= 25°C
J
J
I
LOAD
T
= 125°C
J
T
= 25°C
J
0
–50
50
100 125
150
–25
0
25
75
0
2
6
8
10
±
0
25
75 100 125 150 175 200
50
TEMPERATURE (°C)
INPUT-TO-OUTPUT DIFFERENTIAL VOLTAGE (V)
LOAD CURRENT (mA)
3082 G10
3082 G11
3082 G09
Current Limit
Load Transient Response
500
200
150
100
50
450
400
350
300
250
200
150
100
0
–50
–100
–150
250
0
V
V
= 7V
IN
OUT
50
0
100 150 200 250 300 350 ±00 ±50 500
50
= 0V
0
TIME (μs)
–50
50
100 125
150
–25
0
25
75
V
= 1V
C
SET
= 0.1μF
OUT
TEMPERATURE (°C)
C
C
= 1μF CERAMIC
ΔI
LOAD
= 10mA to 200mA
3082 G12
IN
OUT
= 2.2μF CERAMIC
3082 G13
Line Transient Response
Turn-On Response
60
±0
2.0
1.5
1.0
0.5
0
20
0
–20
–±0
6
±
2
±
2
0
0
0
100 150 200 250 300 350 ±00 ±50 500
0
20 30 ±0 50 60 70 80 90 100
TIME (μs)
50
10
TIME (μs)
V
C
C
= 1V
C
LOAD
= 0.1μF
= 10mA
C
= 2.2μF CERAMIC
= 100k
C
= 0
LOAD
OUT
IN
OUT
SET
OUT
SET
SET
= 1μF CERAMIC
I
R
R
= 5Ω
= 2.2μF CERAMIC
3082 G1±
3082f
5
LT3082
TYPICAL PERFORMANCE CHARACTERISTICS
Residual Output for Less Than
Minimum Load Current
Ripple Rejection
Ripple Rejection (120Hz)
90
89
88
87
86
85
84
83
82
81
80
800
700
600
500
±00
300
200
100
0
120
100
80
60
±0
20
0
SET PIN = 0V
V
IN
V
OUT
V
= 36V
IN
R
TEST
V
= 5V
IN
C
=
SET
0.1μF
V
= V
+ 2V
OUT(NOMINAL)
V
= V
+ 3V
OUT(NOMINAL)
IN
IN
C
= 0
SET
RIPPLE = 500mV , f = 120Hz
RIPPLE = 500mV
P-P
P-P
I
= 0.2A
= 0, C
I
= 200mA
= 2.2μF
LOAD
LOAD
C
= 2.2μF
OUT
C
SET
OUT
–50
50
100 125
150
0
1000
(Ω)
2000
–25
0
25
75
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
10M
TEMPERATURE (°C)
R
TEST
3082 G18
3082 G16
3082 G17
Noise Spectral Density
Output Voltage Noise
10k
1k
1k
100
V
OUT
100μV/DIV
100
10
1
10
1.0
0.1
3082 G20
TIME 1ms/DIV
V
= 1V
= 100k
= 0.1μF
C
I
= 2.2μF
= 200mA
OUT
OUT
R
SET
SET
LOAD
10
100
1k
10k
100k
C
FREQUENCY (Hz)
3082 G19
3082f
6
LT3082
PIN FUNCTIONS (DD/ST/TS8)
IN (Pins 7, 8/Pin 3/Pins 7, 8): Input. This pin supplies
power to regulate internal circuitry and supply output load
current. For the device to operate properly and regulate,
the voltage on this pin must be 1.2V to 1.±V above the
OUT pin (depending on output load current—see the
dropout voltage specifications in the Electrical Charac-
teristics table).
SET (Pin 4/Pin 1/Pin 5): Set. This pin is the error ampli-
fier’s noninverting input and also sets the operating bias
point of the circuit. A fixed 10ꢀA current source flows
out of this pin. A single external resistor programs V
Output voltage range is 0V to 38.5V.
.
OUT
Exposed Pad/Tab (Pin 9/Tab/NA): Output. The Exposed
Pad of the DFN package and the Tab of the SOT-223
package are tied internally to OUT. Tie them directly to OUT
pins(Pins1,2/Pin2)atthePCB.Theamountofcopperarea
and planes connected to the Exposed Pad/Tab determine
the effective thermal resistance of the packages (see the
Applications Information section).
NC (Pins 3, 5, 6/NA/Pins 1, 6): No Connection. These
pins have no connection to internal circuitry and may be
tied to IN, OUT, GND or floated.
OUT (Pins 1, 2/Pin 2/Pins 2, 3, 4): Output. This is the
power output of the device. The LT3082 requires a 0.5mA
minimum load current or the output will not regulate.
BLOCK DIAGRAM
IN
10μA
+
–
SET
OUT
3082 BD
3082f
7
LT3082
APPLICATIONS INFORMATION
Introduction
reference current source allows the regulator to have gain
and frequency response independent of the impedance on
the positive input. On older adjustable regulators, such as
the LT1086, loop gain changes with output voltage and
bandwidth changes if the adjustment pin is bypassed
to ground. For the LT3082, loop gain is unchanged with
output voltage changes or bypassing. Output regulation
is not a fixed percentage of output voltage, but is a fixed
fraction of millivolts. Use of a true current source allows
all of the gain in the buffer amplifier to provide regulation,
and none of that gain is needed to amplify up the reference
to a higher output voltage.
The LT3082 regulator is easy to use and has all the pro-
tection features expected in high performance regulators.
Included are reverse-input, reverse-output and reverse
input-to-outputprotectionforsensitivecircuitryandloads.
Additionalprotectionincludesshort-circuitprotectionand
thermal shutdown with hysteresis.
The LT3082 fits well in applications needing multiple rails.
This new architecture adjusts down to zero with a single
resistor, handling modern low voltage digital IC’s as well
as allowing easy parallel operation and thermal manage-
ment without heat sinks. Adjusting to zero output allows
shutting off the powered circuitry. When the input is pre-
regulated—such as a 5V or 3.3V input supply—external
resistors can help spread the heat.
Programming Output Voltage
The LT3082 generates a 10ꢀA reference current that
flows out of the SET pin. Connecting a resistor from SET
to GND generates a voltage that becomes the reference
point for the error amplifier (see Figure 1). The reference
voltage equals 10ꢀA multiplied by the value of the SET
pin resistor. Any voltage may be generated and there
is no minimum output voltage for the regulator. Table
1 lists many common output voltages and the closest
standard 1% resistor values used to generate that output
voltage.
Aprecision“0”TC10ꢀAreferencecurrentsourceconnects
to the noninverting input of a power operational amplifier.
Thepoweroperationalamplifierprovidesalowimpedance
buffered output to the voltage on the noninverting input.
A single resistor from the noninverting input to ground
sets the output voltage. If this resistor is set to 0Ω, zero
output voltage results. Therefore, any output voltage be-
tween zero and the maximum defined by the input power
supply voltage is obtainable.
Regulation of the output voltage requires a minimum load
current of 0.5mA. For a true 0V output operation, return
this minimum 0.5mA load current to a negative supply
voltage.
The benefit of using a true internal current source as the
reference,asopposedtoabootstrappedreferenceinolder
regulators, is not so obvious in this architecture. A true
LT3082
IN
C
IN
10μA
+
–
SET
R
OUT
V
= 10μA • R
SET
OUT
C
C
OUT
R
LOAD
SET
SET
3082 F01
Figure 1. Basic Adjustable Regulator
3082f
8
LT3082
APPLICATIONS INFORMATION
Table 1. 1% Resistors for Common Output Voltages
If guard ring techniques are used, this bootstraps any
stray capacitance at the SET pin. Since the SET pin is
a high impedance node, unwanted signals may couple
into the SET pin and cause erratic behavior. This will
be most noticeable when operating with minimum
output capacitors at full load current. The easiest way
to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground; 10pF to
20pF is sufficient.
V
(V)
R
(k)
SET
OUT
1
100
121
150
182
2±9
332
±99
1.2
1.5
1.8
2.5
3.3
5
Stability and Output Capacitance
With a 10ꢀA current source generating the reference
voltage, leakage paths to or from the SET pin can create
errors in the reference and output voltages. High qual-
ity insulation should be used (e.g., Teflon, Kel-F). The
cleaning of all insulating surfaces to remove fluxes and
other residues may be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
The LT3082 requires an output capacitor for stability. It
is designed to be stable with most low ESR capacitors
(typically ceramic, tantalum or low ESR electrolytic). A
minimum output capacitor of 2.2ꢀF with an ESR of 0.5Ω
or less is recommended to prevent oscillations. Larger
values of output capacitance decrease peak deviations
and provide improved transient response for larger load
current changes. Bypass capacitors, used to decouple
individual components powered by the LT3082, increase
the effective output capacitor value. For improvement in
transient response performance, place a capacitor across
the voltage setting resistor. Capacitors up to 1ꢀF can be
used. Thisbypasscapacitorreducessystemnoiseaswell,
but start-up time is proportional to the time constant of
Minimize board leakage by encircling the SET pin and
circuitry with a guard ring that is operated at a potential
close to itself. Tie the guard ring to the OUT pin. Guarding
both sides of the circuit board is required. Bulk leakage
reduction depends on the guard ring width. 10nA of leak-
age into or out of the SET pin and its associated circuitry
creates a 0.1% reference voltage error. Leakages of this
magnitude, coupled with other sources of leakage, can
cause significant offset voltage and reference drift, es-
pecially over the possible operating temperature range.
Figure 2 depicts an example guard ring layout.
the voltage setting resistor (R in Figure 1) and SET pin
SET
bypass capacitor.
Give extra consideration to the use of ceramic capacitors.
Ceramic capacitors are manufactured with a variety of di-
OUT
SET
GND
3082 F02
Figure 2. Example Guard Ring Layout for DFN Package
3082f
9
LT3082
APPLICATIONS INFORMATION
electrics, each with different behavior across temperature
and applied voltage. The most common dielectrics used
are specified with EIA temperature characteristic codes of
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are
good for providing high capacitances in a small package,
but they tend to have strong voltage and temperature
coefficients, as shown in Figures 3 and ±. When used with
a 5V regulator, a 16V 10ꢀF Y5V capacitor can exhibit an
effective value as low as 1ꢀF to 2ꢀF for the DC bias voltage
appliedandovertheoperatingtemperaturerange.TheX5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
The X7R type has better stability across temperature,
while the X5R is less expensive and is available in higher
values. Care still must be exercised when using X5R and
X7R capacitors. The X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than with Y5V
and Z5U capacitors, but can still be significant enough to
drop capacitor values below appropriate levels. Capacitor
DC bias characteristics tend to improve as component
casesizeincreases, butexpectedcapacitanceatoperating
voltage should be verified.
Stability and Input Capacitance
Low ESR, ceramic input bypass capacitors are acceptable
forapplicationswithoutlonginputleads.However,applica-
tions connecting a power supply to an LT3082 circuit’s IN
and GND pins with long input wires combined with a low
ESR, ceramicinputcapacitorsarepronetovoltagespikes,
reliability concerns and application-specific board oscil-
lations. The input wire inductance found in many battery
poweredapplications,combinedwiththelowESRceramic
inputcapacitor, formsahigh-QLCresonanttankcircuit. In
some instances this resonant frequency beats against the
output current dependent LDO bandwidth and interferes
with proper operation. Simple circuit modifications/solu-
tions are then required. This behavior is not indicative of
LT3082 instability, but is a common ceramic input bypass
capacitor application issue.
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. Wire diameter is not a
major factor on its self-inductance. For example, the self-
inductance of a 2-AWG isolated wire (diameter = 0.26") is
about half the self-inductance of a 30-AWG wire (diameter
= 0.01"). One foot of 30-AWG wire has about ±65nH of
self-inductance.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress. In a
ceramic capacitor, the stress can be induced by vibrations
in the system or thermal transients.
One of two ways reduces a wire’s self-inductance. One
method divides the current flowing towards the LT3082
between two parallel conductors. In this case, the farther
apart the wires are from each other, the more the self-in-
ductance is reduced; up to a 50% reduction when placed
a few inches apart. Splitting the wires basically connects
±0
20
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
0
X5R
X5R
0
–20
–20
–±0
–±0
Y5V
–60
–60
Y5V
–80
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
–100
–100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
0
8
12 1±
2
±
6
10
16
DC BIAS VOLTAGE (V)
3082 F03
3082 F0±
Figure 3. Ceramic Capacitor DC Bias Characteristics
Figure 4. Ceramic Capacitor Temperature Characteristics
3082f
10
LT3082
APPLICATIONS INFORMATION
two equal inductors in parallel, but placing them in close
proximity gives the wires mutual inductance adding to
the self-inductance. The second and most effective way
to reduce overall inductance is to place both forward and
return current conductors (the input and GND wires) in
very close proximity. Two 30-AWG wires separated by
only 0.02", used as forward- and return-current conduc-
tors, reduce the overall self-inductance to approximately
one-fifth that of a single isolated wire.
Spreading the devices on the PC board also spreads the
heat. Series input resistors can further spread the heat if
the input-to-output difference is high.
LT3082
IN
10μA
+
–
SET
OUT
50mΩ
If wiring modifications are not permissible for the applica-
tions,includingseriesresistancebetweenthepowersupply
and the input of the LT3082 also stabilizes the application.
Aslittleas0.1Ωto0.5Ω, oftenless, iseffectiveindamping
the LC resonance. If the added impedance between the
powersupplyandtheinputisunacceptable,addingESRto
theinputcapacitoralsoprovidesthenecessarydampingof
the LC resonance. However, the required ESR is generally
higher than the series impedance required.
V
LT3082
IN
IN
±.8V TO
±0V
10μA
+
–
1μF
SET
OUT
50mΩ
V
, 3.3V
OUT
0.±A
165k
10μF
3082 F05
Paralleling Devices
Figure 5. Parallel Devices
Higher output current is obtained by paralleling multiple
LT3082s together. Tie the individual SET pins together and
tie the individual IN pins together. Connect the outputs in
commonusingsmallpiecesofPCtraceasballastresistors
to promote equal current sharing. PC trace resistance in
mΩ/inch is shown in Table 2. Ballasting requires only a
tiny area on the PCB.
Quieting the Noise
The LT3082 offers numerous noise performance advan-
tages. Every linear regulator has its sources of noise. In
general, a linear regulator’s critical noise source is the
reference. In addition, consider the error amplifier’s noise
contribution along with the resistor divider’s noise gain.
Table 2. PC Board Trace Resistance
Manytraditionallownoiseregulatorsbondoutthevoltage
reference to an external pin (usually through a large value
resistor) to allow for bypassing and noise reduction. The
LT3082 does not use a traditional voltage reference like
other linear regulators. Instead, it uses a 10ꢀA reference
current. The 10ꢀA current source generates noise current
WEIGHT (oz)
10mil WIDTH
5±.3
20mil WIDTH
27.1
1
2
27.1
13.6
Trace resistance is measured in mΩ/in
The worst-case room temperature offset, only ±2mV
between the SET pin and the OUT pin, allows the use of
very small ballast resistors.
levels of 2.7pA/√Hz (0.7nA
over the 10Hz to 100kHz
RMS
bandwidth). The equivalent voltage noise equals the RMS
noise current multiplied by the resistor value.
As shown in Figure 5, each LT3082 has a small 50mΩ
ballast resistor, which at full output current gives better
than 80% equalized sharing of the current. The external
resistance of 50mΩ (25mΩ for the two devices in paral-
lel) adds only about 10mV of output regulation drop at an
output of 0.±A. Even with an output voltage as low as 1V,
this adds only 1% to the regulation. Of course, paralleling
more than two LT3082s yields even higher output current.
The SET pin resistor generates spot noise equal to √4kTR
–23
(k=Boltzmann’sconstant,1.38•10 J/°K,andTisabso-
lute temperature) which is RMS summed with the voltage
noise If the application requires lower noise performance,
bypassthevoltage/currentsettingresistorwithacapacitor
toGND. Notethatthisnoise-reductioncapacitorincreases
start-up time as a factor of the RC time constant.
3082f
11
LT3082
APPLICATIONS INFORMATION
The LT3082 uses a unity-gain follower from the SET pin
to the OUT pin. Therefore, multiple possibilities exist
(besides a SET pin resistor) to set output voltage. For
example, using a high accuracy voltage reference from
SET to GND removes the errors in output voltage due to
reference current tolerance and resistor tolerance. Active
driving of the SET pin is acceptable.
LT3082
IN
10μA
+
–
PARASITIC
RESISTANCE
SET
OUT
R
P
LOAD
R
R
R
SET
P
P
The typical noise scenario for a linear regulator is that the
output voltage setting resistor divider gains up the noise
3082 F06
reference,especiallyifV ismuchgreaterthanV . The
OUT
REF
LT3082’s noise advantage is that the unity-gain follower
presents no noise gain whatsoever from the SET pin to the
output. Thus, noise figures do not increase accordingly.
Figure 6. Connections for Best Load Regulation
Error amplifier noise is typical 100nV/√Hz (33μV
over
RMS
Thermal Considerations
the10Hzto100kHzbandwidth).Theerroramplifier’snoise
is RMS summed with the other noise terms to give a final
noise figure for the regulator.
The LT3082’s internal power and thermal limiting circuitry
protects itself under overload conditions. For continuous
normalloadconditions,donotexceedthe125°Cmaximum
junction temperature. Carefully consider all sources of
thermalresistancefromjunction-to-ambient.Thisincludes
(but is not limited to) junction-to-case, case-to-heat sink
interface, heat sink resistance or circuit board-to-ambient
astheapplicationdictates.Consideralladditional,adjacent
heat generating sources in proximity on the PCB.
Curves in the Typical Performance Characteristics sec-
tion show noise spectral density and peak-to-peak noise
characteristics for both the reference current and error
amplifier over the 10Hz to 100kHz bandwidth.
Load Regulation
The LT3082 is a floating device. No ground pin exists on
the packages. Thus, the IC delivers all quiescent current
and drive current to the load. Therefore, it is not possible
toprovidetrueremoteloadsensing.Theconnectionresis-
tance between the regulator and the load determines load
regulation performance. The data sheet’s load regulation
specification is Kelvin sensed at the package’s pins. Nega-
tive-side sensing is a true Kelvin connection by returning
the bottom of the voltage setting resistor to the negative
side of the load (see Figure 6).
Surfacemountpackagesprovidethenecessaryheatsinking
by using the heat spreading capabilities of the PC board,
coppertracesandplanes.Surfacemountheatsinks,plated
through-holes and solder-filled vias can also spread the
heat generated by power devices.
Junction-to-case thermal resistance is specified from
the IC junction to the bottom of the case directly, or
the bottom of the pin most directly, in the heat path.
This is the lowest thermal resistance path for heat flow.
Only proper device mounting ensures the best possible
thermal flow from this area of the package to the heat
sinking material.
Connected as shown, system load regulation is the sum
of the LT3082’s load regulation and the parasitic line
resistance multiplied by the output current. To minimize
load regulation, keep the positive connection between the
regulator and load as short as possible. If possible, use
large diameter wire or wide PC board traces.
Note that the Exposed Pad of the DFN package and the
tab of the SOT-223 package is electrically connected to
the output (V ).
OUT
3082f
12
LT3082
APPLICATIONS INFORMATION
Tables 3 through 5 list thermal resistance as a function
of copper areas in a fixed board size. All measurements
were taken in still air on a ±-layer FR-± board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Please reference
JEDEC standard JESD51-7 for further information on high
thermal conductivity test boards. Achieving low thermal
resistancenecessitatesattentiontodetailandcarefullayout.
Demo circuit 1±±7A’s board layout using multiple inner
Table 3. DD Package, 8-Lead DFN
V
planes and multiple thermal vias achieves 28°C/W
OUT
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
performance for the DFN package.
TOPSIDE* BACKSIDE BOARD AREA
2
2
2
2
2
2
2
2
2
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
25°C/W
Calculating Junction Temperature
2
1000mm
25°C/W
Example: Given an industrial factory application with an
input voltage of 15V ±10%, an output voltage of 12V ±5%,
an output current of 200mA and a maximum ambient
temperature of 50°C, what would be the maximum junc-
tion temperature for a DFN package?
2
225mm
100mm
28°C/W
2
32°C/W
*Device is mounted on topside
Table 4. TS8 Package, 8-Lead SOT-23
COPPER AREA
The total circuit power equals:
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
P
TOTAL
= (V – V )(I
)
IN
OUT OUT
2
2
2
2
2
2
2
2
2
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
5±°C/W
5±°C/W
57°C/W
63°C/W
The SET pin current is negligible and can be ignored.
2
1000mm
2
225mm
100mm
V
V
= 16.5 (15V + 10%)
= 11.±V (12V – 5%)
IN(MAX CONTINUOUS)
2
OUT(MIN CONTINUOUS)
*Device is mounted on topside
I
= 200mA
OUT
Table 5. ST Package, 3-Lead SOT-223
COPPER AREA
Power dissipation under these conditions equals:
= (16.5 – 11.±V)(200mA) = 1.02W
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
P
TOTAL
TOPSIDE* BACKSIDE BOARD AREA
2
2
2
2
2
2
2
2
2
Junction temperature equals:
T = T + P • θ
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
20°C/W
20°C/W
2±°C/W
29°C/W
2
1000mm
J
A
TOTAL
JA
2
225mm
100mm
T = 50°C + (1.02W • 30°C/W) = 80.6°C
J
2
*Device is mounted on topside
In this example, junction temperature is below the maxi-
mum rating, ensuring reliable operation.
For further information on thermal resistance and using thermal information,
refer to JEDEC standard JESD51, notably JESD51-12.
3082f
13
LT3082
APPLICATIONS INFORMATION
Protection Features
greater than IN, is less than 1mA (typically under 100μA),
protecting the LT3082 and sensitive loads.
The LT3082 incorporates several protection features ideal
forbattery-poweredcircuits, amongotherapplications. In
additiontonormalmonolithicregulatorprotectionfeatures
such as current limiting and thermal limiting, the LT3082
protects itself against reverse-input voltages, reverse-
output voltages, and reverse OUT-to-SET pin voltages.
Clamping diodes and 1k limiting resistors protect the
LT3082’s SET pin relative to the OUT pin voltage. These
protection components typically only carry current under
transient overload conditions. These devices are sized to
handle ±10V differential voltages and ±15mA crosspin
currentflowwithoutconcern.Relativetotheseapplication
concerns, note the following two scenarios. The first sce-
nario employs a noise-reducing SET pin bypass capacitor
whileOUTisinstantaneouslyshortedtoGND. Thesecond
scenario follows improper shutdown techniques in which
the SET pin is reset to GND quickly while OUT is held up
by a large output capacitance with light load. The Typical
Applications section shows simple, robust techniques for
shutting down SET and OUT together.
Current limit protection and thermal overload protection
protect the IC against output current overload conditions.
Fornormaloperation,donotexceedajunctiontemperature
of 125°C. The thermal shutdown circuit’s temperature
threshold is typically 165°C and incorporates about 5°C
of hysteresis.
TheLT3082’sINpinwithstands±±0Vvoltageswithrespect
to the OUT and SET pins. Reverse current flow, if OUT is
TYPICAL APPLICATIONS
DAC-Controlled Regulator
Two-Level Regulator
LT3082
IN
LT3082
IN
V
V
IN
IN
10μA
10μA
+
–
+
–
150k
150k
±50k
V
V
OUT
OUT
LT1991
OUT
SET
SET
R2
OUT
–
+
SPI
±.7μF
2.2μF
LTC26±1
3082 TA02
3082 TA03
GAIN = ±
VN2222LL
R1
3082f
14
LT3082
TYPICAL APPLICATIONS
Using a Lower Value SET Resistor
LT3082
10μA
V
IN
IN
12V
+
–
C1
1μF
V
OUT
0.5V TO 10V
= 0.5V + 1mA • R
OUT
1mA
SET
V
OUT
SET
R1
±9.9k
1%
R2
±99Ω
1%
C
R
OUT
SET
±.7μF
10k
3082 TA0±
Adding Soft-Start
LT3082
IN
V
IN
±.8V to ±0V
10μA
+
–
D1
1N±1±8
C1
1μF
V
3.3V
0.2A
OUT
OUT
SET
C
OUT
C2
0.01μF
R1
332k
±.7μF
3082 TA05
Coincident Tracking
LT3082
IN
10μA
LT3082
10μA
IN
+
–
V
OUT3
5V
LT3082
SET
OUT
V
IN
IN
0.2A
+
–
7V TO ±0V
C±
±.7μF
R3
169k
10μA
V
3.3V
0.2A
OUT2
3082 TA06
SET
R2
OUT
+
–
C3
±.7μF
C1
1.5μF
80.6k
V
OUT1
2.5V
0.2A
OUT
SET
C2
±.7μF
R1
2±9k
3082f
15
LT3082
TYPICAL APPLICATIONS
Adding Shutdown
Reference Buffer
LT3082
IN
LT3082
10μA
V
IN
IN
V
IN
10μA
+
–
+
–
OUT
Q2*
SET
SET
OUT
V
INPUT
OUTPUT
OUT
V
*
OUT
Q1
VN2222LL
C2
±.7μF
ON OFF
R1
LT1019
GND
VN2222LL
C1
1μF
SHUTDOWN
* MINIMUM LOAD 0.5mA
3082 TA07
3082 TA08
*Q2 INSURES ZERO OUTPUT
IN THE ABSENCE OF ANY
OUTPUT LOAD.
High Voltage Regulator
6.1V
10k
V
IN
50V
1N±1±8
LT3082
IN
BUZ11
10μA
+
+
10μF
–
V
V
OUT
V
OUT
= 20V
= 10μA • R
OUT
0.2A
OUT
SET
SET
+
R
SET
±.7μF
15μF
2MEG
3082 TA09
Ramp Generator
LT3082
10μA
IN
V
IN
5V
+
–
1μF
OUT
VN2222LL
SET
1nF
V
±.7μF
OUT
VN2222LL
3082 TA10
3082f
16
LT3082
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 ±0.05
3.5 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.38 ± 0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD) DFN 1203
4
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
3082f
17
LT3082
PACKAGE DESCRIPTION
ST Package
3-Lead Plastic SOT-223
(Reference LTC DWG # 05-08-1630)
.248 – .264
(6.30 – 6.71)
.129 MAX
.114 – .124
(2.90 – 3.15)
.059 MAX
.264 – .287
(6.70 – 7.30)
.248 BSC
.130 – .146
(3.30 – 3.71)
.039 MAX
.059 MAX
.090
BSC
.181 MAX
RECOMMENDED SOLDER PAD LAYOUT
.033 – .041
(0.84 – 1.04)
.0905
(2.30)
BSC
10° – 16°
.010 – .014
10°
MAX
.071
(1.80)
MAX
(0.25 – 0.36)
10° – 16°
.0008 – .0040
(0.0203 – 0.1016)
.024 – .033
(0.60 – 0.84)
.012
(0.31)
MIN
.181
(4.60)
BSC
ST3 (SOT-233) 0502
3082f
18
LT3082
PACKAGE DESCRIPTION
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
2.90 BSC
(NOTE 4)
0.52
MAX
0.65
REF
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.95 BSC
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3082f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3082
TYPICAL APPLICATIONS
Active-Driven Regulator
LT3082
V
IN
IN
10μA
+
–
⎛
⎜
⎞
⎟
R2
⎝ R1+ R2⎠
OUT
VOUT
=
• V1 + 10µA • (R1 ||R2)
SET
R1, 100k
V
V1
0V TO 5V
OUT
0.5V TO 3V
2.2μF
R2
100k
3082 TA11
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1761
100mA, Low Noise LDO
150mA, Low Noise LDO
500mA, Low Noise LDO
300mA, Low Noise LDO
300mV Dropout Voltage, Low Noise = 20μV
300mV Dropout Voltage, Low Noise = 20μV
300mV Dropout Voltage, Low Noise = 20μV
270mV Dropout Voltage, Low Noise = 20μV
, V : 1.8V to 20V, ThinSOT™ Package
RMS IN
LT1762
, V : 1.8V to 20V, MS-8 Package
RMS IN
LT1763
, V : 1.8V to 20V, SO-8 Package
RMS IN
LT1962
, V : 1.8V to 20V, MS-8 Package
RMS IN
LT196±
200mA, Low Noise, Negative LDO 3±0mV Dropout Voltage, Low Noise = 30μV
, V : –1.8V to –20V, ThinSOT Package
RMS IN
LT3008
20mA, ±5V, 3μA I Micropower
280mV Dropout Voltage, Low I = 3μA, V : 2V to ±5V, V : 0.6V to 39.5V;
Q IN OUT
ThinSOT and 2mm × 2mm DFN-6 Packages
Q
LDO
LT3009
LT3010
LT3011
20mA, 3μA I Micropower LDO
Q
280mV Dropout Voltage, Low I = 3μA, V : 1.6V to 20V, V : 0.6V to 19.5V;
Q
IN
OUT
ThinSOT and SC-70 Packages
50mA, High Voltage, Micropower V : 3V to 80V, V : 1.275V to 60V, V = 0.3V, I = 30μA, I <1μA,
LDO
IN
OUT
RMS
DO
Q
SD
Low Noise <100μV
, Stable with 1μF Output Capacitor, Exposed MS8 Package
50mA, High Voltage, Micropower V : 3V to 80V, V : 1.275V to 60V, V = 0.3V, I = ±6μA, I <1μA,
LDO with Power Good
IN
OUT
RMS
DO
Q
SD
Low Noise <100μV
, Power Good, Stable with 1μF Output Capacitor,
3mm × 3mm DFN-10 and Exposed MS-12E Packages
LT3012
LT3013
250mA, ±V to 80V, Low Dropout
Micropower Linear Regulator
V : ±V to 80V, V : 1.2±V to 60V, V = 0.±V, I = ±0μA, I <1μA,
IN
OUT
DO
Q
SD
TSSOP-16E and ±mm × 3mm DFN-12 Packages
250mA, ±V to 80V, Low Dropout
Micro-power Linear Regulator
with PWRGD
V : ±V to 80V, V : 1.2±V to 60V, V = 0.±V, I = 65μA, I <1μA, Power Good;
IN
OUT
DO
Q
SD
TSSOP-16E and ±mm × 3mm DFN-12 Packages
LT301±/LT301±HV
LT3020
20mA, 3V to 80V, Low Dropout
Micropower Linear Regulator
V : 3V to 80V (100V for 2ms, HV Version), V : 1.22V to 60V, V = 0.35V, I = 7μA,
SD
IN
OUT
DO
Q
I
<1μA, ThinSOT and 3mm × 3mm DFN-8 Packages
100mA, Low Voltage VLDO Linear V : 0.9V to 10V, V : 0.2V to 5V (Min), V = 0.15V, I = 120μA, Noise <250μV
RMS
Regulator
,
IN
OUT
DO
Q
Stable with 2.2μF Ceramic Capacitors, DFN-8 and MS-8 Packages
LT3021
500mA, Low Voltage, Very Low
Dropout VLDO Linear Regulator
V : 0.9V to 10V, Dropout Voltage = 160mV (Typical), Adjustable Output (V = V
IN REF OUT(MIN)
= 200mV), Fixed Output Voltages: 1.2V, 1.5V, 1.8V, Stable with Low ESR, Ceramic Output
Capacitors 16-Pin 5mm × 5mm DFN and 8-Lead SO Packages
LT3080/LT3080-1
LT3085
1.1A, Parallelable, Low Noise,
Low Dropout Linear Regulator
300mV Dropout Voltage (2-Supply Operation), Low Noise = ±0μV
, V : 1.2V to 36V,
RMS IN
V
: 0V to 35.7V, Current-Based Reference with 1-Resistor V
Set; Directly Parallelable
OUT
OUT
(No Op Amp Required), Stable with Ceramic Capacitors; TO-220, SOT-223, MSOP-8 and
3mm × 3mm DFN-8 Packages; LT3080-1 Version Has Integrated Internal Ballast Resistor
500mA, Parallelable, Low Noise,
Low Dropout Linear Regulator
275mV Dropout Voltage (2-Supply Operation), Low Noise: ±0μV
, V : 1.2V to 36V,
RMS IN
V
: 0V to 35.7V, Current-Based Reference with 1-Resistor V
Set; Directly Parallelable (No
OUT
OUT
Op Amp Required), Stable with Ceramic Capacitors; MSOP-8 and 2mm × 3mm DFN-6 Packages
ThinSOT is a trademark of Linear Technology Corporation.
3082f
LT 0709 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7±17
20
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© LINEAR TECHNOLOGY CORPORATION 2009
(±08) ±32-1900 FAX: (±08) ±3±-0507 www.linear.com
相关型号：
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Linear
LT3082IDD#TRPBF
LT3082 - 200mA Single Resistor Low Dropout Linear Regulator; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C
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