LT1804IS8#TR [Linear]
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| 型号： | LT1804IS8#TR |
| 厂家： | 
Linear |
| 描述： | 暂无描述 运算放大器 放大器电路 光电二极管 |
| 文件： | 总20页 (文件大小：397K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1803/LT1804/LT1805
Single/Dual/Quad 100V/µs,
85MHz, Rail-to-Rail Input and
Output Op Amps
U
DESCRIPTIO
FEATURES
The LT®1803/LT1804/LT1805 are single/dual/quad, low
power, high speed rail-to-rail input and output operational
amplifiers with excellent DC performance. The LT1803/
LT1804/LT1805 feature reduced supply current, lower
input offset voltage, lower input bias current and higher
DC gain than other devices with comparable bandwidth
and slew rate.
■
Slew Rate: 100V/µs
■
Gain Bandwidth Product: 85MHz
■
Input Common Mode Range Includes Both Rails
■
Output Swings Rail-to-Rail
■
Low Quiescent Current: 3mA Max per Amplifier
■
Large Output Current: 42mA
■
Voltage Noise: 21nV/√Hz
■
Typically, the LT1803/LT1804/LT1805 have an input off-
set voltage of 350µV, an input bias current of 125nA and
an open-loop gain of 60V/mV.
Power Supply Rejection: 90dB
■
Open-Loop Gain: 60V/mV
■
Operating Temperature Range: –40°C to 85°C
■
Single Available in the 8-Pin SO and 5-Pin Low Profile
The LT1803/LT1804/LT1805 have an input range that
includesbothsupplyrailsandanoutputthatswingswithin
20mV of either supply rail to maximize the signal dynamic
range in low supply applications.
(1mm) SOT-23 (ThinSOTTM) Package
■
Dual Available in 8-Lead DFN and SO Packages
■
Quad Available in the 14-Pin Narrow SO Package
U
The LT1803/LT1804/LT1805 are specified at 3V, 5V and
±5V supplies and typically maintain their performance for
supplies from 2.3V to 12.6V. The inputs can be driven
beyond the supplies without damage or phase reversal of
the output.
APPLICATIO S
■
Low Voltage, High Frequency Signal Processing
Driving A/D Converters
Rail-to-Rail Buffer Amplifiers
■
■
■
The LT1803 is available in the 8-pin SO package with the
standard op amp pinout and in the 5-pin SOT-23 package.
The LT1804 is available in 8-pin DFN and SO packages
with the standard op amp pinouts. The LT1805 features
thestandardquadopampconfigurationandisavailablein
a 14-pin plastic SO package.
Active Filters
■
Video Line Driver
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATIO
Inverting DC Restore Circuit Response
Inverting DC Restore
R2
10k
R1
1k
VIN
50mV/DIV
GND
–
V
IN
A
1/2 LT1804
+
V
OUT
+
R4
V
S
VOUT
500mV/DIV
GND
100k
R5
2k
R3
1k
–
+
D2
1N4148
D1
1N4148
B
1/2 LT1804
50µs/DIV
18045 TA02
C1
0.1µF
R6
1M
V
= ±5V
S
18045 TA01
–
V
S
180345f
1
LT1803/LT1804/LT1805
W W U W
ABSOLUTE MAXIMUM RATINGS (Note 1)
Total Supply Voltage (V+ to V–) ........................... 12.6V
Input Current (Note 2) ....................................... ±10mA
Output Short-Circuit Duration (Note 3)........... Indefinite
Operating Temperature Range (Note 4) .. – 40°C to 85°C
Specified Temperature Range (Note 5)... – 40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Maximum Junction Temperature (DD Package) .. 125°C
Storage Temperature Range ................. –65°C to 150°C
Storage Temperature Range
(DD Package) ....................................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
W U
U
PACKAGE/ORDER INFORMATION
TOP VIEW
TOP VIEW
+
NC
–IN
+IN
1
2
3
4
8
7
6
5
NC
V
1
2
5 V
OUT
–
+
V
V
+
–
–
+
+IN 3
4 –IN
V
OUT
–
V
NC
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
TJMAX = 150°C, θJA = 250°C/W
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 190°C/W
ORDER PART
NUMBER
S5 PART
MARKING*
ORDER PART
NUMBER
S8 PART
MARKING
LT1803CS5
LT1803IS5
LTAFN
LT1803CS8
LT1803IS8
1803
1803I
TOP VIEW
TOP VIEW
OUT A
–IN A
+IN A
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT D
–IN D
+IN D
TOP VIEW
+
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
V
+
–
+
–
+
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
V
A
D
OUT B
–IN B
+IN B
–
+
OUT B
–IN B
+IN B
+
A
–
–
V
V
A
–
+
+
–
B
+
B
C+–
V
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
–
B–+
–
V
DD PACKAGE
S8 PACKAGE
8-LEAD PLASTIC SO
8
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 160°C/W
UNDERSIDE METAL INTERNALLY CONNECTED TO V–
(PCB CONNECTION OPTIONAL)
S PACKAGE
14-LEAD PLASTIC SO
T
JMAX = 150°C, θJA = 190°C/W
TJMAX = 150°C, θJA = 160°C/W
ORDER PART
NUMBER
DD PART
MARKING*
ORDER PART
NUMBER
S8 PART
MARKING
ORDER PART
NUMBER
LT1804CDD
LT1804IDD
LADJ
LT1804CS8
LT1804IS8
1804
1804I
LT1805CS
LT1805IS
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grades are identified by a label on the shipping container.
180345f
2
LT1803/LT1804/LT1805
ELECTRICAL CHARACTERISTICS
TA = 25°C; VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= 0V
0.35
1.00
1.00
1.50
2
3
5
8
mV
mV
mV
mV
OS
= 0V (DD Package)
= 0V (SOT-23 Package)
= V
S
∆V
OS
Input Offset Shift
V
CM
= 0V to V – 2V
0.125
0.50
mV
S
Input Offset Voltage Match
(Channel-to-Channel) (Note 9)
V
CM
V
CM
= 0V
0.5
1.0
3.5
5.0
mV
mV
= 0V (DD Package)
I
I
Input Bias Current
V
V
= 1V
125
3
750
5.5
nA
µA
B
CM
CM
= V
S
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
CM
V
CM
= 1V
100
100
1250
1500
nA
nA
= V
S
Input Offset Current
V
CM
V
CM
= 1V
100
50
1000
1000
nA
nA
OS
= V
S
Input Noise Voltage
0.1Hz to 10Hz
f = 10kHz
4
21
2.5
2
µV
P-P
e
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
nV/√Hz
pA/√Hz
pF
n
i
f = 10kHz
n
C
A
IN
Large-Signal Voltage Gain
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
20
2
15
60
4.5
45
V/mV
V/mV
V/mV
VOL
S
O
L
S
V = 5V, V = 1V to 4V, R = 100Ω to V /2
S
O
L
S
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
S
O
L
S
CMRR
PSRR
Common Mode Rejection Ratio
V = 5V, V = 0V to 3V
75
66
96
90
dB
dB
S
CM
V = 3V, V = 0V to 1V
S
CM
CMRR Match (Channel-to-Channel) (Note 9)
V = 5V, V = 0V to 3V
69
60
91
85
dB
dB
S
CM
V = 3V, V = 0V to 1V
S
CM
Input Common Mode Range
0
V
V
dB
dB
V
S
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
68
62
90
90
S
CM
PSRR Match (Channel-to-Channel) (Note 9)
Minimum Supply Voltage (Note 6)
Output Voltage Swing Low (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
V
V
No Load
17
80
180
60
150
300
mV
mV
mV
OL
OH
I
I
= 5mA
= 15mA
SINK
SINK
Output Voltage Swing High (Note 7)
Short-Circuit Current (Note 3)
No Load
17
125
350
60
250
600
mV
mV
mV
I
= 5mA
= 15mA
SOURCE
SOURCE
I
I
I
V = 5V
20
18
42
34
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Gain Bandwidth Product
Slew Rate
2.7
85
3
mA
MHz
V/µs
S
GBW
SR
V = 5V, Frequency = 2MHz, R = 1k to 2.5V
S
50
65
L
V = 5V, A = –1, R = 1k to V /2, V = 0.5V to 4.5V
100
S
V
L
S
O
Measured at V = 1.5V, 3.5V
O
FPBW
HD
Full Power Bandwidth (Note 10)
Harmonic Distortion
V = 5V, A = –1, V = 0.5V to 4.5V, R = 1k to V /2
8
MHz
dBc
S
V
O
L
S
V = 5V, A = 1, R = 1k, V = 2V , f = 1MHz
–75
350
0.15
1
S
V
L
O
P-P C
t
Settling Time
0.01%, V = 5V, V
= 2V, A = 1, R = 1k
ns
S
S
STEP
V
L
∆G
Differential Gain (NTSC)
Differential Phase (NTSC)
V = 5V, A = 2, R = 150Ω
%
S
V
L
∆θ
V = 5V, A = 2, R = 150Ω
Deg
180345f
S
V
L
3
LT1803/LT1804/LT1805
The ● denotes specifications which apply over the 0°C ≤ TA ≤ 70°C
ELECTRICAL CHARACTERISTICS
temperature range. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= 0V
●
●
●
●
0.50
1.25
1.25
1.60
3.5
5
6
mV
mV
mV
mV
OS
= 0V (DD Package)
= 0V (SOT-23 Package)
= V
8.5
S
∆V
OS
Input Offset Shift
V
CM
= 0V to V – 2V
●
0.05
0.8
mV
S
Input Offset Voltage Match
(Channel-to-Channel) (Note 9)
V
CM
V
CM
= 0V
●
●
0.75
1.50
5.5
7.5
mV
mV
= 0V (DD Package)
V
TC
Input Offset Voltage Drift (Note 8)
Input Bias Current
●
10
35
µV/°C
OS
I
V
CM
V
CM
= 1V
●
●
150
3.2
1100
6
nA
µA
B
= V – 0.2V
S
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
CM
V
CM
= 1V
●
●
120
120
1500
1800
nA
nA
= V – 0.2V
S
I
Input Offset Current
V
CM
V
CM
= 1V
●
●
100
50
1400
1400
nA
nA
OS
= V – 0.2V
S
A
Large-Signal Voltage Gain
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
●
●
●
15
1.4
10
50
3.7
40
V/mV
V/mV
V/mV
VOL
S
O
L
S
V = 5V, V = 1V to 4V, R = 100Ω to V /2
S
O
L
S
V = 3V, V = 0.5V to 2.5V, R =1k to V /2
S
O
L
S
CMRR
Common Mode Rejection Ratio
V = 5V, V = 0V to 3V
●
●
71
61
95
90
dB
dB
S
CM
V = 3V, V = 0V to 1V
S
CM
CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3V
●
●
65
55
90
85
dB
dB
S
CM
V = 3V, V = 0V to 1V
S
CM
Input Common Mode Range
Power Supply Rejection Ratio
●
●
●
●
0
V
V
dB
dB
V
S
PSRR
V = 2.5V to 10V, V = 0V
65
59
87
87
S
CM
PSRR Match (Channel-to-Channel) (Note 9) V = 2.5V to 10V, V = 0V
S
CM
Minimum Supply Voltage (Note 6)
Output Voltage Swing Low (Note 7)
2.3
2.5
V
V
No Load
●
●
●
19
100
200
80
225
450
mV
mV
mV
OL
OH
I
I
= 5mA
= 15mA
SINK
SINK
Output Voltage Swing High (Note 7)
Short-Circuit Current (Note 3)
No Load
●
●
●
19
150
450
80
350
900
mV
mV
mV
I
I
= 5mA
= 15mA
SOURCE
SOURCE
I
I
V = 5V
●
●
17
15
40
28
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Gain Bandwidth Product
Slew Rate
●
●
●
3
3.75
mA
MHz
V/µs
S
GBW
SR
V = 5V, Frequency = 2MHz, R = 1k to 2.5V
S
45
45
82
93
L
V = 5V, A = –1, R = 1k to V /2, V = 0.5V to 4.5V
S
V
L
S
O
Measured at V = 1.5V, 3.5V
O
180345f
4
LT1803/LT1804/LT1805
The ● denotes specifications which apply over the –40°C ≤ TA ≤ 85°C
ELECTRICAL CHARACTERISTICS
temperature range. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= 0V
●
●
●
●
0.7
1.5
1.5
1.7
4
6.5
7
mV
mV
mV
mV
OS
= 0V (DD Package)
= 0V (SOT-23 Package)
= V
9
S
∆V
OS
Input Offset Shift
V
CM
= 0V to V – 2V
●
0.125 1.00
mV
S
Input Offset Voltage Match
(Channel-to-Channel) (Note 9)
V
CM
V
CM
= 0V
●
●
1
2
6.5
9
mV
mV
= 0V (DD Package)
V
TC
Input Offset Voltage Drift (Note 8)
Input Bias Current
●
10
35
µV/°C
OS
I
V
CM
V
CM
= 1V
●
●
200
3.4
1500
6.5
nA
µA
B
= V – 0.2V
S
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
CM
V
CM
= 1V
●
●
150
150
2000
2200
nA
nA
= V – 0.2V
S
I
Input Offset Current
V
CM
V
CM
= 1V
●
●
100
50
1600
1600
nA
nA
OS
= V – 0.2V
S
A
Large-Signal Voltage Gain
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
●
●
●
12
1.3
8
48
4.8
35
V/mV
V/mV
V/mV
VOL
S
O
L
S
V = 5V, V = 1.5V to 3.5V, R = 100Ω to V /2
S
O
L
S
V = 3V, V = 0.5V to 2.5V, R =1k to V /2
S
O
L
S
CMRR
Common Mode Rejection Ratio
V = 5V, V = 0V to 3V
●
●
69
60
95
90
dB
dB
S
CM
V = 3V, V = 0V to 1V
S
CM
CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3V
●
●
63
54
90
85
dB
dB
S
CM
V = 3V, V = 0V to 1V
S
CM
Input Common Mode Range
Power Supply Rejection Ratio
●
●
●
●
0
V
V
dB
dB
V
S
PSRR
V = 2.5V to 10V, V = 0V
64
58
86
86
S
CM
PSRR Match (Channel-to-Channel) (Note 9) V = 2.5V to 10V, V = 0V
S
CM
Minimum Supply Voltage (Note 6)
Output Voltage Swing Low (Note 7)
2.3
2.5
V
V
No Load
●
●
●
20
100
170
90
250
350
mV
mV
mV
OL
OH
I
I
= 5mA
= 10mA
SINK
SINK
Output Voltage Swing High (Note 7)
Short-Circuit Current (Note 3)
No Load
●
●
●
20
170
300
90
400
600
mV
mV
mV
I
I
= 5mA
= 10mA
SOURCE
SOURCE
I
I
V = 5V
●
●
12
11
35
27
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Gain Bandwidth Product
Slew Rate
●
●
●
3.1
77
70
4.25
mA
MHz
V/µs
S
GBW
SR
V = 5V, Frequency = 2MHz, R = 1k to 2.5V
S
40
30
L
V = 5V, A = –1, R = 1k to V /2, V = 0.5V to 4.5V
S
V
L
S
O
Measured at V = 1.5V, 3.5V
O
180345f
5
LT1803/LT1804/LT1805
TA = 25°C, VS = ±5V, VCM = 0V, VOUT = 0V, unless otherwise noted
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
V
V
V
V
= –5V
0.35
1.50
1.50
1.50
2.5
3.5
6
mV
mV
mV
mV
OS
CM
CM
CM
CM
= –5V (DD Package)
= –5V (SOT-23 Package)
= 5V
8
∆V
OS
Input Offset Shift
V
= –5V to 3V
0.3
1
mV
CM
Input Offset Voltage Match
(Channel-to-Channel) (Note 9)
V
V
= –5V
= –5V (DD Package)
0.5
1
4
5.5
mV
mV
CM
CM
I
I
Input Bias Current
V
V
= –4V
= 5V
125
2.5
750
5.5
nA
µA
B
CM
CM
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
V
= –4V
= 5V
150
150
1250
1500
nA
nA
CM
CM
Input Offset Current
V
V
= –4V
= 5V
100
50
1000
1000
nA
nA
OS
CM
CM
Input Noise Voltage
0.1Hz to 10Hz
f = 10kHz
4
21
2.5
2
µV
P-P
e
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
nV/√Hz
pA/√Hz
pF
n
i
f = 10kHz
n
C
A
f = 100kHz
IN
Large-Signal Voltage Gain
V = –4V to 4V, R = 1k
20
2
55
5
V/mV
V/mV
VOL
O
L
V = –1.5V to 1.5V, R = 100Ω
O
L
CMRR
PSRR
Common Mode Rejection Ratio
V
V
= –5V to 3V
= –5V to 3V
78
96
96
dB
dB
V
CM
CM
CMRR Match (Channel-to-Channel) (Note 9)
Input Common Mode Range
72
–
+
V
S
V
S
+
–
+
Power Supply Rejection Ratio
V
V
= 2.5V to 10V, V = 0V, V
= V /2
68
62
90
90
dB
dB
S
S
OUT
S
+
–
+
PSRR Match (Channel-to-Channel) (Note 9)
Output Voltage Swing Low (Note 7)
= 2.5V to 10V, V = 0V, V
= V /2
S
S
OUT
S
V
V
No Load
17
85
200
60
150
300
mV
mV
mV
OL
OH
I
I
= 5mA
= 15mA
SINK
SINK
Output Voltage Swing High (Note 7)
No Load
17
125
350
60
250
600
mV
mV
mV
I
I
= 5mA
= 15mA
SOURCE
SOURCE
I
I
Short-Circuit Current (Note 3)
Supply Current per Amplifier
Gain Bandwidth Product
Slew Rate
25
50
2.5
83
88
mA
mA
SC
3
S
GBW
SR
Frequency = 2MHz, R = 1k
MHz
V/µs
L
A = –1, R = 1k, V = ±4V
V
L
O
Measured at V = ±2V
O
FPBW
HD
Full Power Bandwidth (Note 10)
Harmonic Distortion
V = 8V , A = –1, R = 1k
4
MHz
dBc
ns
O
P-P
V
L
A = 1, R = 1k, V = 2V , f = 1MHz
–75
500
0.75
0.8
V
L
O
P-P C
t
Settling Time
0.01%, V = 5V, A = 1, R = 1k
STEP V L
S
∆G
Differential Gain (NTSC)
Differential Phase (NTSC)
A = 2, R = 150Ω
%
V
L
∆θ
A = 2, R = 150Ω
Deg
V
L
180345f
6
LT1803/LT1804/LT1805
The ● denotes specifications which apply over the 0°C ≤ TA ≤ 70°C
ELECTRICAL CHARACTERISTICS
temperature range. VS = ±5V, VCM = 0V, VOUT = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
V
V
V
V
= –5V
●
●
●
●
0.5
1.5
1.5
1.4
3.5
5
7
mV
mV
mV
mV
OS
CM
CM
CM
CM
= –5V (DD Package)
= –5V (SOT-23 Package)
= 5V
8.5
∆V
OS
Input Offset Shift
V
= –5V to 3V
●
0.35
1.5
mV
CM
Input Offset Voltage Match
(Channel-to-Channel) (Note 9)
V
V
= –5V
= –5V (DD Package)
●
●
0.75
1.50
5.5
7.5
mV
mV
CM
CM
V
TC
Input Offset Voltage Drift (Note 8)
Input Bias Current
●
10
35
µV/°C
OS
I
V
V
= –4V
= 4.8V
●
●
175
2.5
1000
6
nA
µA
B
CM
CM
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
V
= –4V
= 4.8V
●
●
175
175
1500
1800
nA
nA
CM
CM
I
Input Offset Current
V
V
= –4V
= 4.8V
●
●
100
50
1400
1400
nA
nA
OS
CM
CM
A
Large-Signal Voltage Gain
V = –4V to 4V, R = 1k
●
●
15
1.5
47
4.5
V/mV
V/mV
VOL
O
L
V = –1.5V to 1.5V, R = 100Ω
O
L
CMRR
Common Mode Rejection Ratio
V
V
= –5V to 3V
= –5V to 3V
●
●
●
●
●
74
95
95
dB
dB
V
CM
CM
CMRR Match (Channel-to-Channel) (Note 9)
Input Common Mode Range
68
–
+
V
V
S
S
+
–
+
PSRR
Power Supply Rejection Ratio
V
V
= 2.5V to 10V, V = 0V, V
= V /2
65
59
87
87
dB
dB
S
S
OUT
OUT
S
+
–
+
PSRR Match (Channel-to-Channel) (Note 9)
Output Voltage Swing Low (Note 7)
= 2.5V to 10V, V = 0V, V
= V /2
S
S
S
V
V
No Load
●
●
●
19
100
220
80
225
475
mV
mV
mV
OL
OH
I
I
= 5mA
= 15mA
SINK
SINK
Output Voltage Swing High (Note 7)
No Load
●
●
●
19
150
460
80
350
900
mV
mV
mV
I
I
= 5mA
= 15mA
SOURCE
SOURCE
I
I
Short-Circuit Current (Note 3)
Supply Current per Amplifier
Gain Bandwidth Product
Slew Rate
●
●
●
●
20
46
2.8
80
84
mA
mA
SC
3.75
S
GBW
SR
Frequency = 2MHz, R = 1k
MHz
V/µs
L
A = –1, R = 1k, V = ±4V,
V
L
O
Measured at V = ±2V
O
180345f
7
LT1803/LT1804/LT1805
The ● denotes specifications which apply over the –40°C ≤ TA ≤ 85°C
ELECTRICAL CHARACTERISTICS
temperature range. VS = ±5V, VCM = 0V, VOUT = 0V unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
V
V
V
V
= –5V
●
●
●
●
1
2
2
2
4.0
6.5
8
mV
mV
mV
mV
OS
CM
CM
CM
CM
= –5V (DD Package)
= –5V (SOT-23 Package)
= 5V
9
∆V
OS
Input Offset Shift
V
= –5V to 3V
●
0.4
1.7
mV
CM
Input Offset Voltage Match
(Channel-to-Channel) (Note 9)
V
V
= –5V
= –5V (DD Package)
●
●
1
2
6.5
9.0
mV
mV
CM
CM
V
TC
Input Offset Voltage Drift (Note 8)
Input Bias Current
●
10
35
µV/°C
OS
I
V
V
= –4V
= 4.8V
●
●
250
2.5
1200
6.5
nA
µA
B
CM
CM
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
V
= –4V
= 4.8V
●
●
200
250
2000
2200
nA
nA
CM
CM
I
Input Offset Current
V
V
= –4V
= 4.8V
●
●
100
50
1600
1600
nA
nA
OS
CM
CM
A
Large-Signal Voltage Gain
V = –4V to 4V, R = 1k
●
●
12
1.4
45
5.3
V/mV
V/mV
VOL
O
L
V = –1V to 1V, R = 100Ω
O
L
CMRR
Common Mode Rejection Ratio
V
V
= –5V to 3V
= –5V to 3V
●
●
●
●
●
73
95
95
dB
dB
V
CM
CM
CMRR Match (Channel-to-Channel) (Note 9)
Input Common Mode Range
67
–
+
V
V
S
S
+
–
+
PSRR
Power Supply Rejection Ratio
V
V
= 2.5V to 10V, V = 0V, V
= V /2
64
58
86
86
dB
dB
S
S
OUT
OUT
S
+
–
+
PSRR Match (Channel-to-Channel) (Note 9)
Output Voltage Swing Low (Note 7)
= 2.5V to 10V, V = 0V, V
= V /2
S
S
S
V
V
No Load
●
●
●
20
110
170
90
250
350
mV
mV
mV
OL
OH
I
I
= 5mA
= 10mA
SINK
SINK
Output Voltage Swing High (Note 7)
No Load
●
●
●
20
170
300
90
400
600
mV
mV
mV
I
I
= 5mA
= 10mA
SOURCE
SOURCE
I
I
Short-Circuit Current (Note 3)
Supply Current per Amplifier
Gain Bandwidth Product
Slew Rate
●
●
●
●
12.5
34
2.9
75
65
mA
mA
SC
4.25
S
GBW
SR
Frequency = 2MHz, R = 1k
MHz
V/µs
L
A = –1, R = 1k, V = ±4V,
V
L
O
Measured at V = ±2V
O
Note 1: Absolute Maximium Ratings are those values beyond which the
life of the device may be impaired.
Note 2: The inputs are protected by back-to-back diodes and by ESD
diodes to supply rails. If the differential input voltage exceeds 1.4V, or if an
input is driven beyond the supply rails, the input current should be limited
to less than 10mA. This parameter is not tested; however it is guaranteed
by characterization.
–40°C to 85°C but are not tested or QA sampled at these temperatures.
The LT1803I/LT1804I/LT1805I are guaranteed to meet specified perfor-
mance from –40°C to 85°C.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
Note 8: This parameter is not 100% tested.
Note 9: Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1805; between the two amplifiers on the
LT1804.
indefinitely
.
Note 4: The LT1803C/LT1803I, LT1804C/LT1804I and LT1805C/LT1805I
are guaranteed functional over the temperature range of –40°C and 85°C.
Note 5: The LT1803C/LT1804C/LT1805C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1803C/LT1804C/LT1805C are
designed, characterized and expected to meet specified performance from
Note 10: Full power bandwidth is based on slew rate:
FPBW = SR/2πV
P
180345f
8
LT1803/LT1804/LT1805
U W
TYPICAL PERFOR A CE CHARACTERISTICS
VOS Distribution, VCM = 0V
(SO-8, PNP Stage)
V
OS Distribution, VCM = 5V
VOS Distribution, VCM = 0V
(SO-8, NPN Stage)
(SOT-23, PNP Stage)
30
25
20
15
10
5
40
35
30
25
20
15
10
5
V
V
= 5V, 0V
= 0V
V
V
= 5V, 0V
= 0V
V
V
= 5V, 0V
S
= 5V
CM
S
CM
S
CM
35
30
25
20
15
10
5
0
–5
0
0
–6
–2
0
2
4
6
0
1
2
3
4
5
–4
– 4 –3 –2 –1
–1250
–250 0 250
750
1250
–750
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE (µV)
180345 G02
180345 G03
180345 G01
Offset Voltage vs Input Common
Mode Voltage
VOS Distribution, VCM = 5V
(SOT-23, NPN Stage)
Supply Current vs Supply Voltage
25
20
15
10
5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2000
1500
1000
500
V
V
= 5V, 0V
CM
PER AMPLIFIER
V = 5V, 0V
S
TYPICAL PART
S
= 5V
T
= 125°C
A
T
= 125°C
A
T
= 25°C
A
T
= 25°C
A
T
= –55°C
A
0
T
= –55°C
A
–500
–1000
0
–6
–2
0
2
4
6
–4
0
1
2
3
4
5
6
7
8
9
10 11 12
0
1
2
3
4
5
INPUT OFFSET VOLTAGE (mV)
TOTAL SUPPLY VOLTAGE (V)
INPUT COMMON MODE VOLTAGE (V)
180345 G04
180345 G05
180345 G06
Input Bias Current vs
Temperature
Output Saturation Voltage vs
Load Current (Output Low)
Input Bias Current vs Common
Mode Voltage
3
2
3.0
2.5
2.0
1.5
1.0
0.5
0
10
1
V
= 5V, 0V
V
= 5V, 0V
S
S
NPN ACTIVE
V
V
= 5V, 0V
CM
S
= 5V
T
= 125°C
A
T
= –55°C
A
T
= 125°C
A
1
0.1
T
= 25°C
A
0
T
= 25°C
A
2
0.01
T
= –55°C
PNP ACTIVE
A
–1
–2
V
V
= 5V, 0V
S
CM
–0.5
= 1V
–1.0
0.001
–1
1
3
4
5
6
–50 –35 –20 –5 10 25 40 55 70 85
0
0.01
0.1
1
10
100
COMMON MODE VOLTAGE (V)
TEMPERATURE (°C)
LOAD CURRENT (mA)
180345 G09
180345 G07
180345 G08
180345f
9
LT1803/LT1804/LT1805
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Saturation Voltage vs
Output Short-Circuit Current vs
Power Supply Voltage
Minimum Supply Voltage
Load Current (Output High)
80
60
10
1
6
4
V
S
= 5V, 0V
V
= 0V
SINKING
CM
T
= 25°C
A
T
A
= –55°C
40
T
A
= 125°C
T
= 125°C
A
2
T
= 125°C
A
20
T
= 25°C
A
T
= 25°C
0.1
A
0
0
T = –55°C
A
T
= –55°C
A
SOURCING
–2
–4
–6
T
T
= –55°C
= 125°C
A
A
–20
–40
–60
0.01
T
= 25°C
A
0.001
3.5
4.5 5.0
1.5 2.0
2.5 3.0
4.0
0.01
0.1
1
10
100
0
1.5 2.0 2.5
3.5
4.5 5.0 5.5
4.0
3.0
LOAD CURRENT (mA)
POWER SUPPLY VOLTAGE (±V)
TOTAL SUPPLY VOLTAGE (V)
180345 G11
180345 G10
180345 G12
Open-Loop Gain
Open-Loop Gain
Open-Loop Gain
2.5
2.0
2.5
2.0
10
8
V
S
= 5V, 0V
TO GND
V
S
= 3V, 0V
TO GND
V
S
= ±5V
TO GND
R
L
R
L
R
L
1.5
1.5
6
1.0
4
1.0
R
L
= 100Ω
R
L
= 100Ω
0.5
2
0.5
R
L
= 100Ω
R
L
= 1k
R
L
= 1k
0
0
0
R
L
= 1k
–2
–4
–6
–8
–10
–0.5
–1.0
–1.5
–2.0
–2.5
–0.5
–1.0
–1.5
–2.0
–2.5
4
–5 –4 –3 –2 –1
0
1
2
3
5
0
1
3
4
5
0
0.5
1.5
2.0
2.5
3.0
2
1.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
180345 G15
180345 G14
180345 G13
Offset Voltage Change
vs Output Current
Warm-Up Drift vs Time
(LT1804S8)
Input Noise Voltage
vs Frequency
8
6
15
10
5
160
140
120
100
80
V
S
= ±5V
V
S
= 5V, 0V
V
= ±5V
S
V
= 5V
S
4
T
= 125°C
A
V
S
= 3V
2
0
0
T
= –55°C
PNP ACTIVE
= 2.5V
A
60
V
CM
T
= 25°C
–5
–10
–15
A
–2
–4
–6
40
NPN ACTIVE
CM
20
V
= 4.25V
0
0.01
20
OUTPUT CURRENT (mA)
60
80
–60 –40 –20
0
40
0
10
15
20
25
30
5
0.1
1
FREQUENCY (kHz)
10
100
TIME AFTER POWER-UP (SECONDS)
180345 G16
180345 G17
180345 G18
180345f
10
LT1803/LT1804/LT1805
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Current Noise
Gain Bandwidth and Phase
Margin vs Supply Voltage
120
vs Frequency
0.1Hz to 10Hz Voltage Noise
8
7
6
5
4
3
2
1
0
6
4
V
= 5V, 0V
V
= 5V, 0V
S
T = 25°C
A
S
GAIN BANDWIDTH
PRODUCT
100
80
60
60
50
40
30
2
PNP ACTIVE
= 2.5V
0
V
CM
–2
–4
–6
PHASE MARGIN
NPN ACTIVE
= 4.25V
V
CM
0.01
100
0.1
1
FREQUENCY (kHz)
10
0
1
2
3
4
5
6
7
8
9
10
5
6
7
8
9
10
0
3
4
1
2
TIME (SECONDS)
TOTAL SUPPLY VOLTAGE (V)
180345 G19
180345 G20
180345 G21
Gain Bandwidth and Phase
Margin vs Temperature
Slew Rate vs Temperature
Gain and Phase vs Frequency
120
100
80
110
100
90
120
100
80
60
A
V
F
L
= –1
G
= 1k
GAIN BANDWIDTH
V
= ±2.5V
= ±5V
S
R
R
= R = 1k
80
V
= ±2.5V
S
PHASE
V
100
120
140
160
180
200
220
S
V
= ±5V
S
60
60
80
40
40
60 PHASE MARGIN
GAIN
70
V
= ±5V
20
S
50
40
30
20
T
= 25°C
= 5pF
= 1k
A
L
L
60
0
C
V
= ±2.5V
S
R
50
–20
–40
V
V
= ±5V
= ±2.5V
S
S
40
–50 –25
0
125
–50 –25
0
125
0.01
0.1
1
10
100 300
25
50
75 100
25
50
75 100
TEMPERATURE (°C)
FREQUENCY (MHz)
TEMPERATURE (°C)
180345 G24
180345 G22
180345 G23
Gain vs Frequency (AV = 2)
Output Impedance vs Frequency
Gain vs Frequency (AV = 1)
1000
100
10
30
24
30
24
C
= 10pF
= 100Ω
= 1
C
= 10pF
= 100Ω
= 2
V
= ±2.5V
L
L
S
R
A
R
A
L
V
L
V
18
18
A
= 10
V
12
12
A
= 1
V
6
6
V
= ±2.5V
V = ±2.5V
S
S
1
0
0
A = 2
V
–6
–12
–18
–24
–30
–6
–12
–18
–24
–30
V
= ±5V
V
= ±5V
S
S
0.1
0.01
0.001
0.1
1
10
FREQUENCY (kHz)
100
1000
0.1
1
10
100 300
0.1
1
10
100 300
FREQUENCY (MHz)
FREQUENCY (MHz)
180345 G27
180345 G25
180345 G26
180345f
11
LT1803/LT1804/LT1805
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Overshoot and Series Output
Resistor vs Capacitive Load (AV = 1)
Power Supply Rejection Ratio
vs Frequency
Common Mode Rejection Ratio
vs Frequency
50
45
40
35
30
25
20
15
10
5
100
80
60
40
20
0
100
90
80
70
60
50
40
30
20
10
0
V
T
= 5V, 0V
V
A
= 5V, 0V
= 1
V
= 5V, 0V
= 1kΩ
= 25°C
S
A
S
V
S
L
= 25°C
R
T
A
POSITIVE
SUPPLY
R
S
= 20Ω
NEGATIVE
SUPPLY
R
S
R
L
= 50Ω,
= 50Ω
0
–10
10
100
1000
10000
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
CAPACITIVE LOAD (pF)
FREQUENCY (MHz)
FREQUENCY (MHz)
180345 G30
180345 G28
180345 G29
Overshoot and Series Output
Resistor vs Capacitive Load (AV = 2)
Distortion vs Frequency (AV = 2)
Distortion vs Frequency (AV = 1)
–30
– 40
–50
– 60
–70
–80
–90
–100
–110
–30
– 40
–50
– 60
–70
–80
–90
–100
50
45
40
35
30
25
20
15
10
5
V
A
F
R
= 5V, 0V
= 2
V
A
V
V
= 5V, 0V
= 1
V
A
V
= 5V, 0V
= 2
S
V
S
V
S
V
C = 5pF
= 2V
= 2V
OUT
P-P
OUT
P-P
= 1k
= 2V
CM
G
F
R = 1k
R
L
= 150Ω, 3RD
R
L
= 150Ω, 2ND
R
S
R
L
= 50Ω,
= 50Ω
R
= 150Ω, 2ND
= 1kΩ, 2ND
L
R
L
= 150Ω, 3RD
R
1
= 1kΩ, 3RD
L
R
S
= 20Ω
R
L
R
L
= 1kΩ, 2ND
R
L
= 1kΩ, 3RD
0
0.01
0.1
1
10
0.01
0.1
10
10
100
1000
10000
FREQUENCY (MHz)
FREQUENCY (MHz)
CAPACITIVE LOAD (pF)
180345 G33
180345 G31
180345 G32
Maximum Undistorted Output
Signal vs Frequency
5V Small-Signal Response
5V Large-Signal Response
5.2
5.0
4.8
4.6
4.4
4.2
4.0
A
= –1
V
50mV/DIV
2.5V
1V/DIV
0V
A
= 2
V
180345 G35
180345 G36
V
T
= 5V, 0V
100ns/DIV
V
A
= 5V, 0V
= 1
= 1k
S
A
S
V
50ns/DIV
V
A
= 5V, 0V
= 1
= 1k
S
V
= 25°C
HD , HD < –40dBc
R
2
3
L
R
L
0.01
0.1
1
10
FREQUENCY (MHz)
180345 G34
180345f
12
LT1803/LT1804/LT1805
U W
TYPICAL PERFOR A CE CHARACTERISTICS
±5V Large-Signal Response
±5V Small-Signal Response
Output Overdrive Recovery
V
IN
50mV/DIV
0V
1V/DIV
0V
0V
2V/DIV
V
OUT
2V/DIV
180345 G39
180345 G37
180345 G38
100ns/DIV
200ns/DIV
50ns/DIV
V
A
= 5V, 0V
= 2
= 1k
V
A
= ±5V
= 1
= 1k
V
A
= ±5V
= 1
= 1k
S
V
L
S
V
L
S
V
L
R
R
R
W U U
U
APPLICATIO S I FOR ATIO
Circuit Description
Power Dissipation
The LT1803/LT1804/LT1805 have input and output signal
ranges from the negative power supply to the positive
power supply. Figure 1 depicts a simplified schematic of
one amplifier. The input stage is comprised of two differ-
entialamplifiers, aPNPstageQ1/Q2andanNPNstageQ3/
Q4 that are active over the different ranges of the common
mode input voltage. The PNP differential pair is active
between the negative supply and approximately 1.3V
below the positive supply. As the input voltage moves
toward the positive supply, the transistor Q5 will steer the
tail current I1 to the current mirror Q6/Q7 activating the
NPN differential pair. The PNP pair becomes inactive for
therestoftheinputcommonmoderangeuptothepositive
supply. Also at the input stage, devices Q18 and Q19 act
to cancel the bias current of the PNP input pair. When Q1
and Q2 are active, the current in Q16 is controlled to be the
same as the current in Q1 and Q2; therefore, the base
currentofQ16isnominallyequaltothebasecurrentofthe
input devices. The base current of Q16 is then mirrored by
devices Q17 through Q19 to cancel the base current of the
input devices Q1 and Q2.
There is a need to ensure that the die’s junction tempera-
ture does not exceed 150°C. Junction temperature TJ is
calculated from the ambient temperature TA, power dissi-
pation PD and thermal resistance θJA:
TJ = TA + (PD • θJA)
The power dissipated in the IC is a function of the supply
voltage, amplifier current, output voltage and output cur-
rent. For a given supply voltage, the worst-case power
dissipation, PDMAX, occurs when the output current and
voltage drop in the amplifier product is maximized. For
example, if the amplifier is sourcing a constant current
then the PDMAX occurs when the output voltage is at about
–
VS . On the other hand, for a given load resistance to
ground, the PDMAX will occur when the output voltage is at
half of either supply voltage. PDMAX for a given resistance
to ground is given by:
–
PDMAX = (VS+ – VS ) ISMAX + (VS/2)2/RL
Example:AnLT1804inanSO-8packageoperatingon±5V
suppliesanddrivinga100Ωloadtoground,thePDMAX per
amplifier is given by:
A pair of complementary common emitter stages Q14/
Q15 that enable the output to swing from rail-to-rail
constructs the output stage. The capacitors C1 and C2
form the local feedback loops that lower the output
impedanceathighfrequency.TheLT1803/LT1804/LT1805
are fabricated on Linear Technology’s proprietary high
speed complementary bipolar process.
PDMAX = (10 • 3.25mA) + (2.5)2/100 = 0.0425 + 0.0625
= 0.095W
ISMAX is approximated for a typical part from the Supply
Currrent vs Supply Voltage graph.
180345f
13
LT1803/LT1804/LT1805
W U U
U
APPLICATIO S I FOR ATIO
+
V
R3
R4
R5
–
+
V
V
Q12
+
+
D1
ESDD1
ESDD2
Q11
Q13
Q15
I
2
I
1
C2
+IN
–IN
+
D6
D5
D8
D7
Q5
V
BIAS
I
3
D2
OUT
C
C
–
V
Q4 Q3
Q1 Q2
D3
BUFFER
AND
OUTPUT BIAS
ESDD4
ESDD3
Q10
–
+
V
V
D4
Q9
R1
Q8
R2
Q16
C1
Q17
Q18
Q14
Q7
Q6
Q19
–
V
180345 F01
Figure 1. LT1803/LT1804/LT1805 Simplified Schematic Diagram
If both amplifiers areloadedsimultaneously, then thetotal
power dissipation is 0.19W.
voltage is typically less than 1000µV in the range the PNP
input stage is active.
The maximum ambient temperature that the part is al-
lowed to operate is:
Input Bias Current
The LT1803/LT1804/LT1805 employ a patent-pending
technique to reduce the input bias current to less than 1µA
for the input common mode voltage range of 0.2V above
the negative supply rail to 1.75V below the positive rail.
The low input offset voltage and low input bias current
provide precision performance in high source impedance
applications.
TA = TJ – (PDMAX • 190°C/W)
= 150°C – (0.190W • 190°C/W) = 113.9°C
Similar calculations can be carried out for specific pack-
ages and conditions.
Also worth noting, the DD package includes a low θJA
–
undersidemetalwhichisinternallyconnectedtoVS .Ifthe
underside metal is properly soldered to a PCB, the θJA of
the part will be close to 50°C/W. This θJA is significantly
less than leaving the underside metal unattached and can
be useful for certain applications.
Output
The LT1803/LT1804/LT1805 can deliver a large output
current, so the short-circuit current limit is set around
50mA to prevent damage to the device. Attention must be
paid to keep the junction temperature of the IC below the
absolute maximum rating of 150°C (refer to the Power
Dissipationsection)whentheoutputiscontinuouslyshort
circuited. The output of the amplifier has reverse-biased
diodes connected to each supply. If the output is forced
beyond either supply, unlimited current will flow through
these diodes. If the current is transient and limited to less
Input Offset Voltage
The input offset voltage will change greatly based upon
which input stage is active. The PNP input stage is active
from the negative supply voltage to about 1.3V below the
positive supply rail, then the NPN input stage is activated
for the remaining input range up to the positive supply rail
during which the PNP stage remains inactive. The offset
than 100mA and the total supply voltage is less than
180345f
14
LT1803/LT1804/LT1805
W U U
APPLICATIO S I FOR ATIO
U
12.6V, the absolute maximum rating, no damage will
occur to the device.
Capacitive Load
TheLT1803/LT1804/LT1805areoptimizedforwideband-
width, low power and precision applications. They can
drive a capacitive load of about 20pF in a unity-gain
configuration, and more for higher gain. When driving a
larger capacitive load, a resistor of 10Ω to 50Ω should be
connected between the output and the capacitive load to
avoid ringing or oscillation. The feedback should still be
taken from the output so that the resistor will isolate the
capacitive load to ensure stability. Graphs on capacitive
load indicate the transient response of the amplifier when
driving a capacitive load with a specified resistor.
Overdrive Protection
When the input voltage exceeds the power supplies, two
pairs of crossing diodes D1 through D4 will prevent the
outputfromreversingpolarity.Iftheinputvoltageexceeds
either power supply by 700mV, diode D1/D2 or D3/D4 will
turn on to keep the output at the proper polarity. For the
phase reversal protection to perform properly, the input
current must be limited to less than 10mA. If the amplifier
is severely overdriven, an external resistor should be used
to limit the overdrive current.
Feedback Components
The LT1803/LT1804/LT1805’s input stages are also pro-
tected against a large differential input voltage of 1.4V or
higher by a pair of back-to-back diodes D5 through D8 to
prevent the emitter-base breakdown of the input transis-
tors. The current in these diodes should be limited to less
than 10mA when they are active. The worst-case differen-
tial input voltage usually occurs when the input is driven
while the output is shorted to ground in a unity gain
configuration.Inaddition,theamplifierisprotectedagainst
ESD strikes up to 3kV on all pins by a pair of protection
diodes on each pin that is connected to the power supplies
as shown in Figure 1.
Whenfeedbackresistorsareusedtosetupgain,caremust
be taken to ensure that the pole formed by the feedback
resistors and the total capacitance at the inverting input
does not degrade stability. For instance, the LT1803/
LT1804/LT1805 in a noninverting gain of 2 setup with two
5k resistors and a capacitance of 5pF (part plus PC board)
will probably oscillate. The pole formed at 12.7MHz,
reduces phase margin by about 58 degrees when the
crossover frequency of the amplifier is around 20MHz. A
capacitor of 5pF or higher connected across the feedback
resistor will eliminate any ringing or oscillation.
180345f
15
LT1803/LT1804/LT1805
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
NOTE:
S5 TSOT-23 0302
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
180345f
16
LT1803/LT1804/LT1805
U
PACKAGE DESCRIPTIO
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 ±0.05
3.5 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.28 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.38 ± 0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(DD8) DFN 0203
4
1
0.28 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. EXPOSED PAD SHALL BE SOLDER PLATED
180345f
17
LT1803/LT1804/LT1805
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
.160 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
180345f
18
LT1803/LT1804/LT1805
U
PACKAGE DESCRIPTIO
S Package
14-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.337 – .344
.045 ±.005
(8.560 – 8.738)
.050 BSC
N
NOTE 3
13
12
11
10
8
14
N
9
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
1
2
3
N/2
N/2
7
.030 ±.005
TYP
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0° – 8° TYP
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
.016 – .050
(0.406 – 1.270)
S14 0502
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
180345f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1803/LT1804/LT1805
U
TYPICAL APPLICATIO
500mA Pulse Response of LED Array Driver
LED Array Driver
10V
5V
3.01k
7
3
2
V
+
–
IN
INTERNATIONAL
RECTIFIER
10Ω
PIN 3
0V
6
LT1803
4
332Ω
IRLL3303
I
OUT
V
27pF
SENSE
0V
• • •
332Ω
2 FOOT WIRE
SENSE
V
PIN 6
FET
SOURCE
I
V
• 1A
SCANNER LED ARRAY
RATED 600mA AT 5V
OUT = IN
R
SENSE
0.1Ω
(NOT CURRENT LIMITED UNDER
SHORT-CIRCUIT CONDITIONS)
0V
1803 TAO3a
1803 TA03b
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1399
Triple 300MHz Current Feedback Amplifier
0.1dB Gain Flatness to 150MHz, Shutdown
LT1498/LT1499 Dual/Quad 10MHz, 6Vµs Rail-to-Rail Input and Output
High DC Accuracy, 475µV V
Max Supply Current 2.2mA per Amp
, 4µV/°C Max Drift,
OS(MAX)
C-LoadTM Op Amps
LT1630/LT1631 Dual/Quad 30MHz, 10V/µs Rail-to-Rail Input and Output Op Amps
High DC Accuracy, 525µV V
Max Supply Current 4.4mA per Amplifier
, 70mA Output Current,
OS(MAX)
LT1800/LT1801 Single/Dual/Quad 80MHz, 25V/µs Low Power Rail-to-Rail
High DC Accuracy, 350µV V
2mA per Amplifier
, Max Supply Currrent
OS(MAX)
LT1802
Input/Output Precision Op Amps
LT1806/LT1807 Single/Dual 325MHz, 140V/µs Rail-to-Rail Input/Output Amps
LT1809/LT1810 Single/Dual 180MHz Rail-to-Rail Input/Output Op Amps
LT6200/LT6201 Single/Dual Ultralow Noise Rail-to-Rail Amplifier
High DC Accuracy, 550µV V
Low Distortion –80dB at 5MHz, Power-Down (LT1806)
, Low Noise 3.5nV/√Hz,
OS(MAX)
350V/µs Slew Rate, Low Distortion –90dB at 5MHz,
Power-Down (LT1809)
0.95nV/Hz, 165MHz Gain Bandwidth, 44V/µs
LT6200-5
Single Ultralow Noise Rail-to-Rail Amplifier
Single Ultralow Noise Rail-to-Rail Amplifier
0.95nV/Hz, 800MHz Gain Bandwidth, 210V/µs, A ≥5
V
LT6200-10
0.95nV/Hz, 1.6GHz Gain Bandwidth, 340V/µs, A ≥10
V
LT6202/LT6203 Single/Dual/Quad 90MHz, 24V/µs Rail-to-Rail Input/Output,
LT6204 Ultralow 1.9nV/√Hz Noise, Low Power Op Amps
High DC Accuracy, 500µV V
3mA per Amplifier
, Max Supply Currrent
OS(MAX)
C-Load is a trademark of Linear Technology Corporation.
180345f
LT/TP 0803 1K • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2003
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