LT1431CN8 [Linear]
Programmable Reference; 可编程参考型号: | LT1431CN8 |
厂家: | Linear |
描述: | Programmable Reference |
文件: | 总12页 (文件大小:273K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1431
Programmable Reference
U
DESCRIPTIO
EATURE
S
F
■
■
■
■
■
Guaranteed 0.4% Initial Voltage Tolerance
0.1Ω Typical Dynamic Output Impedance
Fast Turn-On
Sink Current Capability, 1mA to 100mA
Low Reference Pin Current
The LT1431 is an adjustable shunt voltage regulator with
100mA sink capability, 0.4% initial reference voltage tol-
erance, and 0.3% typical temperature stability. On-chip
dividerresistorsallowtheLT1431tobeconfiguredasa5V
shunt regulator, with 1% initial voltage tolerance and
requiring no additional external components. By adding
twoexternalresistors,theoutputvoltagemaybesettoany
value between 2.5V and 36V. The nominal internal current
limit of 100mA may be decreased by including one exter-
nal resistor.
O U
PPLICATI
S
A
■
■
■
Linear Regulators
Adjustable Power Supplies
Switching Power Supplies
A simplified three pin version, the LT1431Z/IZ, is available
for applications as an adjustable reference and is pin
compatible with the TL431.
U
O
TYPICAL APPLICATI
Isolated 5V Regulator
+
5V
+
+
R
TOP
COLL
COMP
V
SWITCHING
REGULATOR
V
IN
REF
+
gm =
4mA/V
–
R
MID
–
2.5V
LT1431
GND-F
GND-S
LT1431 • TA01
1
LT1431
W W W
U
ABSOLUTE AXI U RATI GS
JunctionTemperature Range
V+, VCOLLECTOR ....................................................... 36V
VCOMP, RTOP,RMID,VREF ............................................ 6V
GND-F to GND-S.................................................... 0.7V
Ambient Temperature Range
LT1431M ........................................ –55°C to 150°C
LT1431I .......................................... –40°C to 100°C
LT1431C ............................................. 0°C to 100°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................ 300°C
LT1431M ........................................ –55°C to 125°C
LT1431I ............................................ –40°C to 85°C
LT1431C .............................................. 0°C TO 70°C
W
U
/O
PACKAGE RDER I FOR ATIO
ORDER PART
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
BOTTOM VIEW
NUMBER
3
2
1
COLLECTOR
COMP
1
2
3
4
REF
R
COLLECTOR
COMP
1
2
3
4
8
7
6
5
REF
R
8
7
6
5
REF ANODE
CATHODE
LT1431MJ8
LT1431CN8
LT1431IN8
LT1431CS8
LT1431IS8
LT1431CZ
LT1431IZ
MID
MID
+
+
V
GND-F
GND-S
V
GND-F
GND-S
R
R
TOP
TOP
PART
MARKING
J8 PACKAGE
N8 PACKAGE
S8 PACKAGE
8-LEAD PLASTIC SOIC
Z PACKAGE
3-LEAD TO-92 PLASTIC
8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP
TJ MAX = 150°C, θJA = 100°C/W (J)
TJ MAX = 100°C, θJA = 130°C/W (N)
TJ MAX = 100°C, θJA = 170°C/W
TJ MAX = 100°C, θJA = 160°C/W
LT1431
LT1431I
T = 25°C, I = 10mA, unless otherwise specified (Note 1).
ELECTRICAL CHARACTERISTICS
A
K
LT1431M/I
LT1431C
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX UNITS
V
Reference Voltage
V
= 5V, I = 2mA, (Note 2)
2.490 2.500 2.510 2.490 2.500 2.510
V
V
REF
KA
K
●
●
●
2.465
2.535 2.480
2.520
∆V /∆T
Reference Drift
V
= 5V, I = 2mA
50
30
ppm/°C
REF
KA
K
∆V /∆V
Voltage Ratio, Reference to
Cathode (Open-Loop Gain)
I = 2mA, V = 3V to 36V
K
0.2
0.5
0.2
0.5
mV/V
REF
KA
KA
|I
|
Reference Input Current
V
= 5V, T = 25°C
0.2
0.6
1.0
1.5
0.2
0.6
1.0
1.2
µA
µA
REF
KA
A
●
I
Minimum Operating Current
Off-State Cathode Current
V
V
= V
to 36V
REF
1.0
1.0
mA
MIN
KA
KA
|I
OFF
|
= 36V, V
= 0V
REF
1
15
1
2
µA
µA
●
●
+
|I
LEAK
|
Off-State Collector Leakage Current
V
= 36V, V = 5V, V = 2.4V
1
5
1
2
µA
µA
COLL
REF
|Z
|
Dynamic Impedance
Collector Current Limit
5V Reference Output
V
V
= V , I = 1mA to 100mA, f ≤ 1kHz
0.2
0.2
Ω
mA
V
KA
KA
KA
REF
K
I
= V
+ 50mV
●
80
360
100
260
LIM
REF
Internal Divider Used, I = 2mA
4.950 5.000 5.050 4.950 5.000 5.050
K
The
● denotes specifications which apply over the operating temperature
Note 2: The LT1431 has bias current cancellation which is effective only
range.
for V ≥ 3V. A slight (≈2mV) shift in reference voltage occurs when
KA
V
KA
V
KA
drops below 3V. For this reason, these tests are not performed at
Note 1: V is the cathode voltage of the LT1431CZ/IZ and corresponds to
KA
+
V
of the LT1431CN8/MJ8. I is the cathode current of the LT1431CZ/IZ
= V
.
K
REF
+
and corresponds to I(V ) + I
of the LT1431CN8/MJ8/IN8.
COLLECTOR
2
LT1431
U W
TYPICAL PERFOR A CE CHARACTERISTICS
2.5V Reference IK vs VKA
VREF and IREF vs V+
1000
900
800
700
600
500
400
300
200
100
0
2.505
2.504
2.503
2.502
2.501
2.500
2.499
2.498
2.497
2.496
2.495
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
I
MIN
V
REF
I
REF
–0.5
–1.0
–1.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(V)
2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
+
V
V (V)
KA
LT1431 • TPC01
LT1431 • TPC02
VREF and IREF vs V+
VREF and IREF vs Temperature
2.505
2.504
2.503
2.502
2.501
2.500
2.499
2.498
2.497
2.496
2.495
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.5025
2.5000
2.4975
2.4950
1.00
0.66
0.33
0
V
REF
I
REF
V
REF
2.4925
2.4900
2.4875
–0.33
–0.66
–1.00
I
REF
–0.5
–1.0
–1.5
0
4
8
12 16 20 24 28 32 36 40
+
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
V
(V)
LT1431 • TPC03
LT1027 • TPC04
ILIMIT vs Temperature with
External Resistor
COLLECTOR VSAT vs
Temperature vs Current
Propagation Delay vs Overdrive
1.250
1.125
1.000
0.875
1.20
1.00
0.80
0.60
150
135
0.7
LIM
1k
5V
3
I
=
AT 25°C
LIMIT
OUTPUT
R
+ 3.6
1
6
120
105
V
REF
± OVERDRIVE
LT1431
I
= 100mA
COLL
5
90
75
I
= 50mA
= 20mA
60
45
COLL
0.750
0.625
0.500
0.40
0.20
0
OUTPUT HIGH-TO-LOW
OUTPUT LOW-TO-HIGH
I
I
30
15
COLL
= 10mA
75
COLL
50
0
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
100 125
0
50
150
OVERDRIVE (mV)
200
250
–50 –25
0
25
100
TEMPERATURE (°C)
LT1431 • TPC05
LT1431 • TPC07
LT1431 • TPC06
3
LT1431
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Gain and Phase
Transconductance and Phase
vs Frequency (REF to COLL)
vs Frequency
10
10
180
135
90
140
120
100
80
180
135
90
PHASE
9
8
7
6
5
4
3
2
10
PHASE
gm
10
10
10
10
10
10
10
A
V
45
45
0
60
0
–45
–90
–135
–180
40
–45
–90
–135
–180
20
0
–20
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
LT1431 • TPC09
LT1431 • TPC08
Transconductance and Phase vs
Frequency (Ref to Comp)
VCOMP vs Temperature vs ICOLL
Dynamic Impedance vs Frequency
4
3
10
3 × 10
10
20
0
1.4
3.0
2.5
2.0
1.5
PHASE
gm
I
≤ 100mA
K
1.2
1.0
0.8
0.6
0.4
0.2
0
–20
–40
–60
–80
I
I
= 100mA
= 10mA
COLL
COLL
3
1.0
0.5
0
2
3 × 10
–100
–120
–140
0.1
100
1k
10k
100k
1M
10M
100
1k
10k
100k
–50 –25
25
50
75
100 125
0
FREQUENCY (Hz)
FREQUENCY (Hz)
TEMPERATURE (˚C)
LT1431 • TPC10
LT1431 • TPC11
LT1431 • TPC12
ICOMP vs VCOMP vs VREF
Noise vs Frequency
0.1Hz to 10Hz Noise
1000
500
0
600
500
400
300
V
V
= 5V
= 4V
REF
REF
V
V
= 3V
REF
REF
200
100
0
= 2.53V
1
10
100
1k
10k
100k
4
6
2.0
(V)
3.0 3.5
0
1
2
3
5
0
0.5
1.0 1.5
2.5
FREQUENCY (Hz)
TIME (MINUTES)
V
COMP
LT1431 • G14
LT1431 • TPC15
LT1431 • TPC13
4
LT1431
U
U
U
PI FU CTIO S
COLL (Pin 1): Open collector of the output transistor. The
maximum pin voltage is 26V. The saturation voltage at
100mA is approximately 1V.
RMID (Pin 7): Middle of the on-chip resistive divider string
between RTOP and GND-S. The pin is tied to REF for self-
contained 5V operation. It may be left open if unused.
COMP (Pin 2): Base of the driver for the output transistor.
This pin allows additional compensation for complex
feedback systems and shutdown of the regulator. It must
be left open if unused.
V+ (Pin 3): Bias voltage for the entire shunt regulator. The
maximum input voltage is 36V and the minimum to
operate is equal to VREF (2.5V). The quiescent current is
typically 0.6mA.
REF (Pin 8): Control pin of the shunt regulator with a 2.5V
threshold. If V+ > 3V, input bias current cancellation
reduces IB to 0.2µA typical.
COMP, RTOP, RMID, and REF have static discharge protec-
tion circuits that must not be activated on a continuous
basis. Therefore, the absolute maximum DC voltage on
these pins is 6V, well beyond the normal operating condi-
tions.
RTOP (Pin 4): Top of the on-chip 5k-5k resistive divider
that guarantees 1% accuracy of operation as a 5V shunt
regulator with no external trim. The pin is tied to COLL for
self-contained 5V operation. It may be left open if unused.
See note on parasitic diodes below.
As with all bipolar ICs, the LT1431 contains parasitic
diodes which must not be forward biased or else anoma-
lous behavior will result. Pin conditions to be avoided are
R
TOP below RMID in voltage and any pin below GND-F in
voltage (except for GND-S).
GND-S (Pin 5): Ground reference for the on-chip resistive
divider and shunt regulator circuitry except for the output
transistor. This pin allows external current limit of the
output transistor with one resistor between GND-F (force)
and GND-S (sense).
The following pin definitions apply to the Z package.
CATHODE (Pin 1): Corresponds to COLL and V+ tied
together.
ANODE (Pin 2): Corresponds to GND-S and GND-F tied
together.
GND-F (Pin 6): Emitter of the output transistor and sub-
strate connection for the die.
REF (Pin 3): Corresponds to REF.
W
BLOCK DIAGRA
+
3
R
V
COMP
2
COLLECTOR
1
TOP
4
5k
8
+
–
REF
gm =
4mA/V
7
R
MID
5k
2.5V
5
6
GND-SENSE
GND-FORCE
LT1431 • BD01
5
LT1431
U U
W
U
APPLICATIO S I FOR ATIO
Frequency Compensation
pole-zero compensation. This can be accomplished with a
capacitor or series resistor and capacitor between COLL
and COMP.
Asashuntregulator, theLT1431isstableforallcapacitive
loads on the COLL pin. Capacitive loading between 0.01µF
and18µFcausesreducedphasemarginwithsomeringing
under transient conditions. Output capacitors should not
be used arbitrarily because output noise is not necessarily
reduced.
The compensation schemes mentioned above use voltage
feedback to stabilize the circuits. There must be voltage
gain at the COLL pin for them to be effective, so the COLL
pin must see a reasonable AC impedance. Capacitive
loading of the COLL pin reduces the AC impedance,
voltage gain, and frequency response, thereby decreasing
the effectiveness of the compensation schemes, but also
decreasing their necessity.
Excess capacitance on the REF pin can introduce enough
phase shift to induce oscillation when configured as a
reference >2.5V. This can be compensated with capaci-
tance between COLL and REF (phase lead). More compli-
cated feedback loops may require shaping of the fre-
quency response of the LT1431 with dominant pole or
U
TYPICAL APPLICATIO S
2.5V Reference
8-Pin Package
2.5V Reference
3-Pin Package
5V Reference
R
L
R
R
L
L
V
IN
V
V
IN
IN
2.5V
2.5V
5V
+
+
CATHODE
REF
V
COLL
REF
V
COLL
R
REF
TOP
LT1431Z
LT1431
LT1431
R
MID
ANODE
GND-S
GND-F
GND-S
GND-F
LT1431 • TA04
LT1431 • TA03
LT1431 • TA02
Programmable Reference with Adjustable
Current Limit
Increasing 5V Reference
R
L
R
L
V
V
IN
IN
R1
R2
5V + ∆
V
= 1 +
V
REF
OUT
(
)
+
R
V
COLL
REF
R1
R2
+
V
COLL
REF
R
TOP
LT1431
LT1431
R
MID
GND-S
GND-F
GND-S
GND-F
LT1431 • TA05
R
0.7
+ 3.6
LIM
I
=
AT 25°C
LIMIT
∆ = R × (0.5mA) ±25% PROCESS TOLERANCE
∆ ≤ 500mV
R
LIM
LT1431 • TA06
6
LT1431
U
TYPICAL APPLICATIO S
PNP Low Dropout 5V Regulator*
V
IN
0.1µF
20Ω**
2W
47Ω
MJE2955
1k
2N2219
0.015µF
150Ω
2
1
COMP
+
COLL
3
4
8
7
V
REF
LT1431
R
R
MID
TOP
GND-S
5
GND-F
6
5V
+
MEASURED DROPOUT VOLTAGE
330µF
420mV AT 4A
190mV AT 2A
95mV AT 1A
60mV AT 0.5A
LT1431 • TA07
*NO SHORT-CIRCUIT PROTECTION
**MAY BE INCREASED AT LOWER WATTAGE
FOR LOWER OUTPUT CURRENTS
FET Low Dropout 5V Regulator with Current Limit
12V
MTP50N05EL
MTM25N05L
0.002Ω*
V
IN
≥ 5.2V
5V, 2.5A
47µF
D
S
2
3
+
+
47µF
+
G
–
4
1.5V
7
5
1N4148
6
1
COLL
3
4
8
7
+
V
REF
Measured Dropout Voltages
LT1431
R
R
MID
I
MTP50N05EL MTM25N05L
TOP
LOAD
2A
1A
GND-S
5
GND-F
47mV
22mV
145mV
73mV
37mV
6
0.5A
11.5mV
LT1431 • TA08
*1.5" #23 SOLID COPPER WIRE
~0.002Ω → 3A LIMIT
7
LT1431
U
TYPICAL APPLICATIO S
12V to 5V Buck Converter with Foldback Current Limit*
Buck Converter Efficiency
80
PULSE ENGINEERING
#PE-51515
V
V
= 9V
IN
V
OUT
V
V
IN
IN
LT1089
HI-SIDE SWITCH
70
60
= 12V
IN
100Ω
0.5W
MBR735
LOGIC IN
GND
V
= 15V
IN
5k
50
40
30
1500pF
2
1
COLL
REF
COMP
+
3
4
8
7
V
LT1431
4
0
1
2
3
5
6
7
8
R
R
MID
TOP
I
(A)
LOAD
GND-S
5
GND-F
6
LT1431 • TA10
5V, 7A
3300µF
+
*CONTACT LTC FOR HIGH EFFICIENCY
SWITCHING REGULATORS
LT1431 • TA09
Fully Loaded Output Ripple vs Filtering
Isolated 5V to ±15V Flyback Converter
COILTRONICS
CTX02-11934
MUR105
C*
LT1172
LT1072
+
6, 7
9
4.5V
TO 5.5V
–15V, 70mA
30mV
P-P
40mV
P-P
210µF
C*
0.47µF
+
+
15k
3k
L*
100µF
MUR105
+
+
•
4, 5
•
6mV
8mV
P-P
P-P
100µF
2
+
10
V
V
OUT
50µF
IN
LT1431 • TA12
LT1172
OR
LT1072
*L BELL INDUSTRIES J.W. MILLER
DIVISION 9310-36 10µH, 450mA
MUR105
•
GND
V
C
15V, 70mA
1
C*
1.5k
3
13.3k
2.7k
4N36
0.68µF
+
2.4k
V
1
2
8
MEASURED EFFICIENCY
COLL
REF
LT1172
LT1072
LT1071
67.8% AT 2.2W
0.1µF
OUT
LT1431
20k
68.6% AT 2.2W
OUT
COMP
GND-S
61.1% AT 4.4W
OUT
GND-F
6
5
LT1431 • TA11
8
LT1431
U
TYPICAL APPLICATIO S
5V Power Supply Monitor with ±500mV
Window and 50mV Hysteresis
Transfer Function
6
5
4
3
2
1
0
1k
6k*
1N4148
1k
4k*
“HIGH” FOR
OVER VOLTAGE OR
UNDER VOLTAGE
+
+
V
COLL
REF
V
COLL
REF
LT1431
GND-S GND-F
LT1431
GND-S GND-F
5k
5k
*DETERMINES WINDOW SIZE
V = (R – 5)(0.5mA)
**SETS HYSTERESIS
10Ω**
10Ω**
0
2
3
4
5
6
1
V
IN
LT1431 • TA13
LT1431 • TA14
High Efficiency Buck Converter E = 85% to 89%
1
V
IN
D1
BAT85
C1
+
BOLD LINE INDICATES HIGH CURRENT PATHS
* = 1% FILM RESISTORS
220µF
35V
5
C1 = NICHICON-UPL1V221MPH
C6 = NICHICON-UPL1C471MPH6
D1, D2 = PHILIPS-BAT85
4
2
V
IN
V
SW
D3 = MOTORALA-MBR330
L1 = COILTRONICS CTX50-3-MP
C3, C4, C5 = WIMA-MKS-2
C5
0.047µF
LT1170
FB
GND
V
C
R1
470k
3
1
C4
0.033µF
R2
1k
C3
0.1µF
C2
+
D4
BAT85
4.7µF 35V
C6
0.12mΩ
470µF
TANTALUM
D3
MBR330
ESR
L1
50µH 3A
+
16V
5V
2.5A
D2
BAT85
R6*
23.7k
Q2
2N3904
RUN = 0
2
1
SHUTDOWN > 3V
1
2
Q1
COMP
COLL
OFF
Q3
2N3904
3
VN2222LL
+
8
V
REF
VR2
LT1431CN8
4
7
R
R3
10k
R
MID
GND-F
TOP
GND-S
R7*
24.9k
R5
680Ω
R8*
24.9k
R4
100Ω
5
6
RTN
NOTES: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTANCES ARE IN Ω, 0.25W, 5%
2. ALL CAPACITANCES ARE IN µF, 50V, 10%
3. SHUTDOWN LOGIC STATE MUST BE DEFINED BY A LOGIC GATE OR BY TYING TO GND
LT1431 • TA15
9
LT1431
W
W
SCHE ATIC DIAGRA
+
V
3
Q5
4X
Q7
3X
Q13
Q17
R1
35k
R2
35k
Q2
Q11
Q12
Q1
Q10
Q3
COMP
2
COLLECTOR
1
Q6
2X
C1
C3
6pF
R12
1k
22pF
Q9
5X
Q14
8
R15
5k
R17
1.5k
REF
Q20
2X
R6
8.5k
R11
11k
C2
65pF
R13
6.5k
Q22
45X
C4
1pF
Q4
R7
2.5k
4
7
R
R
TOP
R3
5k
Q18 Q19
R9
2.5k
R20
5k
Q8
10X
R16
Q15
Q16
11Ω
MID
Q21
2.5X
R14
11Ω
R4
5k
R5
5k
R18
50k
R8
600Ω
R10
340Ω
R21
100k
R19
3.6Ω
5
GND-SENSE
6
GND-FORCE
LT1431 • SD01
10
LT1431
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead Ceramic DIP
0.405
(10.287)
MAX
0.005
(0.127)
MIN
6
5
4
8
7
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
1
2
3
0.200
(5.080)
MAX
0.290 – 0.320
(7.366 – 8.128)
0.055
(1.397)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.460)
0° – 15°
0.038 – 0.068
(0.965 – 1.727)
0.385 ± 0.025
(9.779 ± 0.635)
0.125
3.175
MIN
0.100 ± 0.010
0.014 – 0.026
(2.540 ± 0.254)
(0.360 – 0.660)
J8 0392
N8 Package
8-Lead Plastic DIP
0.400
(10.160)
MAX
8
7
6
5
0.250 ± 0.010
(6.350 ± 0.254)
1
2
4
3
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.025
0.045 ± 0.015
(1.143 ± 0.381)
0.325
–0.015
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
N8 0392
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
11
LT1431
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
7
5
8
6
0.228 – 0.244
0.150 – 0.157
(5.791 – 6.197)
(3.810 – 3.988)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
0°– 8° TYP
SO8 0392
Z Package
3-Lead TO-92
0.060 ± 0.005
0.180 ± 0.005
0.060 ± 0.010
(1.524 ± 0.254)
(1.524± 0.127)
DIA
(4.572 ± 0.127)
0.90
(2.286)
NOM
0.140 ± 0.010
(3.556 ± 0.127)
0.180 ± 0.005
(4.572 ± 0.127)
5°
NOM
10° NOM
0.050
0.500
(12.79)
MIN
(1.270)
MAX
UNCONTROLLED
LEAD DIA
0.020 ± 0.003
(0.508 ± 0.076)
Z3 1191
0.015 ± 0.02
(0.381 ± 0.051)
0.016 ± 0.03
(0.406 ± 0.076)
0.050 ± 0.005
(1.270 ± 0.127)
LT/GP1292 5K REV B
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
12
●
●
LINEAR TECHNOLOGY CORPORATION 1992
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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