LT1307BCMS8#TR [Linear]
LT1307 - Single Cell Micropower 600kHz PWM DC/DC Converters; Package: MSOP; Pins: 8; Temperature Range: 0°C to 70°C;型号: | LT1307BCMS8#TR |
厂家: | Linear |
描述: | LT1307 - Single Cell Micropower 600kHz PWM DC/DC Converters; Package: MSOP; Pins: 8; Temperature Range: 0°C to 70°C 开关 光电二极管 |
文件: | 总20页 (文件大小:365K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1307/LT1307B
Single Cell Micropower
600kHz PWM DC/DC Converters
U
FEATURES
DESCRIPTIO
The LT®1307/LT1307B are micropower, fixed frequency
DC/DC converters that operate from an input voltage as
low as 1V. First in the industry to achieve true current
mode PWM performance from a single cell supply, the
LT1307 features automatic shifting to power saving Burst
Mode operation at light loads. High efficiency is main-
tained over a broad 100µA to 100mA load range. The
LT1307B does not shift into Burst Mode operation at light
loads, eliminating low frequency output ripple at the
expenseoflightloadefficiency. Thedevicescontainalow-
battery detector with a 200mV reference and shut down to
less than 5µA. No load quiescent current of the LT1307 is
50µAandtheinternalNPNpowerswitchhandlesa500mA
current with a voltage drop of just 295mV.
■
Uses Small Ceramic Capacitors
■
50µA Quiescent Current (LT1307)
■
1mA Quiescent Current (LT1307B)
■
Operates with VIN as Low as 1V
■
600kHz Fixed Frequency Operation
■
Starts into Full Load
■
Low Shutdown Current: 3µA
■
Low-Battery Detector
■
3.3V at 75mA from a Single Cell
Automatic Burst Mode® Operation at
■
Light Load (LT1307)
■
Continuous Switching at Light Load (LT1307B)
■
Low VCESAT Switch: 295mV at 500mA
U
Unlike competitive devices, large electrolytic capacitors
are not required with the LT1307/LT1307B in single cell
applications. The high frequency (600kHz) switching al-
lows the use of tiny surface mount multilayer ceramic
(MLC) capacitors along with small surface mount induc-
tors. The devices work with just 10µF of output capaci-
tance and require only 1µF of input bypassing.
APPLICATIO S
■
Pagers
■
Cordless Telephones
■
GPS Receivers
Battery Backup
■
■
Portable Electronic Equipment
■
Glucose Meters
The LT1307/LT1307B are available in 8-lead MSOP, PDIP
and SO packages.
■
Diagnostic Medical Instrumentation
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
U
TYPICAL APPLICATIO
Single Cell to 3.3V Converter Efficiency
L1
10µH
D1
90
C1: MURATA-ERIE GRM235Y5V105Z01
MARCON THCS50E1E105Z
TOKIN 1E105ZY5U-C103-F
V
LBI
LT1307
SHDN
V
SW
FB
IN
C1
3.3V
80
70
60
50
C2: MURATA-ERIE GRM235Y5V106Z01
MARCON THCS50E1E105Z
1µF
75mA
V
IN
= 1.5V
V
R1
1.02M
1%
TOKIN 1E106ZY5U-C304-F
1.5V
SHUTDOWN
LBO
GND
CELL
= 1V
D1: MOTOROLA MBR0520L
L1: COILCRAFT D01608C-103
SUMIDA CD43-100
IN
C
C2
10µF
V
IN
= 1.25V
R2
604k
1%
100k
680pF
MURATA ERIE LQH3C100
FOR 5V OUTPUT: R1 = 1M, R2 = 329k
1307 F01
0.1
1
10
100
Figure 1. Single Cell to 3.3V Boost Converter
LOAD CURRENT (mA)
1307 TA01
1307fa
1
LT1307/LT1307B
W W U W
ABSOLUTE AXI U RATI GS (Note 1)
VIN, SHDN, LBO Voltage ......................................... 12V
SW Voltage ............................................................. 30V
FB Voltage ....................................................... VIN + 1V
VC Voltage ................................................................ 2V
LBI Voltage ............................................ 0V ≤ VLBI ≤ 1V
Current into FB Pin .............................................. ±1mA
Junction Temperature...........................................125°C
Operating Temperature Range
Commercial (Note 2) ......................... –20°C to 70°C
Industrial ........................................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
LT1307CMS8
LT1307CN8
V
1
2
3
4
8
7
6
5
LBO
LBI
C
V
1
2
3
4
8 LBO
7 LBI
C
LT1307BCMS8
LT1307CS8
LT1307IS8
LT1307BCS8
LT1307BIS8
FB
SHDN
GND
FB
SHDN
GND
6 V
IN
V
IN
5 SW
SW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 160°C/W
MS8 PART MARKING
S8 PART MARKING
TJMAX = 125°C, θJA = 100°C/W (N8)
JMAX = 125°C, θJA = 120°C/W (S8)
T
1307
1307B
1307I
1307BI
LTIC
LTIB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
Commercial Grade 0°C to 70°C. VIN = 1.1V, VSHDN = VIN, LT1307/LT1307B unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Quiescent Current
Not Switching (LT1307)
Not Switching (LT1307B)
●
●
●
50
1.0
1
90
1.5
3
µA
mA
µA
Q
V
SHDN
= 0V
V
Feedback Voltage
●
●
1.20
1.22
27
1.24
60
V
FB
I
FB Pin Bias Current (Note 3)
Reference Line Regulation
V
= V
nA
B
FB
REF
1V ≤ V ≤ 2V (25°C, 0°C)
1V ≤ V ≤ 2V (70°C)
2V ≤ V ≤ 5V
0.6
1.1
1.5
0.8
%/V
%/V
%/V
IN
IN
●
0.3
IN
Minimum Input Voltage
Input Voltage Range
0.92
1
5
V
V
●
●
1
g
Error Amp Transconductance
Error Amp Voltage Gain
∆I = 5µA
25
35
65
µmhos
m
A
V
25°C, 0°C
70°C
35
30
100
V/V
V/V
f
Switching Frequency
●
550
600
750
kHz
OSC
1307fa
2
LT1307/LT1307B
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
Commercial Grade 0°C to 70°C. VIN = 1.1V, VSHDN = VIN, LT1307/LT1307B unless otherwise noted.
SYMBOL PARAMETER
Maximum Duty Cycle
CONDITIONS
MIN
TYP
MAX
UNITS
25°C, 0°C
70°C
80
76
84
%
%
Switch Current Limit (Note 4)
Switch V
DC = 40%
DC = 75%
●
0.6
0.5
1.25
A
A
I
I
= 500mA (25°C, 0°C)
= 500mA (70°C)
295
350
400
mV
mV
CESAT
SW
SW
Burst Mode Operation Switch Current Limit
(LT1307 Only)
L = 10µH
L = 22µH
100
50
mA
mA
Shutdown Pin Current
V
V
= V
= 0V
●
●
2.5
–1.5
4.0
–2.5
µA
µA
SHDN
SHDN
IN
LBI Threshold Voltage
LBO Output Low
●
●
●
●
190
200
0.1
210
0.25
0.1
mV
V
I
= 10µA
SINK
LBO Leakage Current
V
V
= 250mV, V
= 5V
LBO
0.01
5
µA
nA
LBI
LBI
LBI Input Bias Current (Note 5)
Low-Battery Detector Gain
= 150mV
25
1MΩ Load (25°C, 0°C)
1MΩ Load (70°C)
1000
500
3000
V/V
V/V
Switch Leakage Current
Reverse Battery Current
V
= 5V
●
0.01
750
3
µA
SW
(Note 6)
mA
Commercial Grade TA = –20°C, VIN = 1.1V, VSHDN = VIN, unless otherwise noted (Note 2).
SYMBOL PARAMETER CONDITIONS
MIN
TYP
MAX
UNITS
I
Quiescent Current
V
V
V
= 1.3V, Not Switching (LT1307)
= 1.3V, Not Switching (LT1307B)
50
1.1
1
100
1.6
3
µA
mA
µA
Q
FB
FB
= 0V
SHDN
V
Feedback Voltage
1.195
25
1.22
35
1.245
65
V
µmhos
V/V
FB
g
Error Amp Transconductance
Error Amp Voltage Gain
Switching Frequency
Maximum Duty Cycle
∆I = 5µA
m
A
V
35
100
600
84
f
500
80
750
350
kHz
OSC
%
Switch V
I
= 500mA, V = 1.2V
250
mV
CESAT
SW
IN
Shutdown Pin Current
V
SHDN
V
SHDN
= V
= 0V
2.5
–1.5
4.0
–2.5
µA
µA
IN
LBI Threshold Voltage
186
200
210
mV
1307fa
3
LT1307/LT1307B
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
Industrial Grade –40°C to 85°C. VIN = 1.1V, VSHDN = VIN, LT1307/LT1307B unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Quiescent Current
V
V
V
= 1.3V, Not Switching (LT1307)
= 1.3V, Not Switching (LT1307B)
●
●
●
50
1
1
100
1.8
3
µA
mA
µA
Q
FB
FB
= 0V
SHDN
V
Feedback Voltage
●
●
1.195
10
1.22
27
1.245
100
V
FB
I
FB Pin Bias Current (Note 3)
Reference Line Regulation
V
= V
nA
B
FB
REF
1V ≤ V ≤ 2V (–40°C)
1V ≤ V ≤ 2V (85°C)
2V ≤ V ≤ 5V
0.6
1.1
3.2
0.8
%/V
%/V
%/V
IN
IN
●
0.3
IN
Minimum Input Voltage
–40°C
85°C
1.1
0.8
1.2
1.0
V
V
Input Voltage Range
●
●
5
V
g
Error Amp Transconductance
Error Amp Voltage Gain
∆I = 5µA
25
35
65
µmhos
m
A
–40°C
85°C
35
30
V/V
V/V
V
f
Switching Frequency
Maximum Duty Cycle
●
●
500
600
750
kHz
OSC
–40°C
85°C
80
75
84
80
%
%
Switch Current Limit (Note 4)
DC = 40%
DC = 75%
0.6
0.5
1.25
A
A
Switch V
I
I
= 500mA, V = 1.2V (–40°C)
= 500mA (85°C)
250
330
350
400
mV
mV
CESAT
SW
SW
IN
Burst Mode Operation Switch Current Limit
(LT1307 Only)
L = 10µH
L = 22µH
100
50
mA
mA
Shutdown Pin Current
V
V
= V
= 0V
●
●
2.5
–1.5
4.0
–2.5
µA
µA
SHDN
SHDN
IN
LBI Threshold Voltage
LBO Output Low
●
●
●
●
186
200
0.1
0.1
5
210
0.25
0.3
mV
V
I
= 10µA
SINK
LBO Leakage Current
V
V
= 250mV, V
= 5V
LBO
µA
nA
LBI
LBI
LBI Input Bias Current (Note 5)
Low-Battery Detector Gain
= 150mV
30
1MΩ Load (–40°C)
1MΩ Load (85°C)
1000
400
6000
V/V
V/V
Switch Leakage Current
V
= 5V
●
0.01
3
µA
SW
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: Switch current limit guaranteed by design and/or correlation to
static tests. Duty cycle affects current limit due to ramp generator.
Note 2: Specifications for commercial (C) grade devices are guaranteed
but not tested at –20°C. MS8 package devices are designed for and
intended to meet commercial temperature range specifications but are not
tested at – 20°C or 0°C.
Note 5: Bias current flows out of LBI pin.
Note 6: The LT1307/LT1307B will withstand continuous application of
1.6V applied to the GND pin while V and SW are grounded.
IN
Note 3: Bias current flows into FB pin.
1307fa
4
LT1307/LT1307B
U W
TYPICAL PERFOR A CE CHARACTERISTICS
3.3V Output Efficiency, Circuit of
Figure 1 (LT1307B)
5V Output Efficiency, Circuit of
Figure 1 (LT1307B)
5V Output Efficiency, Circuit of
Figure 1 (LT1307)
90
80
70
60
50
90
80
70
60
50
40
30
20
10
90
80
70
60
50
40
30
20
10
V
IN
= 1.5V
V
IN
= 1V
V
IN
= 1.25V
V
IN
= 1.25V
V
IN
= 1V
V
= 1.00V
IN
V
= 1.25V
IN
V
= 1.5V
IN
V
IN
= 1.5V
10
1
LOAD CURRENT (mA)
100
0.1
200
0.1
1
10
100
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LT1307 • G01
1307 G02
1307 G02
Feedback Bias Current vs
Temperature
LBI Bias Current vs Temperature
Quiescent Current vs Temperature
50
40
30
20
16
14
12
10
8
80
V
IN
= 1.1V
70
60
50
40
30
6
20
10
0
4
10
0
2
0
–25
0
50
TEMPERATURE (°C)
–50
–25
0
25
TEMPERATURE (°C)
50
75
100
–50
–25
0
50
75
100
–50
75
100
25
25
TEMPERATURE (°C)
1307 G05
LT1307 • TPC06
1307 G04
Shutdown Pin Bias Current vs
Input Voltage
Switch VCESAT vs Current
Quiescent Current in Shutdown
500
20
16
12
8
10
8
T
= 25°C
A
400
300
200
6
4
4
2
100
0
0
0
0
1
2
3
4
5
0
200
300
400
500
600
0
1
2
3
4
5
100
INPUT VOLTAGE (V)
SWITCH CURRENT (mA)
INPUT VOLTAGE (V)
1307 G07
LT1307 • TPC09
1307 G07
1307fa
5
LT1307/LT1307B
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency vs
Input Voltage
Feedback Voltage vs
LBI Reference vs Temperature
Temperature
1.230
1.225
1.220
1.215
1.210
1.205
1.200
210
208
206
204
202
200
198
196
194
192
190
900
800
700
600
500
400
25°C
85°C
–40°C
–50
0
25
50
75
100
–25
2
3
4
1
–50
–25
25
50
75
100
5
0
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
1307 G10
LT1307 • TPC12
LT1307 • TPC11
Transient Response (LT1307)
Transient Response (LT1307B)
Load Regulation (LT1307)
VOUT
200mV/DIV
AC COUPLED
VOUT
200mV/DIV
VOUT
50mV/DIV
DC
AC COUPLED
COUPLED
OFFSET
ADDED
IL
IL
200mA/DIV
200mA/DIV
55mA
ILOAD
55mA
ILOAD
5mA
5mA
VIN = 1.25V
VOUT = 3.3V
500µs/DIV
1307 G13
VIN = 1.25V
VOUT = 3.3V
500µs/DIV
1307 G14
VIN = 0.92V
VOUT = 3.3V
ILOAD 10mA/DIV
1307 G15
Load Regulation (LT1307)
Load Regulation (LT1307)
Load Regulation (LT1307)
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
V
IN = 1.15V
ILOAD 20mA/DIV
1307 G17
VIN = 1V
VOUT = 5V
ILOAD 10mA/DIV
1307 G18
VIN = 1V
VOUT = 3.3V
ILOAD 20mA/DIV
1307 G16
VOUT = 3.3V
Circuit Operation, L = 10µH
(LT1307)
Circuit Operation, L = 22µH
(LT1307)
Load Regulation (LT1307)
VOUT
50mV/DIV
AC COUPLED
VOUT
50mV/DIV
AC COUPLED
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
VSW
VSW
5V/DIV
5V/DIV
IL
IL
100mA/DIV
100mA/DIV
VIN = 1.25V
VOUT = 5V
ILOAD = 1.5mA
100µs/DIV
1307 G20
VIN = 1.25V
VOUT = 5V
ILOAD = 1.5mA
100µs/DIV
1307 G21
VIN = 1.15V
VOUT = 5V
ILOAD 10mA/DIV
1307 G19
1307fa
6
LT1307/LT1307B
U
U
U
PI FU CTIO S
VC (Pin 1): Compensation Pin for Error Amplifier. Con-
nect a series RC from this pin to ground. Typical values
are 100kΩ and 680pF. Minimize trace area at VC.
SW (Pin 5): Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
VIN (Pin 6): Supply Pin. Must have 1µF ceramic bypass
capacitor right at the pin, connected directly to ground.
FB (Pin 2): Feedback Pin. Reference voltage is 1.22V.
Connect resistor divider tap here. Minimize trace area at
FB. Set VOUT according to: VOUT = 1.22V(1 + R1/R2).
LBI (Pin 7): Low-Battery Detector Input. 200mV refer-
ence. Voltage on LBI must stay between ground and
700mV.
SHDN (Pin 3): Shutdown. Ground this pin to turn off
switcher. MustbetiedtoVIN (orhighervoltage)toenable
switcher. Do not float the SHDN pin.
LBO (Pin 8): Low-Battery Detector Output. Open collec-
tor, can sink 10µA. A 1MΩ pull-up is recommended.
GND (Pin 4): Ground. Connect directly to local ground
plane.
W
BLOCK DIAGRA
V
IN
6
V
IN
+
–
R5
40k
R6
40k
SHDN
V
C
SHUTDOWN
3
g
1
m
V
OUT
LBI
7
R1
ERROR
AMPLIFIER
+
–
+
–
(EXTERNAL)
FB
2
LBO
8
Q1
Q2
*
FB
ENABLE
200mV
×10
R2
BIAS
R3
30k
A4
A1
(EXTERNAL)
R4
140k
SW
5
COMPARATOR
–
+
DRIVER
FF
RAMP
GENERATOR
Q3
R
Q
+
Σ
S
A2
+
+
A = 3
–
0.15Ω
600kHz
OSCILLATOR
4
GND
1307 F02
*HYSTERESIS IN LT1307 ONLY
Figure 2. LT1307/LT1307B Block Diagram
1307fa
7
LT1307/LT1307B
W U U
U
APPLICATIO S I FOR ATIO
OPERATION
200mV. There is no hysteresis in A4, allowing it to be used
as an amplifier in some applications. The entire device is
disabled when the SHDN pin is brought low. To enable the
converter, SHDN must be at VIN or at a higher voltage.
The LT1307 combines a current mode, fixed frequency
PWMarchitecturewithBurstModemicropoweroperation
to maintain high efficiency at light loads. Operation can
best be understood by referring to the block diagram in
Figure 2. Q1 and Q2 form a bandgap reference core whose
loop is closed around the output of the converter. When
VIN is 1V, the feedback voltage of 1.22V, along with an
80mV drop across R5 and R6, forward biases Q1 and Q2’s
base collector junctions to 300mV. Because this is not
enough to saturate either transistor, FB can be at a higher
voltage than VIN. When there is no load, FB rises slightly
above 1.22V, causing VC (the error amplifier’s output) to
decrease. When VC reaches the bias voltage on hysteretic
comparator A1, A1’s output goes low, turning off all
circuitry except the input stage, error amplifier and low-
battery detector. Total current consumption in this state is
50µA. As output loading causes the FB voltage to de-
crease, A1’s output goes high, enabling the rest of the IC.
Switch current is limited to approximately 100mA initially
after A1’s output goes high. If the load is light, the output
voltage (and FB voltage) will increase until A1’s output
goes low, turning off the rest of the LT1307. Low fre-
quency ripple voltage appears at the output. The ripple
frequencyisdependentonloadcurrentandoutputcapaci-
tance. This Burst Mode operation keeps the output regu-
lated and reduces average current into the IC, resulting in
high efficiency even at load currents of 100µA or less.
The LT1307B differs from the LT1307 in that there is no
hysteresis in comparator A1. Also, the bias point on A1 is
set lower than on the LT1307 so that switching can occur
at inductor current less than 100mA. Because A1 has no
hysteresis, there is no Burst Mode operation at light loads
and the device continues switching at constant frequency.
Thisresultsintheabsenceoflowfrequencyoutputvoltage
ripple at the expense of efficiency.
The difference between the two devices is clearly illus-
trated in Figures 3 and 4. The top two traces in Figure 3
show an LT1307/LT1307B circuit, using the components
indicated in Figure 1, set to a 5V output. Input voltage is
1.25V.Loadcurrentissteppedfrom1mAto41mAforboth
circuits. Low frequency Burst Mode operation voltage
ripple is observed on Trace A, while none is observed on
LT1307
VOUT
TRACE A
500mV/DIV
AC COUPLED
LT1307B
VOUT
TRACE B
500mV/DIV
AC COUPLED
41mA
IL
1mA
VIN = 1.25V
VOUT = 5V
1ms/DIV
1307 F03
If the output load increases sufficiently, A1’s output re-
mains high, resulting in continuous operation. When the
LT1307 is running continuously, peak switch current is
controlled by VC to regulate the output voltage. The switch
is turned on at the beginning of each switch cycle. When
thesummationofasignalrepresentingswitchcurrentand
a ramp generator (introduced to avoid subharmonic oscil-
lations at duty factors greater than 50%) exceeds the VC
signal, comparator A2 changes state, resetting the flip-
flopandturningofftheswitch.Outputvoltageincreasesas
switch current is increased. The output, attenuated by a
resistor divider, appears at the FB pin, closing the overall
loop. Frequency compensation is provided by an external
series RC network connected between the VC pin and
ground. Low-battery detector A4’s open collector output
(LBO) pulls low when the LBI pin voltage drops below
Figure 3. LT1307 Exhibits Burst Mode Operation Ripple at
1mA Load, LT1307B Does Not
LT1307
VOUT
TRACE A
200mV/DIV
AC COUPLED
LT1307B
VOUT
200mV/DIV
AC COUPLED
TRACE B
45mA
IL
5mA
VIN = 1.5V
VOUT = 5V
500µs/DIV
1307 F04
Figure 4. At Higher Loading and a 1.5V Supply, LT1307
Again Exhibits Burst Mode Operation Ripple at 5mA Load,
LT1307B Does Not
1307fa
8
LT1307/LT1307B
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APPLICATIO S I FOR ATIO
U
Trace B. Similarly, Figure 4 details the two circuits with a
quite evident, as is this particular device’s 575kHz switch-
ing frequency (nominal switching frequency is 600kHz).
Note,however,theabsenceofsignificantenergyat455kHz.
Figure7’splotreducesthefrequencyspanfrom255kHzto
655kHz with a 455kHz center. Burst Mode low frequency
ripple creates sidebands around the 575kHz switching
fundamental. These sidebands have low signal amplitude
at 455kHz, measuring –55dBmVRMS. As load current is
further reduced, the Burst Mode frequency decreases.
This spaces the sidebands around the switching fre-
quency closer together, moving spectral energy further
load step from 5mA to 45mA with a 1.5V input.
The LT1307B also can be used in lower current applica-
tions where a clean, low ripple output is needed. Figure 5
details transient response of a single cell to 3.3V con-
verter, using an inductor value of 100µH. This high induc-
tance minimizes ripple current, allowing the LT1307B to
regulate without skipping cycles. As the load current is
stepped from 5mA to 10mA, the output voltage responds
cleanly. Note that the VC pin loop compensation has been
made more conservative (increased C, decreased R).
40
RBW = 100Hz
30
VOUT
100mV/DIV
AC COUPLED
20
10
0
IL
–10
–20
–30
–40
–50
–60
20mA/DIV
10mA
IL
5mA
VIN = 1.25V
VOUT = 3.3V
1ms/DIV
1307 F05
Figure 5. Increasing L to 100µH, Along with RC = 36k,
CC = 20nF and COUT = 10µF, Low Noise Performance of
LT1307B Can Be Realized at Light Loads of 5mA to 10mA
1
10
100
1000
FREQUENCY (kHz)
1307 F06
Figure 6. Spectral Noise Plot of 3.3V Converter Delivering
5mA Load. Burst Mode Fundamental at 5.1kHz is 23dBmVRMS
or 14mVRMS
At light loads, the LT1307B will begin to skip alternate
cycles. The load point at which this occurs can be de-
creasedbyincreasingtheinductorvalue. However, output
ripplewillcontinuetobesignificantlylessthantheLT1307
output ripple. Further, the LT1307B can be forced into
micropower mode, where IQ falls from 1mA to 50µA by
pulling down VC to 0.3V or less externally.
–20
RBW = 100Hz
–25
–30
–35
–40
–45
–50
–55
–60
–65
–70
DC/DC CONVERTER NOISE CONSIDERATIONS
Switching regulator noise is a significant concern in many
communications systems. The LT1307 is designed to
keep noise energy out of the sensitive 455kHz band at all
load levels while consuming only 60µW to 100µW at no
load. At light load levels, the device is in Burst Mode,
causing low frequency ripple to appear at the output.
Figure 6 details spectral noise directly at the output of
Figure 1’s circuit in a 1kHz to 1MHz bandwidth. The
converter supplies a 5mA load from a 1.25V input. The
Burst Mode fundamental at 5.1kHz and its harmonics are
255
455
655
FREQUENCY (kHz)
1307 F07
Figure 7. Span Centered at 455kHz Shows –55dBmVRMS
(1.8µVRMS) at 455kHz. Burst Mode Creates Sidebands 5.1kHz
Apart Around the Switching Frequency Fundamental of 575kHz
1307fa
9
LT1307/LT1307B
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APPLICATIO S I FOR ATIO
away from 455kHz. Figure 8 shows the noise spectrum of
the converter with the load increased to 20mA. The
LT1307 shifts out of Burst Mode operation, eliminating
low frequency ripple. Spectral energy is present only at
the switching fundamental and its harmonics. Noise
voltage measures –5dBmVRMS or 560µVRMS at the
575kHzswitchingfrequency,andisbelow–60dBmVRMS
for all other frequencies in the range. By combining Burst
Mode with fixed frequency operation, the LT1307 keeps
noise away from 455kHz.
To eliminate the low frequency noise of Figure 6, the
LT1307 can be replaced with the LT1307B. Figure 9
detailsthespectralnoiseattheoutputofFigure1’scircuit
usinganLT1307Bat5mAload. Althoughspectralenergy
is present at 333kHz due to alternate pulse skipping, all
Burst Mode operation spectral components are gone.
Alternate pulse skipping can be eliminated by increasing
inductance.
FREQUENCY COMPENSATION
Obtaining proper values for the frequency compensation
network is largely an empirical, iterative procedure, since
variations in input and output voltage, topology, capacitor
value and ESR, and inductance make a simple formula
elusive. As an example, consider the case of a 1.25V to
3.3V boost converter supplying 50mA. To determine
optimum compensation, the circuit is built and a transient
load is applied to the circuit. Figure 10 shows the setup.
0
RBW = 100Hz
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
MBR0520L
10µH
V
OUT
255
455
655
V
SW
FB
FREQUENCY (kHz)
IN
66Ω
1M
1307 F08
SHDN
LT1307
1µF
Figure 8. With Converter Delivering 20mA, Low Frequency
Sidebands Disappear. Noise is Present Only at the 575kHz
Switching Frequency
3300Ω
10µF*
V
C
1.25V
GND
R
590k
C
50Ω
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
1307 • F10
*CERAMIC
Figure 10. Boost Converter with Simulated Load
Figure 11a details transient response without compensa-
tion components. Although the output ripple voltage at a
1mA load is low, allowing the error amplifier to operate
widebandresultsinexcessiverippleata50mAload. Some
kind of loop stabilizing network is obviously required. A
100k/22nF series RC is connected to the VC pin, resulting
in the response pictured in Figure 11b. The output settles
in about 7ms to 8ms. This may be acceptable, but we can
do better. Reducing C to 2nF gives Figure 11c’s response.
This is clearly in the right direction. After another order of
magnitude reduction, Figure 11d’s response shows some
205
455
705
FREQUENCY (kHz)
LT1307 • F09
Figure 9. LT1307B at 5mA Load Shows No Audio Components
or Sidebands About Switching Frequency, 333kHz
Fundamental Amplitude is –10dBmV, or 316µVRMS
1307fa
10
LT1307/LT1307B
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APPLICATIO S I FOR ATIO
U
VOUT
200mV/DIV
AC COUPLED
VOUT
200mV/DIV
AC COUPLED
51mA
IL
51mA
IL
1mA
1mA
5ms/DIV
1307 F11a
5ms/DIV
1307 F11b
Figure 11a. VC Pin Left Unconnected. Output Ripple
Voltage is 300mVP-P Under Load
Figure 11b. Inclusion of a 100k/22nF Series RC on VC
Pin Results in Overdamped Stable Response
VOUT
200mV/DIV
AC COUPLED
VOUT
200mV/DIV
AC COUPLED
51mA
IL
51mA
IL
1mA
1mA
1ms/DIV
1307 F11a
500µs/DIV
1307 F11b
Figure 11c. Reducing C to 2nF Speeds Up Response,
Although Still Overdamped
Figure 11d. A 100k/200pF Series RC Shows Some
Underdamping
VOUT
200mV/DIV
AC COUPLED
51mA
IL
1mA
1ms/DIV
1307 F11b
Figure 11e. A 100k/680pF RC Provides Optimum
Settling Time with No Ringing
underdamping.Nowsettlingtimeisabout300µs.Increas-
pole, requiring added C at the VC pin network to prevent
ingCto680pFresultsintheresponseshowninFigure11e.
This response has minimum settling time with no over-
shoot or underdamping.
loop oscillation.
Observant readers will notice R has been set to 100k for all
the photos in Figure 11. Usable R values can be found in
the 10k to 500k range, but after too many trips to the
resistor bins, 100k wins.
Converters using a 2-cell input need more capacitance at
the output. This added capacitance moves in the output
1307fa
11
LT1307/LT1307B
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APPLICATIO S I FOR ATIO
COMPONENT SELECTION
LAYOUT HINTS
The LT1307 switches current at high speed, mandating
carefulattentiontolayoutforproperperformance.Youwill
not get advertised performance with careless layouts.
Figure 12 shows recommended component placement.
Follow this closely in your PC layout. Note the direct path
of the switching loops. Input capacitor CIN must be placed
close (<5mm) to the IC package. As little as 10mm of wire
or PC trace from CIN to VIN will cause problems such as
inability to regulate or oscillation. A 1µF ceramic bypass
capacitor is the only input capacitance required provided
the battery has a low inductance path to the circuit. The
battery itself provides the bulk capacitance the device
requiresforproperoperation.Ifthebatteryislocatedsome
distancefromthecircuit, anadditionalinputcapacitormay
berequired. A100µFaluminumelectrolyticunitworkswell
in these cases. This capacitor need not have low ESR.
Inductors
Inductors appropriate for use with the LT1307 must pos-
sess three attributes. First, they must have low core loss at
600kHz. Most ferrite core units have acceptable losses at
this switching frequency. Inexpensive iron powder cores
should be viewed suspiciously, as core losses can cause
significant efficiency penalties at 600kHz. Second, the
inductor must handle current of 500mA without saturat-
ing.Thisplacesalowerlimitonthephysicalsizeoftheunit.
Molded chokes or chip inductors usually do not have
enough core to support 500mA current and are unsuitable
for the application. Lastly, the inductor should have low
DCR (copper wire resistance) to prevent efficiency-killing
I2Rlosses.LinearTechnologyhasidentifiedseveralinduc-
tors suitable for use with the LT1307. This is not an
exclusive list. There are many magnetics vendors whose
components are suitable for use. A few vendor’s compo-
nents are listed in Table 1.
C
C
R
C
KEEP TRACES
OR LEADS SHORT!
LT1307
1
2
3
4
8
7
6
5
Table 1. Inductors Suitable for Use with the LT1307
MAX
VALUE DCR
HEIGHT
(mm)
R1 R2
L
PART
MFR
COMMENT
C
IN
LQH3C100
DO1608-103
CD43-100
CD54-100
10µH
10µH
10µH
10µH
0.57 Murata-Erie
2.0
3.0
3.2
4.5
2.2
Smallest Size
0.16
0.18
0.10
Coilcraft
Sumida
Sumida
D
V
C
OUT
Best Efficiency
1210 Footprint
CTX32CT-100 10µH
0.50 Coiltronics
1307 F12
GROUND
OUT
Figure 12. Recommended Component Placement. Traces
Carrying High Current Are Direct. Trace Area at FB Pin and VC
Pin is Kept Low. Lead Length to Battery Should Be Kept Short
Capacitors
For single cell applications, a 10µF ceramic output capaci-
tor is generally all that is required. Ripple voltage in Burst
Mode can be reduced by increasing output capacitance.
For 2- and 3-cell applications, more than 10µF is needed.
For a typical 2-cell to 5V application, a 47µF to 100µF low
ESRtantalumcapacitorworkswell.AVXTPSseries(100%
surgetested)orSprague(don’tbevague—askforSprague)
594DseriesarebothgoodchoicesforlowESRcapacitors.
Alternatively, a 10µF ceramic in parallel with a low cost
(read high ESR) electrolytic capacitor, either tantalum or
aluminum, can be used instead. For through hole applica-
OPERATION FROM A LABORATORY POWER SUPPLY
If a lab supply is used, the leads used to connect the circuit
to the supply can have significant inductance at the
LT1307’s switching frequency. As in the previous situa-
tion, anelectrolyticcapacitormayberequiredatthecircuit
in order to reduce the AC impedance of the input suffi-
ciently. An alternative solution would be to attach the
circuitdirectlytothepowersupplyatthesupplyterminals,
without the use of leads. The power supply’s output
capacitance will then provide the bulk capacitance the
LT1307 circuit requires.
1307fa
12
LT1307/LT1307B
W U U
APPLICATIO S I FOR ATIO
tionswheresmallsizeisnotcritical, PanasonicHFQseries
aluminum electrolytic capacitors have been found to per-
form well.
U
V
IN
Q3
R2
SHUTDOWN
CURRENT
400k
SHDN
Table 2. Vendor Telephone Numbers
200k
VENDOR
Coilcraft
Marcon
Murata-Erie
Sumida
Tokin
COMPONENTS
Inductors
TELEPHONE
(708) 639-6400
(708) 913-9980
(404) 436-1300
(847) 956-0666
(408) 432-8020
(207) 282-5111
(603) 224-1961
(407) 241-7876
START-UP
CURRENT
Capacitors
Q2
Q1
Inductors, Capacitors
Inductors
1307 F13
Capacitors
Figure 13. Shutdown Circuit
AVX
Capacitors
Sprague
Coiltronics
Capacitors
LOW-BATTERY DETECTOR
Inductors
The LT1307’s low-battery detector is a simple PNP input
gain stage with an open collector NPN output. The nega-
tive input of the gain stage is tied internally to a 200mV
±5% reference. The positive input is the LBI pin. Arrange-
ment as a low-battery detector is straightforward. Figure
14 details hookup. R1 and R2 need only be low enough in
value so that the bias current of the LBI pin doesn’t cause
large errors. For R2, 100k is adequate. The 200mV refer-
ence can also be accessed as shown in Figure 15.
Diodes
Most of the application circuits on this data sheet specify
the Motorola MBR0520L surface mount Schottky diode.
This 0.5A, low drop diode complements the LT1307 quite
well. In lower current applications, a 1N4148 can be used,
although efficiency will suffer due to the higher forward
drop. This effect is particularly noticeable at low output
voltages. For higher voltage output applications, such as
LCD bias generators, the extra drop is a small percentage
of the output voltage so the efficiency penalty is small. The
low cost of the 1N4148 makes it attractive wherever it can
be used. In through hole applications the 1N5818 is the all
around best choice.
3.3V
R1
V
IN
LT1307
LBO
1M
LBI
+
–
TO PROCESSOR
R2
100k
200mV
V
LB
– 200mV
2µA
R1 =
INTERNAL
SHUTDOWN PIN
REFERENCE
GND
The LT1307 has a Shutdown pin (SHDN) that must be
groundedtoshutthedevicedownortiedtoavoltageequal
or greater than VIN to operate. The shutdown circuit is
shown in Figure 13.
1307 F14
Figure 14. Setting Low-Battery Detector Trip Point
Note that allowing SHDN to float turns on both the start-
up current (Q2) and the shutdown current (Q3) for VIN >
2VBE.TheLT1307doesn’tknowwhattodointhissituation
and behaves erratically. SHDN voltage above VIN is al-
lowed. This merely reverse-biases Q3’s base emitter junc-
tion, a benign condition.
200k
V
IN
2N3906
REF
LBO
LBI
LT1307
V
200mV
+
GND
10k
10µF
1307 F15
Figure 15. Accessing 200mV Reference
1307fa
13
LT1307/LT1307B
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APPLICATIO S I FOR ATIO
REVERSE BATTERY CONSIDERATIONS
tion after sustaining polarity reversal for the life of a single
AA alkaline cell.
TheLT1307isbuiltona junction-isolatedbipolarprocess.
The p-type substrate is connected to the GND pin of the
LT1307. Substrate diodes, normally reverse-biased, are
present on the SW pin and the VIN pin as shown in Figure
16. When the battery polarity is reversed, these diodes
conduct, as illustrated in Figure 17. With a single AA or
AAA cell, several hundred milliamperes flow in the circuit.
TheLT1307canwithstandthiscurrentwithoutdamage.In
laboratory tests, the LT1307 performed without degrada-
When using a 2- or 3-cell supply, an external protection
diode is recommended as shown in Figure 18. When the
batterypolarityisreversed, the1N4001conducts, limiting
reverse voltage across the LT1307 to a single diode drop.
Thisarrangementwillquicklydepletethecells’energy,but
it does prevent the LT1307 from excessive power dissipa-
tion and potential damage.
–1.5V
1.5V
CURRENT
FLOW
V
V
SW
SW
IN
IN
1 CELL
1 CELL
D1
D2
Q1
D1
D2
Q1
LT1307
GND
LT1307
GND
1307 F16
1307 F17
Figure 17. When Cell Is Reversed Current Flows through
D1 and D2
Figure 16. LT1307 Showing Internal Substrate Diodes D1 and D2.
In Normal Operation Diodes are Reverse-Biased
V
IN
SW
2 OR 3
1N4001
CELLS
LT1307
GND
1307 F18
Figure 18. 1N4001 Diode Protects LT1307 from Excessive Power
Dissipation When a 2- or 3-Cell Battery is Used
1307fa
14
LT1307/LT1307B
U
TYPICAL APPLICATIO S
Externally Controlled Burst Mode Operation
L1
10µH
MBR0520
V
OUT
1µF
CERAMIC
R4
1M
300k
V
SW
FB
IN
V
C
100k
R5
590k
2
LT1307B
R3
CELLS
V
OUT
698k
M1
3.3V
LBO
SHDN
LBI
2N7002
200mA
GND
C2*
3.0V IN LOW-POWER
1nF
+
R2
49.9k
10µF
C1
100µF
Burst Mode OPERATION
R1
10M
CERAMIC
C1 = AVX TPSC107K006R0150
L1 = COILCRAFT DO1608-103
SUMIDA CD43-100
*C2 OPTIONAL: REDUCES OUTPUT
RIPPLE CAUSED BY C1'S ESR
GROUND = HIGH POWER/LOW NOISE
FLOAT = Burst Mode OPERATION
1307 F19
SHUTDOWN
detector now drives the VC pin. R3 and R2 set the output
to 3V by allowing M1’s gate to go to VOUT until the output
voltage drops below 3V. R1 adds hysteresis, resulting in
low-frequency Burst Mode operation ripple voltage at the
output. By pulling the VC pin below a VBE, quiescent
currentoftheLT1307Bdropsto60µA, resultinginaccept-
able efficiency at loads in the 100µA range.
This circuit overcomes the limitation of load-based
transitioning between Burst Mode operation and constant
switching mode by adding external control. If M1’s gate is
grounded by an external open-drain signal, the converter
functionsnormallyinconstantswitchingmode,delivering
3.3V. Output noise is low, however efficiency at loads less
than 1mA is poor due to the 1mA supply current of the
LT1307B. If M1’s gate is allowed to float, the low-battery
VOUT
500mV/DIV
VOUT
100mV/DIV
100mA
IL
10mA
IL
10mA
100µA
0.2s/DIV
1307 F20
2ms/DIV
1307 F21
This photo details output voltage as the circuit is switched
between the two modes. Load current is 100µA in Burst
Mode operation; 10mA in constant switching mode.
This photo shows transient response in constant switch-
ing mode with a 10mA to 100mA stepped load. Output
ripple at the switching frequency can be reduced consid-
erably by adding a 10µF ceramic capacitor in parallel with
the 100µF tantalum.
1307fa
15
LT1307/LT1307B
TYPICAL APPLICATIO S
U
Low Cost 2-Cell to 5V
L1
10µH
V
IN
1N5818
1.4V TO 3.3V
5V
100mA
+
C1*
220µF
6.3V
C2
+
220µF
V
SW
FB
IN
6.3V
LT1307
1M
0.1µF
SHDN
0.1µF
GND
100k
4700pF
323k
1307 TA02
C1, C2: PANASONIC ECA0JFQ221
(DIGI-KEY P5604-ND)
L1: SUMIDA CD43-100
Step-Up/Step-Down Converter
2.2µF
CERAMIC
L1
10µH
V
IN
MBR0520
2.1V TO 4.8V
•
3.3V
100mA
V
SW
IN
10µF
CERAMIC
1µF
CERAMIC
LT1307
1.02M
608k
•
3
CELLS
V
C
FB
GND
L1*
SHDN
100k
1000pF
SHDN
1307 TA03
L1: COILTRONICS CTX10-1 OR 2 MURATA ERIE LQH3C100
EFFICIENCY ≈70% TO 73%
Constant Current NiCd Battery Charger with Overvoltage Protection
for Acknowledge-Back Pagers
2.2µF
CERAMIC
L1
10µH
V
IN
1.8V TO 1V
MBR0520L
15mA
3
2
•
1µF
V
SW
FB
IN
1M
•
1
V
C
1µF
CERAMIC
OVERVOLTAGE
PROTECTION
323k
1 CELL
AA OR
AAA
3 CELLS
NiCd
LT1307
4
30k
200mV
1nF
–100mV
LBO
LBI
SHDN
GND
47k
2200pF
280k
6.7Ω
1 = CHARGE
0 = SHUTDOWN
3V
1307 TA04
L1: COILTRONICS CTX10-1
1307fa
16
LT1307/LT1307B
U
TYPICAL APPLICATIO S
Single Cell Powered Constant Current LED Driver
L1
10µH
D1
V
IN
100k
D2
V
LBO
SW
FB
IN
Q1
NC
2N3906
LT1307B
C1
1µF
AA
CELL
V
C
LBI
CERAMIC
SHDN
GND
+
40mA
C3
22µF
C2
R2
22k
R1
5.1Ω
1µF
100k
CERAMIC
1307 TA05
ON/OFF
L1: MURATA-ERIE LQH3C100K04
D1: 1N4148
V
IN
C1, C2: CERAMIC
D2, D3: LUMEX SSL-X100133SRC/4 "MEGA-BRITE" RED LED
OR PANASONIC LNG992CF9 HIGH BRIGHTNESS BLUE LED
Flash Memory VPP Supply
L1
10µH
D1
12V/30mA FROM 3V
12V/60mA FROM 5V
V
IN
3V TO 5.5V
+
~250mV RIPPLE
0.33µF
1µF
TANTALUM
P-P
10pF
V
SW
FB
IN
SHUTDOWN
SHDN
LT1307
0.33µF
CERAMIC
×2
2M
1%
1N4148
47k
V
C
GND
232k
1%
2000pF
D1: MOTOROLA MBR0520L
L1: MURATA-ERIE LQH3C100K04
1307 TA09
High Voltage Flyback Converter
OPTIONAL
DOUBLER
2V
0.1µF
OUT
0.01µF
1N4148
T1
1:12
V
IN
T1: DALE LPE3325-A190, n = 12 (605) 665-9301
R1
1V TO 5V
•
1µF
3
1
4
6
CERAMIC
V
= 1.22V 1 +
OUT
(
)
R2
MAXIMUM DUTY CYCLE: ≈80%
•
DC
1 – DC
FOR FLYBACK, V
=
n(V – V
)
SW
OUT
IN
V
SW
FB
IN
R1
0.8
1 – 0.8
FOR 1V , MAXIMUM V
=
12(1 – 0.2) ≈ 37V
IN
OUT
SHUTDOWN
SHDN
LT1307
V
OUT
FOR 2V , MAXIMUM V
≈ 85V.
IN
OUT
HIGHER VOLTAGES ACHIEVED WITH CAPACITIVE DOUBLER OR TRIPLER
V
R2
C
240k
1%
NO SNUBBER REQUIRED WITH SPECIFIED TRANSFORMER AND V < 5V
IN
GND
0.1µF
100k
1000pF
1307 TA06
1307fa
17
LT1307/LT1307B
U
TYPICAL APPLICATIO S
Single Cell CCFL Power Supply
6
3
10
1
47pF
3kV
T1
4
5
2
1.5V
100Ω
C1
0.1µF
CCFL
Q1
Q2
1.5V
L1
33µH
D1
1.5V
V
SW
IN
1N4148
1µF
CERAMIC
LT1307B
10k
1
SHDN
FB
CELL
1N4148
GND
V
C
1k
0.1µF
0.1µF
10k
DIMMING
1307 TA08
1 = OPERATE
0 = SHUTDOWN
C1: WIMA MKP-20
D1: MOTOROLA MBR0520L
L1: SUMIDA CD54-330
T1: COILTRONICS CTX110611
Q1, Q2: ZETEX FZT-849
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
3.2 – 3.45
(.206)
(.126 – .136)
MIN
DETAIL “A”
0.254
0.65
(.0256)
BSC
0.42 ± 0.04
(.0165 ± .0015)
TYP
(.010)
0° – 6° TYP
GAUGE PLANE
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.53 ± 0.015
(.021 ± .006)
0.52
(.206)
REF
1.10
(.043)
MAX
0.86
(.34)
REF
8
7 6
5
DETAIL “A”
0.18
(.077)
3.00 ± 0.102
(.118 ± .004)
NOTE 4
SEATING
PLANE
4.88 ± 0.1
(.192 ± .004)
0.22 – 0.38
(.009 – .015)
0.13 ± 0.05
(.005 ± .002)
0.65
(.0256)
BCS
MSOP (MS8) 1001
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
1
2
3
4
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
1307fa
18
LT1307/LT1307B
U
PACKAGE DESCRIPTION
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
4
0.255 ± 0.015*
(6.477 ± 0.381)
1
2
3
0.130 ± 0.005
0.300 – 0.325
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.035
0.325
–0.015
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
+0.889
8.255
(
)
N8 1098
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 1298
1307fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1307/LT1307B
U
TYPICAL APPLICATIO
LCD Bias Generator
D1
–V
OUT
0.1µF
1µF
D2
D3
L1
V
OUT
16V TO 24V
5mA FROM 1 CELL
15mA FROM 2 CELLS
35mA FROM 3 CELLS
V
SW
IN
1µF
10pF
LT1307
3.3M
1, 2 OR 3
CELLS
V
C1
FB
C
SHDN
GND
100k
1M
215k
4700pF
1307 TA07
3.3µF
SHUTDOWN
+
L1: 3.3µH (1 CELL)
4.7µH (2 CELLS)
10µH (3 CELLS)
SUMIDA CD43
100k
MURATA-ERIE LQH3C
COILCRAFT D01608
PWM IN 3.3V, 0% TO 100%
C1: 1µF FOR +OUTPUT
0.01µF FOR –OUTPUT
D1 TO D3: MBR0530 OR 1N4148
RELATED PARTS
PART NUMBER
LTC®1163
LTC1174
LT1302
DESCRIPTION
COMMENTS
Triple High Side Driver for 2-Cell Inputs
Micropower Step-Down DC/DC Converter
High Output Current Micropower DC/DC Converter
2-Cell Micropower DC/DC Converter
1.8V Minimum Input, Drives N-Channel MOSFETs
94% Efficiency, 130µA I , 9V to 5V at 300mA
Q
5V/600mA from 2V, 2A Internal Switch, 200µA I
Q
LT1304
Low-Battery Detector Active in Shutdown
LTC1440/1/2
LTC1516
LTC3400
LTC3401
LTC3402
Ultralow Power Single/Dual Comparators with Reference
2-Cell to 5V Regulated Charge Pump
2.8µA I , Adjustable Hysteresis
Q
12µA I , No Inductors, 5V at 50mA from 3V Input
Q
600mA, 1.2MHz, Synchronous Boost Converter
1A, 3MHz, Synchronous Boost Converter
2A, 3MHz, Synchronous Boost Converter
92% Efficiency, V : 0.85V to 5V, ThinSOTTM Package
IN
97% Efficiency, V : 0.5V to 5V, 10-Lead MSOP
IN
97% Efficiency, V : 0.5V to 5V, 10-Lead MSOP
IN
ThinSOT is a trademark of Linear Technology Corporation.
1307fa
LT/TP 1101 1.5K REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 1995
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