LT1223CJ8 [Linear]

100MHz Current Feedback Amplifier; 100MHz的电流反馈放大器器
LT1223CJ8
型号: LT1223CJ8
厂家: Linear    Linear
描述:

100MHz Current Feedback Amplifier
100MHz的电流反馈放大器器

放大器
文件: 总12页 (文件大小:292K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LT1223  
100MHz Current  
Feedback Amplifier  
U
DESCRIPTIO  
EATURE  
S
F
100MHz Bandwidth at AV = 1  
1000V/µs Slew Rate  
Wide Supply Range: ±5V to ±15V  
1mV Input Offset Voltage  
1µA Input Bias Current  
5MInput Resistance  
75ns Settling Time to 0.1%  
50mA Output Current  
6mA Quiescent Current  
The LT1223 is a 100MHz current feedback amplifier with  
very good DC characteristics. The LT1223’s high slew  
rate,1000V/µs,widesupplyrange,±15V,andlargeoutput  
drive, ±50mA, make it ideal for driving analog signals over  
double- terminated cables. The current feedback amplifier  
hashighgainbandwidthathighgains,unlikeconventional  
op amps.  
The LT1223 comes in the industry standard pinout and  
can upgrade the performance of many older products.  
O U  
PPLICATI  
S
A
The LT1223 is manufactured on Linear Technology’s  
proprietary complementary bipolar process.  
Video Amplifiers  
Buffers  
IF and RF Amplification  
Cable Drivers  
8-, 10-, 12-Bit Data Acquisition Systems  
U
O
TYPICAL APPLICATI  
Video Cable Driver  
Voltage Gain vs Frequency  
60  
100MHz GAIN  
BANDWIDTH  
+
+
V
IN  
50  
40  
75Ω  
R
G
R
G
R
G
R
G
R
G
= 10  
= 33  
= 110  
= 470  
= ∞  
LT1223  
1k  
RG  
30  
75Ω  
CABLE  
R
F
1k  
20  
10  
V
OUT  
R
0
G
1k  
75Ω  
–10  
–20  
100k  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
R
F
A
= 1 +  
V
R
G
LT1223 • TPC01  
AT AMPLIFIER OUTPUT.  
6dB LESS AT V  
.
OUT  
LT1223 • TA02  
1
LT1223  
W W W  
U
/O  
ABSOLUTE AXI U RATI GS  
PACKAGE RDER I FOR ATIO  
Supply Voltage ...................................................... ±18V  
Differential Input Voltage ......................................... ±5V  
Input Voltage ............................ Equal to Supply Voltage  
Output Short Circuit Duration (Note 1) .........Continuous  
Operating Temperature Range  
LT1223M........................................ –55°C to 125°C  
LT1223C................................................ 0°C to 70°C  
Storage Temperature Range ................. –65°C to 150°C  
Junction Temperature Plastic Package........... 150°C  
Junction Temperature Ceramic Package ........ 175°C  
Lead Temperature (Soldering, 10 sec.)................. 300°C  
TOP VIEW  
ORDER PART  
NUMBER  
NULL  
–IN  
1
2
3
4
8
7
6
5
SHUTDOWN  
+
V
LT1223MJ8  
LT1223CJ8  
LT1223CN8  
LT1223CS8  
+IN  
OUT  
V
NULL  
J8 PACKAGE  
N8 PACKAGE  
8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP  
S8 PACKAGE  
8-LEAD PLASTIC SOIC  
S8 PART MARKING  
1223  
LT1223 • POI01  
TJ MAX = 175°C, θJA = 100°C/W(J8)  
J MAX = 150°C, θJA = 100°C/W(N8)  
J MAX = 150°C, θJA = 150°C/W(S8)  
T
T
V = ± 15V, T = 25°C, unless otherwise noted.  
ELECTRICAL CHARACTERISTICS  
S
A
LT1223M/C  
TYP  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
MAX  
±3  
UNITS  
mV  
µA  
V
OS  
Input Offset Voltage  
V
CM  
V
CM  
V
CM  
= 0V  
= 0V  
= 0V  
±1  
±1  
±1  
3.3  
2.2  
10  
I +  
IN  
Noninverting Input Current  
Inverting Input Current  
±3  
I –  
IN  
±3  
µA  
e
n
Input Noise Voltage Density  
Input Noise Current Density  
Input Resistance  
f = 1kHz, R = 1k, R = 10Ω  
nV/Hz  
pA/Hz  
MΩ  
pF  
F
G
i
n
f = 1kHz, R = 1k, R = 10Ω  
F G  
R
IN  
V
IN  
= ±10V  
1
C
IN  
Input Capacitance  
1.5  
±12  
63  
Input Voltage Range  
±10  
V
CMRR  
PSRR  
Common-Mode Rejection Ratio  
Inverting Input Current Common-Mode Rejection  
Power Supply Rejection Ratio  
Noninverting Input Current Power Supply Rejection  
Inverting Input Current Power Supply Rejection  
Large Signal Voltage Gain  
V
V
= ±10V  
= ±10V  
56  
dB  
CM  
30  
100  
nA/V  
dB  
CM  
V = ±4.5V to ±18V  
S
68  
80  
V = ±4.5V to ±18V  
S
12  
100  
500  
nA/V  
nA/V  
dB  
V = ±4.5V to ±18V  
S
60  
A
V
R
LOAD  
R
LOAD  
R
LOAD  
R
LOAD  
= 400, V  
= 400, V  
= 200Ω  
= ±10V  
= ±10V  
70  
1.5  
±10  
50  
89  
OUT  
OUT  
R
OL  
Transresistance, V /I –  
5
MΩ  
V
OUT IN  
V
Maximum Output Voltage Swing  
Maximum Output Current  
Slew Rate  
±12  
60  
OUT  
OUT  
I
= 200Ω  
mA  
V/µs  
MHz  
ns  
SR  
R = 1.5k, R = 1.5k, (Note 2)  
800  
1300  
100  
6.0  
6.0  
5
F
G
BW  
Bandwidth  
R = 1k, R = 1k, V  
= 100mV  
OUT  
F
G
t
t
Rise Time  
R = 1.5k, R = 1.5k, V  
= 1V  
= 1V  
= 1V  
r
F
G
OUT  
OUT  
OUT  
Propagation Delay  
Overshoot  
R = 1.5k, R = 1.5k, V  
ns  
PD  
F
G
R = 1.5k, R = 1.5k, V  
%
F
G
t
Settling Time, 0.1%  
Differential Gain  
R = 1k, R = 1k, V = 10V  
OUT  
75  
ns  
s
F
G
R = 1k, R = 1k, R = 150Ω  
0.02  
0.12  
35  
%
F
G
L
Differential Phase  
Open-Loop Output Resistance  
Supply Current  
R = 1k, R = 1k, R = 150Ω  
Deg  
F
G
L
R
V
V
= 0, I  
= 0  
OUT  
OUT  
OUT  
I
= 0V  
IN  
6
10  
4
mA  
mA  
S
Supply Current, Shutdown  
Pin 8 Current = 200µA  
2
2
LT1223  
V = ± 15V, VCM = 0V, 0°C TA 70°C, unless otherwise noted.  
ELECTRICAL CHARACTERISTICS  
S
LT1223C  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
±1  
±1  
±1  
1
TYP  
±3  
±3  
±3  
10  
±12  
63  
30  
80  
12  
60  
89  
5
MAX  
UNITS  
V
OS  
Input Offset Voltage  
V
V
V
V
= 0V  
= 0V  
= 0V  
mV  
µA  
µA  
CM  
CM  
CM  
I +  
IN  
Noninverting Input Current  
I –  
IN  
Inverting Input Current  
R
IN  
Input Resistance  
= ±10V  
MΩ  
V
IN  
Input Voltage Range  
±10  
56  
CMRR  
PSRR  
Common-Mode Rejection Ratio  
Inverting Input Current Common-Mode Rejection  
Power Supply Rejection Ratio  
Noninverting Input Current Power Supply Rejection  
Inverting Input Current Power Supply Rejection  
Large-Signal Voltage Gain  
V
V
= ±10V  
= ±10V  
dB  
CM  
100  
nA/V  
dB  
CM  
V = ±4.5V to ±18V  
S
68  
V = ±4.5V to ±18V  
100  
500  
nA/V  
nA/V  
dB  
S
V = ±4.5V to ±18V  
S
A
V
R
R
R
R
= 400, V  
= 400, V  
= 200Ω  
= ±10V  
= ±10V  
70  
1.5  
±10  
50  
LOAD  
LOAD  
LOAD  
LOAD  
OUT  
OUT  
R
Transresistance, V /I –  
MΩ  
V
OL  
OUT  
OUT  
S
OUT IN  
V
Maximum Output Voltage Swing  
Maximum Output Current  
Supply Current  
±12  
60  
6
I
I
= 200Ω  
mA  
mA  
mA  
V
IN  
= 0V  
10  
4
Supply Current, Shutdown  
Pin 8 Current = 200µA  
2
V = ± 15V, VCM = 0V, 55°C TA 125°C, unless otherwise noted.  
ELECTRICAL CHARACTERISTICS  
S
LT1223M  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
±1  
±1  
±1  
10  
±12  
63  
30  
80  
12  
60  
89  
5
MAX  
±5  
UNITS  
mV  
µA  
V
OS  
Input Offset Voltage  
V
V
V
V
= 0V  
= 0V  
= 0V  
CM  
CM  
CM  
I +  
IN  
Noninverting Input Current  
±5  
I –  
IN  
Inverting Input Current  
±10  
µA  
R
IN  
Input Resistance  
= ±10V  
1
MΩ  
V
IN  
Input Voltage Range  
±10  
56  
CMRR  
PSRR  
Common-Mode Rejection Ratio  
Inverting Input Current Common-Mode Rejection  
Power Supply Rejection Ratio  
Noninverting Input Current Power Supply Rejection  
Inverting Input Current Power Supply Rejection  
Large-Signal Voltage Gain  
V
V
= ±10V  
= ±10V  
dB  
CM  
100  
nA/V  
dB  
CM  
V = ±4.5V to ±15V  
S
68  
V = ±4.5V to ±15V  
S
200  
500  
nA/V  
nA/V  
dB  
V = ±4.5V to ±15V  
S
A
V
R
LOAD  
R
LOAD  
R
LOAD  
R
LOAD  
= 400, V  
= 400, V  
= 200Ω  
= ±10V  
= ±10V  
70  
1.5  
±7  
35  
OUT  
OUT  
R
Transresistance, V /I –  
MΩ  
V
OL  
OUT  
OUT  
S
OUT IN  
V
Maximum Output Voltage Swing  
Maximum Output Current  
Supply Current  
±12  
60  
6
I
I
= 200Ω  
mA  
mA  
mA  
V
IN  
= 0V  
10  
4
Supply Current, Shutdown  
Pin 8 Current = 200µA  
2
The  
denotes the specifications which apply over the full operating  
temperature range.  
Note 1: A heat sink may be required.  
Note 2: Noninverting operation, V  
= ±10V, measured at ±5V.  
OUT  
3
LT1223  
TYPICAL PERFOR A CE CHARACTERISTICS  
U W  
Supply Current vs Supply Voltage,  
Supply Current vs Supply Voltage  
(Shutdown)  
Output Short Circuit-Current vs  
Temperature  
V
IN = 0 (Operating)  
10  
8
4
3
2
1
0
100  
90  
80  
70  
60  
50  
40  
PIN 8 = 0V  
125°C  
25°C  
25°C  
6
125°C  
–55°C  
4
–55°C  
30  
20  
2
0
10  
0
0
2
4
6
8
10 12 14 16 18 20  
–50 –25  
0
25  
50  
75 100 125  
0
2
4
6
8
10 12 14 16 18 20  
SUPPLY VOLTAGE (±V)  
CASE TEMPERATURE (°C)  
SUPPLY VOLTAGE (±V)  
LT1223 • TPC03  
LT1223 • TPC04  
LT1223 • TPC02  
Input Common-Mode Limit vs  
Temperature  
+IB vs Common-Mode Voltage  
–IB vs Common-Mode Voltage  
10  
8
V+  
–1  
5
4
V
= ±15V  
S
V
= ±15V  
S
125°C  
V
= 15V  
6
4
2
3
2
1
S
–2  
–3  
–4  
+4  
+3  
+2  
–55°C  
25°C  
V = 5V  
S
–55°C  
25°C  
0
0
125°C  
–2  
–1  
–4  
–6  
–2  
–3  
–4  
–5  
V = –15V  
S
V = –5V  
S
+1  
V–  
–8  
–10  
–50 –25  
0
25  
50  
75 100 125  
–15 –10  
–5  
0
5
10  
15  
–15 –10  
–5  
0
5
10  
15  
TEMPERATURE (°C)  
COMMON MODE VOLTAGE (V)  
COMMON MODE VOLTAGE (V)  
LT1223 • TPC05  
LT1223 • TPC07  
LT1223 • TPC06  
Output Voltage Swing vs  
Load Resistor  
Output Voltage Swing vs  
Supply Voltage  
VOS vs Common-Mode Voltage  
20  
15  
20  
15  
20  
15  
V
S
= ±15V  
±
= 15V  
V
S
125°C  
125°C  
25°C  
10  
5
10  
5
25°C, –55°C  
10  
–55°C  
–55°C  
5
125°C  
0
0
0
25°C  
–5  
–5  
25°C  
–5  
–10  
–15  
–20  
–55°C  
–10  
–15  
–20  
–10  
–15  
–20  
25°C, –55°C  
125°C  
125°C  
–15 –10  
–5  
0
5
10  
15  
100  
1000  
LOAD RESISTOR ()  
10000  
0
2
4
6
8
10 12 14 16 18 20  
COMMON MODE VOLTAGE (V)  
SUPPLY VOLTAGE (±V)  
LT1223 • TPC08  
LT1223 • TPC09  
LT1223 • TPC10  
4
LT1223  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
–3dB Bandwidth vs  
Feedback Resistor  
–3dB Bandwidth vs  
Supply Voltage  
Minimum Feedback Resistor vs  
Voltage Gain  
100  
90  
80  
70  
60  
50  
40  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
100  
90  
80  
70  
60  
50  
40  
A
R
= 2; R = R  
F
R = R  
G
S
±
F
V
L
G
V
=
15V  
V
L
S
L
±
15V  
= 100 ; V  
=
A
R
= 2  
= 100  
= 25°C  
R
= 100  
NO CAPACITIVE LOAD  
T
A
R = 750  
F
R = 1k  
F
0dB PEAKING  
2dB PEAKING  
R = 1.5k  
F
30  
20  
30  
20  
R = 2k  
F
10  
0
10  
0
0
1
2
3
0
10  
20  
30  
40  
50  
60  
0
5
10  
15  
FEEDBACK RESISTOR (k)  
VOLTAGE GAIN (V/V)  
SUPPLY VOLTAGE (±V)  
LT1223 • TPC11  
LT1223 • TPC13  
LT1223 • TPC12  
Maximum Capacitive Load vs  
Feedback Resistor  
Open-Loop Voltage Gain vs  
Load Resistor  
Transimpedance vs Load Resistor  
10  
9
100  
90  
10k  
1k  
25°C  
V
O
= ±15V  
= ±10V  
A
R
= 2; R = R  
F G  
S
V
L
V
±
= 15V  
= 100; V  
S
8
7
6
5
4
3
2
1
0
PEAKING < 5dB  
–55°C  
80  
25°C  
125°C  
–55°C  
70  
60  
125°C  
100  
10  
50  
40  
V = ±15V  
O
S
V = ±10V  
100  
1000  
LOAD RESISTOR ()  
10000  
100  
1000  
LOAD RESISTOR ()  
10000  
0
1
2
3
FEEDBACK RESISTOR (k)  
LT1223 • TPC16  
LT1223 • TPC15  
LT1223 • TPC14  
Spot Noise Voltage and Current vs  
Frequency  
Power Supply Rejection vs  
Frequency  
Output Impedance vs Frequency  
80  
60  
40  
1000  
100  
10  
100  
10  
1
V
= ±15V  
V = ±15V  
S
S
R = 1k  
F
POSITIVE  
–i  
n
R
= R = 3k  
G
F
NEGATIVE  
R
= R = 1k  
G
e
F
n
20  
0
0.1  
+i  
n
0.01  
1
10k  
100k  
1M  
10M  
100M  
10  
100  
1k  
10k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
LT1223 • TPC18  
LT1223 • TPC17  
LT1223 • TPC19  
5
LT1223  
TYPICAL PERFOR A CE CHARACTERISTICS  
U W  
Voltage Gain and Phase vs  
Total Harmonic Distortion vs  
2nd and 3rd Harmonic  
Distortion vs Frequency  
Frequency  
Frequency  
20  
15  
225  
180  
0.1  
–20  
–30  
–40  
–50  
–60  
–70  
V
= ±15V  
V
= ±15V  
S
F
S
V
= ±15V  
S
2ND  
3RD  
R = R = 1k  
V
= 7V  
RMS  
G
O
R
R
V
= 2V  
P-P  
O
= 400Ω  
10  
5
135  
90  
R
R
A
= 100  
= 1k  
L
F
L
F
GAIN  
= R =1k  
G
= 10dB  
R = 100Ω  
R
1k  
V
L
L
0
–5  
45  
PHASE  
0.01  
0
R
1k  
L
–10  
–15  
–20  
–25  
–30  
–45  
–90  
–135  
–180  
–225  
R
= 100Ω  
L
THD  
0.001  
1M  
10M  
100M  
1G  
10  
100  
1k  
FREQUENCY (Hz)  
10k  
100k  
1
10  
100  
FREQUENCY (Hz)  
FREQUENCY (MHz)  
LT1223 • TPC21  
LT1223 • TPC20  
LT1223 • TPC22  
Noninverting Amplifier Settling  
Time to 10mV vs Output Step  
Noninverting Amplifier Settling  
Time to 1mV vs Output Step  
Inverting Amplifier Settling  
Time vs Output Step  
10  
8
10  
8
10  
8
A
R
V
= +1  
A
R
V
= +1  
V
F
A
R
V
= –1  
V
F
V
F
TO 10mV  
= 1k  
= 1k  
= 1k  
= ±15V  
= 1k  
= ±15V  
= 1k  
S
S
= ±15V  
= 1k  
6
TO 10mV  
6
6
S
R
TO 1mV  
R
R
L
L
L
TO 1mV  
4
4
4
2
2
2
0
0
0
–2  
–2  
–2  
–4  
–6  
–4  
–6  
–4  
–6  
TO 1mV  
TO 10mV  
20  
TO 1mV  
TO 10mV  
60  
–8  
–8  
–8  
–10  
–10  
–10  
0
20  
40  
80  
100  
0
1
2
0
40  
60  
80  
100  
SETTLING TIME (ns)  
SETTLING TIME (µs)  
SETTLING TIME (ns)  
LT1223 • TPC23  
LT1223 • TPC24  
LT1223 • TPC25  
O U  
W
U
PPLICATI  
A
S I FOR ATIO  
Current Feedback Basics  
does in a voltage feedback op amp, the closed-loop  
bandwidth does not change. This is because the equiva-  
lent gain bandwidth product of the current feedback am-  
plifier is set by the Thevenin equivalent resistance at the  
inverting input and the internal compensation capacitor.  
By keeping RF constant and changing the gain with RG, the  
Thevenin resistance changes by the same amount as the  
change in gain. As a result, the net closed-loop bandwidth  
of the LT1223 remains the same for various closed-loop  
gains.  
The small-signal bandwidth of the LT1223, like all current  
feedback amplifiers, isn’t a straight inverse function of the  
closed-loop gain. This is because the feedback resistors  
determine the amount of current driving the amplifier’s  
internal compensation capacitor. In fact, the amplifier’s  
feedback resistor (RF) from output to inverting input  
workswithinternaljunctioncapacitancesoftheLT1223to  
set the closed-loop bandwidth.  
Eventhoughthegainsetresistor(RG)frominvertinginput  
to ground works with RF to set the voltage gain just like it  
6
LT1223  
O U  
W
U
PPLICATI  
A
S I FOR ATIO  
The curve on the first page shows the LT1223 voltage gain  
versusfrequencywhiledriving100,forfivegainsettings  
from 1 to 100. The feedback resistor is a constant 1k and  
the gain resistor is varied from infinity to 10. Shown for  
comparison is a plot of the fixed 100MHz gain bandwidth  
limitation that a voltage feedback amplifier would have. It  
is obvious that for gains greater than one, the LT1223  
provides 3 to 20 times more bandwidth. It is also evident  
thatsecondorder effects reduce thebandwidthsomewhat  
at the higher gain settings.  
is not necessary to use equal value split supplies, how-  
ever, the offset voltage will degrade about 350µV per volt  
of mismatch. The internal compensation capacitor de-  
creases with increasing supply voltage. The –3dB Band-  
width versus Supply Voltage curve shows how this affects  
the bandwidth for various feedback resistors. Generally,  
the bandwidth at ±5V supplies is about half the value it is  
at ±15V supplies for a given feedback resistor.  
The LT1223 is very stable even with minimal supply  
bypassing, however, the transient response will suffer if  
thesupplyrings.Itisrecommendedforgoodslewrateand  
settling time that 4.7µF tantalum capacitors be placed  
within 0.5 inches of the supply pins.  
Feedback Resistor Selection  
Because the feedback resistor determines the compensa-  
tion of the LT1223, bandwidth and transient response can  
be optimized for almost every application. To increase the  
bandwidth when using higher gains, the feedback resistor  
(and gain resistor) can be reduced from the nominal 1k  
value. The Minimum Feedback Resistor versus Voltage  
Gain curve shows the values to use for ±15V supplies.  
Larger feedback resistors can also be used to slow down  
the LT1223 as shown in the –3dB Bandwidth versus  
Feedback Resistor curve.  
Input Range  
The noninverting input of the LT1223 looks like a 10M  
resistor in parallel with a 3pF capacitor until the common  
mode range is exceeded. The input impedance drops  
somewhat and the input current rises to about 10µA when  
the input comes too close to the supplies. Eventually,  
when the input exceeds the supply by one diode drop, the  
base collector junction of the input transistor forward  
biases and the input current rises dramatically. The input  
current should be limited to 10mA when exceeding the  
supplies. The amplifier will recover quickly when the input  
is returned to its normal common mode range unless the  
input was over 500mV beyond the supplies, then it will  
take an extra 100ns.  
Capacitive Loads  
The LT1223 can be isolated from capacitive loads with a  
small resistor (10to 20) or it can drive the capacitive  
load directly if the feedback resistor is increased. Both  
techniques lower the amplifier’s bandwidth about the  
same amount. The advantage of resistive isolation is that  
the bandwidth is only reduced when the capacitive load is  
present. The disadvantage of resistor isolation is that  
resistive loading causes gain errors. Because the DC  
accuracy is not degraded with resistive loading, the de-  
sired way of driving capacitive loads, such as flash con-  
verters, istoincreasethefeedbackresistor. TheMaximum  
Capacitive Load versus Feedback Resistor curve shows  
the value of feedback resistor and capacitive load that  
gives 5dB of peaking. For less peaking, use a larger  
feedback resistor.  
Offset Adjust  
Output offset voltage is equal to the input offset voltage  
times the gain plus the inverting input bias current times  
the feedback resistor. For low gain applications (3 or less)  
a 10kpot connected to pins 1 and 5 with wiper to V+ will  
trim the inverting input current (±10µA) to null the output;  
it does not change the offset voltage very much. If the  
LT1223 is used in a high gain application, where input  
offset voltage is the dominate error, it can be nulled by  
pullingapproximately100µAfrompin1or5.Theeasyway  
to do this is to use a 10kpot between pin 1 and 5 with a  
150k resistor from the wiper to ground for 15V supply  
applications. Use a 47k resistor when operating on a 5V  
supply.  
Power Supplies  
The LT1223 may be operated with single or split supplies  
as low as ±4V (8V total) to as high as ±18V (36V total). It  
7
LT1223  
PPLICATI  
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Shutdown  
Output Slew Rate of 500V/µs  
Pin 8 activates a shutdown control function. Pulling more  
than200µAfrompin8dropsthesupplycurrenttolessthan  
3mA, and puts the output into a high impedance state. The  
easy way to force shutdown is to ground pin 8, using an  
opencollector(drain)logicstage.Aninternalresistorlimits  
current, allowingdirectinterfacingwithnoadditionalparts.  
When pin 8 is open, the LT1223 operates normally.  
Slew Rate  
The slew rate of a current feedback amplifier is not inde-  
pendent of the amplifier gain configuration the way it is in  
a traditional op amp. This is because the input stage and  
the output stage both have slew rate limitations. Inverting  
amplifiers do not slew the input and are therefore limited  
only by the output stage. High gain, noninverting amplifi-  
ers are similar. The input stage slew rate of the LT1223 is  
about 350V/µs before it becomes nonlinear and is en-  
hanced by the normally reverse-biased emitters on the  
input transistors. The output slew rate depends on the size  
of the feedback resistors. The peak output slew rate is  
about 2000V/µs with a 1k feedback resistor and drops  
proportionally for larger values. At an output slew rate of  
1000V/µs or more, the transistors in the “mirror circuits”  
will begin to saturate due to the large feedback currents.  
Thiscausestheoutputtohaveslewinducedovershootand  
is somewhat unusual looking; it is in no way harmful or  
dangerous to the device. The photos show the LT1223 in  
a noninverting gain of three (RF = 1k, RG = 500) with a  
20V peak-to-peak output slewing at 500V/µs, 1000V/µs  
and 2000V/µs.  
Output Slew Rate of 1000V/µs  
Output Slew Rate at 2000V/µs Shows Aberrations (See Text)  
Settling Time  
The Inverting Amplifier Settling Time versus Output Step  
curve shows that the LT1223 will settle to within 1mV of  
final value in less than 100ns for all output changes of 10V  
or less. When operated as an inverting amplifier there is  
less than 500µV of thermal settling in the amplifier.  
However, when operating the LT1223 as a noninverting  
amplifier, there is an additional thermal settling compo-  
nent that is about 200µV for every volt of input common  
mode change. So a noninverting gain of one amplifier will  
8
LT1223  
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A
S I FOR ATIO  
have about 2.5mV thermal tail on a 10V step. Unfortu-  
nately, reducing the input signal and increasing the gain  
always results in a thermal tail of about the same amount  
for a given output step. For this reason we show separate  
graphs of 10mV and 1mV non-inverting amplifier settling  
times. Just as the bandwidth of the LT1223 is fairly  
constant for various closed-loop gains, the settling time  
remains constant as well.  
Accurate Bandwidth Limiting The LT1223  
It is very common to limit the bandwidth of an op amp by  
putting a small capacitor in parallel with RF. DO NOT PUT  
A SMALL CAPACITOR FROM THE INVERTING INPUT OF  
ACURRENTFEEDBACKAMPLIFIERTOANYWHERE ELSE,  
ESPECIALLY NOT TO THE OUTPUT. The capacitor on the  
inverting input will cause peaking or oscillations. If you  
needtolimitthebandwidthofacurrentfeedbackamplifier,  
use a resistor and capacitor at the noninverting input (R1  
& C1). This technique will also cancel (to a degree) the  
peakingcausedbystraycapacitanceattheinvertinginput.  
Unfortunately, this will not limit the output noise the way  
it does for the op amp.  
Adjustable Gain Amplifier  
TomakeavariablegainamplifierwiththeLT1223,varythe  
value of RG. The implementation of RG can be a pot, a light  
controlled resistor, a FET, or any other low capacitance  
variable resistor. The value of RF should not be varied to  
change the gain. If RF is changed, then the bandwidth will  
be reduced at maximum gain and the circuit will oscillate  
when RF is very small.  
R1  
V
+
IN  
LT1223  
V
OUT  
C1  
V
+
IN  
R
F
LT1223  
V
OUT  
R
G
R1 = 300Ω  
C1 = 100pF  
BW = 5MHz  
R
F
LT1223 • TA05  
R
G
LT1223 • TA03  
Current Feedback Amplifier Integrator  
Adjustable Bandwidth Amplifier  
Since we remember that the inverting input wants to see  
a resistor, we can add one to the standard integrator  
circuit. Thisgeneratesanewsummingnodewherewecan  
apply capacitive feedback. The LT1223 integrator has  
excellentlargesignalcapabilityandaccuratephaseshiftat  
high frequencies.  
Because the resistance at the inverting input determines  
the bandwidth of the LT1223, an adjustable bandwidth  
circuit can be made easily. The gain is set as before with  
RF and RG; the bandwidth is maximum when the variable  
resistor is at a minimum.  
V
+
IN  
+
LT1223  
V
OUT  
LT1223  
V
OUT  
V
V
OUT  
1
I
=
sC R  
IN  
I
5k  
R
F
R
R
F
G
1k  
C
I
R
I
V
IN  
LT1223 • TA04  
LT1223 • TA06  
9
LT1223  
PPLICATI  
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A
S I FOR ATIO  
inverting input (A1) senses the shield and the non-invert-  
ing input (A2) senses the center conductor. Since this  
amplifier does not load the cable (take care to minimize  
stray capacitance) and it rejects common mode hum and  
noise, several amplifiers can sense the signal with only  
one termination at the end of the cable. The design  
equations are simple. Just select the gain you need (it  
should be two or more) and the value of the feedback  
resistor (typically 1k) and calculate RG1 and RG2. The gain  
canbetweakedwithRG2 andtheCMRRwithRG1 ifneeded.  
The bandwidth of the noninverting input signal is not  
reduced by the presence of the other amplifier, however,  
the inverting input signal bandwidth is reduced since it  
passes two amplifiers. The CMRR is good at high frequen-  
cies because the bandwidth of the amplifiers are about the  
same even though they do not necessarily operate at the  
same gain.  
Summing Amplifier (DC Accurate)  
Thesummingamplifieriseasilymadebyaddingadditional  
inputs to the basic inverting amplifier configuration. The  
LT1223 has no IOS spec because there is no correlation  
betweenthetwoinputbiascurrents. Therefore, wewillnot  
improve the DC accuracy of the inverting amplifier by  
putting in the extra resistor in the noninverting input.  
+
LT1223  
V
OUT  
R
R
R
1
2
G
V
V
I1  
I2  
R
F
G
V
V
V
R
I1  
I2  
In  
V
= –R  
F
+
+
OUT  
(
)
R
R
G1  
G2  
Gn  
n
G
V
In  
LT1223 • TA07  
R
R
R
R
F2  
1k  
G1  
F1  
G2  
1k  
1k  
1k  
Difference Amplifier  
The LT1223 difference amplifier delivers excellent  
performance if the source impedance is very low. This is  
because the common mode input resistance is only equal  
to RF + RG.  
+
+
A1  
LT1223  
A2  
LT1223  
V
OUT  
V
V +  
IN  
IN  
R
(R –50)  
F
G
+
)
OPTIONAL TRIM  
FOR CMRR  
V
R
= G (V – V  
IN IN  
V
OUT  
1
R
F2  
G – 1  
100  
= R ; R = (G – 1) R ; R =  
F2 G1  
F1  
F2 G2  
TRIM GAIN (G) WITH R ; TRIM CMRR WITH R  
LT1223 • TA09  
G2  
G1  
+
LT1223  
V
OUT  
R
G
Cable Driver  
V
2
The cable driver circuit is shown on the front page. When  
driving a cable it is important to properly terminate both  
ends if even modest high frequency performance is  
required. The additional advantage of this is that it isolates  
the capacitive load of the cable from the amplifier so it can  
operate at maximum bandwidth.  
R
F
V
=
(V – V )  
R
F
1
2
OUT  
R
G
LT1223 • TA08  
Video Instrumentation Amplifier  
This instrumentation amplifier uses two LT1223s to in-  
crease the input resistance to well over 1M. This makes an  
excellent “loop through” or cable sensing amplifier if the  
10  
LT1223  
U
O
TYPICAL APPLICATI  
150mA Output Current Video Amp  
75Ω  
75Ω  
75Ω  
75Ω  
75Ω  
75Ω  
75Ω  
75Ω  
75Ω  
+
V
+
V
20Ω  
V
+
IN  
BIAS  
OUT  
IN  
2k  
LT1223  
LT1010  
V
V
2k  
R
= 2k TO STABILIZE CIRCUIT  
DIFFERENTIAL GAIN = 1%  
DIFFERENTIAL PHASE = 1°  
f
75Ω  
LT1223 • TA10  
W
W
SI PLIFIED SCHE ATIC  
7
15k  
1
5
BIAS  
10k  
8
3
6
2
BIAS  
4
LT1223 • TA01  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
11  
LT1223  
U
Dimensions in inches (millimeters) unless otherwise noted.  
PACKAGE DESCRIPTIO  
J8 Package  
8-Lead Ceramic DIP  
0.405  
(10.287)  
MAX  
0.005  
(0.127)  
MIN  
0.200  
(5.080)  
MAX  
0.290 – 0.320  
(7.366 – 8.128)  
6
5
4
8
7
0.015 – 0.060  
(0.381 – 1.524)  
0.025  
(0.635)  
RAD TYP  
0.220 – 0.310  
(5.588 – 7.874)  
0.008 – 0.018  
0° – 15°  
(0.203 – 0.460)  
1
2
3
0.055  
(1.397)  
MAX  
0.038 – 0.068  
(0.965 – 1.727)  
0.385 ± 0.025  
(9.779 ± 0.635)  
0.125  
3.175  
MIN  
0.100 ± 0.010  
0.014 – 0.026  
(2.540 ± 0.254)  
(0.360 – 0.660)  
J8 0392  
N8 Package  
8-Lead Plastic DIP  
0.400  
(10.160)  
MAX  
0.130 ± 0.005  
0.300 – 0.320  
0.045 – 0.065  
(3.302 ± 0.127)  
(1.143 – 1.651)  
(7.620 – 8.128)  
8
1
7
6
5
4
0.065  
(1.651)  
TYP  
0.250 ± 0.010  
(6.350 ± 0.254)  
0.009 – 0.015  
(0.229 – 0.381)  
0.125  
0.020  
(0.508)  
MIN  
(3.175)  
MIN  
+0.025  
–0.015  
2
3
0.045 ± 0.015  
(1.143 ± 0.381)  
0.100 ± 0.010  
(2.540 ± 0.254)  
0.325  
+0.635  
8.255  
(
)
–0.381  
0.018 ± 0.003  
(0.457 ± 0.076)  
N8 0392  
S8 Package  
8-Lead Plastic SOIC  
0.189 – 0.197  
(4.801 – 5.004)  
0.010 – 0.020  
(0.254 – 0.508)  
7
5
8
6
× 45°  
0.053 – 0.069  
(1.346 – 1.752)  
0.004 – 0.010  
(0.101 – 0.254)  
0.008 – 0.010  
(0.203 – 0.254)  
0.228 – 0.244  
0.150 – 0.157  
(5.791 – 6.197)  
(3.810 – 3.988)  
0.016 – 0.050  
0.406 – 1.270  
0.050  
(1.270)  
BSC  
0.014 – 0.019  
(0.355 – 0.483)  
0°– 8° TYP  
SO8 0392  
1
3
4
2
LT/GP 1092 5K REV A  
Linear Technology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7487  
12  
LINEAR TECHNOLOGY CORPORATION 1992  
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977  

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