LT1113AC [Linear]

Dual Low Noise, Precision, JFET Input Op Amps; 双路低噪声,高精度, JFET输入运算放大器
LT1113AC
型号: LT1113AC
厂家: Linear    Linear
描述:

Dual Low Noise, Precision, JFET Input Op Amps
双路低噪声,高精度, JFET输入运算放大器

运算放大器
文件: 总16页 (文件大小:247K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LT1113  
Dual Low Noise,  
Precision, JFET Input Op Amps  
U
FEATURES  
DESCRIPTIO  
TheLT®1113achievesanewstandardofexcellenceinnoise  
performance for a dual JFET op amp. The 4.5nV/Hz 1kHz  
noise combined with low current noise and picoampere  
bias currents makes the LT1113 an ideal choice for ampli-  
fying low level signals from high impedance capacitive  
transducers.  
100% Tested Low Voltage Noise: 6nV/Hz Max  
SO-8 Package Standard Pinout  
Voltage Gain: 1.2 Million Min  
Offset Voltage: 1.5mV Max  
Offset Voltage Drift: 15µV/°C Max  
Input Bias Current, Warmed Up: 450pA Max  
Gain Bandwidth Product: 5.6MHz Typ  
TheLT1113isunconditionallystableforgainsof1ormore,  
even with load capacitances up to 1000pF. Other key fea-  
tures are 0.4mV VOS and a voltage gain of 4 million. Each  
individual amplifier is 100% tested for voltage noise, slew  
rate and gain bandwidth.  
Guaranteed Specifications with ±5V Supplies  
Guaranteed Matching Specifications  
U
APPLICATIO S  
Photocurrent Amplifiers  
The design of the LT1113 has been optimized to achieve  
true precision performance with an industry standard  
pinout in the S0-8 package. A set of specifications are  
providedfor±5Vsuppliesandafullsetofmatchingspeci-  
fications are provided to facilitate the use of the LT1113 in  
matching dependent applications such as instrumenta-  
tion amplifier front ends.  
Hydrophone Amplifiers  
High Sensitivity Piezoelectric Accelerometers  
Low Voltage and Current Noise Instrumentation  
Amplifier Front Ends  
Two and Three Op Amp Instrumentation Amplifiers  
Active Filters  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
U
TYPICAL APPLICATIO  
Low Noise Hydrophone Amplifier with DC Servo  
1kHz Input Noise Voltage Distribution  
5V TO 15V  
8
R3  
V
= ±15V  
= 25°C  
R1*  
S
A
40  
30  
20  
10  
0
3.9k  
T
100M  
2
3
138 S8  
276 OP AMPS TESTED  
1
1/2  
OUTPUT  
LT1113  
+
C2  
C1*  
R2  
4
0.47µF  
200Ω  
–5V TO –15V  
R4  
1M  
R8  
+
6
5
C
T
R6  
100k  
100M  
HYDRO-  
PHONE  
7
1/2  
LT1113  
R5  
1M  
R7  
1M  
3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8  
INPUT VOLTAGE NOISE (nV/Hz)  
DC OUTPUT 2.5mV FOR T < 70°C  
A
1113 TA02  
OUTPUT VOLTAGE NOISE = 128nV/Hz AT 1kHz (GAIN = 20)  
C1 C 100pF TO 5000pF; R4C2 > R8C ; *OPTIONAL  
1113 TA01  
T
T
1
LT1113  
W W W  
U
(Note 1)  
ABSOLUTE AXI U RATI GS  
Supply Voltage  
Operating Temperature Range  
–55°C to 105°C ............................................... ±20V  
105°C to 125°C ............................................... ±16V  
Differential Input Voltage ...................................... ±40V  
Input Voltage (Equal to Supply Voltage)............... ±20V  
Output Short Circuit Duration .......................... 1 Minute  
Storage Temperature Range ................ 65°C to 150°C  
LT1113AC/LT1113C (Note 2) .......... 40°C to 85°C  
LT1113AM/LT1113M .................... 55°C to 125°C  
Specified Temperature Range  
LT1113AC/LT1113C (Note 3) .......... 40°C to 85°C  
LT1113AM/LT1113M .................... 55°C to 125°C  
Lead Temperature (Soldering, 10 sec) ................ 300°C  
W
U
/O  
PACKAGE RDER I FOR ATIO  
TOP VIEW  
ORDER PART  
ORDER PART  
TOP VIEW  
NUMBER  
NUMBER  
+
OUT A  
–IN A  
+IN A  
1
2
3
4
V
8
7
6
5
+
OUT A  
–IN A  
+IN A  
1
2
3
4
8
7
6
5
V
OUT B  
–IN B  
+IN B  
OUT B  
–IN B  
+IN B  
LT1113AMJ8  
LT1113MJ8  
LT1113ACN8  
LT1113CN8  
A
LT1113CS8  
A
B
B
V
V
S8 PART MARKING  
1113  
J8 PACKAGE  
N8 PACKAGE  
S8 PACKAGE  
8-LEAD PLASTIC SO  
8-LEAD CERDIP 8-LEAD PDIP  
TJMAX = 160°C, θJA = 100°C/W (J8)  
TJMAX = 150°C, θJA = 130°C/W (N8)  
TJMAX = 150°C, θJA = 190°C/W  
Consult factory for Industrial grade parts.  
VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.  
ELECTRICAL CHARACTERISTICS  
LT1113AM/AC  
TYP  
LT1113M/C  
TYP MAX  
SYMBOL PARAMETER  
CONDITIONS (Note 4)  
MIN  
MAX  
MIN  
UNITS  
V
Input Offset Voltage  
0.40  
0.45  
1.5  
1.7  
0.50  
0.55  
1.8  
2.0  
mV  
mV  
OS  
V = ±5V  
S
I
I
Input Offset Current  
Input Bias Current  
Warmed Up (Note 5)  
Warmed Up (Note 5)  
0.1Hz to 10Hz  
30  
300  
2.4  
100  
450  
35  
320  
2.4  
150  
480  
pA  
pA  
OS  
B
e
Input Noise Voltage  
Input Noise Voltage Density  
µV  
P-P  
n
f = 10Hz  
17  
4.5  
17  
4.5  
nV/Hz  
nV/Hz  
O
f = 1000Hz  
O
6.0  
6.0  
i
Input Noise Current Density  
f = 10Hz, f = 1000Hz (Note 6)  
10  
10  
fA/Hz  
n
O
O
R
Input Resistance  
Differential Mode  
Common Mode  
IN  
11  
11  
10  
10  
11  
11  
V
V
= 10V to 8V  
= 8V to 11V  
10  
10  
CM  
CM  
10  
10  
10  
10  
C
V
Input Capacitance  
14  
27  
14  
27  
pF  
pF  
IN  
V = ±5V  
S
Input Voltage Range (Note 7)  
13.0  
13.5  
–10.5 –11.0  
13.0  
13.5  
–10.5 –11.0  
V
V
CM  
CMRR  
PSRR  
Common Mode Rejection Ratio  
V
= –10V to 13V  
85  
86  
98  
82  
83  
95  
98  
dB  
dB  
CM  
Power Supply Rejection Ratio V = ±4.5V to ± 20V  
100  
S
A
Large-Signal Voltage Gain  
V = ±12V, R = 10k  
1200  
600  
4800  
4000  
1000 4500  
500 3000  
V/mV  
V/mV  
VOL  
O
L
V = ±10V, R = 1k  
O
L
2
LT1113  
VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.  
ELECTRICAL CHARACTERISTICS  
LT1113AM/AC  
LT1113M/C  
TYP  
SYMBOL PARAMETER  
CONDITIONS  
R = 10k  
MIN  
TYP  
MAX  
MIN  
MAX  
UNITS  
V
Output Voltage Swing  
±13.5 ±13.8  
±12.0 ±13.0  
±13.0 ±13.8  
±11.5 ±13.0  
V
V
OUT  
L
R = 1k  
L
SR  
Slew Rate  
R 2k (Note 9)  
2.3  
4.0  
3.9  
5.6  
4.2  
2.3  
4.0  
3.9  
5.6  
4.2  
V/µs  
MHz  
µs  
L
GBW  
Gain Bandwidth Product  
Settling Time  
f = 100kHz  
O
t
0.01%, A = +1, R = 1k,  
V L  
S
C 1000pF, 10V Step  
L
Channel Separation  
f = 10Hz, V = ±10V, R = 1k  
130  
126  
dB  
O
O
L
I
Supply Current per Amplifier  
5.3  
5.3  
6.25  
6.20  
5.3  
5.3  
6.50  
6.45  
mA  
mA  
S
V = ±5V  
S
V  
Offset Voltage Match  
0.8  
10  
94  
95  
2.5  
80  
0.8  
10  
94  
95  
3.3  
mV  
pA  
dB  
dB  
OS  
+
I  
Noninverting Bias Current Match Warmed Up (Note 5)  
120  
B
CMRR Common Mode Rejection Match (Note 11)  
PSRR Power Supply Rejection Match (Note 11)  
81  
82  
78  
80  
The denotes specifications which apply over the temperature range 0°C TA 70°C. VS = ±15V, VCM = 0V,  
unless otherwise noted. (Note 12)  
LT1113AC  
TYP  
LT1113C  
TYP  
SYMBOL PARAMETER  
CONDITIONS (Note 4)  
MIN  
MAX  
MIN  
MAX  
UNITS  
V
Input Offset Voltage  
0.6  
0.7  
2.1  
2.3  
0.7  
0.8  
2.5  
2.7  
mV  
mV  
OS  
V = ±5V  
S
V  
Temp  
Average Input Offset  
Voltage Drift  
(Note 8)  
7
15  
8
20  
µV/°C  
OS  
I
I
Input Offset Current  
50  
350  
55  
450  
pA  
pA  
OS  
B
Input Bias Current  
600  
1200  
700  
1600  
V
Input Voltage Range  
12.9  
13.4  
12.9  
13.4  
V
V
CM  
–10.0 –10.8  
–10.0 –10.8  
CMRR  
PSRR  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
Large-Signal Voltage Gain  
V
= –10V to 12.9V  
81  
83  
97  
99  
79  
81  
94  
97  
dB  
dB  
CM  
V = ±4.5V to ±20V  
S
A
V = ±12V, R = 10k  
V = ±10V, R = 1k  
900  
500  
3600  
2600  
800  
400  
3400  
2400  
V/mV  
V/mV  
VOL  
O
L
O
L
V
Output Voltage Swing  
R = 10k  
R = 1k  
L
±13.2 ±13.5  
±11.7 ±12.7  
±12.7 ±13.5  
±11.3 ±12.7  
V
V
OUT  
L
SR  
Slew Rate  
R 2k(Note 9)  
2.1  
3.2  
3.7  
4.5  
1.7  
3.2  
3.7  
4.5  
V/µs  
L
GBW  
Gain Bandwidth Product  
Supply Current per Amplifier  
f = 100kHz  
O
MHz  
I
5.3  
5.3  
6.35  
6.30  
5.3  
5.3  
6.55  
6.50  
mA  
mA  
S
V = ±5V  
S
V  
Offset Voltage Match  
0.9  
30  
93  
93  
3.5  
0.9  
35  
93  
93  
4.5  
mV  
pA  
dB  
dB  
OS  
+
I  
Noninverting Bias Current Match  
300  
400  
B
CMRR Common Mode Rejection Match (Note 11)  
PSRR Power Supply Rejection Match (Note 11)  
76  
79  
74  
77  
3
LT1113  
ELECTRICAL CHARACTERISTICS  
The denotes specifications which apply over the temperature range –40°C TA 85°C. VS = ±15V, VCM = 0V,  
unless otherwise noted. (Note 10)  
LT1113AC  
TYP  
LT1113C  
SYMBOL PARAMETER  
CONDITIONS (Note 4)  
V = ±5V  
MIN  
MAX  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
0.7  
0.8  
2.4  
2.6  
0.8  
0.9  
2.8  
3.0  
mV  
mV  
OS  
S
V  
Temp  
Average Input Offset  
Voltage Drift  
7
15  
8
20  
µV/°C  
OS  
I
I
Input Offset Current  
80  
700  
90  
1000  
pA  
pA  
OS  
B
Input Bias Current  
1750 3000  
13.0  
–10.0 –10.5  
1800 5000  
13.0  
–10.0 –10.5  
V
Input Voltage Range  
12.6  
12.6  
V
V
CM  
CMRR  
PSRR  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
Large-Signal Voltage Gain  
V
= –10V to 12.6V  
80  
81  
96  
98  
78  
79  
93  
96  
dB  
dB  
CM  
V = ±4.5V to ±20V  
S
A
V = ±12V, R = 10k  
V = ±10V, R = 1k  
850  
400  
3300  
2200  
750  
300  
3000  
2000  
V/mV  
V/mV  
VOL  
O
L
O
L
V
Output Voltage Swing  
R = 10k  
R = 1k  
L
±13.0 ±12.5  
±11.5 ±12.0  
±12.5 ±12.5  
±11.0 ±12.0  
V
V
OUT  
L
SR  
Slew Rate  
R 2k  
2.0  
2.9  
3.5  
4.3  
1.6  
2.9  
3.5  
4.3  
V/µs  
L
GBW  
Gain Bandwidth Product  
Supply Current per Amplifier  
f = 100kHz  
O
MHz  
I
5.30  
5.25  
6.35  
6.30  
5.30  
5.25  
6.55  
6.50  
mA  
mA  
S
V = ±5V  
S
V  
Offset Voltage Match  
1.0  
50  
93  
92  
4.4  
1.0  
55  
93  
92  
5.1  
mV  
pA  
dB  
dB  
OS  
+
I  
Noninverting Bias Current Match  
600  
900  
B
CMRR Common Mode Rejection Match (Note 11)  
PSRR Power Supply Rejection Match (Note 11)  
76  
77  
73  
75  
The denotes specifications which apply over the temperature range –55°C TA 125°C. VS = ±15V, VCM = 0V,  
unless otherwise noted. (Note 12)  
LT1113AM  
TYP  
LT1113M  
TYP  
SYMBOL PARAMETER  
CONDITIONS (Note 4)  
MIN  
MAX  
MIN  
MAX  
UNITS  
V
Input Offset Voltage  
0.8  
0.8  
2.7  
2.8  
0.9  
0.9  
3.3  
3.4  
mV  
mV  
OS  
V = ±5V  
S
V  
Temp  
Average Input Offset  
Voltage Drift  
(Note 8)  
5
12  
8
15  
µV/°C  
OS  
I
I
Input Offset Current  
0.8  
15  
50  
1.0  
25  
70  
nA  
nA  
OS  
B
Input Bias Current  
25  
27  
V
Input Voltage Range  
12.6  
13.0  
12.6  
13.0  
V
V
CM  
–10.0 –10.4  
–10.0 –10.4  
CMRR  
PSRR  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
V
= –10V to 12.6V  
79  
80  
95  
97  
77  
78  
92  
95  
dB  
dB  
CM  
V = ±4.5V to ±20V  
S
4
LT1113  
ELECTRICAL CHARACTERISTICS  
The denotes specifications which apply over the temperature range 55°C TA 125°C. VS = ±15V, VCM = 0V,  
unless otherwise noted. (Note 12)  
LT1113AM  
TYP  
LT1113M  
TYP  
SYMBOL PARAMETER  
CONDITIONS (Note 4)  
V = ±12V, R = 10k  
MIN  
MAX  
MIN  
MAX  
UNITS  
A
Large-Signal Voltage Gain  
800  
400  
2700  
1500  
700  
300  
2500  
1000  
V/mV  
V/mV  
VOL  
O
L
V = ±10V, R = 1k  
O
L
V
Output Voltage Swing  
R = 10k  
R = 1k  
L
±13.0 ±12.5  
±11.5 ±12.0  
±12.5 ±12.5  
±11.0 ±12.0  
V
V
OUT  
L
SR  
Slew Rate  
R 2k(Note 9)  
1.9  
2.2  
3.3  
3.4  
1.6  
2.2  
3.3  
3.4  
V/µs  
L
GBW  
Gain Bandwidth Product  
Supply Current Per Amplifier  
f = 100kHz  
O
MHz  
I
5.30  
5.25  
6.35  
6.30  
5.30  
5.25  
6.55  
6.50  
mA  
mA  
S
V = ±5V  
S
V  
Offset Voltage Match  
1.0  
1.8  
92  
5.0  
12  
1.0  
2.0  
92  
5.5  
20  
mV  
nA  
dB  
dB  
OS  
+
I  
Noninverting Bias Current Match  
B
CMRR Common Mode Rejection Match (Note 11)  
PSRR Power Supply Rejection Match (Note 11)  
75  
76  
73  
74  
91  
91  
Note 1: Absolute Maximum Ratings are those values beyond which the  
life of the device may be impaired.  
Note 2: The LT1113C is guaranteed functional over the Operating  
Temperature Range of –40°C to 85°C. The LT1113M is guaranteed  
functional over the Operating Temperature Range of 55°C to 125°C.  
Note 7: Input voltage range functionality is assured by testing offset  
voltage at the input voltage range limits to a maximum of 2.3mV  
(A grade) to 2.8mV (C grade).  
Note 8: This parameter is not 100% tested.  
Note 9: Slew rate is measured in A = –1; input signal is ±7.5V, output  
V
Note 3: The LT1113C is guaranteed to meet specified performance from  
0°C to 70°C. The LT1113C is designed, characterized and expected to  
meet specified performance from –40°C to 85°C but is not tested or QA  
sampled at these temperatures. For guaranteed I grade parts, consult the  
factory. The LT1113M is guaranteed to meet specified performance from  
–55°C to 125°C.  
Note 4: Typical parameters are defined as the 60% yield of parameter  
distributions of individual amplifiers, i.e., out of 100 LT1113s (200 op  
amps) typically 120 op amps will be better than the indicated  
specification.  
measured at ±2.5V.  
Note 10: The LT1113 is designed, characterized and expected to meet  
these extended temperature limits, but is not tested at –40°C and 85°C.  
Guaranteed I grade parts are available. Consult factory.  
Note 11: CMRR and PSRR are defined as follows:  
(1) CMRR and PSRR are measured in µV/V on the individual  
amplifiers.  
(2) The difference is calculated between the matching sides in µV/V.  
(3) The result is converted to dB.  
Note 12: The LT1113 is measured in an automated tester in less than  
one second after application of power. Depending on the package used,  
power dissipation, heat sinking, and air flow conditions, the fully  
warmed-up chip temperature can be 10°C to 50°C higher than the  
ambient temperature.  
Note 5: Warmed-up I and I readings are extrapolated to a chip  
B
OS  
temperature of 50°C from 25°C measurements and 50°C characterization  
data.  
Note 6: Current noise is calculated from the formula:  
1/2  
i = (2qI )  
n
B
–19  
where q = 1.6 • 10  
coulomb. The noise of source resistors up to 200M  
swamps the contribution of current noise.  
5
LT1113  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
1kHz Output Voltage Noise  
Density vs Source Resistance  
0.1Hz to 10Hz Voltage Noise  
Voltage Noise vs Frequency  
100  
10  
1
10k  
1k  
T
= 25°C  
= ±15V  
A
S
V
+
V
N
R
SOURCE  
100  
10  
1
TYPICAL  
1k  
V
N
1/f CORNER  
120Hz  
SOURCE  
T
= 25°C  
= ±15V  
A
S
RESISTANCE  
ONLY  
V
1
10  
100  
FREQUENCY (Hz)  
10k  
0
2
4
6
8
10  
100  
1k 10k 100k 1M 10M  
1G  
100M  
SOURCE RESISTANCE ()  
TIME (SEC)  
1113 G01  
1113 G03  
1113 G02  
Voltage Noise vs  
Chip Temperature  
Input Bias and Offset Currents vs  
Chip Temperature  
Input Bias and Offset Currents  
Over the Common-Mode Range  
10  
9
8
7
6
5
4
3
2
1
0
100n  
30n  
10n  
3n  
400  
300  
200  
100  
0
T
= 25°C  
= ±15V  
V
S
= ±15V  
V = ±15V  
S
A
S
V
NOT WARMED UP  
I , V = 0V  
B CM  
1n  
I , V = 10V  
B CM  
300p  
100p  
30p  
10p  
3p  
BIAS CURRENT  
I
, V = 0V  
OS CM  
I
, V = 10V  
OS CM  
OFFSET CURRENT  
1p  
–75  
50  
TEMPERATURE (°C)  
100 125  
–75  
50  
TEMPERATURE (°C)  
100 125  
–15 –10  
–5  
0
5
10  
15  
–50 –25  
0
25  
75  
–50 –25  
0
25  
75  
COMMON-MODE RANGE (V)  
1113 G04  
1113 G04  
1113 G06  
Common-Mode Rejection Ratio  
vs Frequency  
Power Supply Rejection Ratio  
vs Frequency  
Common-Mode Limit vs  
Temperature  
+
120  
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
V
–0  
T
= 25°C  
T
= 25°C  
= ±15V  
A
A
S
–0.5  
–1.0  
–1.5  
–2.0  
V
+
V
= 5V TO 20V  
+PSRR  
–PSRR  
4.0  
3.5  
V
= –5V TO –20V  
3.0  
2.5  
V
+2.0  
10  
1k  
10k 100k  
1M  
10M  
100  
–60  
–20  
20  
60  
100  
140  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
TEMPERATURE (°C)  
1113 G08  
1113 G09  
1113 G07  
6
LT1113  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Voltage Gain vs  
Chip Temperature  
Gain and Phase Shift vs  
Frequency  
Voltage Gain vs Frequency  
10  
9
8
7
6
5
4
3
2
1
0
50  
40  
30  
20  
10  
0
180  
140  
100  
60  
60  
V
V
V
= ±15V  
T
V
C
= 25°C  
S
O
O
T
= 25°C  
= ±15V  
A
S
L
A
S
= ±10V, R = 1k  
= ±15V  
L
V
80  
= ±12V, R = 10k  
= 10pF  
L
100  
120  
140  
160  
180  
R
=10k  
L
PHASE  
R
= 1k  
L
GAIN  
20  
–20  
–10  
–75  
50  
CHIP TEMPERATURE (°C)  
100 125  
0.1  
1
10  
100  
–50 –25  
0
25  
75  
0.01  
1
100  
10k  
1M  
100M  
FREQUENCY (MHz)  
FREQUENCY (Hz)  
1113 G11  
1113 G12  
1113 G10  
Small-Signal Transient Response  
Large-Signal Transient Response  
Supply Current vs Supply Voltage  
6
5
4
25°C  
–55°C  
125°C  
2µs/DIV  
AV = 1  
CL = 10pF  
1µs/DIV  
A
V = 1  
CL = 10pF  
V
S = ±15V  
VS = ±15V, ±5V  
±10  
±15  
0
±20  
±5  
1113 G14  
1113 G13  
SUPPLY VOLTAGE (V)  
1113 G15  
Output Voltage Swing vs  
Load Current  
Slew Rate and Gain-Bandwidth  
Product vs Temperature  
Capacitive Load Handling  
+
12  
10  
8
6
5
4
3
2
1
0
V
0.8  
–1.0  
–1.2  
1.4  
–1.6  
1.4  
50  
125°C  
V
= ±15V  
= 25°C  
10k  
25°C  
S
A
L
O
V
T
40  
30  
20  
10  
0
R
V
A
–55°C  
= 100mV  
P-P  
SLEW RATE  
GBW  
= +10, R = 10k, C = 20pF  
F
F
V
= ±5V TO ±20V  
S
6
1.2  
4
1.0  
A
= 1  
V
0.8  
–55°C  
25°C  
2
0.6  
A
= 10  
V
125°C  
–2  
0
V
+0.4  
–75  
50  
TEMPERATURE (°C)  
100 125  
–50 –25  
0
25  
75  
0
2
4
8
1
100  
CAPACITIVE LOAD (pF)  
–10 –8  
6
I
10  
0.1  
10  
1000 10000  
–6 –4  
I
SINK  
SOURCE  
OUTPUT CURRENT (mA)  
1113 G18  
1113 G16  
1113 G17  
7
LT1113  
TYPICAL PERFOR A CE CHARACTERISTICS  
U W  
Distribution of Offset Voltage Drift  
with Temperature (N8, S8)  
Distribution of Offset Voltage Drift  
with Temperature (J8)  
Warm-Up Drift  
40  
30  
20  
10  
0
40  
30  
20  
10  
0
500  
400  
300  
200  
100  
0
V
= ±15V  
V = ±15V  
S
V
T
= ±15V  
= 25°C  
S
S
A
S8 PACKAGE  
N8 PACKAGE  
75 J8  
150 OP AMPS  
78 S8  
100 N8  
356 OP AMPS  
J8 PACKAGE  
IN STILL AIR (S8 PACKAGE  
SOLDERED ONTO BOARD)  
0
1
2
3
4
5
6
–12 –10 –8 –6 –4 –2  
0
2
4
6
8
–25 –20 –15 –10  
–5  
0
5
10 15 20 25  
TIME AFTER POWER ON (MINUTES)  
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)  
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)  
1113 G21  
1113 G20  
1113 G19  
THD and Noise vs Frequency for  
THD and Noise vs Frequency for  
Noninverting Gain  
Inverting Gain  
Channel Separation vs Frequency  
1
160  
140  
120  
100  
80  
1
LIMITED BY  
THERMAL INTERACTION  
Z
= 2k 15pF  
P-P  
= +1, +10, +100  
Z
V
A
= 2k 15pF  
L
L
O
V
V
A
= 20V  
= 20V  
P-P  
O
V
= –1, –10, –100  
MEASUREMENT BANDWIDTH  
= 10Hz TO 80kHz  
MEASUREMENT BANDWIDTH  
= 10Hz TO 80kHz  
0.1  
0.01  
0.1  
0.01  
A
= –100  
A
= 100  
V
V
A
= –10  
V
60  
A
= 10  
LIMITED BY  
V
V
= ±15V  
S
40  
0.001  
0.0001  
0.001  
0.0001  
A
= 1  
V
PIN-TO-PIN  
A
V
= –1  
R
= 1k  
L
O
A
CAPACITANCE  
V
= 10V  
P-P  
20  
NOISE FLOOR  
NOISE FLOOR  
1k  
T
= 25°C  
0
10  
100  
1k  
10k 100k  
FREQUENCY (Hz)  
1M  
10M  
20  
100  
1k  
FREQUENCY (Hz)  
10k 20k  
20  
100  
10k 20k  
FREQUENCY (Hz)  
1113 G23  
1113 • G22  
1113 G24  
CCIF IMD Test (Equal Amplitude  
Tones at 13kHz, 14kHz)*  
THD and Noise vs Output  
Amplitude for Noninverting Gain  
THD and Noise vs Output  
Amplitude for Inverting Gain  
1
0.1  
0.1  
1
0.1  
Z
= 2k 15pF, f = 1kHz  
O
= +1, +10, +100  
V
R
T
= ±15V  
= 2k  
= 25°C  
L
V
Z
= 2k 15pF, f = 1kHz  
O
= –1, –10, –100  
S
L
L
V
A
A
MEASUREMENT BANDWIDTH  
= 10Hz TO 22kHz  
MEASUREMENT BANDWIDTH  
= 10Hz TO 22kHz  
A
0.01  
0.001  
A
= 100  
V
A
= –100  
A
= ±10  
V
0.01  
0.01  
V
A
= –10  
V
A
A
= 10  
= 1  
V
0.001  
0.001  
A
= –1  
V
V
NOISE FLOOR  
10 30  
NOISE FLOOR  
10  
0.0001  
0.0001  
0.0001  
0.3  
1
0.3  
1
OUTPUT SWING (V  
30  
20m  
0.1  
1
10  
30  
OUTPUT SWING (V  
)
OUTPUT SWING (V  
)
)
P-P  
P-P  
P-P  
1113 • G25  
1113 • G27  
1113 • G26  
* See LT1115 data sheet for definition of CCIF testing.  
8
LT1113  
W
U
O U  
I FOR ATIO  
S
PPLICATI  
A
The LT1113 dual in the plastic and ceramic DIP packages  
are pin compatible with and directly replace such JFET op  
amps as the OPA2111 and OPA2604 with improved noise  
performance. Being the lowest noise dual JFET op amp  
available to date, the LT1113 can replace many bipolar op  
amps that are used in amplifying low level signals from  
high impedance transducers. The best bipolar op amps  
will eventually loose out to the LT1113 when transducer  
impedance increases due to higher current noise. The low  
voltage noise of the LT1113 allows it to surpass every dual  
and most single JFET op amps available. For the best  
performance versus area available anywhere, the LT1113  
is offered in the narrow SO-8 surface mount package with  
standard pinout and no degradation in performance.  
ThismeanstheLT1113willbeatoutanydualJFETopamp,  
only the lowest noise bipolar op amps have the edge  
(at low source resistances). As the source resistance  
increases from 5k to 50k, the LT1113 will match the best  
bipolar op amps for noise performance, since the thermal  
noise of the transducer (4kTR) begins to dominate the  
total noise. A further increase in source resistance, above  
50k, iswheretheopamp’scurrentnoisecomponent(2qIB  
RTRANS) will eventually dominate the total noise. At these  
high source resistances, the LT1113 will out perform  
the lowest noise bipolar op amp due to the inherently low  
current noise of FET input op amps. Clearly, the LT1113  
will extend the range of high impedance transducers  
that can be used for high signal to noise ratios. This  
makes the LT1113 the best choice for high impedance,  
capacitive transducers.  
The low voltage and current noise offered by the LT1113  
makes it useful in a wide range of applications, especially  
where high impedance, capacitive transducers are used  
suchashydrophones,precisionaccelerometersandphoto  
diodes. The total output noise in such a system is the gain  
times the RMS sum of the op amp input referred voltage  
noise, the thermal noise of the transducer, and the op amp  
bias current noise times the transducer impedance.  
Figure 1 shows total input voltage noise versus source  
resistance. In a low source resistance (<5k) application  
the op amp voltage noise will dominate the total noise.  
The high input impedance JFET front end makes the  
LT1113 suitable in applications where very high charge  
sensitivityisrequired. Figure2illustratestheLT1113inits  
inverting and noninverting modes of operation. A charge  
amplifierisshownintheinvertingmodeexample;herethe  
gain depends on the principal of charge conservation at  
the input of the LT1113. The charge across the transducer  
capacitance, CS, is transferred to the feedback capacitor  
CF, resulting in a change in voltage, dV, equal to dQ/CF.  
1k  
LT1124*  
LT1113*  
C
R
S
S
+
100  
10  
1
SOURCE RESISTANCE = 2R = R  
S
LT1124  
V
* PLUS RESISTOR  
O
PLUS RESISTOR  
2
1000pF CAPACITOR  
C
R
S
S
2
V = A V  
+ 4kTR + 2q I • R  
B
n
V
n (OP AMP)  
LT1113  
LT1113  
LT1124  
RESISTOR NOISE ONLY  
1k 10k 100k 1M  
SOURCE RESISTANCE ()  
100  
10M 100M  
1113 • F01  
Figure 1. Comparison of LT1113 and LT1124 Total Output 1kHz Voltage Noise Versus Source Resistance  
9
LT1113  
PPLICATI  
W
U
O U  
S
I FOR ATIO  
A
R2  
R
F
C
B
C
F
R
B
+
+
OUTPUT  
OUTPUT  
C
R
R1  
S
S
TRANSDUCER  
C
R
R
C
C
= C  
C
S
B
B
S
S
S
B
B
F
F
= R  
R
= R  
R
S
C
R
S
S
> R1 OR R2  
dQ  
dt  
dV  
dt  
C
R
B
B
Q = CV;  
= I = C  
TRANSDUCER  
1113 • F02  
Figure 2. Noninverting and Inverting Gain Configurations  
The gain therefore is 1 + CF/CS. For unity gain, CF should  
equal the transducer capacitance plus the input capaci-  
tance of the LT1113 and RF should equal RS. In the  
noninverting mode example, the transducer current is  
converted to a change in voltage by the transducer capaci-  
tance; this voltage is then buffered by the LT1113 with a  
gain of 1 + R1/R2. A DC path is provided by RS, which is  
either the transducer impedance or an external resistor.  
Since RS is usually several orders of magnitude greater  
than the parallel combination of R1 and R2, RB is added to  
balance the DC offset caused by the noninverting input  
bias current and RS. The input bias currents, although  
small at room temperature, can create significant errors  
over increasing temperature, especially with transducer  
resistances of up to 100M or more. The optimum value for  
RB isdeterminedbyequatingthethermalnoise(4kTRS)to  
Reduced Power Supply Operation  
The LT1113 can be operated from ±5V supplies for lower  
power dissipation resulting in lower IB and noise at the  
expense of reduced dynamic range. To illustrate this  
benefit, let’s look at the following example:  
An LT1113CS8 operates at an ambient temperature of  
25°C with ±15V supplies, dissipating 318mW of power  
(typical supply current = 10.6mA for the dual). The SO-8  
package has a θJA of 190°C/W, which results in a die  
temperature increase of 60.4°C or a room temperature die  
operating temperature of 85.4°C. At ±5V supplies, the die  
temperature increases by only one third of the previous  
amount or 20.1°C resulting in a typical die operating  
temperature of only 45.1°C. A 40 degree reduction of die  
temperature is achieved at the expense of a 20V reduction  
in dynamic range. If no DC correction resistor is used at  
the input, the input referred offset will be the input bias  
current at the operating die temperature times the trans-  
ducerresistance(refertoInputBiasandOffsetCurrentsvs  
Chip Temperature graph in Typical Performance Charac-  
teristics section). A 100mV input VOS is the result of a 1nA  
IB (at 85°C) dropped across a 100M transducer resis-  
tance; at ±5V supplies, the input offset is only 28mV (IB at  
45°C is 280pA). Careful selection of a DC correction  
2
the current noise (2qIB) times RS . Solving for RS results  
in RB = RS = 2VT/IB  
kT  
q
VT =  
= 26mV at 25°C .  
A parallel capacitor, CB, is used to cancel the phase shift  
caused by the op amp input capacitance and RB.  
10  
LT1113  
W
U
O U  
I FOR ATIO  
S
PPLICATI  
A
INPUT: ±5.2V Sine Wave  
LT1113 Output  
OPA2111 Output  
Figure 3. Voltage Follower with Input Exceeding the Common-Mode Range ( VS = ±5V)  
resistor (RB) will reduce the IR errors due to IB by an order  
of magnitude. A further reduction of IR errors can be  
achieved by using a DC servo circuit shown in the applica-  
tions section of this data sheet. The DC servo has the  
advantage of reducing a wide range of IR errors to the  
millivolt level over a wide temperature variation. The  
preservation of dynamic range is especially important  
when reduced supplies are used, since input bias currents  
can exceed the nanoamp level for die temperatures  
over 85°C.  
Advantages of Matched Dual Op Amps  
In many applications the performance of a system  
depends on the matching between two operational ampli-  
fiersratherthantheindividualcharacteristicsofthetwoop  
amps. Two or three op amp instrumentation amplifiers,  
tracking voltage references and low drift active filters  
are some of the circuits requiring matching between two  
op amps.  
The well-known triple op amp configuration in Figure 4  
illustratestheseconcepts.Outputoffsetisafunctionofthe  
difference between the two halves of the LT1113. This  
error cancellation principle holds for a considerable  
number of input referred parameters in addition to  
offset voltage and bias current. Input bias current will  
be the average of the two noninverting input currents  
(IB+). The difference between these two currents (IB+)  
is the offset current of the instrumentation amplifier.  
Common mode and power supply rejections will be  
dependent only on the match between the two amplifiers  
(assuming perfect resistor matching).  
To take full advantage of a wide input common mode  
range, the LT1113 was designed to eliminate phase rever-  
sal. Referring to the photographs shown in Figure 3, the  
LT1113 is shown operating in the follower mode (AV = +1)  
at±5Vsupplieswiththeinputswinging±5.2V. Theoutput  
of the LT1113 clips cleanly and recovers with no phase  
reversal, unlike the competition as shown by the last  
photograph. This has the benefit of preventing lock-up in  
servo systems and minimizing distortion components.  
The effect of input and output overdrive on one amplifier  
has no effect on the other, as each amplifier is biased  
independently.  
11  
LT1113  
W
U
O U  
S
I FOR ATIO  
PPLICATI  
A
15V  
Typical performance of the instrumentation amplifier:  
Input offset voltage = 0.8mV  
Input bias current = 320pA  
3
8
R6  
R4  
1k  
IN  
+
1/2  
10k  
1
LT1113  
IC1  
2
C1  
50pF  
4
R1  
1k  
Input offset current = 10pA  
Input resistance = 1011Ω  
–15V  
R2  
Input noise = 3.4µVP-P  
2
3
200Ω  
1/2  
1
OUTPUT  
LT1113  
IC2  
High Speed Operation  
+
C
L
R3  
1k  
ThelownoiseperformanceoftheLT1113wasachievedby  
making the input JFET differential pair large to maximize  
the first stage gain. Increasing the JFET geometry also  
increases the parasitic gate capacitance, which if left  
unchecked, can result in increased overshoot and ringing.  
When the feedback around the op amp is resistive (RF),  
a pole will be created with RF, the source resistance and  
capacitance (RS,CS), and the amplifier input capacitance  
(CIN = 27pF). In closed loop gain configurations and  
with RS and RF in the kilohm range (Figure 5), this pole  
can create excess phase shift and even oscillation.  
A small capacitor (CF) in parallel with RF eliminates this  
problem. With RS(CS + CIN) = RFCF, the effect of the  
feedback pole is completely removed.  
6
5
R5  
1k  
1/2  
LT1113  
IC1  
7
+
+
IN  
R7  
10k  
GAIN = 100  
BANDWIDTH = 400kHz  
INPUT REFERRED NOISE = 6.6nV/Hz AT 1kHz  
WIDEBAND NOISE DC TO 400kHz = 6.6 µV  
1113 • F04  
RMS  
C
L
0.01µF  
Figure 4. Three Op Amp Instrumentation Amplifier  
The concepts of common mode and power supply  
rejection ratio match (CMRR and PSRR) are best  
demonstrated with a numerical example:  
Assume CMRRA = +50µV/V or 86dB,  
and CMRRB = + 39µV/V or 88dB,  
then CMRR = 11µV/V or 99dB;  
if CMRRB = -39µV/V which is still 88dB,  
then CMRR = 89µV/V or 81dB  
C
F
R
F
+
C
OUTPUT  
IN  
R
S
C
S
Clearly the LT1113, by specifying and guaranteeing all of  
these matching parameters, can significantly improve the  
performance of matching-dependent circuits.  
1113 • F05  
Figure 5.  
12  
LT1113  
U
O
TYPICAL APPLICATI S  
Accelerometer Amplifier with DC Servo  
C1  
1250pF  
R1  
100M  
R2  
18k  
R3  
2k  
C2  
2µF  
R4  
R4C2 = R5C3 > R1 (1 + R2/R3) C1  
OUTPUT = 0.8mV/pC* = 8.0mV/g**  
DC OUTPUT 2.7mV  
20M  
+
6
5
7
R5  
20M  
1/2 LT1113  
OUTPUT NOISE = 6nV/Hz AT 1kHz  
*PICOCOULOMBS  
**g = EARTH’S GRAVITATIONAL CONSTANT  
5V TO 15V  
C3  
2µF  
ACCELEROMETER  
B & K MODEL 4381  
OR EQUIVALENT  
8
2
3
1
1/2 LT1113  
+
OUTPUT  
4
1113 • TA03  
–5V TO –15V  
Paralleling Amplifiers to Reduce Voltage Noise  
3
+
1k  
A1  
1
1/2 LT1113  
2
51Ω  
51Ω  
1k  
10k  
3
2
15V  
8
+
1k  
A2  
1
6
5
1/2 LT1113  
7
OUTPUT  
1/2 LT1113  
+
1k  
4
–15V  
15V  
8
5
6
+
1k  
An  
7
1/2 LT1113  
4
1. ASSUME VOLTAGE NOISE OF LT1113 AND 51SOURCE RESISTOR = 4.6nV/Hz  
2. GAIN WITH n LT1113s IN PARALLEL = n • 200  
3. OUTPUT NOISE = n • 200 • 4.6nV/Hz  
–15V  
1k  
51Ω  
OUTPUT NOISE 4.6  
4. INPUT REFERRED NOISE =  
=
nV/Hz  
n • 200  
n  
5. NOISE CURRENT AT INPUT INCREASES n TIMES  
9µV  
5  
6. IF n = 5, GAIN = 1000, BANDWIDTH = 1MHz, RMS NOISE, DC TO 1MHz =  
= 4µV  
1113 • TA04  
13  
LT1113  
TYPICAL APPLICATI S  
U
O
Low Noise Light Sensor with DC Servo  
C1  
2pF  
R1  
1M  
2
1
1/2 LT1113  
C2  
OUTPUT  
+
3
0.022µF  
D2  
1N914  
C
D
+V  
R2  
100k  
8
6
D1  
1N914  
R3  
1k  
7
2N3904  
1/2 LT1113  
+
5
4
R5  
1k  
R4  
1k  
–V  
HAMAMATSU  
S1336-5BK  
R2C2 > C1R1  
C
D
V
O
= PARASITIC PHOTODIODE CAPACITANCE  
= 100mV/µWATT FOR 200nm WAVE LENGTH  
330mV/µWATT FOR 633nm WAVE LENGTH  
1113 • TA05  
V
10Hz Fourth Order Chebyshev Lowpass Filter (0.01dB Ripple)  
R2  
237k  
R5  
154k  
C1  
33nF  
C3  
10nF  
15V  
8
R1  
237k  
R3  
249k  
2
3
R4  
154k  
R6  
V
IN  
249k  
6
5
1
1/2 LT1113  
C2  
100nF  
7
+
V
OUT  
1/2 LT1113  
+
C4  
330nF  
4
–15V  
TYPICAL OFFSET 0.8mV  
1% TOLERANCES  
FOR V = 10V , V  
= –121dB AT f > 330Hz  
= – 6dB AT f = 16.3Hz  
IN  
P-P OUT  
1113 • TA06  
LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS  
14  
LT1113  
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.  
J8 Package  
8-Lead CERDIP (Narrow 0.300, Hermetic)  
(LTC DWG # 05-08-1110)  
CORNER LEADS OPTION  
(4 PLCS)  
0.023 – 0.045  
(0.584 – 1.143)  
HALF LEAD  
OPTION  
0.405  
(10.287)  
MAX  
0.005  
(0.127)  
MIN  
0.200  
(5.080)  
MAX  
0.045 – 0.068  
0.300 BSC  
(0.762 BSC)  
(1.143 – 1.727)  
FULL LEAD  
OPTION  
6
5
4
8
7
0.015 – 0.060  
(0.381 – 1.524)  
0.025  
(0.635)  
RAD TYP  
0.220 – 0.310  
(5.588 – 7.874)  
0.008 – 0.018  
(0.203 – 0.457)  
0° – 15°  
J8 1298  
1
2
3
0.045 – 0.065  
(1.143 – 1.651)  
0.125  
3.175  
MIN  
0.014 – 0.026  
(0.360 – 0.660)  
0.100  
(2.54)  
BSC  
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE  
OR TIN PLATE LEADS  
N8 Package  
8-Lead PDIP (Narrow 0.300)  
(LTC DWG # 05-08-1510)  
0.400*  
(10.160)  
MAX  
0.130 ± 0.005  
0.300 – 0.325  
0.045 – 0.065  
(3.302 ± 0.127)  
(1.143 – 1.651)  
(7.620 – 8.255)  
8
1
7
6
5
0.065  
(1.651)  
TYP  
0.255 ± 0.015*  
(6.477 ± 0.381)  
0.009 – 0.015  
(0.229 – 0.381)  
0.125  
0.020  
(0.508)  
MIN  
(3.175)  
MIN  
+0.035  
–0.015  
2
4
3
0.325  
0.018 ± 0.003  
0.100  
(2.54)  
BSC  
N8 1098  
+0.889  
8.255  
(0.457 ± 0.076)  
(
)
–0.381  
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.  
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)  
S8 Package  
8-Lead Plastic Small Outline (Narrow 0.150)  
(LTC DWG # 05-08-1610)  
0.189 – 0.197*  
(4.801 – 5.004)  
0.010 – 0.020  
(0.254 – 0.508)  
7
5
8
6
× 45°  
0.053 – 0.069  
(1.346 – 1.752)  
0.004 – 0.010  
(0.101 – 0.254)  
0.008 – 0.010  
(0.203 – 0.254)  
0°– 8° TYP  
0.150 – 0.157**  
(3.810 – 3.988)  
0.228 – 0.244  
(5.791 – 6.197)  
0.016 – 0.050  
(0.406 – 1.270)  
0.050  
(1.270)  
BSC  
0.014 – 0.019  
(0.355 – 0.483)  
TYP  
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE  
SO8 1298  
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD  
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  
1
2
3
4
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
15  
LT1113  
TYPICAL APPLICATI S  
U
O
Light Balance Detection Circuit  
R1  
1M  
C1  
I
I
1
2pF TO 8pF  
PD  
PD  
1
V
= 1M • (I – I )  
1 2  
2
OUT  
PD PD = HAMAMATSU S1336-5BK  
1,  
WHEN EQUAL LIGHT ENTERS PHOTODIODES, V  
< 3mV.  
OUT  
2
V
1/2 LT1113  
OUT  
+
2
1113 • TA07  
Unity Gain Buffer with Extended Load Capacitance Drive Capability  
R2  
1k  
C1  
C1 = C 0.1µF  
L
R1  
33Ω  
OUTPUT SHORT-CIRCUIT CURRENT  
( 30mA) WILL LIMIT THE RATE AT WHICH THE  
V
1/2 LT1113  
+
VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS  
dV  
OUT  
(I = C  
)
V
IN  
dt  
C
L
1113 • TA08  
RELATED PARTS  
PART NUMBER  
LT1028  
DESCRIPTION  
COMMENTS  
Single Low Noise Precision Op Amp  
Dual Low Noise Precision Op Amp  
Dual Low Noise Precision JFET Op Amp  
V
V
= 1.1nV/Hz Max  
= 4.2nV/Hz Max  
NOISE  
NOISE  
LT1124  
LT1169  
10pA I  
B
LT1462  
Dual Picoamp I C-LoadTM Op Amp  
I = 2pA Max, 10000pF C-Load, I = 45µA  
B S  
B
LT1464  
Dual Picoamp I C-Load Op Amp  
I = 2pA Max, 10000pF C-Load, I = 200µA  
B
B
S
LT1792  
Single Low Noise Precision Op Amp  
Single Low Noise Precision Op Amp  
Single LT1113  
LT1793  
Single LT1169  
C-Load is a trademark of Linear Technology Corporation.  
1113fa LT/TP 0100 2K REV A • PRINTED IN USA  
LINEAR TECHNOLOGY CORPORATION 1993  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
16  
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com  

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